VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h

Last change on this file was 102808, checked in by vboxsync, 4 months ago

Devices/Graphics: multisampling.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 26.1 KB
Line 
1/* $Id: DevVGA-SVGA.h 102808 2024-01-10 08:16:30Z vboxsync $ */
2/** @file
3 * VMware SVGA device
4 */
5/*
6 * Copyright (C) 2013-2023 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * SPDX-License-Identifier: GPL-3.0-only
25 */
26
27#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
28#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
29#ifndef RT_WITHOUT_PRAGMA_ONCE
30# pragma once
31#endif
32
33#ifndef VBOX_WITH_VMSVGA
34# error "VBOX_WITH_VMSVGA is not defined"
35#endif
36
37#define VMSVGA_USE_EMT_HALT_CODE
38
39#include <VBox/pci.h>
40#include <VBox/vmm/pdmifs.h>
41#include <VBox/vmm/pdmthread.h>
42#include <VBox/vmm/stam.h>
43#ifdef VMSVGA_USE_EMT_HALT_CODE
44# include <VBox/vmm/vmapi.h>
45# include <VBox/vmm/vmcpuset.h>
46#endif
47
48#include <iprt/avl.h>
49#include <iprt/list.h>
50
51
52/*
53 * PCI device IDs.
54 */
55#ifndef PCI_VENDOR_ID_VMWARE
56# define PCI_VENDOR_ID_VMWARE 0x15AD
57#endif
58#ifndef PCI_DEVICE_ID_VMWARE_SVGA2
59# define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
60#endif
61#ifndef PCI_DEVICE_ID_VMWARE_SVGA3
62# define PCI_DEVICE_ID_VMWARE_SVGA3 0x0406
63#endif
64
65/* For "svga_overlay.h" */
66#ifndef TRUE
67# define TRUE 1
68#endif
69#ifndef FALSE
70# define FALSE 0
71#endif
72
73/* VMSVGA headers. */
74#include "vmsvga_headers_begin.h"
75#pragma pack(1) /* VMSVGA structures are '__packed'. */
76#include <svga3d_caps.h>
77#include <svga3d_reg.h>
78#include <svga3d_shaderdefs.h>
79#include <svga_escape.h>
80#include <svga_overlay.h>
81#include <vbsvga3d_dx.h>
82#pragma pack()
83#include "vmsvga_headers_end.h"
84
85/**@def FLOAT_FMT_STR
86 * Format string bits to go with FLOAT_FMT_ARGS. */
87#define FLOAT_FMT_STR "%s%u.%06u"
88/** @def FLOAT_FMT_ARGS
89 * Format arguments for a float value, corresponding to FLOAT_FMT_STR.
90 * @param r The floating point value to format. */
91#define FLOAT_FMT_ARGS(r) (r) >= 0.0f ? "" : "-", (unsigned)RT_ABS(r) \
92 , (unsigned)(RT_ABS((r) - (float)(unsigned)(r)) * 1000000.0f)
93
94/* Deprecated commands. They are not included in the VMSVGA headers anymore. */
95#define SVGA_CMD_RECT_FILL 2
96#define SVGA_CMD_DISPLAY_CURSOR 20
97#define SVGA_CMD_MOVE_CURSOR 21
98
99/*
100 * SVGA_CMD_RECT_FILL --
101 *
102 * Fill a rectangular area in the the GFB, and copy the result
103 * to any screens which intersect it.
104 *
105 * Deprecated?
106 *
107 * Availability:
108 * SVGA_CAP_RECT_FILL
109 */
110
111typedef
112struct {
113 uint32_t pixel;
114 uint32_t destX;
115 uint32_t destY;
116 uint32_t width;
117 uint32_t height;
118} SVGAFifoCmdRectFill;
119
120/*
121 * SVGA_CMD_DISPLAY_CURSOR --
122 *
123 * Turn the cursor on or off.
124 *
125 * Deprecated.
126 *
127 * Availability:
128 * SVGA_CAP_CURSOR?
129 */
130
131typedef
132struct {
133 uint32_t id; // Reserved, must be zero.
134 uint32_t state; // 0=off
135} SVGAFifoCmdDisplayCursor;
136
137/*
138 * SVGA_CMD_MOVE_CURSOR --
139 *
140 * Set the cursor position.
141 *
142 * Deprecated.
143 *
144 * Availability:
145 * SVGA_CAP_CURSOR?
146 */
147
148typedef
149struct {
150 SVGASignedPoint pos;
151} SVGAFifoCmdMoveCursor;
152
153
154/** Default FIFO size. */
155#define VMSVGA_FIFO_SIZE _2M
156/** The old FIFO size. */
157#define VMSVGA_FIFO_SIZE_OLD _128K
158
159/** Default scratch region size. */
160#define VMSVGA_SCRATCH_SIZE 0x100
161/** Surface memory available to the guest. */
162#define VMSVGA_SURFACE_SIZE (512*1024*1024)
163/** Maximum GMR pages. */
164#define VMSVGA_MAX_GMR_PAGES 0x100000
165/** Maximum nr of GMR ids. */
166#define VMSVGA_MAX_GMR_IDS _8K
167/** Maximum number of GMR descriptors. */
168#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
169
170#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
171
172/** For validating X and width values.
173 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
174#define VMSVGA_MAX_X _1M
175/** For validating Y and height values.
176 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
177#define VMSVGA_MAX_Y _1M
178
179/* u32ActionFlags */
180#define VMSVGA_ACTION_CHANGEMODE_BIT 0
181#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
182
183
184#ifdef DEBUG
185/* Enable to log FIFO register accesses. */
186//# define DEBUG_FIFO_ACCESS
187/* Enable to log GMR page accesses. */
188//# define DEBUG_GMR_ACCESS
189#endif
190
191#define VMSVGA_FIFO_EXTCMD_NONE 0
192#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
193#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
194#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
195#define VMSVGA_FIFO_EXTCMD_RESET 4
196#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
197#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
198
199/** Size of the region to backup when switching into svga mode. */
200#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
201
202/** @def VMSVGA_WITH_VGA_FB_BACKUP
203 * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
204 * is SLOW and probably not entirely right, but it helps with getting 3dmark
205 * output and other stuff. */
206#define VMSVGA_WITH_VGA_FB_BACKUP 1
207
208/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
209 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
210#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
211# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
212#else
213# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
214#endif
215
216/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
217 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
218#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
219# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
220#else
221# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
222#endif
223
224
225typedef struct
226{
227 PSSMHANDLE pSSM;
228 uint32_t uVersion;
229 uint32_t uPass;
230} VMSVGA_STATE_LOAD;
231typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
232
233/** Host screen viewport.
234 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
235typedef struct VMSVGAVIEWPORT
236{
237 uint32_t x; /**< x coordinate (left). */
238 uint32_t y; /**< y coordinate (top). */
239 uint32_t cx; /**< width. */
240 uint32_t cy; /**< height. */
241 /** Right side coordinate (exclusive). Same as x + cx. */
242 uint32_t xRight;
243 /** First quadrant low y coordinate.
244 * Same as y + cy - 1 in window coordinates. */
245 uint32_t yLowWC;
246 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
247 * Same as y - 1 in window coordinates. */
248 uint32_t yHighWC;
249 /** Alignment padding. */
250 uint32_t uAlignment;
251} VMSVGAVIEWPORT;
252
253#ifdef VBOX_WITH_VMSVGA3D
254typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
255#endif
256
257/**
258 * Screen object state.
259 */
260typedef struct VMSVGASCREENOBJECT
261{
262 /** SVGA_SCREEN_* flags. */
263 uint32_t fuScreen;
264 /** The screen object id. */
265 uint32_t idScreen;
266 /** The screen dimensions. */
267 int32_t xOrigin;
268 int32_t yOrigin;
269 uint32_t cWidth;
270 uint32_t cHeight;
271 /** Offset of the screen buffer in the guest VRAM. */
272 uint32_t offVRAM;
273 /** Scanline pitch. */
274 uint32_t cbPitch;
275 /** Bits per pixel. */
276 uint32_t cBpp;
277 /** The physical DPI that the guest expects for this screen. Zero, if the guest is not DPI aware. */
278 uint32_t cDpi;
279 bool fDefined;
280 bool fModified;
281 void *pvScreenBitmap;
282#ifdef VBOX_WITH_VMSVGA3D
283 /** Pointer to the HW accelerated (3D) screen data. */
284 R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
285#endif
286} VMSVGASCREENOBJECT;
287
288/** Pointer to the private VMSVGA ring-3 state structure.
289 * @todo Still not entirely satisfired with the type name, but better than
290 * the previous lower/upper case only distinction. */
291typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
292/** Pointer to the private (implementation specific) VMSVGA3d state. */
293typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
294
295
296/**
297 * The VMSVGA device state.
298 *
299 * This instantatiated as VGASTATE::svga.
300 */
301typedef struct VMSVGAState
302{
303 /** Guest physical address of the FIFO memory range. */
304 RTGCPHYS GCPhysFIFO;
305 /** Size in bytes of the FIFO memory range.
306 * This may be smaller than cbFIFOConfig after restoring an old VM state. */
307 uint32_t cbFIFO;
308 /** The configured FIFO size. */
309 uint32_t cbFIFOConfig;
310 /** SVGA id. */
311 uint32_t u32SVGAId;
312 /** SVGA extensions enabled or not. */
313 uint32_t fEnabled;
314 /** SVGA memory area configured status. */
315 uint32_t fConfigured;
316 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
317 * VMSVGA_BUSY_F_EMT_FORCE). */
318 uint32_t volatile fBusy;
319#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
320#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
321 /** Traces (dirty page detection) enabled or not. */
322 uint32_t fTraces;
323 /** Guest OS identifier. */
324 uint32_t u32GuestId;
325 /** Scratch region size (VMSVGAState::au32ScratchRegion). */
326 uint32_t cScratchRegion;
327 /** Irq status. */
328 uint32_t u32IrqStatus;
329 /** Irq mask. */
330 uint32_t u32IrqMask;
331 /** Pitch lock. */
332 uint32_t u32PitchLock;
333 /** Current GMR id. (SVGA_REG_GMR_ID) */
334 uint32_t u32CurrentGMRId;
335 /** SVGA device capabilities. */
336 uint32_t u32DeviceCaps;
337 uint32_t u32DeviceCaps2; /* Used to be I/O port base address and Padding0. */
338 /** Guest driver information (SVGA_REG_GUEST_DRIVER_*). */
339 uint32_t u32GuestDriverId;
340 uint32_t u32GuestDriverVer1;
341 uint32_t u32GuestDriverVer2;
342 uint32_t u32GuestDriverVer3;
343 /** The last fence received. */
344 uint32_t u32FenceLast;
345 /** Port io index register. */
346 uint32_t u32IndexReg;
347 /** FIFO request semaphore. */
348 SUPSEMEVENT hFIFORequestSem;
349 /** The last seen SVGA_FIFO_CURSOR_COUNT value.
350 * Used by the FIFO thread and its watchdog. */
351 uint32_t uLastCursorUpdateCount;
352 /** Indicates that the FIFO thread is sleeping and might need waking up. */
353 bool volatile fFIFOThreadSleeping;
354 /** The legacy GFB mode registers. If used, they correspond to screen 0. */
355 /** True when the guest modifies the GFB mode registers. */
356 bool fGFBRegisters;
357 /** SVGA 3D overlay enabled or not. */
358 bool f3DOverlayEnabled;
359 /** Indicates that the guest behaves incorrectly. */
360 bool volatile fBadGuest;
361 /** Whether the VirtualBox extensions for VMSVGA device (new commands and caps) are enabled. */
362 bool fVBoxExtensions;
363 /** Whether MSAA support is enabled. */
364 bool fVMSVGA3dMSAA;
365 bool afPadding[2];
366 uint32_t uWidth;
367 uint32_t uHeight;
368 uint32_t uBpp;
369 uint32_t cbScanline;
370 uint32_t uHostBpp;
371 /** Maximum width supported. */
372 uint32_t u32MaxWidth;
373 /** Maximum height supported. */
374 uint32_t u32MaxHeight;
375 /** Viewport rectangle, i.e. what's currently visible of the target host
376 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
377 * shrunk and scrolling applied, both the origin and size may differ. */
378 VMSVGAVIEWPORT viewport;
379 /** Action flags */
380 uint32_t u32ActionFlags;
381 /** SVGA 3d extensions enabled or not. */
382 bool f3DEnabled;
383 /** VRAM page monitoring enabled or not. */
384 bool fVRAMTracking;
385 /** External command to be executed in the FIFO thread. */
386 uint8_t volatile u8FIFOExtCommand;
387 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
388 * thread and does not want it do anything but the command. */
389 bool volatile fFifoExtCommandWakeup;
390#ifdef DEBUG_GMR_ACCESS
391 /** GMR debug access handler type handle. */
392 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
393#endif
394#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) || defined(DEBUG_FIFO_ACCESS)
395 /** FIFO debug access handler type handle. */
396 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
397#endif
398 /** Number of GMRs (VMSVGA_MAX_GMR_IDS, count of elements in VMSVGAR3STATE::paGMR array). */
399 uint32_t cGMR;
400 uint32_t uScreenOffset; /* Used only for loading older saved states. */
401
402 /** Legacy cursor state. */
403 uint32_t uCursorX;
404 uint32_t uCursorY;
405 uint32_t uCursorID;
406 uint32_t uCursorOn;
407
408 /** Scratch array.
409 * Putting this at the end since it's big it probably not . */
410 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
411
412 /** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
413 uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
414 /** Index written to the SVGA_REG_DEV_CAP register. */
415 uint32_t u32DevCapIndex;
416 /** Low 32 bit of a command buffer address written to the SVGA_REG_COMMAND_LOW register. */
417 uint32_t u32RegCommandLow;
418 /** High 32 bit of a command buffer address written to the SVGA_REG_COMMAND_HIGH register. */
419 uint32_t u32RegCommandHigh;
420
421 STAMCOUNTER StatRegBitsPerPixelWr;
422 STAMCOUNTER StatRegBusyWr;
423 STAMCOUNTER StatRegCursorXWr;
424 STAMCOUNTER StatRegCursorYWr;
425 STAMCOUNTER StatRegCursorIdWr;
426 STAMCOUNTER StatRegCursorOnWr;
427 STAMCOUNTER StatRegDepthWr;
428 STAMCOUNTER StatRegDisplayHeightWr;
429 STAMCOUNTER StatRegDisplayIdWr;
430 STAMCOUNTER StatRegDisplayIsPrimaryWr;
431 STAMCOUNTER StatRegDisplayPositionXWr;
432 STAMCOUNTER StatRegDisplayPositionYWr;
433 STAMCOUNTER StatRegDisplayWidthWr;
434 STAMCOUNTER StatRegEnableWr;
435 STAMCOUNTER StatRegGmrIdWr;
436 STAMCOUNTER StatRegGuestIdWr;
437 STAMCOUNTER StatRegHeightWr;
438 STAMCOUNTER StatRegIdWr;
439 STAMCOUNTER StatRegIrqMaskWr;
440 STAMCOUNTER StatRegNumDisplaysWr;
441 STAMCOUNTER StatRegNumGuestDisplaysWr;
442 STAMCOUNTER StatRegPaletteWr;
443 STAMCOUNTER StatRegPitchLockWr;
444 STAMCOUNTER StatRegPseudoColorWr;
445 STAMCOUNTER StatRegReadOnlyWr;
446 STAMCOUNTER StatRegScratchWr;
447 STAMCOUNTER StatRegSyncWr;
448 STAMCOUNTER StatRegTopWr;
449 STAMCOUNTER StatRegTracesWr;
450 STAMCOUNTER StatRegUnknownWr;
451 STAMCOUNTER StatRegWidthWr;
452 STAMCOUNTER StatRegCommandLowWr;
453 STAMCOUNTER StatRegCommandHighWr;
454 STAMCOUNTER StatRegDevCapWr;
455 STAMCOUNTER StatRegCmdPrependLowWr;
456 STAMCOUNTER StatRegCmdPrependHighWr;
457
458 STAMCOUNTER StatRegBitsPerPixelRd;
459 STAMCOUNTER StatRegBlueMaskRd;
460 STAMCOUNTER StatRegBusyRd;
461 STAMCOUNTER StatRegBytesPerLineRd;
462 STAMCOUNTER StatRegCapabilitesRd;
463 STAMCOUNTER StatRegConfigDoneRd;
464 STAMCOUNTER StatRegCursorXRd;
465 STAMCOUNTER StatRegCursorYRd;
466 STAMCOUNTER StatRegCursorIdRd;
467 STAMCOUNTER StatRegCursorOnRd;
468 STAMCOUNTER StatRegDepthRd;
469 STAMCOUNTER StatRegDisplayHeightRd;
470 STAMCOUNTER StatRegDisplayIdRd;
471 STAMCOUNTER StatRegDisplayIsPrimaryRd;
472 STAMCOUNTER StatRegDisplayPositionXRd;
473 STAMCOUNTER StatRegDisplayPositionYRd;
474 STAMCOUNTER StatRegDisplayWidthRd;
475 STAMCOUNTER StatRegEnableRd;
476 STAMCOUNTER StatRegFbOffsetRd;
477 STAMCOUNTER StatRegFbSizeRd;
478 STAMCOUNTER StatRegFbStartRd;
479 STAMCOUNTER StatRegGmrIdRd;
480 STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
481 STAMCOUNTER StatRegGmrMaxIdsRd;
482 STAMCOUNTER StatRegGmrsMaxPagesRd;
483 STAMCOUNTER StatRegGreenMaskRd;
484 STAMCOUNTER StatRegGuestIdRd;
485 STAMCOUNTER StatRegHeightRd;
486 STAMCOUNTER StatRegHostBitsPerPixelRd;
487 STAMCOUNTER StatRegIdRd;
488 STAMCOUNTER StatRegIrqMaskRd;
489 STAMCOUNTER StatRegMaxHeightRd;
490 STAMCOUNTER StatRegMaxWidthRd;
491 STAMCOUNTER StatRegMemorySizeRd;
492 STAMCOUNTER StatRegMemRegsRd;
493 STAMCOUNTER StatRegMemSizeRd;
494 STAMCOUNTER StatRegMemStartRd;
495 STAMCOUNTER StatRegNumDisplaysRd;
496 STAMCOUNTER StatRegNumGuestDisplaysRd;
497 STAMCOUNTER StatRegPaletteRd;
498 STAMCOUNTER StatRegPitchLockRd;
499 STAMCOUNTER StatRegPsuedoColorRd;
500 STAMCOUNTER StatRegRedMaskRd;
501 STAMCOUNTER StatRegScratchRd;
502 STAMCOUNTER StatRegScratchSizeRd;
503 STAMCOUNTER StatRegSyncRd;
504 STAMCOUNTER StatRegTopRd;
505 STAMCOUNTER StatRegTracesRd;
506 STAMCOUNTER StatRegUnknownRd;
507 STAMCOUNTER StatRegVramSizeRd;
508 STAMCOUNTER StatRegWidthRd;
509 STAMCOUNTER StatRegWriteOnlyRd;
510 STAMCOUNTER StatRegCommandLowRd;
511 STAMCOUNTER StatRegCommandHighRd;
512 STAMCOUNTER StatRegMaxPrimBBMemRd;
513 STAMCOUNTER StatRegGBMemSizeRd;
514 STAMCOUNTER StatRegDevCapRd;
515 STAMCOUNTER StatRegCmdPrependLowRd;
516 STAMCOUNTER StatRegCmdPrependHighRd;
517 STAMCOUNTER StatRegScrnTgtMaxWidthRd;
518 STAMCOUNTER StatRegScrnTgtMaxHeightRd;
519 STAMCOUNTER StatRegMobMaxSizeRd;
520} VMSVGAState, VMSVGASTATE;
521
522
523/**
524 * The VMSVGA device state for ring-3
525 *
526 * This instantatiated as VGASTATER3::svga.
527 */
528typedef struct VMSVGASTATER3
529{
530 /** The R3 FIFO pointer. */
531 R3PTRTYPE(uint32_t *) pau32FIFO;
532 /** R3 Opaque pointer to svga state. */
533 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
534 /** R3 Opaque pointer to 3d state. */
535 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
536 /** The separate VGA frame buffer in svga mode.
537 * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
538 * separate frame buffer for VGA and allows concurrent use of both. The SVGA
539 * SDK is making use of this to do VGA text output while testing other things in
540 * SVGA mode, displaying the result by switching back to VGA text mode. So,
541 * when entering SVGA mode we copy the first part of the frame buffer here and
542 * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
543 R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
544 /** R3 Opaque pointer to an external fifo cmd parameter. */
545 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
546
547 /** FIFO external command semaphore. */
548 R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
549 /** FIFO IO Thread. */
550 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
551} VMSVGASTATER3;
552
553
554/**
555 * The VMSVGA device state for ring-0
556 *
557 * This instantatiated as VGASTATER0::svga.
558 */
559typedef struct VMSVGASTATER0
560{
561 /** The R0 FIFO pointer.
562 * @note This only points to the _first_ _page_ of the FIFO! */
563 R0PTRTYPE(uint32_t *) pau32FIFO;
564} VMSVGASTATER0;
565
566
567typedef struct VGAState *PVGASTATE;
568typedef struct VGASTATER3 *PVGASTATER3;
569typedef struct VGASTATER0 *PVGASTATER0;
570typedef struct VGASTATERC *PVGASTATERC;
571typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
572
573DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
574 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
575DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb);
576DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
577DECLCALLBACK(VBOXSTRICTRC) vmsvga3MmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb);
578DECLCALLBACK(VBOXSTRICTRC) vmsvga3MmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb);
579
580DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
581 uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
582DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
583
584int vmsvgaR3Init(PPDMDEVINS pDevIns);
585int vmsvgaR3Reset(PPDMDEVINS pDevIns);
586int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
587int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
588int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
589int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
590DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
591DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
592void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
593
594#ifdef IN_RING3
595VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
596int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
597#endif
598
599int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
600 uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
601 SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
602 uint32_t cbWidth, uint32_t cHeight);
603
604void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox);
605void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox);
606void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect);
607void vmsvgaR3Clip3dRect(SVGA3dRect const *pBound, SVGA3dRect RT_UNTRUSTED_GUEST *pRect);
608
609/*
610 * GBO (Guest Backed Object).
611 * A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects)
612 * and Object Tables which the guest shares with the host.
613 *
614 * A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order
615 * to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to
616 * map the guest pages into the host R3 memory and access them directly.
617 */
618
619/* GBO descriptor. */
620typedef struct VMSVGAGBODESCRIPTOR
621{
622 RTGCPHYS GCPhys;
623 uint64_t cPages;
624} VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR;
625typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR;
626
627/* GBO.
628 */
629typedef struct VMSVGAGBO
630{
631 uint32_t fGboFlags;
632 uint32_t cTotalPages;
633 uint32_t cbTotal;
634 uint32_t cDescriptors;
635 PVMSVGAGBODESCRIPTOR paDescriptors;
636 void *pvHost; /* Pointer to cbTotal bytes on the host if VMSVGAGBO_F_HOST_BACKED is set. */
637} VMSVGAGBO, *PVMSVGAGBO;
638typedef VMSVGAGBO const *PCVMSVGAGBO;
639
640#define VMSVGAGBO_F_OBSOLETE_0x1 0x1
641#define VMSVGAGBO_F_HOST_BACKED 0x2
642
643#define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL)
644
645int vmsvgaR3OTableReadSurface(PVMSVGAR3STATE pSvgaR3State, uint32_t sid, SVGAOTableSurfaceEntry *pEntrySurface);
646
647/* MOB is also a GBO.
648 */
649typedef struct VMSVGAMOB
650{
651 AVLU32NODECORE Core; /* Key is the mobid. */
652 RTLISTNODE nodeLRU;
653 VMSVGAGBO Gbo;
654} VMSVGAMOB, *PVMSVGAMOB;
655typedef VMSVGAMOB const *PCVMSVGAMOB;
656
657PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid);
658int vmsvgaR3MobWrite(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t off, void const *pvData, uint32_t cbData);
659int vmsvgaR3MobRead(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t off, void *pvData, uint32_t cbData);
660int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid);
661void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
662int vmsvgaR3MobBackingStoreWriteToGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
663int vmsvgaR3MobBackingStoreReadFromGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
664void *vmsvgaR3MobBackingStorePtr(PVMSVGAMOB pMob, uint32_t off);
665
666DECLINLINE(uint32_t) vmsvgaR3MobSize(PVMSVGAMOB pMob)
667{
668 if (pMob)
669 return pMob->Gbo.cbTotal;
670 return 0;
671}
672
673DECLINLINE(uint32_t) vmsvgaR3MobId(PVMSVGAMOB pMob)
674{
675 if (pMob)
676 return pMob->Core.Key;
677 return SVGA_ID_INVALID;
678}
679
680#ifdef DEBUG_sunlover
681#define DEBUG_BREAKPOINT_TEST() do { ASMBreakpoint(); } while (0)
682#else
683#define DEBUG_BREAKPOINT_TEST() do { } while (0)
684#endif
685
686#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */
Note: See TracBrowser for help on using the repository browser.

© 2023 Oracle
Contact – Privacy policy – Terms of Use