1 | /* $Id: DevVGA-SVGA-cmd.cpp 107829 2025-01-16 19:21:04Z vboxsync $ */
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2 | /** @file
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3 | * VMware SVGA device - implementation of VMSVGA commands.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2013-2024 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 | #ifndef IN_RING3
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29 | # error "DevVGA-SVGA-cmd.cpp is only for ring-3 code"
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30 | #endif
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31 |
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32 |
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33 | #define LOG_GROUP LOG_GROUP_DEV_VMSVGA
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34 | #include <iprt/mem.h>
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35 | #include <iprt/path.h>
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36 | #include <VBox/AssertGuest.h>
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37 | #include <VBox/log.h>
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38 | #include <VBox/vmm/pdmdev.h>
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39 | #include <VBoxVideo.h>
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40 |
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41 | /* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
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42 | #include "DevVGA.h"
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43 |
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44 | /* Should be included after DevVGA.h/DevVGA-SVGA.h to pick all defines. */
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45 | #ifdef VBOX_WITH_VMSVGA3D
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46 | # include "DevVGA-SVGA3d.h"
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47 | #endif
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48 | #include "DevVGA-SVGA-internal.h"
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49 |
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50 | #include <iprt/formats/bmp.h>
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51 | #include <stdio.h>
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52 |
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53 | #if defined(LOG_ENABLED) || defined(VBOX_STRICT)
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54 | # define SVGA_CASE_ID2STR(idx) case idx: return #idx
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55 |
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56 | static const char *vmsvgaFifo3dCmdToString(SVGAFifo3dCmdId enmCmdId)
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57 | {
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58 | switch (enmCmdId)
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59 | {
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60 | SVGA_CASE_ID2STR(SVGA_3D_CMD_LEGACY_BASE);
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61 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SURFACE_DEFINE);
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62 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SURFACE_DESTROY);
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63 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SURFACE_COPY);
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64 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SURFACE_STRETCHBLT);
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65 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SURFACE_DMA);
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66 | SVGA_CASE_ID2STR(SVGA_3D_CMD_CONTEXT_DEFINE);
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67 | SVGA_CASE_ID2STR(SVGA_3D_CMD_CONTEXT_DESTROY);
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68 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETTRANSFORM);
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69 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETZRANGE);
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70 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETRENDERSTATE);
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71 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETRENDERTARGET);
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72 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETTEXTURESTATE);
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73 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETMATERIAL);
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74 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETLIGHTDATA);
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75 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETLIGHTENABLED);
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76 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETVIEWPORT);
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77 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETCLIPPLANE);
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78 | SVGA_CASE_ID2STR(SVGA_3D_CMD_CLEAR);
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79 | SVGA_CASE_ID2STR(SVGA_3D_CMD_PRESENT);
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80 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SHADER_DEFINE);
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81 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SHADER_DESTROY);
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82 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SET_SHADER);
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83 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SET_SHADER_CONST);
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84 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DRAW_PRIMITIVES);
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85 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SETSCISSORRECT);
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86 | SVGA_CASE_ID2STR(SVGA_3D_CMD_BEGIN_QUERY);
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87 | SVGA_CASE_ID2STR(SVGA_3D_CMD_END_QUERY);
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88 | SVGA_CASE_ID2STR(SVGA_3D_CMD_WAIT_FOR_QUERY);
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89 | SVGA_CASE_ID2STR(SVGA_3D_CMD_PRESENT_READBACK);
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90 | SVGA_CASE_ID2STR(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
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91 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SURFACE_DEFINE_V2);
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92 | SVGA_CASE_ID2STR(SVGA_3D_CMD_GENERATE_MIPMAPS);
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93 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD4); /* SVGA_3D_CMD_VIDEO_CREATE_DECODER */
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94 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD5); /* SVGA_3D_CMD_VIDEO_DESTROY_DECODER */
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95 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD6); /* SVGA_3D_CMD_VIDEO_CREATE_PROCESSOR */
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96 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD7); /* SVGA_3D_CMD_VIDEO_DESTROY_PROCESSOR */
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97 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD8); /* SVGA_3D_CMD_VIDEO_DECODE_START_FRAME */
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98 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD9); /* SVGA_3D_CMD_VIDEO_DECODE_RENDER */
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99 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD10); /* SVGA_3D_CMD_VIDEO_DECODE_END_FRAME */
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100 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD11); /* SVGA_3D_CMD_VIDEO_PROCESS_FRAME */
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101 | SVGA_CASE_ID2STR(SVGA_3D_CMD_ACTIVATE_SURFACE);
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102 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEACTIVATE_SURFACE);
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103 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SCREEN_DMA);
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104 | SVGA_CASE_ID2STR(SVGA_3D_CMD_VB_DX_CLEAR_RENDERTARGET_VIEW_REGION); /* SVGA_3D_CMD_DEAD1 */
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105 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD2);
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106 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD12); /* Old SVGA_3D_CMD_LOGICOPS_BITBLT */
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107 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD13); /* Old SVGA_3D_CMD_LOGICOPS_TRANSBLT */
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108 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD14); /* Old SVGA_3D_CMD_LOGICOPS_STRETCHBLT */
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109 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD15); /* Old SVGA_3D_CMD_LOGICOPS_COLORFILL */
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110 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD16); /* Old SVGA_3D_CMD_LOGICOPS_ALPHABLEND */
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111 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD17); /* Old SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND */
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112 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SET_OTABLE_BASE);
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113 | SVGA_CASE_ID2STR(SVGA_3D_CMD_READBACK_OTABLE);
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114 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_MOB);
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115 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DESTROY_GB_MOB);
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116 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEAD3);
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117 | SVGA_CASE_ID2STR(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING);
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118 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_SURFACE);
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119 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DESTROY_GB_SURFACE);
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120 | SVGA_CASE_ID2STR(SVGA_3D_CMD_BIND_GB_SURFACE);
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121 | SVGA_CASE_ID2STR(SVGA_3D_CMD_COND_BIND_GB_SURFACE);
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122 | SVGA_CASE_ID2STR(SVGA_3D_CMD_UPDATE_GB_IMAGE);
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123 | SVGA_CASE_ID2STR(SVGA_3D_CMD_UPDATE_GB_SURFACE);
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124 | SVGA_CASE_ID2STR(SVGA_3D_CMD_READBACK_GB_IMAGE);
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125 | SVGA_CASE_ID2STR(SVGA_3D_CMD_READBACK_GB_SURFACE);
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126 | SVGA_CASE_ID2STR(SVGA_3D_CMD_INVALIDATE_GB_IMAGE);
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127 | SVGA_CASE_ID2STR(SVGA_3D_CMD_INVALIDATE_GB_SURFACE);
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128 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_CONTEXT);
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129 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DESTROY_GB_CONTEXT);
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130 | SVGA_CASE_ID2STR(SVGA_3D_CMD_BIND_GB_CONTEXT);
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131 | SVGA_CASE_ID2STR(SVGA_3D_CMD_READBACK_GB_CONTEXT);
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132 | SVGA_CASE_ID2STR(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT);
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133 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_SHADER);
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134 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DESTROY_GB_SHADER);
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135 | SVGA_CASE_ID2STR(SVGA_3D_CMD_BIND_GB_SHADER);
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136 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SET_OTABLE_BASE64);
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137 | SVGA_CASE_ID2STR(SVGA_3D_CMD_BEGIN_GB_QUERY);
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138 | SVGA_CASE_ID2STR(SVGA_3D_CMD_END_GB_QUERY);
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139 | SVGA_CASE_ID2STR(SVGA_3D_CMD_WAIT_FOR_GB_QUERY);
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140 | SVGA_CASE_ID2STR(SVGA_3D_CMD_NOP);
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141 | SVGA_CASE_ID2STR(SVGA_3D_CMD_ENABLE_GART);
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142 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DISABLE_GART);
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143 | SVGA_CASE_ID2STR(SVGA_3D_CMD_MAP_MOB_INTO_GART);
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144 | SVGA_CASE_ID2STR(SVGA_3D_CMD_UNMAP_GART_RANGE);
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145 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET);
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146 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET);
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147 | SVGA_CASE_ID2STR(SVGA_3D_CMD_BIND_GB_SCREENTARGET);
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148 | SVGA_CASE_ID2STR(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET);
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149 | SVGA_CASE_ID2STR(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL);
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150 | SVGA_CASE_ID2STR(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL);
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151 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE);
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152 | SVGA_CASE_ID2STR(SVGA_3D_CMD_GB_SCREEN_DMA);
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153 | SVGA_CASE_ID2STR(SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH);
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154 | SVGA_CASE_ID2STR(SVGA_3D_CMD_GB_MOB_FENCE);
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155 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_SURFACE_V2);
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156 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_MOB64);
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157 | SVGA_CASE_ID2STR(SVGA_3D_CMD_REDEFINE_GB_MOB64);
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158 | SVGA_CASE_ID2STR(SVGA_3D_CMD_NOP_ERROR);
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159 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SET_VERTEX_STREAMS);
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160 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SET_VERTEX_DECLS);
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161 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SET_VERTEX_DIVISORS);
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162 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DRAW);
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163 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DRAW_INDEXED);
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164 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_CONTEXT);
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165 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_CONTEXT);
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166 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BIND_CONTEXT);
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167 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_READBACK_CONTEXT);
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168 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_INVALIDATE_CONTEXT);
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169 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER);
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170 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_SHADER_RESOURCES);
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171 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_SHADER);
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172 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_SAMPLERS);
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173 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DRAW);
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174 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DRAW_INDEXED);
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175 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DRAW_INSTANCED);
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176 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED);
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177 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DRAW_AUTO);
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178 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_INPUT_LAYOUT);
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179 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS);
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180 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_INDEX_BUFFER);
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181 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_TOPOLOGY);
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182 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_RENDERTARGETS);
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183 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_BLEND_STATE);
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184 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE);
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185 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_RASTERIZER_STATE);
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186 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_QUERY);
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187 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_QUERY);
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188 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BIND_QUERY);
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189 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_QUERY_OFFSET);
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190 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BEGIN_QUERY);
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191 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_END_QUERY);
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192 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_READBACK_QUERY);
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193 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_PREDICATION);
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194 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_SOTARGETS);
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195 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_VIEWPORTS);
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196 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_SCISSORRECTS);
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197 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW);
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198 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW);
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199 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_PRED_COPY_REGION);
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200 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_PRED_COPY);
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201 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_PRESENTBLT);
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202 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_GENMIPS);
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203 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE);
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204 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_READBACK_SUBRESOURCE);
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205 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE);
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206 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW);
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207 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW);
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208 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW);
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209 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW);
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210 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW);
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211 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW);
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212 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT);
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213 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT);
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214 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_BLEND_STATE);
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215 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_BLEND_STATE);
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216 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE);
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217 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE);
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218 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE);
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219 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE);
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220 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE);
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221 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE);
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222 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_SHADER);
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223 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_SHADER);
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224 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BIND_SHADER);
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225 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT);
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226 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT);
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227 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_STREAMOUTPUT);
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228 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_COTABLE);
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229 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_READBACK_COTABLE);
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230 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BUFFER_COPY);
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231 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER);
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232 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK);
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233 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_MOVE_QUERY);
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234 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BIND_ALL_QUERY);
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235 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_READBACK_ALL_QUERY);
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236 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER);
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237 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_MOB_FENCE_64);
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238 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BIND_ALL_SHADER);
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239 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_HINT);
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240 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BUFFER_UPDATE);
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241 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET);
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242 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET);
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243 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET);
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244 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET);
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245 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET);
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246 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET);
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247 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER);
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248 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SCREEN_COPY);
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249 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED1);
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250 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED2);
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251 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED3);
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252 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED4);
|
---|
253 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED5);
|
---|
254 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED6);
|
---|
255 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED7);
|
---|
256 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED8);
|
---|
257 | SVGA_CASE_ID2STR(SVGA_3D_CMD_GROW_OTABLE);
|
---|
258 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_GROW_COTABLE);
|
---|
259 | SVGA_CASE_ID2STR(SVGA_3D_CMD_INTRA_SURFACE_COPY);
|
---|
260 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_SURFACE_V3);
|
---|
261 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_RESOLVE_COPY);
|
---|
262 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_PRED_RESOLVE_COPY);
|
---|
263 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_PRED_CONVERT_REGION);
|
---|
264 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_PRED_CONVERT);
|
---|
265 | SVGA_CASE_ID2STR(SVGA_3D_CMD_WHOLE_SURFACE_COPY);
|
---|
266 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_UA_VIEW);
|
---|
267 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DESTROY_UA_VIEW);
|
---|
268 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT);
|
---|
269 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT);
|
---|
270 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT);
|
---|
271 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_UA_VIEWS);
|
---|
272 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT);
|
---|
273 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT);
|
---|
274 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DISPATCH);
|
---|
275 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DISPATCH_INDIRECT);
|
---|
276 | SVGA_CASE_ID2STR(SVGA_3D_CMD_WRITE_ZERO_SURFACE);
|
---|
277 | SVGA_CASE_ID2STR(SVGA_3D_CMD_HINT_ZERO_SURFACE);
|
---|
278 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER);
|
---|
279 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT);
|
---|
280 | SVGA_CASE_ID2STR(SVGA_3D_CMD_LOGICOPS_BITBLT);
|
---|
281 | SVGA_CASE_ID2STR(SVGA_3D_CMD_LOGICOPS_TRANSBLT);
|
---|
282 | SVGA_CASE_ID2STR(SVGA_3D_CMD_LOGICOPS_STRETCHBLT);
|
---|
283 | SVGA_CASE_ID2STR(SVGA_3D_CMD_LOGICOPS_COLORFILL);
|
---|
284 | SVGA_CASE_ID2STR(SVGA_3D_CMD_LOGICOPS_ALPHABLEND);
|
---|
285 | SVGA_CASE_ID2STR(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND);
|
---|
286 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED2_1);
|
---|
287 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED2_2);
|
---|
288 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DEFINE_GB_SURFACE_V4);
|
---|
289 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_CS_UA_VIEWS);
|
---|
290 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_MIN_LOD);
|
---|
291 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED2_3);
|
---|
292 | SVGA_CASE_ID2STR(SVGA_3D_CMD_RESERVED2_4);
|
---|
293 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2);
|
---|
294 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB);
|
---|
295 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_SET_SHADER_IFACE);
|
---|
296 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BIND_STREAMOUTPUT);
|
---|
297 | SVGA_CASE_ID2STR(SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS);
|
---|
298 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_BIND_SHADER_IFACE);
|
---|
299 | SVGA_CASE_ID2STR(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE_V2);
|
---|
300 | SVGA_CASE_ID2STR(SVGA_3D_CMD_MAX);
|
---|
301 | SVGA_CASE_ID2STR(SVGA_3D_CMD_FUTURE_MAX);
|
---|
302 |
|
---|
303 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR);
|
---|
304 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DEFINE_VIDEO_DECODER_OUTPUT_VIEW);
|
---|
305 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DEFINE_VIDEO_DECODER);
|
---|
306 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_DECODER_BEGIN_FRAME);
|
---|
307 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_DECODER_SUBMIT_BUFFERS);
|
---|
308 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_DECODER_END_FRAME);
|
---|
309 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR_INPUT_VIEW);
|
---|
310 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR_OUTPUT_VIEW);
|
---|
311 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_BLT);
|
---|
312 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DESTROY_VIDEO_DECODER);
|
---|
313 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DESTROY_VIDEO_DECODER_OUTPUT_VIEW);
|
---|
314 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR);
|
---|
315 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR_INPUT_VIEW);
|
---|
316 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR_OUTPUT_VIEW);
|
---|
317 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_TARGET_RECT);
|
---|
318 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_BACKGROUND_COLOR);
|
---|
319 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_COLOR_SPACE);
|
---|
320 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_ALPHA_FILL_MODE);
|
---|
321 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_CONSTRICTION);
|
---|
322 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_STEREO_MODE);
|
---|
323 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_FRAME_FORMAT);
|
---|
324 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_COLOR_SPACE);
|
---|
325 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_OUTPUT_RATE);
|
---|
326 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_SOURCE_RECT);
|
---|
327 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_DEST_RECT);
|
---|
328 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_ALPHA);
|
---|
329 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_PALETTE);
|
---|
330 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_PIXEL_ASPECT_RATIO);
|
---|
331 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_LUMA_KEY);
|
---|
332 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_STEREO_FORMAT);
|
---|
333 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_AUTO_PROCESSING_MODE);
|
---|
334 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_FILTER);
|
---|
335 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_ROTATION);
|
---|
336 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_GET_VIDEO_CAPABILITY);
|
---|
337 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_CLEAR_RTV);
|
---|
338 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_CLEAR_UAV);
|
---|
339 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_CLEAR_VDOV);
|
---|
340 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_CLEAR_VPIV);
|
---|
341 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_DX_CLEAR_VPOV);
|
---|
342 | SVGA_CASE_ID2STR(VBSVGA_3D_CMD_MAX);
|
---|
343 | #ifndef DEBUG_sunlover
|
---|
344 | default: break; /* Compiler warning. */
|
---|
345 | #endif
|
---|
346 | }
|
---|
347 | return "UNKNOWN_3D";
|
---|
348 | }
|
---|
349 |
|
---|
350 | /**
|
---|
351 | * FIFO command name lookup
|
---|
352 | *
|
---|
353 | * @returns FIFO command string or "UNKNOWN"
|
---|
354 | * @param u32Cmd FIFO command
|
---|
355 | */
|
---|
356 | const char *vmsvgaR3FifoCmdToString(uint32_t u32Cmd)
|
---|
357 | {
|
---|
358 | switch (u32Cmd)
|
---|
359 | {
|
---|
360 | SVGA_CASE_ID2STR(SVGA_CMD_INVALID_CMD);
|
---|
361 | SVGA_CASE_ID2STR(SVGA_CMD_UPDATE);
|
---|
362 | SVGA_CASE_ID2STR(SVGA_CMD_RECT_FILL);
|
---|
363 | SVGA_CASE_ID2STR(SVGA_CMD_RECT_COPY);
|
---|
364 | SVGA_CASE_ID2STR(SVGA_CMD_RECT_ROP_COPY);
|
---|
365 | SVGA_CASE_ID2STR(SVGA_CMD_DEFINE_CURSOR);
|
---|
366 | SVGA_CASE_ID2STR(SVGA_CMD_DISPLAY_CURSOR);
|
---|
367 | SVGA_CASE_ID2STR(SVGA_CMD_MOVE_CURSOR);
|
---|
368 | SVGA_CASE_ID2STR(SVGA_CMD_DEFINE_ALPHA_CURSOR);
|
---|
369 | SVGA_CASE_ID2STR(SVGA_CMD_UPDATE_VERBOSE);
|
---|
370 | SVGA_CASE_ID2STR(SVGA_CMD_FRONT_ROP_FILL);
|
---|
371 | SVGA_CASE_ID2STR(SVGA_CMD_FENCE);
|
---|
372 | SVGA_CASE_ID2STR(SVGA_CMD_ESCAPE);
|
---|
373 | SVGA_CASE_ID2STR(SVGA_CMD_DEFINE_SCREEN);
|
---|
374 | SVGA_CASE_ID2STR(SVGA_CMD_DESTROY_SCREEN);
|
---|
375 | SVGA_CASE_ID2STR(SVGA_CMD_DEFINE_GMRFB);
|
---|
376 | SVGA_CASE_ID2STR(SVGA_CMD_BLIT_GMRFB_TO_SCREEN);
|
---|
377 | SVGA_CASE_ID2STR(SVGA_CMD_BLIT_SCREEN_TO_GMRFB);
|
---|
378 | SVGA_CASE_ID2STR(SVGA_CMD_ANNOTATION_FILL);
|
---|
379 | SVGA_CASE_ID2STR(SVGA_CMD_ANNOTATION_COPY);
|
---|
380 | SVGA_CASE_ID2STR(SVGA_CMD_DEFINE_GMR2);
|
---|
381 | SVGA_CASE_ID2STR(SVGA_CMD_REMAP_GMR2);
|
---|
382 | SVGA_CASE_ID2STR(SVGA_CMD_DEAD);
|
---|
383 | SVGA_CASE_ID2STR(SVGA_CMD_DEAD_2);
|
---|
384 | SVGA_CASE_ID2STR(SVGA_CMD_NOP);
|
---|
385 | SVGA_CASE_ID2STR(SVGA_CMD_NOP_ERROR);
|
---|
386 | SVGA_CASE_ID2STR(SVGA_CMD_MAX);
|
---|
387 | default:
|
---|
388 | if ( (u32Cmd >= SVGA_3D_CMD_BASE && u32Cmd < SVGA_3D_CMD_MAX)
|
---|
389 | || (u32Cmd >= VBSVGA_3D_CMD_BASE && u32Cmd < VBSVGA_3D_CMD_MAX))
|
---|
390 | return vmsvgaFifo3dCmdToString((SVGAFifo3dCmdId)u32Cmd);
|
---|
391 | }
|
---|
392 | return "UNKNOWN";
|
---|
393 | }
|
---|
394 | # undef SVGA_CASE_ID2STR
|
---|
395 | #endif /* LOG_ENABLED || VBOX_STRICT */
|
---|
396 |
|
---|
397 |
|
---|
398 | /*
|
---|
399 | *
|
---|
400 | * Guest-Backed Objects (GBO).
|
---|
401 | *
|
---|
402 | */
|
---|
403 |
|
---|
404 | #ifdef VBOX_WITH_VMSVGA3D
|
---|
405 |
|
---|
406 | static int vmsvgaR3GboCreate(PVMSVGAR3STATE pSvgaR3State, SVGAMobFormat ptDepth, PPN64 baseAddress, uint32_t sizeInBytes, PVMSVGAGBO pGbo)
|
---|
407 | {
|
---|
408 | ASSERT_GUEST_RETURN(sizeInBytes <= _128M, VERR_INVALID_PARAMETER); /** @todo Less than SVGA_REG_MOB_MAX_SIZE */
|
---|
409 |
|
---|
410 | /*
|
---|
411 | * The 'baseAddress' is a page number and points to the 'root page' of the GBO.
|
---|
412 | * Content of the root page depends on the ptDepth value:
|
---|
413 | * SVGA3D_MOBFMT_PTDEPTH[64]_0 - the only data page;
|
---|
414 | * SVGA3D_MOBFMT_PTDEPTH[64]_1 - array of page numbers for data pages;
|
---|
415 | * SVGA3D_MOBFMT_PTDEPTH[64]_2 - array of page numbers for SVGA3D_MOBFMT_PTDEPTH[64]_1 pages.
|
---|
416 | * The code below extracts the page addresses of the GBO.
|
---|
417 | */
|
---|
418 |
|
---|
419 | /* Verify and normalize the ptDepth value. */
|
---|
420 | bool fGCPhys64; /* Whether the page table contains 64 bit page numbers. */
|
---|
421 | if (RT_LIKELY( ptDepth == SVGA3D_MOBFMT_PTDEPTH64_0
|
---|
422 | || ptDepth == SVGA3D_MOBFMT_PTDEPTH64_1
|
---|
423 | || ptDepth == SVGA3D_MOBFMT_PTDEPTH64_2))
|
---|
424 | fGCPhys64 = true;
|
---|
425 | else if ( ptDepth == SVGA3D_MOBFMT_PTDEPTH_0
|
---|
426 | || ptDepth == SVGA3D_MOBFMT_PTDEPTH_1
|
---|
427 | || ptDepth == SVGA3D_MOBFMT_PTDEPTH_2)
|
---|
428 | {
|
---|
429 | fGCPhys64 = false;
|
---|
430 | /* Shift ptDepth to the SVGA3D_MOBFMT_PTDEPTH64_x range. */
|
---|
431 | ptDepth = (SVGAMobFormat)(ptDepth + SVGA3D_MOBFMT_PTDEPTH64_0 - SVGA3D_MOBFMT_PTDEPTH_0);
|
---|
432 | }
|
---|
433 | else if (ptDepth == SVGA3D_MOBFMT_RANGE)
|
---|
434 | fGCPhys64 = false; /* Does not matter, there is no page table. */
|
---|
435 | else
|
---|
436 | ASSERT_GUEST_FAILED_RETURN(VERR_INVALID_PARAMETER);
|
---|
437 |
|
---|
438 | uint32_t const cPPNsPerPage = X86_PAGE_SIZE / (fGCPhys64 ? sizeof(PPN64) : sizeof(PPN));
|
---|
439 |
|
---|
440 | pGbo->cbTotal = sizeInBytes;
|
---|
441 | pGbo->cTotalPages = (sizeInBytes + X86_PAGE_SIZE - 1) >> X86_PAGE_SHIFT;
|
---|
442 |
|
---|
443 | /* Allocate the maximum amount possible (everything non-continuous) */
|
---|
444 | PVMSVGAGBODESCRIPTOR paDescriptors = (PVMSVGAGBODESCRIPTOR)RTMemAlloc(pGbo->cTotalPages * sizeof(VMSVGAGBODESCRIPTOR));
|
---|
445 | AssertReturn(paDescriptors, VERR_NO_MEMORY);
|
---|
446 |
|
---|
447 | int rc = VINF_SUCCESS;
|
---|
448 | if (ptDepth == SVGA3D_MOBFMT_PTDEPTH64_0)
|
---|
449 | {
|
---|
450 | ASSERT_GUEST_STMT_RETURN(pGbo->cTotalPages == 1,
|
---|
451 | RTMemFree(paDescriptors),
|
---|
452 | VERR_INVALID_PARAMETER);
|
---|
453 |
|
---|
454 | RTGCPHYS GCPhys = (RTGCPHYS)baseAddress << X86_PAGE_SHIFT;
|
---|
455 | GCPhys &= UINT64_C(0x00000FFFFFFFFFFF); /* Seeing rubbish in the top bits with certain linux guests. */
|
---|
456 | paDescriptors[0].GCPhys = GCPhys;
|
---|
457 | paDescriptors[0].cPages = 1;
|
---|
458 | }
|
---|
459 | else if (ptDepth == SVGA3D_MOBFMT_PTDEPTH64_1)
|
---|
460 | {
|
---|
461 | ASSERT_GUEST_STMT_RETURN(pGbo->cTotalPages <= cPPNsPerPage,
|
---|
462 | RTMemFree(paDescriptors),
|
---|
463 | VERR_INVALID_PARAMETER);
|
---|
464 |
|
---|
465 | /* Read the root page. */
|
---|
466 | uint8_t au8RootPage[X86_PAGE_SIZE];
|
---|
467 | RTGCPHYS GCPhys = (RTGCPHYS)baseAddress << X86_PAGE_SHIFT;
|
---|
468 | rc = PDMDevHlpPCIPhysRead(pSvgaR3State->pDevIns, GCPhys, &au8RootPage, sizeof(au8RootPage));
|
---|
469 | if (RT_SUCCESS(rc))
|
---|
470 | {
|
---|
471 | PPN64 *paPPN64 = (PPN64 *)&au8RootPage[0];
|
---|
472 | PPN *paPPN32 = (PPN *)&au8RootPage[0];
|
---|
473 | for (uint32_t iPPN = 0; iPPN < pGbo->cTotalPages; ++iPPN)
|
---|
474 | {
|
---|
475 | GCPhys = (RTGCPHYS)(fGCPhys64 ? paPPN64[iPPN] : paPPN32[iPPN]) << X86_PAGE_SHIFT;
|
---|
476 | GCPhys &= UINT64_C(0x00000FFFFFFFFFFF); /* Seeing rubbish in the top bits with certain linux guests. */
|
---|
477 | paDescriptors[iPPN].GCPhys = GCPhys;
|
---|
478 | paDescriptors[iPPN].cPages = 1;
|
---|
479 | }
|
---|
480 | }
|
---|
481 | }
|
---|
482 | else if (ptDepth == SVGA3D_MOBFMT_PTDEPTH64_2)
|
---|
483 | {
|
---|
484 | ASSERT_GUEST_STMT_RETURN(pGbo->cTotalPages <= cPPNsPerPage * cPPNsPerPage,
|
---|
485 | RTMemFree(paDescriptors),
|
---|
486 | VERR_INVALID_PARAMETER);
|
---|
487 |
|
---|
488 | /* Read the Level2 root page. */
|
---|
489 | uint8_t au8RootPageLevel2[X86_PAGE_SIZE];
|
---|
490 | RTGCPHYS GCPhys = (RTGCPHYS)baseAddress << X86_PAGE_SHIFT;
|
---|
491 | rc = PDMDevHlpPCIPhysRead(pSvgaR3State->pDevIns, GCPhys, &au8RootPageLevel2, sizeof(au8RootPageLevel2));
|
---|
492 | if (RT_SUCCESS(rc))
|
---|
493 | {
|
---|
494 | uint32_t cPagesLeft = pGbo->cTotalPages;
|
---|
495 |
|
---|
496 | PPN64 *paPPN64Level2 = (PPN64 *)&au8RootPageLevel2[0];
|
---|
497 | PPN *paPPN32Level2 = (PPN *)&au8RootPageLevel2[0];
|
---|
498 |
|
---|
499 | uint32_t const cPPNsLevel2 = (pGbo->cTotalPages + cPPNsPerPage - 1) / cPPNsPerPage;
|
---|
500 | for (uint32_t iPPNLevel2 = 0; iPPNLevel2 < cPPNsLevel2; ++iPPNLevel2)
|
---|
501 | {
|
---|
502 | /* Read the Level1 root page. */
|
---|
503 | uint8_t au8RootPage[X86_PAGE_SIZE];
|
---|
504 | RTGCPHYS GCPhysLevel1 = (RTGCPHYS)(fGCPhys64 ? paPPN64Level2[iPPNLevel2] : paPPN32Level2[iPPNLevel2]) << X86_PAGE_SHIFT;
|
---|
505 | GCPhys &= UINT64_C(0x00000FFFFFFFFFFF); /* Seeing rubbish in the top bits with certain linux guests. */
|
---|
506 | rc = PDMDevHlpPCIPhysRead(pSvgaR3State->pDevIns, GCPhysLevel1, &au8RootPage, sizeof(au8RootPage));
|
---|
507 | if (RT_SUCCESS(rc))
|
---|
508 | {
|
---|
509 | PPN64 *paPPN64 = (PPN64 *)&au8RootPage[0];
|
---|
510 | PPN *paPPN32 = (PPN *)&au8RootPage[0];
|
---|
511 |
|
---|
512 | uint32_t const cPPNs = RT_MIN(cPagesLeft, cPPNsPerPage);
|
---|
513 | for (uint32_t iPPN = 0; iPPN < cPPNs; ++iPPN)
|
---|
514 | {
|
---|
515 | GCPhys = (RTGCPHYS)(fGCPhys64 ? paPPN64[iPPN] : paPPN32[iPPN]) << X86_PAGE_SHIFT;
|
---|
516 | GCPhys &= UINT64_C(0x00000FFFFFFFFFFF); /* Seeing rubbish in the top bits with certain linux guests. */
|
---|
517 | paDescriptors[iPPN + iPPNLevel2 * cPPNsPerPage].GCPhys = GCPhys;
|
---|
518 | paDescriptors[iPPN + iPPNLevel2 * cPPNsPerPage].cPages = 1;
|
---|
519 | }
|
---|
520 | cPagesLeft -= cPPNs;
|
---|
521 | }
|
---|
522 | }
|
---|
523 | }
|
---|
524 | }
|
---|
525 | else if (ptDepth == SVGA3D_MOBFMT_RANGE)
|
---|
526 | {
|
---|
527 | RTGCPHYS GCPhys = (RTGCPHYS)baseAddress << X86_PAGE_SHIFT;
|
---|
528 | GCPhys &= UINT64_C(0x00000FFFFFFFFFFF); /* Seeing rubbish in the top bits with certain linux guests. */
|
---|
529 | paDescriptors[0].GCPhys = GCPhys;
|
---|
530 | paDescriptors[0].cPages = pGbo->cTotalPages;
|
---|
531 | }
|
---|
532 | else
|
---|
533 | {
|
---|
534 | AssertFailed();
|
---|
535 | return VERR_INTERNAL_ERROR; /* ptDepth should be already verified. */
|
---|
536 | }
|
---|
537 |
|
---|
538 | /* Compress the descriptors. */
|
---|
539 | if (ptDepth != SVGA3D_MOBFMT_RANGE)
|
---|
540 | {
|
---|
541 | uint32_t iDescriptor = 0;
|
---|
542 | for (uint32_t i = 1; i < pGbo->cTotalPages; ++i)
|
---|
543 | {
|
---|
544 | /* Continuous physical memory? */
|
---|
545 | if (paDescriptors[i].GCPhys == paDescriptors[iDescriptor].GCPhys + paDescriptors[iDescriptor].cPages * X86_PAGE_SIZE)
|
---|
546 | {
|
---|
547 | Assert(paDescriptors[iDescriptor].cPages);
|
---|
548 | paDescriptors[iDescriptor].cPages++;
|
---|
549 | Log5Func(("Page %x GCPhys=%RGp successor\n", i, paDescriptors[i].GCPhys));
|
---|
550 | }
|
---|
551 | else
|
---|
552 | {
|
---|
553 | iDescriptor++;
|
---|
554 | paDescriptors[iDescriptor].GCPhys = paDescriptors[i].GCPhys;
|
---|
555 | paDescriptors[iDescriptor].cPages = 1;
|
---|
556 | Log5Func(("Page %x GCPhys=%RGp\n", i, paDescriptors[iDescriptor].GCPhys));
|
---|
557 | }
|
---|
558 | }
|
---|
559 |
|
---|
560 | pGbo->cDescriptors = iDescriptor + 1;
|
---|
561 | Log5Func(("Nr of descriptors %d\n", pGbo->cDescriptors));
|
---|
562 | }
|
---|
563 | else
|
---|
564 | pGbo->cDescriptors = 1;
|
---|
565 |
|
---|
566 | if (RT_LIKELY(pGbo->cDescriptors < pGbo->cTotalPages))
|
---|
567 | {
|
---|
568 | pGbo->paDescriptors = (PVMSVGAGBODESCRIPTOR)RTMemRealloc(paDescriptors, pGbo->cDescriptors * sizeof(VMSVGAGBODESCRIPTOR));
|
---|
569 | AssertReturn(pGbo->paDescriptors, VERR_NO_MEMORY);
|
---|
570 | }
|
---|
571 | else
|
---|
572 | pGbo->paDescriptors = paDescriptors;
|
---|
573 |
|
---|
574 | pGbo->fGboFlags = 0;
|
---|
575 | pGbo->pvHost = NULL;
|
---|
576 |
|
---|
577 | return VINF_SUCCESS;
|
---|
578 | }
|
---|
579 |
|
---|
580 |
|
---|
581 | static void vmsvgaR3GboDestroy(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo)
|
---|
582 | {
|
---|
583 | RT_NOREF(pSvgaR3State);
|
---|
584 |
|
---|
585 | if (RT_LIKELY(VMSVGA_IS_GBO_CREATED(pGbo)))
|
---|
586 | {
|
---|
587 | RTMemFree(pGbo->pvHost);
|
---|
588 | RTMemFree(pGbo->paDescriptors);
|
---|
589 | RT_ZERO(*pGbo);
|
---|
590 | }
|
---|
591 | }
|
---|
592 |
|
---|
593 | /** @todo static void vmsvgaR3GboWriteProtect(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo, bool fWriteProtect) */
|
---|
594 |
|
---|
595 | typedef enum VMSVGAGboTransferDirection
|
---|
596 | {
|
---|
597 | VMSVGAGboTransferDirection_Read,
|
---|
598 | VMSVGAGboTransferDirection_Write,
|
---|
599 | } VMSVGAGboTransferDirection;
|
---|
600 |
|
---|
601 | static int vmsvgaR3GboTransfer(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo,
|
---|
602 | uint32_t off, void *pvData, uint32_t cbData,
|
---|
603 | VMSVGAGboTransferDirection enmDirection)
|
---|
604 | {
|
---|
605 | //DEBUG_BREAKPOINT_TEST();
|
---|
606 | int rc = VINF_SUCCESS;
|
---|
607 | uint8_t *pu8CurrentHost = (uint8_t *)pvData;
|
---|
608 |
|
---|
609 | /* Find the right descriptor */
|
---|
610 | PCVMSVGAGBODESCRIPTOR const paDescriptors = pGbo->paDescriptors;
|
---|
611 | uint32_t iDescriptor = 0; /* Index in the descriptor array. */
|
---|
612 | uint32_t offDescriptor = 0; /* GMR offset of the current descriptor. */
|
---|
613 | while (offDescriptor + paDescriptors[iDescriptor].cPages * X86_PAGE_SIZE <= off)
|
---|
614 | {
|
---|
615 | offDescriptor += paDescriptors[iDescriptor].cPages * X86_PAGE_SIZE;
|
---|
616 | AssertReturn(offDescriptor < pGbo->cbTotal, VERR_INTERNAL_ERROR); /* overflow protection */
|
---|
617 | ++iDescriptor;
|
---|
618 | AssertReturn(iDescriptor < pGbo->cDescriptors, VERR_INTERNAL_ERROR);
|
---|
619 | }
|
---|
620 |
|
---|
621 | while (cbData)
|
---|
622 | {
|
---|
623 | uint32_t cbToCopy;
|
---|
624 | if (off + cbData <= offDescriptor + paDescriptors[iDescriptor].cPages * X86_PAGE_SIZE)
|
---|
625 | cbToCopy = cbData;
|
---|
626 | else
|
---|
627 | {
|
---|
628 | cbToCopy = (offDescriptor + paDescriptors[iDescriptor].cPages * X86_PAGE_SIZE - off);
|
---|
629 | AssertReturn(cbToCopy <= cbData, VERR_INVALID_PARAMETER);
|
---|
630 | }
|
---|
631 |
|
---|
632 | RTGCPHYS const GCPhys = paDescriptors[iDescriptor].GCPhys + off - offDescriptor;
|
---|
633 | Log5Func(("%s phys=%RGp\n", (enmDirection == VMSVGAGboTransferDirection_Read) ? "READ" : "WRITE", GCPhys));
|
---|
634 |
|
---|
635 | /*
|
---|
636 | * We are deliberately using the non-PCI version of PDMDevHlpPCIPhys[Read|Write] as the
|
---|
637 | * guest-side VMSVGA driver seems to allocate non-DMA (regular physical) addresses,
|
---|
638 | * see @bugref{9654#c75}.
|
---|
639 | */
|
---|
640 | if (enmDirection == VMSVGAGboTransferDirection_Read)
|
---|
641 | rc = PDMDevHlpPhysRead(pSvgaR3State->pDevIns, GCPhys, pu8CurrentHost, cbToCopy);
|
---|
642 | else
|
---|
643 | rc = PDMDevHlpPhysWrite(pSvgaR3State->pDevIns, GCPhys, pu8CurrentHost, cbToCopy);
|
---|
644 | AssertRCBreak(rc);
|
---|
645 |
|
---|
646 | cbData -= cbToCopy;
|
---|
647 | off += cbToCopy;
|
---|
648 | pu8CurrentHost += cbToCopy;
|
---|
649 |
|
---|
650 | /* Go to the next descriptor if there's anything left. */
|
---|
651 | if (cbData)
|
---|
652 | {
|
---|
653 | offDescriptor += paDescriptors[iDescriptor].cPages * X86_PAGE_SIZE;
|
---|
654 | AssertReturn(offDescriptor < pGbo->cbTotal, VERR_INTERNAL_ERROR);
|
---|
655 | ++iDescriptor;
|
---|
656 | AssertReturn(iDescriptor < pGbo->cDescriptors, VERR_INTERNAL_ERROR);
|
---|
657 | }
|
---|
658 | }
|
---|
659 | return rc;
|
---|
660 | }
|
---|
661 |
|
---|
662 |
|
---|
663 | static int vmsvgaR3GboWrite(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo,
|
---|
664 | uint32_t off, void const *pvData, uint32_t cbData)
|
---|
665 | {
|
---|
666 | return vmsvgaR3GboTransfer(pSvgaR3State, pGbo,
|
---|
667 | off, (void *)pvData, cbData,
|
---|
668 | VMSVGAGboTransferDirection_Write);
|
---|
669 | }
|
---|
670 |
|
---|
671 |
|
---|
672 | static int vmsvgaR3GboRead(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo,
|
---|
673 | uint32_t off, void *pvData, uint32_t cbData)
|
---|
674 | {
|
---|
675 | return vmsvgaR3GboTransfer(pSvgaR3State, pGbo,
|
---|
676 | off, pvData, cbData,
|
---|
677 | VMSVGAGboTransferDirection_Read);
|
---|
678 | }
|
---|
679 |
|
---|
680 |
|
---|
681 | static int vmsvgaR3GboBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo, uint32_t cbValid)
|
---|
682 | {
|
---|
683 | int rc;
|
---|
684 |
|
---|
685 | /* Just reread the data if pvHost has been allocated already. */
|
---|
686 | if (!(pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED))
|
---|
687 | pGbo->pvHost = RTMemAllocZ(pGbo->cbTotal);
|
---|
688 |
|
---|
689 | if (pGbo->pvHost)
|
---|
690 | {
|
---|
691 | cbValid = RT_MIN(cbValid, pGbo->cbTotal);
|
---|
692 | rc = vmsvgaR3GboRead(pSvgaR3State, pGbo, 0, pGbo->pvHost, cbValid);
|
---|
693 | }
|
---|
694 | else
|
---|
695 | rc = VERR_NO_MEMORY;
|
---|
696 |
|
---|
697 | if (RT_SUCCESS(rc))
|
---|
698 | pGbo->fGboFlags |= VMSVGAGBO_F_HOST_BACKED;
|
---|
699 | else
|
---|
700 | {
|
---|
701 | RTMemFree(pGbo->pvHost);
|
---|
702 | pGbo->pvHost = NULL;
|
---|
703 | }
|
---|
704 | return rc;
|
---|
705 | }
|
---|
706 |
|
---|
707 |
|
---|
708 | static void vmsvgaR3GboBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo)
|
---|
709 | {
|
---|
710 | RT_NOREF(pSvgaR3State);
|
---|
711 | AssertReturnVoid(pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED);
|
---|
712 | RTMemFree(pGbo->pvHost);
|
---|
713 | pGbo->pvHost = NULL;
|
---|
714 | pGbo->fGboFlags &= ~VMSVGAGBO_F_HOST_BACKED;
|
---|
715 | }
|
---|
716 |
|
---|
717 |
|
---|
718 | static int vmsvgaR3GboBackingStoreWriteToGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo)
|
---|
719 | {
|
---|
720 | AssertReturn(pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED, VERR_INVALID_STATE);
|
---|
721 | return vmsvgaR3GboWrite(pSvgaR3State, pGbo, 0, pGbo->pvHost, pGbo->cbTotal);
|
---|
722 | }
|
---|
723 |
|
---|
724 |
|
---|
725 | static int vmsvgaR3GboBackingStoreReadFromGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo)
|
---|
726 | {
|
---|
727 | AssertReturn(pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED, VERR_INVALID_STATE);
|
---|
728 | return vmsvgaR3GboRead(pSvgaR3State, pGbo, 0, pGbo->pvHost, pGbo->cbTotal);
|
---|
729 | }
|
---|
730 |
|
---|
731 | static int vmsvgaR3GboCopy(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGboDst, uint32_t offDst,
|
---|
732 | PVMSVGAGBO pGboSrc, uint32_t offSrc, uint32_t cbCopy)
|
---|
733 | {
|
---|
734 | uint32_t const cbTmpBuf = GUEST_PAGE_SIZE;
|
---|
735 | void *pvTmpBuf = RTMemTmpAlloc(cbTmpBuf);
|
---|
736 | AssertPtrReturn(pvTmpBuf, VERR_NO_MEMORY);
|
---|
737 |
|
---|
738 | int rc = VINF_SUCCESS;
|
---|
739 | while (cbCopy > 0)
|
---|
740 | {
|
---|
741 | uint32_t const cbToCopy = RT_MIN(cbTmpBuf, cbCopy);
|
---|
742 |
|
---|
743 | rc = vmsvgaR3GboRead(pSvgaR3State, pGboSrc, offSrc, pvTmpBuf, cbToCopy);
|
---|
744 | AssertRCBreak(rc);
|
---|
745 |
|
---|
746 | rc = vmsvgaR3GboWrite(pSvgaR3State, pGboDst, offDst, pvTmpBuf, cbToCopy);
|
---|
747 | AssertRCBreak(rc);
|
---|
748 |
|
---|
749 | offSrc += cbToCopy;
|
---|
750 | offDst += cbToCopy;
|
---|
751 | cbCopy -= cbToCopy;
|
---|
752 | }
|
---|
753 |
|
---|
754 | RTMemTmpFree(pvTmpBuf);
|
---|
755 | return rc;
|
---|
756 | }
|
---|
757 |
|
---|
758 |
|
---|
759 | /*
|
---|
760 | *
|
---|
761 | * Object Tables.
|
---|
762 | *
|
---|
763 | */
|
---|
764 |
|
---|
765 | static int vmsvgaR3OTableSetOrGrow(PVMSVGAR3STATE pSvgaR3State, SVGAOTableType type, PPN64 baseAddress,
|
---|
766 | uint32_t sizeInBytes, uint32 validSizeInBytes, SVGAMobFormat ptDepth, bool fGrow)
|
---|
767 | {
|
---|
768 | ASSERT_GUEST_RETURN(type < RT_ELEMENTS(pSvgaR3State->aGboOTables), VERR_INVALID_PARAMETER);
|
---|
769 | ASSERT_GUEST_RETURN(sizeInBytes >= validSizeInBytes, VERR_INVALID_PARAMETER);
|
---|
770 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
771 |
|
---|
772 | ASSERT_GUEST_RETURN(pSvgaR3State->aGboOTables[type].cbTotal >= validSizeInBytes, VERR_INVALID_PARAMETER);
|
---|
773 |
|
---|
774 | if (sizeInBytes > 0)
|
---|
775 | {
|
---|
776 | /* Create a new guest backed object for the object table. */
|
---|
777 | VMSVGAGBO gbo;
|
---|
778 | int rc = vmsvgaR3GboCreate(pSvgaR3State, ptDepth, baseAddress, sizeInBytes, &gbo);
|
---|
779 | AssertRCReturn(rc, rc);
|
---|
780 |
|
---|
781 | /* If the guest sets a new OTable (fGrow == false), then it has already copied the valid data to the new GBO. */
|
---|
782 | if (fGrow && validSizeInBytes)
|
---|
783 | {
|
---|
784 | /* Copy data from old gbo to the new one. */
|
---|
785 | rc = vmsvgaR3GboCopy(pSvgaR3State, &gbo, 0, &pSvgaR3State->aGboOTables[type], 0, validSizeInBytes);
|
---|
786 | AssertRCReturnStmt(rc, vmsvgaR3GboDestroy(pSvgaR3State, &gbo), rc);
|
---|
787 | }
|
---|
788 |
|
---|
789 | vmsvgaR3GboDestroy(pSvgaR3State, &pSvgaR3State->aGboOTables[type]);
|
---|
790 | pSvgaR3State->aGboOTables[type] = gbo;
|
---|
791 |
|
---|
792 | }
|
---|
793 | else
|
---|
794 | vmsvgaR3GboDestroy(pSvgaR3State, &pSvgaR3State->aGboOTables[type]);
|
---|
795 |
|
---|
796 | return VINF_SUCCESS;
|
---|
797 | }
|
---|
798 |
|
---|
799 |
|
---|
800 | static int vmsvgaR3OTableVerifyIndex(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGboOTable,
|
---|
801 | uint32_t idx, uint32_t cbEntry)
|
---|
802 | {
|
---|
803 | RT_NOREF(pSvgaR3State);
|
---|
804 |
|
---|
805 | /* The table must exist and the index must be within the table. */
|
---|
806 | ASSERT_GUEST_RETURN(VMSVGA_IS_GBO_CREATED(pGboOTable), VERR_INVALID_PARAMETER);
|
---|
807 | ASSERT_GUEST_RETURN(idx < pGboOTable->cbTotal / cbEntry, VERR_INVALID_PARAMETER);
|
---|
808 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
809 | return VINF_SUCCESS;
|
---|
810 | }
|
---|
811 |
|
---|
812 |
|
---|
813 | static int vmsvgaR3OTableRead(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGboOTable,
|
---|
814 | uint32_t idx, uint32_t cbEntry,
|
---|
815 | void *pvData, uint32_t cbData)
|
---|
816 | {
|
---|
817 | AssertReturn(cbData <= cbEntry, VERR_INVALID_PARAMETER);
|
---|
818 |
|
---|
819 | int rc = vmsvgaR3OTableVerifyIndex(pSvgaR3State, pGboOTable, idx, cbEntry);
|
---|
820 | if (RT_SUCCESS(rc))
|
---|
821 | {
|
---|
822 | uint32_t const off = idx * cbEntry;
|
---|
823 | rc = vmsvgaR3GboRead(pSvgaR3State, pGboOTable, off, pvData, cbData);
|
---|
824 | }
|
---|
825 | return rc;
|
---|
826 | }
|
---|
827 |
|
---|
828 | static int vmsvgaR3OTableWrite(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGboOTable,
|
---|
829 | uint32_t idx, uint32_t cbEntry,
|
---|
830 | void const *pvData, uint32_t cbData)
|
---|
831 | {
|
---|
832 | AssertReturn(cbData <= cbEntry, VERR_INVALID_PARAMETER);
|
---|
833 |
|
---|
834 | int rc = vmsvgaR3OTableVerifyIndex(pSvgaR3State, pGboOTable, idx, cbEntry);
|
---|
835 | if (RT_SUCCESS(rc))
|
---|
836 | {
|
---|
837 | uint32_t const off = idx * cbEntry;
|
---|
838 | rc = vmsvgaR3GboWrite(pSvgaR3State, pGboOTable, off, pvData, cbData);
|
---|
839 | }
|
---|
840 | return rc;
|
---|
841 | }
|
---|
842 |
|
---|
843 |
|
---|
844 | int vmsvgaR3OTableReadSurface(PVMSVGAR3STATE pSvgaR3State, uint32_t sid, SVGAOTableSurfaceEntry *pEntrySurface)
|
---|
845 | {
|
---|
846 | return vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
847 | sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, pEntrySurface, sizeof(SVGAOTableSurfaceEntry));
|
---|
848 | }
|
---|
849 |
|
---|
850 |
|
---|
851 | /*
|
---|
852 | *
|
---|
853 | * The guest's Memory OBjects (MOB).
|
---|
854 | *
|
---|
855 | */
|
---|
856 |
|
---|
857 | static int vmsvgaR3MobCreate(PVMSVGAR3STATE pSvgaR3State,
|
---|
858 | SVGAMobFormat ptDepth, PPN64 baseAddress, uint32_t sizeInBytes, SVGAMobId mobid,
|
---|
859 | PVMSVGAMOB pMob)
|
---|
860 | {
|
---|
861 | RT_ZERO(*pMob);
|
---|
862 |
|
---|
863 | /* Update the entry in the pSvgaR3State->pGboOTableMob. */
|
---|
864 | SVGAOTableMobEntry entry;
|
---|
865 | entry.ptDepth = ptDepth;
|
---|
866 | entry.sizeInBytes = sizeInBytes;
|
---|
867 | entry.base = baseAddress;
|
---|
868 | int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_MOB],
|
---|
869 | mobid, SVGA3D_OTABLE_MOB_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
870 | if (RT_SUCCESS(rc))
|
---|
871 | {
|
---|
872 | /* Create the corresponding GBO. */
|
---|
873 | rc = vmsvgaR3GboCreate(pSvgaR3State, ptDepth, baseAddress, sizeInBytes, &pMob->Gbo);
|
---|
874 | if (RT_SUCCESS(rc))
|
---|
875 | {
|
---|
876 | /* If a mob with this id already exists, then delete it. */
|
---|
877 | PVMSVGAMOB pOldMob = (PVMSVGAMOB)RTAvlU32Remove(&pSvgaR3State->MOBTree, mobid);
|
---|
878 | if (pOldMob)
|
---|
879 | {
|
---|
880 | /* This should not happen. */
|
---|
881 | ASSERT_GUEST_FAILED();
|
---|
882 | RTListNodeRemove(&pOldMob->nodeLRU);
|
---|
883 | vmsvgaR3GboDestroy(pSvgaR3State, &pOldMob->Gbo);
|
---|
884 | RTMemFree(pOldMob);
|
---|
885 | }
|
---|
886 |
|
---|
887 | /* Add to the tree of known MOBs and the LRU list. */
|
---|
888 | pMob->Core.Key = mobid;
|
---|
889 | if (RTAvlU32Insert(&pSvgaR3State->MOBTree, &pMob->Core))
|
---|
890 | {
|
---|
891 | RTListPrepend(&pSvgaR3State->MOBLRUList, &pMob->nodeLRU);
|
---|
892 | return VINF_SUCCESS;
|
---|
893 | }
|
---|
894 |
|
---|
895 | AssertFailedStmt(rc = VERR_INVALID_STATE);
|
---|
896 | vmsvgaR3GboDestroy(pSvgaR3State, &pMob->Gbo);
|
---|
897 | }
|
---|
898 | }
|
---|
899 |
|
---|
900 | return rc;
|
---|
901 | }
|
---|
902 |
|
---|
903 |
|
---|
904 | static void vmsvgaR3MobFree(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob)
|
---|
905 | {
|
---|
906 | vmsvgaR3GboDestroy(pSvgaR3State, &pMob->Gbo);
|
---|
907 | RTMemFree(pMob);
|
---|
908 | }
|
---|
909 |
|
---|
910 |
|
---|
911 | static int vmsvgaR3MobDestroy(PVMSVGAR3STATE pSvgaR3State, SVGAMobId mobid)
|
---|
912 | {
|
---|
913 | /* Update the entry in the pSvgaR3State->pGboOTableMob. */
|
---|
914 | SVGAOTableMobEntry entry;
|
---|
915 | RT_ZERO(entry);
|
---|
916 | vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_MOB],
|
---|
917 | mobid, SVGA3D_OTABLE_MOB_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
918 |
|
---|
919 | PVMSVGAMOB pMob = (PVMSVGAMOB)RTAvlU32Remove(&pSvgaR3State->MOBTree, mobid);
|
---|
920 | if (pMob)
|
---|
921 | {
|
---|
922 | RTListNodeRemove(&pMob->nodeLRU);
|
---|
923 | vmsvgaR3MobFree(pSvgaR3State, pMob);
|
---|
924 | return VINF_SUCCESS;
|
---|
925 | }
|
---|
926 |
|
---|
927 | return VERR_INVALID_PARAMETER;
|
---|
928 | }
|
---|
929 |
|
---|
930 |
|
---|
931 | PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid)
|
---|
932 | {
|
---|
933 | if (mobid == SVGA_ID_INVALID)
|
---|
934 | return NULL;
|
---|
935 |
|
---|
936 | PVMSVGAMOB pMob = (PVMSVGAMOB)RTAvlU32Get(&pSvgaR3State->MOBTree, mobid);
|
---|
937 | if (pMob)
|
---|
938 | {
|
---|
939 | /* Move to the head of the LRU list. */
|
---|
940 | RTListNodeRemove(&pMob->nodeLRU);
|
---|
941 | RTListPrepend(&pSvgaR3State->MOBLRUList, &pMob->nodeLRU);
|
---|
942 | }
|
---|
943 | else
|
---|
944 | ASSERT_GUEST_FAILED();
|
---|
945 |
|
---|
946 | return pMob;
|
---|
947 | }
|
---|
948 |
|
---|
949 |
|
---|
950 | int vmsvgaR3MobWrite(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob,
|
---|
951 | uint32_t off, void const *pvData, uint32_t cbData)
|
---|
952 | {
|
---|
953 | return vmsvgaR3GboWrite(pSvgaR3State, &pMob->Gbo, off, pvData, cbData);
|
---|
954 | }
|
---|
955 |
|
---|
956 |
|
---|
957 | int vmsvgaR3MobRead(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob,
|
---|
958 | uint32_t off, void *pvData, uint32_t cbData)
|
---|
959 | {
|
---|
960 | return vmsvgaR3GboWrite(pSvgaR3State, &pMob->Gbo, off, pvData, cbData);
|
---|
961 | }
|
---|
962 |
|
---|
963 |
|
---|
964 | /** Create a host ring-3 pointer to the MOB data.
|
---|
965 | * Current approach is to allocate a host memory buffer and copy the guest MOB data if necessary.
|
---|
966 | * @param pSvgaR3State R3 device state.
|
---|
967 | * @param pMob The MOB.
|
---|
968 | * @param cbValid How many bytes of the guest backing memory contain valid data.
|
---|
969 | * @return VBox status.
|
---|
970 | */
|
---|
971 | /** @todo uint32_t cbValid -> uint32_t offStart, uint32_t cbData */
|
---|
972 | int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid)
|
---|
973 | {
|
---|
974 | AssertReturn(pMob, VERR_INVALID_PARAMETER);
|
---|
975 | return vmsvgaR3GboBackingStoreCreate(pSvgaR3State, &pMob->Gbo, cbValid);
|
---|
976 | }
|
---|
977 |
|
---|
978 |
|
---|
979 | void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob)
|
---|
980 | {
|
---|
981 | if (pMob)
|
---|
982 | vmsvgaR3GboBackingStoreDelete(pSvgaR3State, &pMob->Gbo);
|
---|
983 | }
|
---|
984 |
|
---|
985 |
|
---|
986 | int vmsvgaR3MobBackingStoreWriteToGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob)
|
---|
987 | {
|
---|
988 | if (pMob)
|
---|
989 | return vmsvgaR3GboBackingStoreWriteToGuest(pSvgaR3State, &pMob->Gbo);
|
---|
990 | return VERR_INVALID_PARAMETER;
|
---|
991 | }
|
---|
992 |
|
---|
993 |
|
---|
994 | int vmsvgaR3MobBackingStoreReadFromGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob)
|
---|
995 | {
|
---|
996 | if (pMob)
|
---|
997 | return vmsvgaR3GboBackingStoreReadFromGuest(pSvgaR3State, &pMob->Gbo);
|
---|
998 | return VERR_INVALID_PARAMETER;
|
---|
999 | }
|
---|
1000 |
|
---|
1001 |
|
---|
1002 | void *vmsvgaR3MobBackingStorePtr(PVMSVGAMOB pMob, uint32_t off)
|
---|
1003 | {
|
---|
1004 | if (pMob && (pMob->Gbo.fGboFlags & VMSVGAGBO_F_HOST_BACKED))
|
---|
1005 | {
|
---|
1006 | if (off <= pMob->Gbo.cbTotal)
|
---|
1007 | return (uint8_t *)pMob->Gbo.pvHost + off;
|
---|
1008 | }
|
---|
1009 | return NULL;
|
---|
1010 | }
|
---|
1011 |
|
---|
1012 |
|
---|
1013 | static DECLCALLBACK(int) vmsvgaR3MobFreeCb(PAVLU32NODECORE pNode, void *pvUser)
|
---|
1014 | {
|
---|
1015 | PVMSVGAMOB pMob = (PVMSVGAMOB)pNode;
|
---|
1016 | PVMSVGAR3STATE pSvgaR3State = (PVMSVGAR3STATE)pvUser;
|
---|
1017 | vmsvgaR3MobFree(pSvgaR3State, pMob);
|
---|
1018 | return 0;
|
---|
1019 | }
|
---|
1020 |
|
---|
1021 |
|
---|
1022 | #endif /* VBOX_WITH_VMSVGA3D */
|
---|
1023 |
|
---|
1024 |
|
---|
1025 |
|
---|
1026 | void vmsvgaR3ResetSvgaState(PVGASTATE pThis, PVGASTATECC pThisCC)
|
---|
1027 | {
|
---|
1028 | #ifdef VBOX_WITH_VMSVGA3D
|
---|
1029 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1030 | RT_NOREF(pThis);
|
---|
1031 |
|
---|
1032 | RTAvlU32Destroy(&pSvgaR3State->MOBTree, vmsvgaR3MobFreeCb, pSvgaR3State);
|
---|
1033 | RTListInit(&pSvgaR3State->MOBLRUList);
|
---|
1034 |
|
---|
1035 | for (unsigned i = 0; i < RT_ELEMENTS(pSvgaR3State->aGboOTables); ++i)
|
---|
1036 | vmsvgaR3GboDestroy(pSvgaR3State, &pSvgaR3State->aGboOTables[i]);
|
---|
1037 | #else
|
---|
1038 | RT_NOREF(pThis, pThisCC);
|
---|
1039 | #endif
|
---|
1040 | }
|
---|
1041 |
|
---|
1042 |
|
---|
1043 | void vmsvgaR3TerminateSvgaState(PVGASTATE pThis, PVGASTATECC pThisCC)
|
---|
1044 | {
|
---|
1045 | vmsvgaR3ResetSvgaState(pThis, pThisCC);
|
---|
1046 | }
|
---|
1047 |
|
---|
1048 |
|
---|
1049 | /*
|
---|
1050 | * Screen objects.
|
---|
1051 | */
|
---|
1052 | VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen)
|
---|
1053 | {
|
---|
1054 | PVMSVGAR3STATE pSVGAState = pThisCC->svga.pSvgaR3State;
|
---|
1055 | if ( idScreen < (uint32_t)RT_ELEMENTS(pSVGAState->aScreens)
|
---|
1056 | && pSVGAState
|
---|
1057 | && pSVGAState->aScreens[idScreen].fDefined)
|
---|
1058 | {
|
---|
1059 | Assert(pSVGAState->aScreens[idScreen].idScreen == idScreen);
|
---|
1060 | return &pSVGAState->aScreens[idScreen];
|
---|
1061 | }
|
---|
1062 | return NULL;
|
---|
1063 | }
|
---|
1064 |
|
---|
1065 |
|
---|
1066 | int vmsvgaR3DestroyScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
|
---|
1067 | {
|
---|
1068 | pScreen->fModified = true;
|
---|
1069 | pScreen->fDefined = false;
|
---|
1070 |
|
---|
1071 | /* Notify frontend that the screen is about to be deleted. */
|
---|
1072 | vmsvgaR3ChangeMode(pThis, pThisCC);
|
---|
1073 |
|
---|
1074 | #ifdef VBOX_WITH_VMSVGA3D
|
---|
1075 | if (RT_LIKELY(pThis->svga.f3DEnabled))
|
---|
1076 | vmsvga3dDestroyScreen(pThisCC, pScreen);
|
---|
1077 | #endif
|
---|
1078 |
|
---|
1079 | RTMemFree(pScreen->pvScreenBitmap);
|
---|
1080 | pScreen->pvScreenBitmap = NULL;
|
---|
1081 |
|
---|
1082 | return VINF_SUCCESS;
|
---|
1083 | }
|
---|
1084 |
|
---|
1085 |
|
---|
1086 | void vmsvgaR3ResetScreens(PVGASTATE pThis, PVGASTATECC pThisCC)
|
---|
1087 | {
|
---|
1088 | for (uint32_t idScreen = 0; idScreen < (uint32_t)RT_ELEMENTS(pThisCC->svga.pSvgaR3State->aScreens); ++idScreen)
|
---|
1089 | {
|
---|
1090 | VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idScreen);
|
---|
1091 | if (pScreen)
|
---|
1092 | vmsvgaR3DestroyScreen(pThis, pThisCC, pScreen);
|
---|
1093 | }
|
---|
1094 | }
|
---|
1095 |
|
---|
1096 |
|
---|
1097 | /**
|
---|
1098 | * Copy a rectangle of pixels within guest VRAM.
|
---|
1099 | */
|
---|
1100 | static void vmsvgaR3RectCopy(PVGASTATECC pThisCC, VMSVGASCREENOBJECT const *pScreen, uint32_t srcX, uint32_t srcY,
|
---|
1101 | uint32_t dstX, uint32_t dstY, uint32_t width, uint32_t height, unsigned cbFrameBuffer)
|
---|
1102 | {
|
---|
1103 | if (!width || !height)
|
---|
1104 | return; /* Nothing to do, don't even bother. */
|
---|
1105 |
|
---|
1106 | /*
|
---|
1107 | * The guest VRAM (aka GFB) is considered to be a bitmap in the format
|
---|
1108 | * corresponding to the current display mode.
|
---|
1109 | */
|
---|
1110 | uint32_t const cbPixel = RT_ALIGN(pScreen->cBpp, 8) / 8;
|
---|
1111 | uint32_t const cbScanline = pScreen->cbPitch ? pScreen->cbPitch : width * cbPixel;
|
---|
1112 | uint8_t const *pSrc;
|
---|
1113 | uint8_t *pDst;
|
---|
1114 | unsigned const cbRectWidth = width * cbPixel;
|
---|
1115 | unsigned uMaxOffset;
|
---|
1116 |
|
---|
1117 | uMaxOffset = (RT_MAX(srcY, dstY) + height) * cbScanline + (RT_MAX(srcX, dstX) + width) * cbPixel;
|
---|
1118 | if (uMaxOffset >= cbFrameBuffer)
|
---|
1119 | {
|
---|
1120 | Log(("Max offset (%u) too big for framebuffer (%u bytes), ignoring!\n", uMaxOffset, cbFrameBuffer));
|
---|
1121 | return; /* Just don't listen to a bad guest. */
|
---|
1122 | }
|
---|
1123 |
|
---|
1124 | pSrc = pDst = pThisCC->pbVRam;
|
---|
1125 | pSrc += srcY * cbScanline + srcX * cbPixel;
|
---|
1126 | pDst += dstY * cbScanline + dstX * cbPixel;
|
---|
1127 |
|
---|
1128 | if (srcY >= dstY)
|
---|
1129 | {
|
---|
1130 | /* Source below destination, copy top to bottom. */
|
---|
1131 | for (; height > 0; height--)
|
---|
1132 | {
|
---|
1133 | memmove(pDst, pSrc, cbRectWidth);
|
---|
1134 | pSrc += cbScanline;
|
---|
1135 | pDst += cbScanline;
|
---|
1136 | }
|
---|
1137 | }
|
---|
1138 | else
|
---|
1139 | {
|
---|
1140 | /* Source above destination, copy bottom to top. */
|
---|
1141 | pSrc += cbScanline * (height - 1);
|
---|
1142 | pDst += cbScanline * (height - 1);
|
---|
1143 | for (; height > 0; height--)
|
---|
1144 | {
|
---|
1145 | memmove(pDst, pSrc, cbRectWidth);
|
---|
1146 | pSrc -= cbScanline;
|
---|
1147 | pDst -= cbScanline;
|
---|
1148 | }
|
---|
1149 | }
|
---|
1150 | }
|
---|
1151 |
|
---|
1152 |
|
---|
1153 | /**
|
---|
1154 | * Common worker for changing the pointer shape.
|
---|
1155 | *
|
---|
1156 | * @param pThisCC The VGA/VMSVGA state for ring-3.
|
---|
1157 | * @param pSVGAState The VMSVGA ring-3 instance data.
|
---|
1158 | * @param fAlpha Whether there is alpha or not.
|
---|
1159 | * @param xHot Hotspot x coordinate.
|
---|
1160 | * @param yHot Hotspot y coordinate.
|
---|
1161 | * @param cx Width.
|
---|
1162 | * @param cy Height.
|
---|
1163 | * @param pbData Heap copy of the cursor data. Consumed.
|
---|
1164 | * @param cbData The size of the data.
|
---|
1165 | */
|
---|
1166 | static void vmsvgaR3InstallNewCursor(PVGASTATECC pThisCC, PVMSVGAR3STATE pSVGAState, bool fAlpha,
|
---|
1167 | uint32_t xHot, uint32_t yHot, uint32_t cx, uint32_t cy, uint8_t *pbData, uint32_t cbData)
|
---|
1168 | {
|
---|
1169 | LogRel2(("vmsvgaR3InstallNewCursor: cx=%d cy=%d xHot=%d yHot=%d fAlpha=%d cbData=%#x\n", cx, cy, xHot, yHot, fAlpha, cbData));
|
---|
1170 | #ifdef LOG_ENABLED
|
---|
1171 | if (LogIs2Enabled())
|
---|
1172 | {
|
---|
1173 | uint32_t cbAndLine = RT_ALIGN(cx, 8) / 8;
|
---|
1174 | if (!fAlpha)
|
---|
1175 | {
|
---|
1176 | Log2(("VMSVGA Cursor AND mask (%d,%d):\n", cx, cy));
|
---|
1177 | for (uint32_t y = 0; y < cy; y++)
|
---|
1178 | {
|
---|
1179 | Log2(("%3u:", y));
|
---|
1180 | uint8_t const *pbLine = &pbData[y * cbAndLine];
|
---|
1181 | for (uint32_t x = 0; x < cx; x += 8)
|
---|
1182 | {
|
---|
1183 | uint8_t b = pbLine[x / 8];
|
---|
1184 | char szByte[12];
|
---|
1185 | szByte[0] = b & 0x80 ? '*' : ' '; /* most significant bit first */
|
---|
1186 | szByte[1] = b & 0x40 ? '*' : ' ';
|
---|
1187 | szByte[2] = b & 0x20 ? '*' : ' ';
|
---|
1188 | szByte[3] = b & 0x10 ? '*' : ' ';
|
---|
1189 | szByte[4] = b & 0x08 ? '*' : ' ';
|
---|
1190 | szByte[5] = b & 0x04 ? '*' : ' ';
|
---|
1191 | szByte[6] = b & 0x02 ? '*' : ' ';
|
---|
1192 | szByte[7] = b & 0x01 ? '*' : ' ';
|
---|
1193 | szByte[8] = '\0';
|
---|
1194 | Log2(("%s", szByte));
|
---|
1195 | }
|
---|
1196 | Log2(("\n"));
|
---|
1197 | }
|
---|
1198 | }
|
---|
1199 |
|
---|
1200 | Log2(("VMSVGA Cursor XOR mask (%d,%d):\n", cx, cy));
|
---|
1201 | uint32_t const *pu32Xor = (uint32_t const *)&pbData[RT_ALIGN_32(cbAndLine * cy, 4)];
|
---|
1202 | for (uint32_t y = 0; y < cy; y++)
|
---|
1203 | {
|
---|
1204 | Log2(("%3u:", y));
|
---|
1205 | uint32_t const *pu32Line = &pu32Xor[y * cx];
|
---|
1206 | for (uint32_t x = 0; x < cx; x++)
|
---|
1207 | Log2((" %08x", pu32Line[x]));
|
---|
1208 | Log2(("\n"));
|
---|
1209 | }
|
---|
1210 | }
|
---|
1211 | #endif
|
---|
1212 |
|
---|
1213 | int rc = pThisCC->pDrv->pfnVBVAMousePointerShape(pThisCC->pDrv, true /*fVisible*/, fAlpha, xHot, yHot, cx, cy, pbData);
|
---|
1214 | AssertRC(rc);
|
---|
1215 |
|
---|
1216 | if (pSVGAState->Cursor.fActive)
|
---|
1217 | RTMemFreeZ(pSVGAState->Cursor.pData, pSVGAState->Cursor.cbData);
|
---|
1218 |
|
---|
1219 | pSVGAState->Cursor.fActive = true;
|
---|
1220 | pSVGAState->Cursor.xHotspot = xHot;
|
---|
1221 | pSVGAState->Cursor.yHotspot = yHot;
|
---|
1222 | pSVGAState->Cursor.width = cx;
|
---|
1223 | pSVGAState->Cursor.height = cy;
|
---|
1224 | pSVGAState->Cursor.cbData = cbData;
|
---|
1225 | pSVGAState->Cursor.pData = pbData;
|
---|
1226 | }
|
---|
1227 |
|
---|
1228 |
|
---|
1229 | #ifdef VBOX_WITH_VMSVGA3D
|
---|
1230 |
|
---|
1231 | /*
|
---|
1232 | * SVGA_3D_CMD_* handlers.
|
---|
1233 | */
|
---|
1234 |
|
---|
1235 |
|
---|
1236 | /** SVGA_3D_CMD_SURFACE_DEFINE 1040, SVGA_3D_CMD_SURFACE_DEFINE_V2 1070
|
---|
1237 | *
|
---|
1238 | * @param pThisCC The VGA/VMSVGA state for the current context.
|
---|
1239 | * @param pCmd The VMSVGA command.
|
---|
1240 | * @param cMipLevelSizes Number of elements in the paMipLevelSizes array.
|
---|
1241 | * @param paMipLevelSizes Arrays of surface sizes for each face and miplevel.
|
---|
1242 | */
|
---|
1243 | static void vmsvga3dCmdDefineSurface(PVGASTATECC pThisCC, SVGA3dCmdDefineSurface_v2 const *pCmd,
|
---|
1244 | uint32_t cMipLevelSizes, SVGA3dSize *paMipLevelSizes)
|
---|
1245 | {
|
---|
1246 | ASSERT_GUEST_RETURN_VOID(pCmd->sid < SVGA3D_MAX_SURFACE_IDS);
|
---|
1247 | ASSERT_GUEST_RETURN_VOID(cMipLevelSizes >= 1);
|
---|
1248 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
1249 |
|
---|
1250 | /* Number of faces (cFaces) is specified as the number of the first non-zero elements in the 'face' array.
|
---|
1251 | * Since only plain surfaces (cFaces == 1) and cubemaps (cFaces == 6) are supported
|
---|
1252 | * (see also SVGA3dCmdDefineSurface definition in svga3d_reg.h), we ignore anything else.
|
---|
1253 | */
|
---|
1254 | uint32_t cRemainingMipLevels = cMipLevelSizes;
|
---|
1255 | uint32_t cFaces = 0;
|
---|
1256 | for (uint32_t i = 0; i < SVGA3D_MAX_SURFACE_FACES; ++i)
|
---|
1257 | {
|
---|
1258 | if (pCmd->face[i].numMipLevels == 0)
|
---|
1259 | break;
|
---|
1260 |
|
---|
1261 | /* All SVGA3dSurfaceFace structures must have the same value of numMipLevels field */
|
---|
1262 | ASSERT_GUEST_RETURN_VOID(pCmd->face[i].numMipLevels == pCmd->face[0].numMipLevels);
|
---|
1263 |
|
---|
1264 | /* numMipLevels value can't be greater than the number of remaining elements in the paMipLevelSizes array. */
|
---|
1265 | ASSERT_GUEST_RETURN_VOID(pCmd->face[i].numMipLevels <= cRemainingMipLevels);
|
---|
1266 | cRemainingMipLevels -= pCmd->face[i].numMipLevels;
|
---|
1267 |
|
---|
1268 | ++cFaces;
|
---|
1269 | }
|
---|
1270 | for (uint32_t i = cFaces; i < SVGA3D_MAX_SURFACE_FACES; ++i)
|
---|
1271 | ASSERT_GUEST_RETURN_VOID(pCmd->face[i].numMipLevels == 0);
|
---|
1272 |
|
---|
1273 | /* cFaces must be 6 for a cubemap and 1 otherwise. */
|
---|
1274 | ASSERT_GUEST_RETURN_VOID(cFaces == (uint32_t)((pCmd->surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1));
|
---|
1275 |
|
---|
1276 | /* Sum of face[i].numMipLevels must be equal to cMipLevels. */
|
---|
1277 | ASSERT_GUEST_RETURN_VOID(cRemainingMipLevels == 0);
|
---|
1278 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
1279 |
|
---|
1280 | /* Verify paMipLevelSizes */
|
---|
1281 | uint32_t cWidth = paMipLevelSizes[0].width;
|
---|
1282 | uint32_t cHeight = paMipLevelSizes[0].height;
|
---|
1283 | uint32_t cDepth = paMipLevelSizes[0].depth;
|
---|
1284 | for (uint32_t i = 1; i < pCmd->face[0].numMipLevels; ++i)
|
---|
1285 | {
|
---|
1286 | cWidth >>= 1;
|
---|
1287 | if (cWidth == 0) cWidth = 1;
|
---|
1288 | cHeight >>= 1;
|
---|
1289 | if (cHeight == 0) cHeight = 1;
|
---|
1290 | cDepth >>= 1;
|
---|
1291 | if (cDepth == 0) cDepth = 1;
|
---|
1292 | for (uint32_t iFace = 0; iFace < cFaces; ++iFace)
|
---|
1293 | {
|
---|
1294 | uint32_t const iMipLevelSize = iFace * pCmd->face[0].numMipLevels + i;
|
---|
1295 | ASSERT_GUEST_RETURN_VOID( cWidth == paMipLevelSizes[iMipLevelSize].width
|
---|
1296 | && cHeight == paMipLevelSizes[iMipLevelSize].height
|
---|
1297 | && cDepth == paMipLevelSizes[iMipLevelSize].depth);
|
---|
1298 | }
|
---|
1299 | }
|
---|
1300 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
1301 |
|
---|
1302 | /* Create the surface. */
|
---|
1303 | SVGA3dMSPattern const multisamplePattern = pCmd->multisampleCount > 1 ? SVGA3D_MS_PATTERN_STANDARD : SVGA3D_MS_PATTERN_NONE;
|
---|
1304 | SVGA3dMSQualityLevel const qualityLevel = pCmd->multisampleCount > 1 ? SVGA3D_MS_QUALITY_FULL : SVGA3D_MS_QUALITY_NONE;
|
---|
1305 | vmsvga3dSurfaceDefine(pThisCC, pCmd->sid, pCmd->surfaceFlags, pCmd->format,
|
---|
1306 | pCmd->multisampleCount, multisamplePattern, qualityLevel, pCmd->autogenFilter,
|
---|
1307 | pCmd->face[0].numMipLevels, &paMipLevelSizes[0], /* arraySize = */ 0, /* bufferByteStride = */ 0, /* fAllocMipLevels = */ true);
|
---|
1308 | }
|
---|
1309 |
|
---|
1310 |
|
---|
1311 | /* SVGA_3D_CMD_SET_OTABLE_BASE 1091 */
|
---|
1312 | static void vmsvga3dCmdSetOTableBase(PVGASTATECC pThisCC, SVGA3dCmdSetOTableBase const *pCmd)
|
---|
1313 | {
|
---|
1314 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1315 | vmsvgaR3OTableSetOrGrow(pSvgaR3State, pCmd->type, pCmd->baseAddress,
|
---|
1316 | pCmd->sizeInBytes, pCmd->validSizeInBytes, pCmd->ptDepth, /*fGrow*/ false);
|
---|
1317 | }
|
---|
1318 |
|
---|
1319 |
|
---|
1320 | /* SVGA_3D_CMD_DEFINE_GB_MOB 1093 */
|
---|
1321 | static void vmsvga3dCmdDefineGBMob(PVGASTATECC pThisCC, SVGA3dCmdDefineGBMob const *pCmd)
|
---|
1322 | {
|
---|
1323 | DEBUG_BREAKPOINT_TEST();
|
---|
1324 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1325 |
|
---|
1326 | ASSERT_GUEST_RETURN_VOID(pCmd->mobid != SVGA_ID_INVALID); /* The guest should not use this id. */
|
---|
1327 |
|
---|
1328 | /* Maybe just update the OTable and create Gbo when the MOB is actually accessed? */
|
---|
1329 | /* Allocate a structure for the MOB. */
|
---|
1330 | PVMSVGAMOB pMob = (PVMSVGAMOB)RTMemAllocZ(sizeof(*pMob));
|
---|
1331 | AssertPtrReturnVoid(pMob);
|
---|
1332 |
|
---|
1333 | int rc = vmsvgaR3MobCreate(pSvgaR3State, pCmd->ptDepth, pCmd->base, pCmd->sizeInBytes, pCmd->mobid, pMob);
|
---|
1334 | if (RT_SUCCESS(rc))
|
---|
1335 | {
|
---|
1336 | return;
|
---|
1337 | }
|
---|
1338 |
|
---|
1339 | AssertFailed();
|
---|
1340 |
|
---|
1341 | RTMemFree(pMob);
|
---|
1342 | }
|
---|
1343 |
|
---|
1344 |
|
---|
1345 | /* SVGA_3D_CMD_DESTROY_GB_MOB 1094 */
|
---|
1346 | static void vmsvga3dCmdDestroyGBMob(PVGASTATECC pThisCC, SVGA3dCmdDestroyGBMob const *pCmd)
|
---|
1347 | {
|
---|
1348 | //DEBUG_BREAKPOINT_TEST();
|
---|
1349 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1350 |
|
---|
1351 | ASSERT_GUEST_RETURN_VOID(pCmd->mobid != SVGA_ID_INVALID); /* The guest should not use this id. */
|
---|
1352 |
|
---|
1353 | int rc = vmsvgaR3MobDestroy(pSvgaR3State, pCmd->mobid);
|
---|
1354 | if (RT_SUCCESS(rc))
|
---|
1355 | {
|
---|
1356 | return;
|
---|
1357 | }
|
---|
1358 |
|
---|
1359 | AssertFailed();
|
---|
1360 | }
|
---|
1361 |
|
---|
1362 |
|
---|
1363 | /* SVGA_3D_CMD_DEFINE_GB_SURFACE 1097 */
|
---|
1364 | static void vmsvga3dCmdDefineGBSurface(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface const *pCmd)
|
---|
1365 | {
|
---|
1366 | //DEBUG_BREAKPOINT_TEST();
|
---|
1367 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1368 |
|
---|
1369 | /* Update the entry in the pSvgaR3State->pGboOTableSurface. */
|
---|
1370 | SVGAOTableSurfaceEntry entry;
|
---|
1371 | RT_ZERO(entry);
|
---|
1372 | entry.format = pCmd->format;
|
---|
1373 | entry.surface1Flags = pCmd->surfaceFlags;
|
---|
1374 | entry.numMipLevels = pCmd->numMipLevels;
|
---|
1375 | entry.multisampleCount = pCmd->multisampleCount;
|
---|
1376 | entry.autogenFilter = pCmd->autogenFilter;
|
---|
1377 | entry.size = pCmd->size;
|
---|
1378 | entry.mobid = SVGA_ID_INVALID;
|
---|
1379 | // entry.arraySize = 0;
|
---|
1380 | // entry.mobPitch = 0;
|
---|
1381 | // entry.surface2Flags = 0;
|
---|
1382 | // entry.multisamplePattern = 0;
|
---|
1383 | // entry.qualityLevel = 0;
|
---|
1384 | // entry.bufferByteStride = 0;
|
---|
1385 | // entry.minLOD = 0;
|
---|
1386 | int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
1387 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
1388 | if (RT_SUCCESS(rc))
|
---|
1389 | {
|
---|
1390 | /* Create the host surface. */
|
---|
1391 | SVGA3dMSPattern const multisamplePattern = pCmd->multisampleCount > 1 ? SVGA3D_MS_PATTERN_STANDARD : SVGA3D_MS_PATTERN_NONE;
|
---|
1392 | SVGA3dMSQualityLevel const qualityLevel = pCmd->multisampleCount > 1 ? SVGA3D_MS_QUALITY_FULL : SVGA3D_MS_QUALITY_NONE;
|
---|
1393 | vmsvga3dSurfaceDefine(pThisCC, pCmd->sid, pCmd->surfaceFlags, pCmd->format,
|
---|
1394 | pCmd->multisampleCount, multisamplePattern, qualityLevel, pCmd->autogenFilter,
|
---|
1395 | pCmd->numMipLevels, &pCmd->size, /* arraySize = */ 0, /* bufferByteStride = */ 0, /* fAllocMipLevels = */ false);
|
---|
1396 | }
|
---|
1397 | }
|
---|
1398 |
|
---|
1399 |
|
---|
1400 | /* SVGA_3D_CMD_DESTROY_GB_SURFACE 1098 */
|
---|
1401 | static void vmsvga3dCmdDestroyGBSurface(PVGASTATECC pThisCC, SVGA3dCmdDestroyGBSurface const *pCmd)
|
---|
1402 | {
|
---|
1403 | //DEBUG_BREAKPOINT_TEST();
|
---|
1404 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1405 |
|
---|
1406 | /* Update the entry in the pSvgaR3State->pGboOTableSurface. */
|
---|
1407 | SVGAOTableSurfaceEntry entry;
|
---|
1408 | RT_ZERO(entry);
|
---|
1409 | entry.mobid = SVGA_ID_INVALID;
|
---|
1410 | vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
1411 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
1412 |
|
---|
1413 | vmsvga3dSurfaceDestroy(pThisCC, pCmd->sid);
|
---|
1414 | }
|
---|
1415 |
|
---|
1416 |
|
---|
1417 | /* SVGA_3D_CMD_BIND_GB_SURFACE 1099 */
|
---|
1418 | static void vmsvga3dCmdBindGBSurface(PVGASTATECC pThisCC, SVGA3dCmdBindGBSurface const *pCmd)
|
---|
1419 | {
|
---|
1420 | //DEBUG_BREAKPOINT_TEST();
|
---|
1421 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1422 |
|
---|
1423 | /* Assign the mobid to the surface. */
|
---|
1424 | int rc = VINF_SUCCESS;
|
---|
1425 | if (pCmd->mobid != SVGA_ID_INVALID)
|
---|
1426 | rc = vmsvgaR3OTableVerifyIndex(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_MOB],
|
---|
1427 | pCmd->mobid, SVGA3D_OTABLE_MOB_ENTRY_SIZE);
|
---|
1428 | if (RT_SUCCESS(rc))
|
---|
1429 | {
|
---|
1430 | SVGAOTableSurfaceEntry entry;
|
---|
1431 | rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
1432 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
1433 | if (RT_SUCCESS(rc))
|
---|
1434 | {
|
---|
1435 | entry.mobid = pCmd->mobid;
|
---|
1436 | rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
1437 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
1438 | if (RT_SUCCESS(rc))
|
---|
1439 | {
|
---|
1440 | /* */
|
---|
1441 | }
|
---|
1442 | }
|
---|
1443 | }
|
---|
1444 | }
|
---|
1445 |
|
---|
1446 |
|
---|
1447 | typedef union
|
---|
1448 | {
|
---|
1449 | float f;
|
---|
1450 | uint32_t u;
|
---|
1451 | } Unsigned2Float;
|
---|
1452 |
|
---|
1453 | float float16ToFloat(uint16_t f16)
|
---|
1454 | {
|
---|
1455 | /* Format specs from Wiki: [15] = sign, [14:10] = exponent, [9:0] = fraction */
|
---|
1456 | uint16_t const f = f16 & 0x3FF;
|
---|
1457 | uint16_t const e = (f16 >> 10) & 0x1F;
|
---|
1458 | uint16_t const s = (f16 >> 15) & 0x1;
|
---|
1459 | Unsigned2Float u2f;
|
---|
1460 |
|
---|
1461 | if (e == 0)
|
---|
1462 | {
|
---|
1463 | if (f == 0)
|
---|
1464 | {
|
---|
1465 | /* zero, -0 */
|
---|
1466 | u2f.u = (s << 31) | (0 << 23) | 0;
|
---|
1467 | return u2f.f;
|
---|
1468 | }
|
---|
1469 |
|
---|
1470 | /* subnormal numbers: (-1)^signbit * 2^-14 * 0.significantbits */
|
---|
1471 | float const k = 1.0f / 16384.0f; /* 2^-14 */
|
---|
1472 | return (s ? -1.0f : 1.0f) * k * (float)f / 1024.0f;
|
---|
1473 | }
|
---|
1474 |
|
---|
1475 | if (e == 31)
|
---|
1476 | {
|
---|
1477 | if (f == 0)
|
---|
1478 | {
|
---|
1479 | /* +-infinity */
|
---|
1480 | u2f.u = (s << 31) | (0xFF << 23) | 0;
|
---|
1481 | return u2f.f;
|
---|
1482 | }
|
---|
1483 |
|
---|
1484 | /* NaN */
|
---|
1485 | u2f.u = (s << 31) | (0xFF << 23) | 1;
|
---|
1486 | return u2f.f;
|
---|
1487 | }
|
---|
1488 |
|
---|
1489 | /* normalized value: (-1)^signbit * 2^(exponent - 15) * 1.significantbits */
|
---|
1490 | /* Build the float, adjusting for exponent bias (float32 bias is 127, float16 is 15)
|
---|
1491 | * and number of bits in the fraction (float32 has 23, float16 has 10). */
|
---|
1492 | u2f.u = (s << 31) | ((e + 127 - 15) << 23) | (f << (23 - 10));
|
---|
1493 | return u2f.f;
|
---|
1494 | }
|
---|
1495 |
|
---|
1496 |
|
---|
1497 | static int vmsvga3dBmpWrite(const char *pszFilename, VMSVGA3D_MAPPED_SURFACE const *pMap)
|
---|
1498 | {
|
---|
1499 | if ( pMap->cbBlock != 4 && pMap->cbBlock != 2 && pMap->cbBlock != 1
|
---|
1500 | && pMap->format != SVGA3D_R16G16B16A16_FLOAT
|
---|
1501 | && pMap->format != SVGA3D_R32G32B32A32_FLOAT)
|
---|
1502 | return VERR_NOT_SUPPORTED;
|
---|
1503 |
|
---|
1504 | int const w = pMap->cbRow / pMap->cbBlock;
|
---|
1505 | int const h = pMap->cRows;
|
---|
1506 |
|
---|
1507 | int const cbBitmap = pMap->cbRow * pMap->cRows;
|
---|
1508 | int const cBits = ( pMap->format == SVGA3D_R16G16B16A16_FLOAT
|
---|
1509 | || pMap->format == SVGA3D_R32G32B32A32_FLOAT)
|
---|
1510 | ? 32
|
---|
1511 | : pMap->cbBlock * 8;
|
---|
1512 |
|
---|
1513 | FILE *f = fopen(pszFilename, "wb");
|
---|
1514 | if (!f)
|
---|
1515 | return VERR_FILE_NOT_FOUND;
|
---|
1516 |
|
---|
1517 | /* Always write 32 bit bitmap which can be displayed. */
|
---|
1518 | #ifdef RT_OS_WINDOWS
|
---|
1519 | if (cBits == 32)
|
---|
1520 | {
|
---|
1521 | BMPFILEHDR fileHdr;
|
---|
1522 | RT_ZERO(fileHdr);
|
---|
1523 | fileHdr.uType = BMP_HDR_MAGIC;
|
---|
1524 | fileHdr.cbFileSize = sizeof(fileHdr) + sizeof(BITMAPV4HEADER) + cbBitmap;
|
---|
1525 | fileHdr.offBits = sizeof(fileHdr) + sizeof(BITMAPV4HEADER);
|
---|
1526 |
|
---|
1527 | BITMAPV4HEADER hdrV4;
|
---|
1528 | RT_ZERO(hdrV4);
|
---|
1529 | hdrV4.bV4Size = sizeof(hdrV4);
|
---|
1530 | hdrV4.bV4Width = w;
|
---|
1531 | hdrV4.bV4Height = -h;
|
---|
1532 | hdrV4.bV4Planes = 1;
|
---|
1533 | hdrV4.bV4BitCount = 32;
|
---|
1534 | hdrV4.bV4V4Compression = BI_BITFIELDS;
|
---|
1535 | hdrV4.bV4SizeImage = cbBitmap;
|
---|
1536 | hdrV4.bV4XPelsPerMeter = 2835;
|
---|
1537 | hdrV4.bV4YPelsPerMeter = 2835;
|
---|
1538 | // hdrV4.bV4ClrUsed = 0;
|
---|
1539 | // hdrV4.bV4ClrImportant = 0;
|
---|
1540 | hdrV4.bV4RedMask = 0x00ff0000;
|
---|
1541 | hdrV4.bV4GreenMask = 0x0000ff00;
|
---|
1542 | hdrV4.bV4BlueMask = 0x000000ff;
|
---|
1543 | hdrV4.bV4AlphaMask = 0xff000000;
|
---|
1544 | hdrV4.bV4CSType = LCS_WINDOWS_COLOR_SPACE;
|
---|
1545 | // hdrV4.bV4Endpoints = {0};
|
---|
1546 | // hdrV4.bV4GammaRed = 0;
|
---|
1547 | // hdrV4.bV4GammaGreen = 0;
|
---|
1548 | // hdrV4.bV4GammaBlue = 0;
|
---|
1549 |
|
---|
1550 | fwrite(&fileHdr, 1, sizeof(fileHdr), f);
|
---|
1551 | fwrite(&hdrV4, 1, sizeof(hdrV4), f);
|
---|
1552 | }
|
---|
1553 | else
|
---|
1554 | #else
|
---|
1555 | RT_NOREF(cBits);
|
---|
1556 | #endif
|
---|
1557 | {
|
---|
1558 | BMPFILEHDR fileHdr;
|
---|
1559 | RT_ZERO(fileHdr);
|
---|
1560 | fileHdr.uType = BMP_HDR_MAGIC;
|
---|
1561 | fileHdr.cbFileSize = sizeof(BMPFILEHDR) + sizeof(BMPWIN3XINFOHDR) + cbBitmap;
|
---|
1562 | fileHdr.offBits = sizeof(BMPFILEHDR) + sizeof(BMPWIN3XINFOHDR);
|
---|
1563 |
|
---|
1564 | BMPWIN3XINFOHDR coreHdr;
|
---|
1565 | RT_ZERO(coreHdr);
|
---|
1566 | coreHdr.cbSize = sizeof(coreHdr);
|
---|
1567 | coreHdr.uWidth = w;
|
---|
1568 | coreHdr.uHeight = -h;
|
---|
1569 | coreHdr.cPlanes = 1;
|
---|
1570 | coreHdr.cBits = 32;
|
---|
1571 | coreHdr.cbSizeImage = cbBitmap;
|
---|
1572 |
|
---|
1573 | fwrite(&fileHdr, 1, sizeof(fileHdr), f);
|
---|
1574 | fwrite(&coreHdr, 1, sizeof(coreHdr), f);
|
---|
1575 | }
|
---|
1576 |
|
---|
1577 | if (pMap->format == SVGA3D_R16G16B16A16_FLOAT)
|
---|
1578 | {
|
---|
1579 | const uint8_t *s = (uint8_t *)pMap->pvData;
|
---|
1580 | for (int32_t y = 0; y < h; ++y)
|
---|
1581 | {
|
---|
1582 | for (int32_t x = 0; x < w; ++x)
|
---|
1583 | {
|
---|
1584 | uint16_t const *pu16Pixel = (uint16_t *)(s + x * 8);
|
---|
1585 | uint8_t r = (uint8_t)(255.0 * float16ToFloat(pu16Pixel[0]));
|
---|
1586 | uint8_t g = (uint8_t)(255.0 * float16ToFloat(pu16Pixel[1]));
|
---|
1587 | uint8_t b = (uint8_t)(255.0 * float16ToFloat(pu16Pixel[2]));
|
---|
1588 | uint8_t a = (uint8_t)(255.0 * float16ToFloat(pu16Pixel[3]));
|
---|
1589 | uint32_t u32Pixel = b + (g << 8) + (r << 16) + (a << 24);
|
---|
1590 | fwrite(&u32Pixel, 1, 4, f);
|
---|
1591 | }
|
---|
1592 |
|
---|
1593 | s += pMap->cbRowPitch;
|
---|
1594 | }
|
---|
1595 | }
|
---|
1596 | else if (pMap->format == SVGA3D_R32G32B32A32_FLOAT)
|
---|
1597 | {
|
---|
1598 | const uint8_t *s = (uint8_t *)pMap->pvData;
|
---|
1599 | for (int32_t y = 0; y < h; ++y)
|
---|
1600 | {
|
---|
1601 | for (int32_t x = 0; x < w; ++x)
|
---|
1602 | {
|
---|
1603 | float const *pPixel = (float *)(s + x * 8);
|
---|
1604 | uint8_t r = (uint8_t)(255.0 * pPixel[0]);
|
---|
1605 | uint8_t g = (uint8_t)(255.0 * pPixel[1]);
|
---|
1606 | uint8_t b = (uint8_t)(255.0 * pPixel[2]);
|
---|
1607 | uint8_t a = (uint8_t)(255.0 * pPixel[3]);
|
---|
1608 | uint32_t u32Pixel = b + (g << 8) + (r << 16) + (a << 24);
|
---|
1609 | fwrite(&u32Pixel, 1, 4, f);
|
---|
1610 | }
|
---|
1611 |
|
---|
1612 | s += pMap->cbRowPitch;
|
---|
1613 | }
|
---|
1614 | }
|
---|
1615 | else if (pMap->cbBlock == 4)
|
---|
1616 | {
|
---|
1617 | const uint8_t *s = (uint8_t *)pMap->pvData;
|
---|
1618 | for (uint32_t iRow = 0; iRow < pMap->cRows; ++iRow)
|
---|
1619 | {
|
---|
1620 | fwrite(s, 1, pMap->cbRow, f);
|
---|
1621 |
|
---|
1622 | s += pMap->cbRowPitch;
|
---|
1623 | }
|
---|
1624 | }
|
---|
1625 | else if (pMap->cbBlock == 2)
|
---|
1626 | {
|
---|
1627 | const uint8_t *s = (uint8_t *)pMap->pvData;
|
---|
1628 | for (uint32_t iRow = 0; iRow < pMap->cRows; ++iRow)
|
---|
1629 | {
|
---|
1630 | for (int32_t x = 0; x < w; ++x)
|
---|
1631 | {
|
---|
1632 | uint16_t const *pPixel = (uint16_t *)(s + x * sizeof(uint16_t));
|
---|
1633 | uint32_t u32Pixel = *pPixel;
|
---|
1634 | fwrite(&u32Pixel, 1, 4, f);
|
---|
1635 | }
|
---|
1636 |
|
---|
1637 | s += pMap->cbRowPitch;
|
---|
1638 | }
|
---|
1639 | }
|
---|
1640 | else if (pMap->cbBlock == 1)
|
---|
1641 | {
|
---|
1642 | const uint8_t *s = (uint8_t *)pMap->pvData;
|
---|
1643 | for (uint32_t iRow = 0; iRow < pMap->cRows; ++iRow)
|
---|
1644 | {
|
---|
1645 | for (int32_t x = 0; x < w; ++x)
|
---|
1646 | {
|
---|
1647 | uint32_t u32Pixel = s[x];
|
---|
1648 | fwrite(&u32Pixel, 1, 4, f);
|
---|
1649 | }
|
---|
1650 |
|
---|
1651 | s += pMap->cbRowPitch;
|
---|
1652 | }
|
---|
1653 | }
|
---|
1654 |
|
---|
1655 | fclose(f);
|
---|
1656 |
|
---|
1657 | return VINF_SUCCESS;
|
---|
1658 | }
|
---|
1659 |
|
---|
1660 |
|
---|
1661 | void vmsvga3dMapWriteBmpFile(VMSVGA3D_MAPPED_SURFACE const *pMap, char const *pszPrefix)
|
---|
1662 | {
|
---|
1663 | static int idxBitmap = 0;
|
---|
1664 | char *pszFilename = RTStrAPrintf2("bmp" RTPATH_SLASH_STR "%s%d.bmp", pszPrefix, idxBitmap++);
|
---|
1665 | int rc = vmsvga3dBmpWrite(pszFilename, pMap);
|
---|
1666 | Log(("WriteBmpFile %s format %d %Rrc\n", pszFilename, pMap->format, rc)); RT_NOREF(rc);
|
---|
1667 | RTStrFree(pszFilename);
|
---|
1668 | }
|
---|
1669 |
|
---|
1670 |
|
---|
1671 | static int vmsvgaR3TransferSurfaceLevel(PVGASTATECC pThisCC,
|
---|
1672 | PVMSVGAMOB pMob,
|
---|
1673 | SVGA3dSurfaceImageId const *pImage,
|
---|
1674 | SVGA3dBox const *pBox,
|
---|
1675 | SVGA3dTransferType enmTransfer)
|
---|
1676 | {
|
---|
1677 | if (vmsvga3dIsMultisampleSurface(pThisCC, pImage->sid))
|
---|
1678 | {
|
---|
1679 | /* Multisample surfaces can't be accessed. Skip. */
|
---|
1680 | return VINF_SUCCESS;
|
---|
1681 | }
|
---|
1682 |
|
---|
1683 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1684 |
|
---|
1685 | VMSVGA3D_SURFACE_MAP enmMapType;
|
---|
1686 | if (enmTransfer == SVGA3D_WRITE_HOST_VRAM)
|
---|
1687 | enmMapType = pBox
|
---|
1688 | ? VMSVGA3D_SURFACE_MAP_WRITE
|
---|
1689 | : VMSVGA3D_SURFACE_MAP_WRITE_DISCARD;
|
---|
1690 | else if (enmTransfer == SVGA3D_READ_HOST_VRAM)
|
---|
1691 | enmMapType = VMSVGA3D_SURFACE_MAP_READ;
|
---|
1692 | else
|
---|
1693 | AssertFailedReturn(VERR_INVALID_PARAMETER);
|
---|
1694 |
|
---|
1695 | VMSVGA3D_MAPPED_SURFACE map;
|
---|
1696 | int rc = vmsvga3dSurfaceMap(pThisCC, pImage, pBox, enmMapType, &map);
|
---|
1697 | if (RT_SUCCESS(rc))
|
---|
1698 | {
|
---|
1699 | /* Copy mapped surface <-> MOB. */
|
---|
1700 | VMSGA3D_BOX_DIMENSIONS dims;
|
---|
1701 | rc = vmsvga3dGetBoxDimensions(pThisCC, pImage, pBox, &dims);
|
---|
1702 | if (RT_SUCCESS(rc))
|
---|
1703 | {
|
---|
1704 | for (uint32_t z = 0; z < map.box.d; ++z)
|
---|
1705 | {
|
---|
1706 | uint8_t *pu8Map = (uint8_t *)map.pvData + z * map.cbDepthPitch;
|
---|
1707 | uint32_t offMob = dims.offSubresource + dims.offBox + z * dims.cbDepthPitch;
|
---|
1708 |
|
---|
1709 | for (uint32_t iRow = 0; iRow < map.cRows; ++iRow)
|
---|
1710 | {
|
---|
1711 | if (enmTransfer == SVGA3D_READ_HOST_VRAM)
|
---|
1712 | rc = vmsvgaR3GboWrite(pSvgaR3State, &pMob->Gbo, offMob, pu8Map, dims.cbRow);
|
---|
1713 | else
|
---|
1714 | rc = vmsvgaR3GboRead(pSvgaR3State, &pMob->Gbo, offMob, pu8Map, dims.cbRow);
|
---|
1715 | AssertRCBreak(rc);
|
---|
1716 |
|
---|
1717 | pu8Map += map.cbRowPitch;
|
---|
1718 | offMob += dims.cbPitch;
|
---|
1719 | }
|
---|
1720 | }
|
---|
1721 | }
|
---|
1722 |
|
---|
1723 | // vmsvga3dMapWriteBmpFile(&map, "Dynamic");
|
---|
1724 |
|
---|
1725 | bool const fWritten = (enmTransfer == SVGA3D_WRITE_HOST_VRAM);
|
---|
1726 | vmsvga3dSurfaceUnmap(pThisCC, pImage, &map, fWritten);
|
---|
1727 | }
|
---|
1728 |
|
---|
1729 | return rc;
|
---|
1730 | }
|
---|
1731 |
|
---|
1732 |
|
---|
1733 | /* SVGA_3D_CMD_UPDATE_GB_IMAGE 1101 */
|
---|
1734 | static void vmsvga3dCmdUpdateGBImage(PVGASTATECC pThisCC, SVGA3dCmdUpdateGBImage const *pCmd)
|
---|
1735 | {
|
---|
1736 | //DEBUG_BREAKPOINT_TEST();
|
---|
1737 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1738 |
|
---|
1739 | LogFlowFunc(("sid=%u @%u,%u,%u %ux%ux%u\n",
|
---|
1740 | pCmd->image.sid, pCmd->box.x, pCmd->box.y, pCmd->box.z, pCmd->box.w, pCmd->box.h, pCmd->box.d));
|
---|
1741 |
|
---|
1742 | /*
|
---|
1743 | SVGA3dSurfaceFormat format;
|
---|
1744 | SVGA3dSurface1Flags surface1Flags;
|
---|
1745 | uint32 numMipLevels;
|
---|
1746 | uint32 multisampleCount;
|
---|
1747 | SVGA3dTextureFilter autogenFilter;
|
---|
1748 | SVGA3dSize size;
|
---|
1749 | SVGAMobId mobid;
|
---|
1750 | uint32 arraySize;
|
---|
1751 | uint32 mobPitch;
|
---|
1752 | SVGA3dSurface2Flags surface2Flags;
|
---|
1753 | uint8 multisamplePattern;
|
---|
1754 | uint8 qualityLevel;
|
---|
1755 | uint16 bufferByteStride;
|
---|
1756 | float minLOD;
|
---|
1757 | */
|
---|
1758 |
|
---|
1759 | /* "update a surface from its backing MOB." */
|
---|
1760 | SVGAOTableSurfaceEntry entrySurface;
|
---|
1761 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
1762 | pCmd->image.sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
|
---|
1763 | if (RT_SUCCESS(rc))
|
---|
1764 | {
|
---|
1765 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid);
|
---|
1766 | if (pMob)
|
---|
1767 | {
|
---|
1768 | rc = vmsvgaR3TransferSurfaceLevel(pThisCC, pMob, &pCmd->image, &pCmd->box, SVGA3D_WRITE_HOST_VRAM);
|
---|
1769 | AssertRC(rc);
|
---|
1770 | }
|
---|
1771 | }
|
---|
1772 | }
|
---|
1773 |
|
---|
1774 |
|
---|
1775 | /* SVGA_3D_CMD_UPDATE_GB_SURFACE 1102 */
|
---|
1776 | static void vmsvga3dCmdUpdateGBSurface(PVGASTATECC pThisCC, SVGA3dCmdUpdateGBSurface const *pCmd)
|
---|
1777 | {
|
---|
1778 | //DEBUG_BREAKPOINT_TEST();
|
---|
1779 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1780 |
|
---|
1781 | LogFlowFunc(("sid=%u\n",
|
---|
1782 | pCmd->sid));
|
---|
1783 |
|
---|
1784 | /* "update a surface from its backing MOB." */
|
---|
1785 | SVGAOTableSurfaceEntry entrySurface;
|
---|
1786 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
1787 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
|
---|
1788 | if (RT_SUCCESS(rc))
|
---|
1789 | {
|
---|
1790 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid);
|
---|
1791 | if (pMob)
|
---|
1792 | {
|
---|
1793 | uint32 const arraySize = vmsvga3dGetArrayElements(pThisCC, pCmd->sid);
|
---|
1794 | for (uint32_t iArray = 0; iArray < arraySize; ++iArray)
|
---|
1795 | {
|
---|
1796 | for (uint32_t iMipmap = 0; iMipmap < entrySurface.numMipLevels; ++iMipmap)
|
---|
1797 | {
|
---|
1798 | SVGA3dSurfaceImageId image;
|
---|
1799 | image.sid = pCmd->sid;
|
---|
1800 | image.face = iArray;
|
---|
1801 | image.mipmap = iMipmap;
|
---|
1802 |
|
---|
1803 | rc = vmsvgaR3TransferSurfaceLevel(pThisCC, pMob, &image, /* all pBox = */ NULL, SVGA3D_WRITE_HOST_VRAM);
|
---|
1804 | AssertRCBreak(rc);
|
---|
1805 | }
|
---|
1806 | }
|
---|
1807 | }
|
---|
1808 | }
|
---|
1809 | }
|
---|
1810 |
|
---|
1811 |
|
---|
1812 | /* SVGA_3D_CMD_READBACK_GB_IMAGE 1103 */
|
---|
1813 | static void vmsvga3dCmdReadbackGBImage(PVGASTATECC pThisCC, SVGA3dCmdReadbackGBImage const *pCmd)
|
---|
1814 | {
|
---|
1815 | //DEBUG_BREAKPOINT_TEST();
|
---|
1816 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1817 |
|
---|
1818 | LogFlowFunc(("sid=%u, face=%u, mipmap=%u\n",
|
---|
1819 | pCmd->image.sid, pCmd->image.face, pCmd->image.mipmap));
|
---|
1820 |
|
---|
1821 | /* Read a surface to its backing MOB. */
|
---|
1822 | SVGAOTableSurfaceEntry entrySurface;
|
---|
1823 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
1824 | pCmd->image.sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
|
---|
1825 | if (RT_SUCCESS(rc))
|
---|
1826 | {
|
---|
1827 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid);
|
---|
1828 | if (pMob)
|
---|
1829 | {
|
---|
1830 | rc = vmsvgaR3TransferSurfaceLevel(pThisCC, pMob, &pCmd->image, /* all pBox = */ NULL, SVGA3D_READ_HOST_VRAM);
|
---|
1831 | AssertRC(rc);
|
---|
1832 | }
|
---|
1833 | }
|
---|
1834 | }
|
---|
1835 |
|
---|
1836 |
|
---|
1837 | /* SVGA_3D_CMD_READBACK_GB_SURFACE 1104 */
|
---|
1838 | static void vmsvga3dCmdReadbackGBSurface(PVGASTATECC pThisCC, SVGA3dCmdReadbackGBSurface const *pCmd)
|
---|
1839 | {
|
---|
1840 | //DEBUG_BREAKPOINT_TEST();
|
---|
1841 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1842 |
|
---|
1843 | LogFlowFunc(("sid=%u\n",
|
---|
1844 | pCmd->sid));
|
---|
1845 |
|
---|
1846 | /* Read a surface to its backing MOB. */
|
---|
1847 | SVGAOTableSurfaceEntry entrySurface;
|
---|
1848 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
1849 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
|
---|
1850 | if (RT_SUCCESS(rc))
|
---|
1851 | {
|
---|
1852 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid);
|
---|
1853 | if (pMob)
|
---|
1854 | {
|
---|
1855 | uint32 const arraySize = vmsvga3dGetArrayElements(pThisCC, pCmd->sid);
|
---|
1856 | for (uint32_t iArray = 0; iArray < arraySize; ++iArray)
|
---|
1857 | {
|
---|
1858 | for (uint32_t iMipmap = 0; iMipmap < entrySurface.numMipLevels; ++iMipmap)
|
---|
1859 | {
|
---|
1860 | SVGA3dSurfaceImageId image;
|
---|
1861 | image.sid = pCmd->sid;
|
---|
1862 | image.face = iArray;
|
---|
1863 | image.mipmap = iMipmap;
|
---|
1864 |
|
---|
1865 | rc = vmsvgaR3TransferSurfaceLevel(pThisCC, pMob, &image, /* all pBox = */ NULL, SVGA3D_READ_HOST_VRAM);
|
---|
1866 | AssertRCBreak(rc);
|
---|
1867 | }
|
---|
1868 | }
|
---|
1869 | }
|
---|
1870 | }
|
---|
1871 | }
|
---|
1872 |
|
---|
1873 |
|
---|
1874 | /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE 1105 */
|
---|
1875 | static void vmsvga3dCmdInvalidateGBImage(PVGASTATECC pThisCC, SVGA3dCmdInvalidateGBImage const *pCmd)
|
---|
1876 | {
|
---|
1877 | //DEBUG_BREAKPOINT_TEST();
|
---|
1878 | vmsvga3dSurfaceInvalidate(pThisCC, pCmd->image.sid, pCmd->image.face, pCmd->image.mipmap);
|
---|
1879 | }
|
---|
1880 |
|
---|
1881 |
|
---|
1882 | /* SVGA_3D_CMD_INVALIDATE_GB_SURFACE 1106 */
|
---|
1883 | static void vmsvga3dCmdInvalidateGBSurface(PVGASTATECC pThisCC, SVGA3dCmdInvalidateGBSurface const *pCmd)
|
---|
1884 | {
|
---|
1885 | //DEBUG_BREAKPOINT_TEST();
|
---|
1886 | vmsvga3dSurfaceInvalidate(pThisCC, pCmd->sid, SVGA_ID_INVALID, SVGA_ID_INVALID);
|
---|
1887 | }
|
---|
1888 |
|
---|
1889 |
|
---|
1890 | /* SVGA_3D_CMD_SET_OTABLE_BASE64 1115 */
|
---|
1891 | static void vmsvga3dCmdSetOTableBase64(PVGASTATECC pThisCC, SVGA3dCmdSetOTableBase64 const *pCmd)
|
---|
1892 | {
|
---|
1893 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1894 | vmsvgaR3OTableSetOrGrow(pSvgaR3State, pCmd->type, pCmd->baseAddress,
|
---|
1895 | pCmd->sizeInBytes, pCmd->validSizeInBytes, pCmd->ptDepth, /*fGrow*/ false);
|
---|
1896 | }
|
---|
1897 |
|
---|
1898 |
|
---|
1899 | /* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET 1124 */
|
---|
1900 | static void vmsvga3dCmdDefineGBScreenTarget(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dCmdDefineGBScreenTarget const *pCmd)
|
---|
1901 | {
|
---|
1902 | //DEBUG_BREAKPOINT_TEST();
|
---|
1903 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1904 |
|
---|
1905 | ASSERT_GUEST_RETURN_VOID(pCmd->stid < RT_ELEMENTS(pSvgaR3State->aScreens));
|
---|
1906 | ASSERT_GUEST_RETURN_VOID(pCmd->width > 0 && pCmd->width <= pThis->svga.u32MaxWidth); /* SVGA_REG_SCREENTARGET_MAX_WIDTH */
|
---|
1907 | ASSERT_GUEST_RETURN_VOID(pCmd->height > 0 && pCmd->height <= pThis->svga.u32MaxHeight); /* SVGA_REG_SCREENTARGET_MAX_HEIGHT */
|
---|
1908 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
1909 |
|
---|
1910 | /* Update the entry in the pSvgaR3State->pGboOTableScreenTarget. */
|
---|
1911 | SVGAOTableScreenTargetEntry entry;
|
---|
1912 | RT_ZERO(entry);
|
---|
1913 | entry.image.sid = SVGA_ID_INVALID;
|
---|
1914 | // entry.image.face = 0;
|
---|
1915 | // entry.image.mipmap = 0;
|
---|
1916 | entry.width = pCmd->width;
|
---|
1917 | entry.height = pCmd->height;
|
---|
1918 | entry.xRoot = pCmd->xRoot;
|
---|
1919 | entry.yRoot = pCmd->yRoot;
|
---|
1920 | entry.flags = pCmd->flags;
|
---|
1921 | entry.dpi = pCmd->dpi;
|
---|
1922 |
|
---|
1923 | int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SCREENTARGET],
|
---|
1924 | pCmd->stid, SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
1925 | if (RT_SUCCESS(rc))
|
---|
1926 | {
|
---|
1927 | /* Screen objects and screen targets are similar, therefore we will use the same for both. */
|
---|
1928 | /** @todo Generic screen object/target interface. */
|
---|
1929 | VMSVGASCREENOBJECT *pScreen = &pSvgaR3State->aScreens[pCmd->stid];
|
---|
1930 | Assert(pScreen->idScreen == pCmd->stid);
|
---|
1931 | pScreen->fDefined = true;
|
---|
1932 | pScreen->fModified = true;
|
---|
1933 | pScreen->fuScreen = SVGA_SCREEN_MUST_BE_SET
|
---|
1934 | | (RT_BOOL(pCmd->flags & SVGA_STFLAG_PRIMARY) ? SVGA_SCREEN_IS_PRIMARY : 0);
|
---|
1935 |
|
---|
1936 | pScreen->xOrigin = pCmd->xRoot;
|
---|
1937 | pScreen->yOrigin = pCmd->yRoot;
|
---|
1938 | pScreen->cWidth = pCmd->width;
|
---|
1939 | pScreen->cHeight = pCmd->height;
|
---|
1940 | pScreen->offVRAM = 0; /* Not applicable for screen targets, they use either a separate memory buffer or a host window. */
|
---|
1941 | pScreen->cbPitch = pCmd->width * 4;
|
---|
1942 | pScreen->cBpp = 32;
|
---|
1943 | pScreen->cDpi = pCmd->dpi;
|
---|
1944 |
|
---|
1945 | /* The screen bitmap must be deallocated after 'vmsvgaR3ChangeMode'. */
|
---|
1946 | void *pvOldScreenBitmap = pScreen->pvScreenBitmap;
|
---|
1947 | pScreen->pvScreenBitmap = 0;
|
---|
1948 |
|
---|
1949 | if (RT_LIKELY(pThis->svga.f3DEnabled))
|
---|
1950 | vmsvga3dDefineScreen(pThis, pThisCC, pScreen);
|
---|
1951 |
|
---|
1952 | if (!pScreen->pHwScreen)
|
---|
1953 | {
|
---|
1954 | /* System memory buffer. */
|
---|
1955 | pScreen->pvScreenBitmap = RTMemAllocZ(pScreen->cHeight * pScreen->cbPitch);
|
---|
1956 | }
|
---|
1957 |
|
---|
1958 | pThis->svga.fGFBRegisters = false;
|
---|
1959 | vmsvgaR3ChangeMode(pThis, pThisCC);
|
---|
1960 |
|
---|
1961 | RTMemFree(pvOldScreenBitmap);
|
---|
1962 | }
|
---|
1963 | }
|
---|
1964 |
|
---|
1965 |
|
---|
1966 | /* SVGA_3D_CMD_DESTROY_GB_SCREENTARGET 1125 */
|
---|
1967 | static void vmsvga3dCmdDestroyGBScreenTarget(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dCmdDestroyGBScreenTarget const *pCmd)
|
---|
1968 | {
|
---|
1969 | //DEBUG_BREAKPOINT_TEST();
|
---|
1970 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1971 |
|
---|
1972 | ASSERT_GUEST_RETURN_VOID(pCmd->stid < RT_ELEMENTS(pSvgaR3State->aScreens));
|
---|
1973 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
1974 |
|
---|
1975 | /* Update the entry in the pSvgaR3State->pGboOTableScreenTarget. */
|
---|
1976 | SVGAOTableScreenTargetEntry entry;
|
---|
1977 | RT_ZERO(entry);
|
---|
1978 | int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SCREENTARGET],
|
---|
1979 | pCmd->stid, SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
1980 | if (RT_SUCCESS(rc))
|
---|
1981 | {
|
---|
1982 | /* Screen objects and screen targets are similar, therefore we will use the same for both. */
|
---|
1983 | /** @todo Generic screen object/target interface. */
|
---|
1984 | VMSVGASCREENOBJECT *pScreen = &pSvgaR3State->aScreens[pCmd->stid];
|
---|
1985 | vmsvgaR3DestroyScreen(pThis, pThisCC, pScreen);
|
---|
1986 | }
|
---|
1987 | }
|
---|
1988 |
|
---|
1989 |
|
---|
1990 | /* SVGA_3D_CMD_BIND_GB_SCREENTARGET 1126 */
|
---|
1991 | static void vmsvga3dCmdBindGBScreenTarget(PVGASTATECC pThisCC, SVGA3dCmdBindGBScreenTarget const *pCmd)
|
---|
1992 | {
|
---|
1993 | //DEBUG_BREAKPOINT_TEST();
|
---|
1994 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
1995 |
|
---|
1996 | /* "Binding a surface to a Screen Target the same as flipping" */
|
---|
1997 |
|
---|
1998 | ASSERT_GUEST_RETURN_VOID(pCmd->stid < RT_ELEMENTS(pSvgaR3State->aScreens));
|
---|
1999 | ASSERT_GUEST_RETURN_VOID(pCmd->image.face == 0 && pCmd->image.mipmap == 0);
|
---|
2000 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
2001 |
|
---|
2002 | /* Assign the surface to the screen target. */
|
---|
2003 | int rc = VINF_SUCCESS;
|
---|
2004 | if (pCmd->image.sid != SVGA_ID_INVALID)
|
---|
2005 | rc = vmsvgaR3OTableVerifyIndex(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
2006 | pCmd->image.sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE);
|
---|
2007 | if (RT_SUCCESS(rc))
|
---|
2008 | {
|
---|
2009 | SVGAOTableScreenTargetEntry entry;
|
---|
2010 | rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SCREENTARGET],
|
---|
2011 | pCmd->stid, SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
2012 | if (RT_SUCCESS(rc))
|
---|
2013 | {
|
---|
2014 | entry.image = pCmd->image;
|
---|
2015 | rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SCREENTARGET],
|
---|
2016 | pCmd->stid, SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
2017 | if (RT_SUCCESS(rc))
|
---|
2018 | {
|
---|
2019 | VMSVGASCREENOBJECT *pScreen = &pSvgaR3State->aScreens[pCmd->stid];
|
---|
2020 | rc = pSvgaR3State->pFuncsGBO->pfnScreenTargetBind(pThisCC, pScreen, pCmd->image.sid);
|
---|
2021 | AssertRC(rc);
|
---|
2022 | }
|
---|
2023 | }
|
---|
2024 | }
|
---|
2025 | }
|
---|
2026 |
|
---|
2027 |
|
---|
2028 | /* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET 1127 */
|
---|
2029 | static void vmsvga3dCmdUpdateGBScreenTarget(PVGASTATECC pThisCC, SVGA3dCmdUpdateGBScreenTarget const *pCmd)
|
---|
2030 | {
|
---|
2031 | //DEBUG_BREAKPOINT_TEST();
|
---|
2032 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2033 |
|
---|
2034 | /* Update the screen target from its backing surface. */
|
---|
2035 | ASSERT_GUEST_RETURN_VOID(pCmd->stid < RT_ELEMENTS(pSvgaR3State->aScreens));
|
---|
2036 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
2037 |
|
---|
2038 | /* Get the screen target info. */
|
---|
2039 | SVGAOTableScreenTargetEntry entryScreenTarget;
|
---|
2040 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SCREENTARGET],
|
---|
2041 | pCmd->stid, SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE, &entryScreenTarget, sizeof(entryScreenTarget));
|
---|
2042 | if (RT_SUCCESS(rc))
|
---|
2043 | {
|
---|
2044 | ASSERT_GUEST_RETURN_VOID(entryScreenTarget.image.face == 0 && entryScreenTarget.image.mipmap == 0);
|
---|
2045 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
2046 |
|
---|
2047 | if (entryScreenTarget.image.sid != SVGA_ID_INVALID)
|
---|
2048 | {
|
---|
2049 | SVGAOTableSurfaceEntry entrySurface;
|
---|
2050 | rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
2051 | entryScreenTarget.image.sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
|
---|
2052 | if (RT_SUCCESS(rc))
|
---|
2053 | {
|
---|
2054 | /* Copy entrySurface.mobid content to the screen target. */
|
---|
2055 | if (entrySurface.mobid != SVGA_ID_INVALID)
|
---|
2056 | {
|
---|
2057 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
2058 | SVGA3dRect targetRect = pCmd->rect;
|
---|
2059 |
|
---|
2060 | VMSVGASCREENOBJECT *pScreen = &pSvgaR3State->aScreens[pCmd->stid];
|
---|
2061 | if (pScreen->pHwScreen)
|
---|
2062 | {
|
---|
2063 | /* Copy the screen target surface to the backend's screen. */
|
---|
2064 | pSvgaR3State->pFuncsGBO->pfnScreenTargetUpdate(pThisCC, pScreen, &targetRect);
|
---|
2065 | }
|
---|
2066 | else
|
---|
2067 | {
|
---|
2068 | SVGASignedRect r;
|
---|
2069 | r.left = pCmd->rect.x;
|
---|
2070 | r.top = pCmd->rect.y;
|
---|
2071 | r.right = pCmd->rect.x + pCmd->rect.w;
|
---|
2072 | r.bottom = pCmd->rect.y + pCmd->rect.h;
|
---|
2073 | vmsvga3dScreenUpdate(pThisCC, pCmd->stid, r, entryScreenTarget.image, r, 0, NULL);
|
---|
2074 | }
|
---|
2075 | }
|
---|
2076 | }
|
---|
2077 | }
|
---|
2078 | }
|
---|
2079 | }
|
---|
2080 |
|
---|
2081 |
|
---|
2082 | /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 1134 */
|
---|
2083 | static void vmsvga3dCmdDefineGBSurface_v2(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v2 const *pCmd)
|
---|
2084 | {
|
---|
2085 | //DEBUG_BREAKPOINT_TEST();
|
---|
2086 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2087 |
|
---|
2088 | /* Update the entry in the pSvgaR3State->pGboOTableSurface. */
|
---|
2089 | SVGAOTableSurfaceEntry entry;
|
---|
2090 | RT_ZERO(entry);
|
---|
2091 | entry.format = pCmd->format;
|
---|
2092 | entry.surface1Flags = pCmd->surfaceFlags;
|
---|
2093 | entry.numMipLevels = pCmd->numMipLevels;
|
---|
2094 | entry.multisampleCount = pCmd->multisampleCount;
|
---|
2095 | entry.autogenFilter = pCmd->autogenFilter;
|
---|
2096 | entry.size = pCmd->size;
|
---|
2097 | entry.mobid = SVGA_ID_INVALID;
|
---|
2098 | entry.arraySize = pCmd->arraySize;
|
---|
2099 | // entry.mobPitch = 0;
|
---|
2100 | // entry.surface2Flags = 0;
|
---|
2101 | // entry.multisamplePattern = 0;
|
---|
2102 | // entry.qualityLevel = 0;
|
---|
2103 | // entry.bufferByteStride = 0;
|
---|
2104 | // entry.minLOD = 0;
|
---|
2105 |
|
---|
2106 | int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
2107 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
2108 | if (RT_SUCCESS(rc))
|
---|
2109 | {
|
---|
2110 | /* Create the host surface. */
|
---|
2111 | SVGA3dMSPattern const multisamplePattern = pCmd->multisampleCount > 1 ? SVGA3D_MS_PATTERN_STANDARD : SVGA3D_MS_PATTERN_NONE;
|
---|
2112 | SVGA3dMSQualityLevel const qualityLevel = pCmd->multisampleCount > 1 ? SVGA3D_MS_QUALITY_FULL : SVGA3D_MS_QUALITY_NONE;
|
---|
2113 | vmsvga3dSurfaceDefine(pThisCC, pCmd->sid, pCmd->surfaceFlags, pCmd->format,
|
---|
2114 | pCmd->multisampleCount, multisamplePattern, qualityLevel, pCmd->autogenFilter,
|
---|
2115 | pCmd->numMipLevels, &pCmd->size, pCmd->arraySize, /* bufferByteStride = */ 0, /* fAllocMipLevels = */ false);
|
---|
2116 | }
|
---|
2117 | }
|
---|
2118 |
|
---|
2119 |
|
---|
2120 | /* SVGA_3D_CMD_DEFINE_GB_MOB64 1135 */
|
---|
2121 | static void vmsvga3dCmdDefineGBMob64(PVGASTATECC pThisCC, SVGA3dCmdDefineGBMob64 const *pCmd)
|
---|
2122 | {
|
---|
2123 | //DEBUG_BREAKPOINT_TEST();
|
---|
2124 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2125 |
|
---|
2126 | ASSERT_GUEST_RETURN_VOID(pCmd->mobid != SVGA_ID_INVALID); /* The guest should not use this id. */
|
---|
2127 |
|
---|
2128 | /* Maybe just update the OTable and create Gbo when the MOB is actually accessed? */
|
---|
2129 | /* Allocate a structure for the MOB. */
|
---|
2130 | PVMSVGAMOB pMob = (PVMSVGAMOB)RTMemAllocZ(sizeof(*pMob));
|
---|
2131 | AssertPtrReturnVoid(pMob);
|
---|
2132 |
|
---|
2133 | int rc = vmsvgaR3MobCreate(pSvgaR3State, pCmd->ptDepth, pCmd->base, pCmd->sizeInBytes, pCmd->mobid, pMob);
|
---|
2134 | if (RT_SUCCESS(rc))
|
---|
2135 | {
|
---|
2136 | return;
|
---|
2137 | }
|
---|
2138 |
|
---|
2139 | RTMemFree(pMob);
|
---|
2140 | }
|
---|
2141 |
|
---|
2142 |
|
---|
2143 | /* SVGA_3D_CMD_DX_DEFINE_CONTEXT 1143 */
|
---|
2144 | static int vmsvga3dCmdDXDefineContext(PVGASTATECC pThisCC, SVGA3dCmdDXDefineContext const *pCmd, uint32_t cbCmd)
|
---|
2145 | {
|
---|
2146 | #ifdef VMSVGA3D_DX
|
---|
2147 | //DEBUG_BREAKPOINT_TEST();
|
---|
2148 | RT_NOREF(cbCmd);
|
---|
2149 |
|
---|
2150 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2151 |
|
---|
2152 | /* Update the entry in the pSvgaR3State->pGboOTable[SVGA_OTABLE_DXCONTEXT]. */
|
---|
2153 | SVGAOTableDXContextEntry entry;
|
---|
2154 | RT_ZERO(entry);
|
---|
2155 | entry.cid = pCmd->cid;
|
---|
2156 | entry.mobid = SVGA_ID_INVALID;
|
---|
2157 | int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
|
---|
2158 | pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
|
---|
2159 | if (RT_SUCCESS(rc))
|
---|
2160 | {
|
---|
2161 | /* Create the host context. */
|
---|
2162 | rc = vmsvga3dDXDefineContext(pThisCC, pCmd->cid);
|
---|
2163 | }
|
---|
2164 |
|
---|
2165 | return rc;
|
---|
2166 | #else
|
---|
2167 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
2168 | return VERR_NOT_SUPPORTED;
|
---|
2169 | #endif
|
---|
2170 | }
|
---|
2171 |
|
---|
2172 |
|
---|
2173 | /* SVGA_3D_CMD_DX_DESTROY_CONTEXT 1144 */
|
---|
2174 | static int vmsvga3dCmdDXDestroyContext(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyContext const *pCmd, uint32_t cbCmd)
|
---|
2175 | {
|
---|
2176 | #ifdef VMSVGA3D_DX
|
---|
2177 | //DEBUG_BREAKPOINT_TEST();
|
---|
2178 | RT_NOREF(cbCmd);
|
---|
2179 |
|
---|
2180 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2181 |
|
---|
2182 | /* Update the entry in the pSvgaR3State->pGboOTable[SVGA_OTABLE_DXCONTEXT]. */
|
---|
2183 | SVGAOTableDXContextEntry entry;
|
---|
2184 | RT_ZERO(entry);
|
---|
2185 | vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
|
---|
2186 | pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
|
---|
2187 |
|
---|
2188 | return vmsvga3dDXDestroyContext(pThisCC, pCmd->cid);
|
---|
2189 | #else
|
---|
2190 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
2191 | return VERR_NOT_SUPPORTED;
|
---|
2192 | #endif
|
---|
2193 | }
|
---|
2194 |
|
---|
2195 |
|
---|
2196 | /* SVGA_3D_CMD_DX_BIND_CONTEXT 1145 */
|
---|
2197 | static int vmsvga3dCmdDXBindContext(PVGASTATECC pThisCC, SVGA3dCmdDXBindContext const *pCmd, uint32_t cbCmd)
|
---|
2198 | {
|
---|
2199 | #ifdef VMSVGA3D_DX
|
---|
2200 | //DEBUG_BREAKPOINT_TEST();
|
---|
2201 | RT_NOREF(cbCmd);
|
---|
2202 |
|
---|
2203 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2204 |
|
---|
2205 | /* Assign a mobid to a cid. */
|
---|
2206 | int rc = VINF_SUCCESS;
|
---|
2207 | if (pCmd->mobid != SVGA_ID_INVALID)
|
---|
2208 | rc = vmsvgaR3OTableVerifyIndex(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_MOB],
|
---|
2209 | pCmd->mobid, SVGA3D_OTABLE_MOB_ENTRY_SIZE);
|
---|
2210 | if (RT_SUCCESS(rc))
|
---|
2211 | {
|
---|
2212 | SVGAOTableDXContextEntry entry;
|
---|
2213 | rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
|
---|
2214 | pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
|
---|
2215 | if (RT_SUCCESS(rc))
|
---|
2216 | {
|
---|
2217 | SVGADXContextMobFormat *pSvgaDXContext = NULL;
|
---|
2218 | if (pCmd->mobid != entry.mobid && entry.mobid != SVGA_ID_INVALID)
|
---|
2219 | {
|
---|
2220 | /* Unbind notification to the DX backend. Copy the context data to the guest backing memory. */
|
---|
2221 | pSvgaDXContext = (SVGADXContextMobFormat *)RTMemAlloc(sizeof(SVGADXContextMobFormat));
|
---|
2222 | if (pSvgaDXContext)
|
---|
2223 | {
|
---|
2224 | rc = vmsvga3dDXUnbindContext(pThisCC, pCmd->cid, pSvgaDXContext);
|
---|
2225 | if (RT_SUCCESS(rc))
|
---|
2226 | {
|
---|
2227 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entry.mobid);
|
---|
2228 | if (pMob)
|
---|
2229 | {
|
---|
2230 | rc = vmsvgaR3GboWrite(pSvgaR3State, &pMob->Gbo, 0, pSvgaDXContext, sizeof(SVGADXContextMobFormat));
|
---|
2231 | }
|
---|
2232 | }
|
---|
2233 |
|
---|
2234 | RTMemFree(pSvgaDXContext);
|
---|
2235 | pSvgaDXContext = NULL;
|
---|
2236 | }
|
---|
2237 | }
|
---|
2238 |
|
---|
2239 | if (pCmd->mobid != SVGA_ID_INVALID)
|
---|
2240 | {
|
---|
2241 | /* Bind a new context. Copy existing data from the guest backing memory. */
|
---|
2242 | if (pCmd->validContents)
|
---|
2243 | {
|
---|
2244 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
|
---|
2245 | if (pMob)
|
---|
2246 | {
|
---|
2247 | pSvgaDXContext = (SVGADXContextMobFormat *)RTMemAlloc(sizeof(SVGADXContextMobFormat));
|
---|
2248 | if (pSvgaDXContext)
|
---|
2249 | {
|
---|
2250 | rc = vmsvgaR3GboRead(pSvgaR3State, &pMob->Gbo, 0, pSvgaDXContext, sizeof(SVGADXContextMobFormat));
|
---|
2251 | if (RT_FAILURE(rc))
|
---|
2252 | {
|
---|
2253 | RTMemFree(pSvgaDXContext);
|
---|
2254 | pSvgaDXContext = NULL;
|
---|
2255 | }
|
---|
2256 | }
|
---|
2257 | }
|
---|
2258 | }
|
---|
2259 |
|
---|
2260 | rc = vmsvga3dDXBindContext(pThisCC, pCmd->cid, pSvgaDXContext);
|
---|
2261 |
|
---|
2262 | RTMemFree(pSvgaDXContext);
|
---|
2263 | }
|
---|
2264 |
|
---|
2265 | /* Update the object table. */
|
---|
2266 | entry.mobid = pCmd->mobid;
|
---|
2267 | rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
|
---|
2268 | pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
|
---|
2269 | }
|
---|
2270 | }
|
---|
2271 |
|
---|
2272 | return rc;
|
---|
2273 | #else
|
---|
2274 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
2275 | return VERR_NOT_SUPPORTED;
|
---|
2276 | #endif
|
---|
2277 | }
|
---|
2278 |
|
---|
2279 |
|
---|
2280 | /* SVGA_3D_CMD_DX_READBACK_CONTEXT 1146 */
|
---|
2281 | static int vmsvga3dCmdDXReadbackContext(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackContext const *pCmd, uint32_t cbCmd)
|
---|
2282 | {
|
---|
2283 | #ifdef VMSVGA3D_DX
|
---|
2284 | //DEBUG_BREAKPOINT_TEST();
|
---|
2285 | RT_NOREF(cbCmd);
|
---|
2286 |
|
---|
2287 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2288 |
|
---|
2289 | /* "Request that the device flush the contents back into guest memory." */
|
---|
2290 | SVGAOTableDXContextEntry entry;
|
---|
2291 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
|
---|
2292 | pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
|
---|
2293 | if (RT_SUCCESS(rc))
|
---|
2294 | {
|
---|
2295 | if (entry.mobid != SVGA_ID_INVALID)
|
---|
2296 | {
|
---|
2297 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entry.mobid);
|
---|
2298 | if (pMob)
|
---|
2299 | {
|
---|
2300 | /* Get the content. */
|
---|
2301 | SVGADXContextMobFormat *pSvgaDXContext = (SVGADXContextMobFormat *)RTMemAlloc(sizeof(SVGADXContextMobFormat));
|
---|
2302 | if (pSvgaDXContext)
|
---|
2303 | {
|
---|
2304 | rc = vmsvga3dDXReadbackContext(pThisCC, pCmd->cid, pSvgaDXContext);
|
---|
2305 | if (RT_SUCCESS(rc))
|
---|
2306 | rc = vmsvgaR3GboWrite(pSvgaR3State, &pMob->Gbo, 0, pSvgaDXContext, sizeof(SVGADXContextMobFormat));
|
---|
2307 |
|
---|
2308 | RTMemFree(pSvgaDXContext);
|
---|
2309 | }
|
---|
2310 | else
|
---|
2311 | rc = VERR_NO_MEMORY;
|
---|
2312 | }
|
---|
2313 | }
|
---|
2314 | }
|
---|
2315 |
|
---|
2316 | return rc;
|
---|
2317 | #else
|
---|
2318 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
2319 | return VERR_NOT_SUPPORTED;
|
---|
2320 | #endif
|
---|
2321 | }
|
---|
2322 |
|
---|
2323 |
|
---|
2324 | /* SVGA_3D_CMD_DX_INVALIDATE_CONTEXT 1147 */
|
---|
2325 | static int vmsvga3dCmdDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXInvalidateContext const *pCmd, uint32_t cbCmd)
|
---|
2326 | {
|
---|
2327 | #ifdef VMSVGA3D_DX
|
---|
2328 | DEBUG_BREAKPOINT_TEST();
|
---|
2329 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2330 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
2331 | return vmsvga3dDXInvalidateContext(pThisCC, idDXContext);
|
---|
2332 | #else
|
---|
2333 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2334 | return VERR_NOT_SUPPORTED;
|
---|
2335 | #endif
|
---|
2336 | }
|
---|
2337 |
|
---|
2338 |
|
---|
2339 | /* SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER 1148 */
|
---|
2340 | static int vmsvga3dCmdDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd, uint32_t cbCmd)
|
---|
2341 | {
|
---|
2342 | #ifdef VMSVGA3D_DX
|
---|
2343 | //DEBUG_BREAKPOINT_TEST();
|
---|
2344 | RT_NOREF(cbCmd);
|
---|
2345 | return vmsvga3dDXSetSingleConstantBuffer(pThisCC, idDXContext, pCmd);
|
---|
2346 | #else
|
---|
2347 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2348 | return VERR_NOT_SUPPORTED;
|
---|
2349 | #endif
|
---|
2350 | }
|
---|
2351 |
|
---|
2352 |
|
---|
2353 | /* SVGA_3D_CMD_DX_SET_SHADER_RESOURCES 1149 */
|
---|
2354 | static int vmsvga3dCmdDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cbCmd)
|
---|
2355 | {
|
---|
2356 | #ifdef VMSVGA3D_DX
|
---|
2357 | //DEBUG_BREAKPOINT_TEST();
|
---|
2358 | SVGA3dShaderResourceViewId const *paShaderResourceViewId = (SVGA3dShaderResourceViewId *)&pCmd[1];
|
---|
2359 | uint32_t const cShaderResourceViewId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dShaderResourceViewId);
|
---|
2360 | return vmsvga3dDXSetShaderResources(pThisCC, idDXContext, pCmd, cShaderResourceViewId, paShaderResourceViewId);
|
---|
2361 | #else
|
---|
2362 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2363 | return VERR_NOT_SUPPORTED;
|
---|
2364 | #endif
|
---|
2365 | }
|
---|
2366 |
|
---|
2367 |
|
---|
2368 | /* SVGA_3D_CMD_DX_SET_SHADER 1150 */
|
---|
2369 | static int vmsvga3dCmdDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd, uint32_t cbCmd)
|
---|
2370 | {
|
---|
2371 | #ifdef VMSVGA3D_DX
|
---|
2372 | //DEBUG_BREAKPOINT_TEST();
|
---|
2373 | RT_NOREF(cbCmd);
|
---|
2374 | return vmsvga3dDXSetShader(pThisCC, idDXContext, pCmd);
|
---|
2375 | #else
|
---|
2376 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2377 | return VERR_NOT_SUPPORTED;
|
---|
2378 | #endif
|
---|
2379 | }
|
---|
2380 |
|
---|
2381 |
|
---|
2382 | /* SVGA_3D_CMD_DX_SET_SAMPLERS 1151 */
|
---|
2383 | static int vmsvga3dCmdDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cbCmd)
|
---|
2384 | {
|
---|
2385 | #ifdef VMSVGA3D_DX
|
---|
2386 | //DEBUG_BREAKPOINT_TEST();
|
---|
2387 | SVGA3dSamplerId const *paSamplerId = (SVGA3dSamplerId *)&pCmd[1];
|
---|
2388 | uint32_t const cSamplerId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dSamplerId);
|
---|
2389 | return vmsvga3dDXSetSamplers(pThisCC, idDXContext, pCmd, cSamplerId, paSamplerId);
|
---|
2390 | #else
|
---|
2391 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2392 | return VERR_NOT_SUPPORTED;
|
---|
2393 | #endif
|
---|
2394 | }
|
---|
2395 |
|
---|
2396 |
|
---|
2397 | /* SVGA_3D_CMD_DX_DRAW 1152 */
|
---|
2398 | static int vmsvga3dCmdDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd, uint32_t cbCmd)
|
---|
2399 | {
|
---|
2400 | #ifdef VMSVGA3D_DX
|
---|
2401 | //DEBUG_BREAKPOINT_TEST();
|
---|
2402 | RT_NOREF(cbCmd);
|
---|
2403 | return vmsvga3dDXDraw(pThisCC, idDXContext, pCmd);
|
---|
2404 | #else
|
---|
2405 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2406 | return VERR_NOT_SUPPORTED;
|
---|
2407 | #endif
|
---|
2408 | }
|
---|
2409 |
|
---|
2410 |
|
---|
2411 | /* SVGA_3D_CMD_DX_DRAW_INDEXED 1153 */
|
---|
2412 | static int vmsvga3dCmdDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd, uint32_t cbCmd)
|
---|
2413 | {
|
---|
2414 | #ifdef VMSVGA3D_DX
|
---|
2415 | //DEBUG_BREAKPOINT_TEST();
|
---|
2416 | RT_NOREF(cbCmd);
|
---|
2417 | return vmsvga3dDXDrawIndexed(pThisCC, idDXContext, pCmd);
|
---|
2418 | #else
|
---|
2419 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2420 | return VERR_NOT_SUPPORTED;
|
---|
2421 | #endif
|
---|
2422 | }
|
---|
2423 |
|
---|
2424 |
|
---|
2425 | /* SVGA_3D_CMD_DX_DRAW_INSTANCED 1154 */
|
---|
2426 | static int vmsvga3dCmdDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd, uint32_t cbCmd)
|
---|
2427 | {
|
---|
2428 | #ifdef VMSVGA3D_DX
|
---|
2429 | //DEBUG_BREAKPOINT_TEST();
|
---|
2430 | RT_NOREF(cbCmd);
|
---|
2431 | return vmsvga3dDXDrawInstanced(pThisCC, idDXContext, pCmd);
|
---|
2432 | #else
|
---|
2433 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2434 | return VERR_NOT_SUPPORTED;
|
---|
2435 | #endif
|
---|
2436 | }
|
---|
2437 |
|
---|
2438 |
|
---|
2439 | /* SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED 1155 */
|
---|
2440 | static int vmsvga3dCmdDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd, uint32_t cbCmd)
|
---|
2441 | {
|
---|
2442 | #ifdef VMSVGA3D_DX
|
---|
2443 | //DEBUG_BREAKPOINT_TEST();
|
---|
2444 | RT_NOREF(cbCmd);
|
---|
2445 | return vmsvga3dDXDrawIndexedInstanced(pThisCC, idDXContext, pCmd);
|
---|
2446 | #else
|
---|
2447 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2448 | return VERR_NOT_SUPPORTED;
|
---|
2449 | #endif
|
---|
2450 | }
|
---|
2451 |
|
---|
2452 |
|
---|
2453 | /* SVGA_3D_CMD_DX_DRAW_AUTO 1156 */
|
---|
2454 | static int vmsvga3dCmdDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawAuto const *pCmd, uint32_t cbCmd)
|
---|
2455 | {
|
---|
2456 | #ifdef VMSVGA3D_DX
|
---|
2457 | //DEBUG_BREAKPOINT_TEST();
|
---|
2458 | RT_NOREF(pCmd, cbCmd);
|
---|
2459 | return vmsvga3dDXDrawAuto(pThisCC, idDXContext);
|
---|
2460 | #else
|
---|
2461 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2462 | return VERR_NOT_SUPPORTED;
|
---|
2463 | #endif
|
---|
2464 | }
|
---|
2465 |
|
---|
2466 |
|
---|
2467 | /* SVGA_3D_CMD_DX_SET_INPUT_LAYOUT 1157 */
|
---|
2468 | static int vmsvga3dCmdDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetInputLayout const *pCmd, uint32_t cbCmd)
|
---|
2469 | {
|
---|
2470 | #ifdef VMSVGA3D_DX
|
---|
2471 | //DEBUG_BREAKPOINT_TEST();
|
---|
2472 | RT_NOREF(cbCmd);
|
---|
2473 | return vmsvga3dDXSetInputLayout(pThisCC, idDXContext, pCmd->elementLayoutId);
|
---|
2474 | #else
|
---|
2475 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2476 | return VERR_NOT_SUPPORTED;
|
---|
2477 | #endif
|
---|
2478 | }
|
---|
2479 |
|
---|
2480 |
|
---|
2481 | /* SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS 1158 */
|
---|
2482 | static int vmsvga3dCmdDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetVertexBuffers const *pCmd, uint32_t cbCmd)
|
---|
2483 | {
|
---|
2484 | #ifdef VMSVGA3D_DX
|
---|
2485 | //DEBUG_BREAKPOINT_TEST();
|
---|
2486 | SVGA3dVertexBuffer const *paVertexBuffer = (SVGA3dVertexBuffer *)&pCmd[1];
|
---|
2487 | uint32_t const cVertexBuffer = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dVertexBuffer);
|
---|
2488 | return vmsvga3dDXSetVertexBuffers(pThisCC, idDXContext, pCmd->startBuffer, cVertexBuffer, paVertexBuffer);
|
---|
2489 | #else
|
---|
2490 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2491 | return VERR_NOT_SUPPORTED;
|
---|
2492 | #endif
|
---|
2493 | }
|
---|
2494 |
|
---|
2495 |
|
---|
2496 | /* SVGA_3D_CMD_DX_SET_INDEX_BUFFER 1159 */
|
---|
2497 | static int vmsvga3dCmdDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd, uint32_t cbCmd)
|
---|
2498 | {
|
---|
2499 | #ifdef VMSVGA3D_DX
|
---|
2500 | //DEBUG_BREAKPOINT_TEST();
|
---|
2501 | RT_NOREF(cbCmd);
|
---|
2502 | return vmsvga3dDXSetIndexBuffer(pThisCC, idDXContext, pCmd);
|
---|
2503 | #else
|
---|
2504 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2505 | return VERR_NOT_SUPPORTED;
|
---|
2506 | #endif
|
---|
2507 | }
|
---|
2508 |
|
---|
2509 |
|
---|
2510 | /* SVGA_3D_CMD_DX_SET_TOPOLOGY 1160 */
|
---|
2511 | static int vmsvga3dCmdDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetTopology const *pCmd, uint32_t cbCmd)
|
---|
2512 | {
|
---|
2513 | #ifdef VMSVGA3D_DX
|
---|
2514 | //DEBUG_BREAKPOINT_TEST();
|
---|
2515 | RT_NOREF(cbCmd);
|
---|
2516 | return vmsvga3dDXSetTopology(pThisCC, idDXContext, pCmd->topology);
|
---|
2517 | #else
|
---|
2518 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2519 | return VERR_NOT_SUPPORTED;
|
---|
2520 | #endif
|
---|
2521 | }
|
---|
2522 |
|
---|
2523 |
|
---|
2524 | /* SVGA_3D_CMD_DX_SET_RENDERTARGETS 1161 */
|
---|
2525 | static int vmsvga3dCmdDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetRenderTargets const *pCmd, uint32_t cbCmd)
|
---|
2526 | {
|
---|
2527 | #ifdef VMSVGA3D_DX
|
---|
2528 | //DEBUG_BREAKPOINT_TEST();
|
---|
2529 | SVGA3dRenderTargetViewId const *paRenderTargetViewId = (SVGA3dRenderTargetViewId *)&pCmd[1];
|
---|
2530 | uint32_t const cRenderTargetViewId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dRenderTargetViewId);
|
---|
2531 | return vmsvga3dDXSetRenderTargets(pThisCC, idDXContext, pCmd->depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
|
---|
2532 | #else
|
---|
2533 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2534 | return VERR_NOT_SUPPORTED;
|
---|
2535 | #endif
|
---|
2536 | }
|
---|
2537 |
|
---|
2538 |
|
---|
2539 | /* SVGA_3D_CMD_DX_SET_BLEND_STATE 1162 */
|
---|
2540 | static int vmsvga3dCmdDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd, uint32_t cbCmd)
|
---|
2541 | {
|
---|
2542 | #ifdef VMSVGA3D_DX
|
---|
2543 | //DEBUG_BREAKPOINT_TEST();
|
---|
2544 | RT_NOREF(cbCmd);
|
---|
2545 | return vmsvga3dDXSetBlendState(pThisCC, idDXContext, pCmd);
|
---|
2546 | #else
|
---|
2547 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2548 | return VERR_NOT_SUPPORTED;
|
---|
2549 | #endif
|
---|
2550 | }
|
---|
2551 |
|
---|
2552 |
|
---|
2553 | /* SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE 1163 */
|
---|
2554 | static int vmsvga3dCmdDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd, uint32_t cbCmd)
|
---|
2555 | {
|
---|
2556 | #ifdef VMSVGA3D_DX
|
---|
2557 | //DEBUG_BREAKPOINT_TEST();
|
---|
2558 | RT_NOREF(cbCmd);
|
---|
2559 | return vmsvga3dDXSetDepthStencilState(pThisCC, idDXContext, pCmd);
|
---|
2560 | #else
|
---|
2561 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2562 | return VERR_NOT_SUPPORTED;
|
---|
2563 | #endif
|
---|
2564 | }
|
---|
2565 |
|
---|
2566 |
|
---|
2567 | /* SVGA_3D_CMD_DX_SET_RASTERIZER_STATE 1164 */
|
---|
2568 | static int vmsvga3dCmdDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetRasterizerState const *pCmd, uint32_t cbCmd)
|
---|
2569 | {
|
---|
2570 | #ifdef VMSVGA3D_DX
|
---|
2571 | //DEBUG_BREAKPOINT_TEST();
|
---|
2572 | RT_NOREF(cbCmd);
|
---|
2573 | return vmsvga3dDXSetRasterizerState(pThisCC, idDXContext, pCmd->rasterizerId);
|
---|
2574 | #else
|
---|
2575 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2576 | return VERR_NOT_SUPPORTED;
|
---|
2577 | #endif
|
---|
2578 | }
|
---|
2579 |
|
---|
2580 |
|
---|
2581 | /* SVGA_3D_CMD_DX_DEFINE_QUERY 1165 */
|
---|
2582 | static int vmsvga3dCmdDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineQuery const *pCmd, uint32_t cbCmd)
|
---|
2583 | {
|
---|
2584 | #ifdef VMSVGA3D_DX
|
---|
2585 | //DEBUG_BREAKPOINT_TEST();
|
---|
2586 | RT_NOREF(cbCmd);
|
---|
2587 | return vmsvga3dDXDefineQuery(pThisCC, idDXContext, pCmd);
|
---|
2588 | #else
|
---|
2589 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2590 | return VERR_NOT_SUPPORTED;
|
---|
2591 | #endif
|
---|
2592 | }
|
---|
2593 |
|
---|
2594 |
|
---|
2595 | /* SVGA_3D_CMD_DX_DESTROY_QUERY 1166 */
|
---|
2596 | static int vmsvga3dCmdDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyQuery const *pCmd, uint32_t cbCmd)
|
---|
2597 | {
|
---|
2598 | #ifdef VMSVGA3D_DX
|
---|
2599 | //DEBUG_BREAKPOINT_TEST();
|
---|
2600 | RT_NOREF(cbCmd);
|
---|
2601 | return vmsvga3dDXDestroyQuery(pThisCC, idDXContext, pCmd);
|
---|
2602 | #else
|
---|
2603 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2604 | return VERR_NOT_SUPPORTED;
|
---|
2605 | #endif
|
---|
2606 | }
|
---|
2607 |
|
---|
2608 |
|
---|
2609 | /* SVGA_3D_CMD_DX_BIND_QUERY 1167 */
|
---|
2610 | static int vmsvga3dCmdDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindQuery const *pCmd, uint32_t cbCmd)
|
---|
2611 | {
|
---|
2612 | #ifdef VMSVGA3D_DX
|
---|
2613 | //DEBUG_BREAKPOINT_TEST();
|
---|
2614 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2615 | RT_NOREF(cbCmd);
|
---|
2616 | /* This returns NULL if mob does not exist. If the guest sends a wrong mob id, the current mob will be unbound. */
|
---|
2617 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
|
---|
2618 | return vmsvga3dDXBindQuery(pThisCC, idDXContext, pCmd, pMob);
|
---|
2619 | #else
|
---|
2620 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2621 | return VERR_NOT_SUPPORTED;
|
---|
2622 | #endif
|
---|
2623 | }
|
---|
2624 |
|
---|
2625 |
|
---|
2626 | /* SVGA_3D_CMD_DX_SET_QUERY_OFFSET 1168 */
|
---|
2627 | static int vmsvga3dCmdDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetQueryOffset const *pCmd, uint32_t cbCmd)
|
---|
2628 | {
|
---|
2629 | #ifdef VMSVGA3D_DX
|
---|
2630 | //DEBUG_BREAKPOINT_TEST();
|
---|
2631 | RT_NOREF(cbCmd);
|
---|
2632 | return vmsvga3dDXSetQueryOffset(pThisCC, idDXContext, pCmd);
|
---|
2633 | #else
|
---|
2634 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2635 | return VERR_NOT_SUPPORTED;
|
---|
2636 | #endif
|
---|
2637 | }
|
---|
2638 |
|
---|
2639 |
|
---|
2640 | /* SVGA_3D_CMD_DX_BEGIN_QUERY 1169 */
|
---|
2641 | static int vmsvga3dCmdDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBeginQuery const *pCmd, uint32_t cbCmd)
|
---|
2642 | {
|
---|
2643 | #ifdef VMSVGA3D_DX
|
---|
2644 | //DEBUG_BREAKPOINT_TEST();
|
---|
2645 | RT_NOREF(cbCmd);
|
---|
2646 | return vmsvga3dDXBeginQuery(pThisCC, idDXContext, pCmd);
|
---|
2647 | #else
|
---|
2648 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2649 | return VERR_NOT_SUPPORTED;
|
---|
2650 | #endif
|
---|
2651 | }
|
---|
2652 |
|
---|
2653 |
|
---|
2654 | /* SVGA_3D_CMD_DX_END_QUERY 1170 */
|
---|
2655 | static int vmsvga3dCmdDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXEndQuery const *pCmd, uint32_t cbCmd)
|
---|
2656 | {
|
---|
2657 | #ifdef VMSVGA3D_DX
|
---|
2658 | //DEBUG_BREAKPOINT_TEST();
|
---|
2659 | RT_NOREF(cbCmd);
|
---|
2660 | return vmsvga3dDXEndQuery(pThisCC, idDXContext, pCmd);
|
---|
2661 | #else
|
---|
2662 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2663 | return VERR_NOT_SUPPORTED;
|
---|
2664 | #endif
|
---|
2665 | }
|
---|
2666 |
|
---|
2667 |
|
---|
2668 | /* SVGA_3D_CMD_DX_READBACK_QUERY 1171 */
|
---|
2669 | static int vmsvga3dCmdDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackQuery const *pCmd, uint32_t cbCmd)
|
---|
2670 | {
|
---|
2671 | #ifdef VMSVGA3D_DX
|
---|
2672 | //DEBUG_BREAKPOINT_TEST();
|
---|
2673 | RT_NOREF(cbCmd);
|
---|
2674 | return vmsvga3dDXReadbackQuery(pThisCC, idDXContext, pCmd);
|
---|
2675 | #else
|
---|
2676 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2677 | return VERR_NOT_SUPPORTED;
|
---|
2678 | #endif
|
---|
2679 | }
|
---|
2680 |
|
---|
2681 |
|
---|
2682 | /* SVGA_3D_CMD_DX_SET_PREDICATION 1172 */
|
---|
2683 | static int vmsvga3dCmdDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetPredication const *pCmd, uint32_t cbCmd)
|
---|
2684 | {
|
---|
2685 | #ifdef VMSVGA3D_DX
|
---|
2686 | //DEBUG_BREAKPOINT_TEST();
|
---|
2687 | RT_NOREF(cbCmd);
|
---|
2688 | return vmsvga3dDXSetPredication(pThisCC, idDXContext, pCmd);
|
---|
2689 | #else
|
---|
2690 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2691 | return VERR_NOT_SUPPORTED;
|
---|
2692 | #endif
|
---|
2693 | }
|
---|
2694 |
|
---|
2695 |
|
---|
2696 | /* SVGA_3D_CMD_DX_SET_SOTARGETS 1173 */
|
---|
2697 | static int vmsvga3dCmdDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSOTargets const *pCmd, uint32_t cbCmd)
|
---|
2698 | {
|
---|
2699 | #ifdef VMSVGA3D_DX
|
---|
2700 | //DEBUG_BREAKPOINT_TEST();
|
---|
2701 | SVGA3dSoTarget const *paSoTarget = (SVGA3dSoTarget *)&pCmd[1];
|
---|
2702 | uint32_t const cSoTarget = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dSoTarget);
|
---|
2703 | return vmsvga3dDXSetSOTargets(pThisCC, idDXContext, cSoTarget, paSoTarget);
|
---|
2704 | #else
|
---|
2705 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2706 | return VERR_NOT_SUPPORTED;
|
---|
2707 | #endif
|
---|
2708 | }
|
---|
2709 |
|
---|
2710 |
|
---|
2711 | /* SVGA_3D_CMD_DX_SET_VIEWPORTS 1174 */
|
---|
2712 | static int vmsvga3dCmdDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetViewports const *pCmd, uint32_t cbCmd)
|
---|
2713 | {
|
---|
2714 | #ifdef VMSVGA3D_DX
|
---|
2715 | //DEBUG_BREAKPOINT_TEST();
|
---|
2716 | SVGA3dViewport const *paViewport = (SVGA3dViewport *)&pCmd[1];
|
---|
2717 | uint32_t const cViewport = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dViewport);
|
---|
2718 | return vmsvga3dDXSetViewports(pThisCC, idDXContext, cViewport, paViewport);
|
---|
2719 | #else
|
---|
2720 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2721 | return VERR_NOT_SUPPORTED;
|
---|
2722 | #endif
|
---|
2723 | }
|
---|
2724 |
|
---|
2725 |
|
---|
2726 | /* SVGA_3D_CMD_DX_SET_SCISSORRECTS 1175 */
|
---|
2727 | static int vmsvga3dCmdDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetScissorRects const *pCmd, uint32_t cbCmd)
|
---|
2728 | {
|
---|
2729 | #ifdef VMSVGA3D_DX
|
---|
2730 | //DEBUG_BREAKPOINT_TEST();
|
---|
2731 | SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1];
|
---|
2732 | uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
|
---|
2733 | return vmsvga3dDXSetScissorRects(pThisCC, idDXContext, cRect, paRect);
|
---|
2734 | #else
|
---|
2735 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2736 | return VERR_NOT_SUPPORTED;
|
---|
2737 | #endif
|
---|
2738 | }
|
---|
2739 |
|
---|
2740 |
|
---|
2741 | /* SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW 1176 */
|
---|
2742 | static int vmsvga3dCmdDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd, uint32_t cbCmd)
|
---|
2743 | {
|
---|
2744 | #ifdef VMSVGA3D_DX
|
---|
2745 | //DEBUG_BREAKPOINT_TEST();
|
---|
2746 | RT_NOREF(cbCmd);
|
---|
2747 | return vmsvga3dDXClearRenderTargetView(pThisCC, idDXContext, pCmd);
|
---|
2748 | #else
|
---|
2749 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2750 | return VERR_NOT_SUPPORTED;
|
---|
2751 | #endif
|
---|
2752 | }
|
---|
2753 |
|
---|
2754 |
|
---|
2755 | /* SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW 1177 */
|
---|
2756 | static int vmsvga3dCmdDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd, uint32_t cbCmd)
|
---|
2757 | {
|
---|
2758 | #ifdef VMSVGA3D_DX
|
---|
2759 | //DEBUG_BREAKPOINT_TEST();
|
---|
2760 | RT_NOREF(cbCmd);
|
---|
2761 | return vmsvga3dDXClearDepthStencilView(pThisCC, idDXContext, pCmd);
|
---|
2762 | #else
|
---|
2763 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2764 | return VERR_NOT_SUPPORTED;
|
---|
2765 | #endif
|
---|
2766 | }
|
---|
2767 |
|
---|
2768 |
|
---|
2769 | /* SVGA_3D_CMD_DX_PRED_COPY_REGION 1178 */
|
---|
2770 | static int vmsvga3dCmdDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd, uint32_t cbCmd)
|
---|
2771 | {
|
---|
2772 | #ifdef VMSVGA3D_DX
|
---|
2773 | //DEBUG_BREAKPOINT_TEST();
|
---|
2774 | RT_NOREF(cbCmd);
|
---|
2775 | return vmsvga3dDXPredCopyRegion(pThisCC, idDXContext, pCmd);
|
---|
2776 | #else
|
---|
2777 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2778 | return VERR_NOT_SUPPORTED;
|
---|
2779 | #endif
|
---|
2780 | }
|
---|
2781 |
|
---|
2782 |
|
---|
2783 | /* SVGA_3D_CMD_DX_PRED_COPY 1179 */
|
---|
2784 | static int vmsvga3dCmdDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopy const *pCmd, uint32_t cbCmd)
|
---|
2785 | {
|
---|
2786 | #ifdef VMSVGA3D_DX
|
---|
2787 | //DEBUG_BREAKPOINT_TEST();
|
---|
2788 | RT_NOREF(cbCmd);
|
---|
2789 | return vmsvga3dDXPredCopy(pThisCC, idDXContext, pCmd);
|
---|
2790 | #else
|
---|
2791 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2792 | return VERR_NOT_SUPPORTED;
|
---|
2793 | #endif
|
---|
2794 | }
|
---|
2795 |
|
---|
2796 |
|
---|
2797 | /* SVGA_3D_CMD_DX_PRESENTBLT 1180 */
|
---|
2798 | static int vmsvga3dCmdDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPresentBlt const *pCmd, uint32_t cbCmd)
|
---|
2799 | {
|
---|
2800 | #ifdef VMSVGA3D_DX
|
---|
2801 | //DEBUG_BREAKPOINT_TEST();
|
---|
2802 | RT_NOREF(cbCmd);
|
---|
2803 | return vmsvga3dDXPresentBlt(pThisCC, idDXContext, pCmd);
|
---|
2804 | #else
|
---|
2805 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2806 | return VERR_NOT_SUPPORTED;
|
---|
2807 | #endif
|
---|
2808 | }
|
---|
2809 |
|
---|
2810 |
|
---|
2811 | /* SVGA_3D_CMD_DX_GENMIPS 1181 */
|
---|
2812 | static int vmsvga3dCmdDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd, uint32_t cbCmd)
|
---|
2813 | {
|
---|
2814 | #ifdef VMSVGA3D_DX
|
---|
2815 | //DEBUG_BREAKPOINT_TEST();
|
---|
2816 | RT_NOREF(cbCmd);
|
---|
2817 | return vmsvga3dDXGenMips(pThisCC, idDXContext, pCmd);
|
---|
2818 | #else
|
---|
2819 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2820 | return VERR_NOT_SUPPORTED;
|
---|
2821 | #endif
|
---|
2822 | }
|
---|
2823 |
|
---|
2824 |
|
---|
2825 | /* SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE 1182 */
|
---|
2826 | static int vmsvga3dCmdDXUpdateSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXUpdateSubResource const *pCmd, uint32_t cbCmd)
|
---|
2827 | {
|
---|
2828 | #ifdef VMSVGA3D_DX
|
---|
2829 | //DEBUG_BREAKPOINT_TEST();
|
---|
2830 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2831 | RT_NOREF(cbCmd);
|
---|
2832 |
|
---|
2833 | LogFlowFunc(("sid=%u, subResource=%u, box=%d,%d,%d %ux%ux%u\n",
|
---|
2834 | pCmd->sid, pCmd->subResource, pCmd->box.x, pCmd->box.y, pCmd->box.z, pCmd->box.w, pCmd->box.h, pCmd->box.d));
|
---|
2835 |
|
---|
2836 | /* "Inform the device that the guest-contents have been updated." */
|
---|
2837 | SVGAOTableSurfaceEntry entrySurface;
|
---|
2838 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
2839 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
|
---|
2840 | if (RT_SUCCESS(rc))
|
---|
2841 | {
|
---|
2842 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid);
|
---|
2843 | if (pMob)
|
---|
2844 | {
|
---|
2845 | uint32 const cSubresource = vmsvga3dGetSubresourceCount(pThisCC, pCmd->sid);
|
---|
2846 | ASSERT_GUEST_RETURN(pCmd->subResource < cSubresource, VERR_INVALID_PARAMETER);
|
---|
2847 | /* pCmd->box will be verified by the mapping function. */
|
---|
2848 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
2849 |
|
---|
2850 | /** @todo Mapping functions should use subresource index rather than SVGA3dSurfaceImageId? */
|
---|
2851 | SVGA3dSurfaceImageId image;
|
---|
2852 | image.sid = pCmd->sid;
|
---|
2853 | vmsvga3dCalcMipmapAndFace(entrySurface.numMipLevels, pCmd->subResource, &image.mipmap, &image.face);
|
---|
2854 |
|
---|
2855 | rc = vmsvgaR3TransferSurfaceLevel(pThisCC, pMob, &image, &pCmd->box, SVGA3D_WRITE_HOST_VRAM);
|
---|
2856 | AssertRC(rc);
|
---|
2857 | }
|
---|
2858 | }
|
---|
2859 |
|
---|
2860 | return rc;
|
---|
2861 | #else
|
---|
2862 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
2863 | return VERR_NOT_SUPPORTED;
|
---|
2864 | #endif
|
---|
2865 | }
|
---|
2866 |
|
---|
2867 |
|
---|
2868 | /* SVGA_3D_CMD_DX_READBACK_SUBRESOURCE 1183 */
|
---|
2869 | static int vmsvga3dCmdDXReadbackSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackSubResource const *pCmd, uint32_t cbCmd)
|
---|
2870 | {
|
---|
2871 | #ifdef VMSVGA3D_DX
|
---|
2872 | //DEBUG_BREAKPOINT_TEST();
|
---|
2873 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2874 | RT_NOREF(cbCmd);
|
---|
2875 |
|
---|
2876 | LogFlowFunc(("sid=%u, subResource=%u\n",
|
---|
2877 | pCmd->sid, pCmd->subResource));
|
---|
2878 |
|
---|
2879 | /* "Request the device to flush the dirty contents into the guest." */
|
---|
2880 | SVGAOTableSurfaceEntry entrySurface;
|
---|
2881 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
2882 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
|
---|
2883 | if (RT_SUCCESS(rc))
|
---|
2884 | {
|
---|
2885 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid);
|
---|
2886 | if (pMob)
|
---|
2887 | {
|
---|
2888 | uint32 const cSubresource = vmsvga3dGetSubresourceCount(pThisCC, pCmd->sid);
|
---|
2889 | ASSERT_GUEST_RETURN(pCmd->subResource < cSubresource, VERR_INVALID_PARAMETER);
|
---|
2890 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
2891 |
|
---|
2892 | /** @todo Mapping functions should use subresource index rather than SVGA3dSurfaceImageId? */
|
---|
2893 | SVGA3dSurfaceImageId image;
|
---|
2894 | image.sid = pCmd->sid;
|
---|
2895 | vmsvga3dCalcMipmapAndFace(entrySurface.numMipLevels, pCmd->subResource, &image.mipmap, &image.face);
|
---|
2896 |
|
---|
2897 | rc = vmsvgaR3TransferSurfaceLevel(pThisCC, pMob, &image, /* all pBox = */ NULL, SVGA3D_READ_HOST_VRAM);
|
---|
2898 | AssertRC(rc);
|
---|
2899 | }
|
---|
2900 | }
|
---|
2901 |
|
---|
2902 | return rc;
|
---|
2903 | #else
|
---|
2904 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
2905 | return VERR_NOT_SUPPORTED;
|
---|
2906 | #endif
|
---|
2907 | }
|
---|
2908 |
|
---|
2909 |
|
---|
2910 | /* SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE 1184 */
|
---|
2911 | static int vmsvga3dCmdDXInvalidateSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXInvalidateSubResource const *pCmd, uint32_t cbCmd)
|
---|
2912 | {
|
---|
2913 | #ifdef VMSVGA3D_DX
|
---|
2914 | DEBUG_BREAKPOINT_TEST();
|
---|
2915 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
2916 | RT_NOREF(cbCmd);
|
---|
2917 |
|
---|
2918 | LogFlowFunc(("sid=%u, subResource=%u\n",
|
---|
2919 | pCmd->sid, pCmd->subResource));
|
---|
2920 |
|
---|
2921 | /* "Notify the device that the contents can be lost." */
|
---|
2922 | SVGAOTableSurfaceEntry entrySurface;
|
---|
2923 | int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
2924 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
|
---|
2925 | if (RT_SUCCESS(rc))
|
---|
2926 | {
|
---|
2927 | uint32_t iFace;
|
---|
2928 | uint32_t iMipmap;
|
---|
2929 | vmsvga3dCalcMipmapAndFace(entrySurface.numMipLevels, pCmd->subResource, &iMipmap, &iFace);
|
---|
2930 | vmsvga3dSurfaceInvalidate(pThisCC, pCmd->sid, iFace, iMipmap);
|
---|
2931 | }
|
---|
2932 |
|
---|
2933 | return rc;
|
---|
2934 | #else
|
---|
2935 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
2936 | return VERR_NOT_SUPPORTED;
|
---|
2937 | #endif
|
---|
2938 | }
|
---|
2939 |
|
---|
2940 |
|
---|
2941 | /* SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW 1185 */
|
---|
2942 | static int vmsvga3dCmdDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd, uint32_t cbCmd)
|
---|
2943 | {
|
---|
2944 | #ifdef VMSVGA3D_DX
|
---|
2945 | //DEBUG_BREAKPOINT_TEST();
|
---|
2946 | RT_NOREF(cbCmd);
|
---|
2947 | return vmsvga3dDXDefineShaderResourceView(pThisCC, idDXContext, pCmd);
|
---|
2948 | #else
|
---|
2949 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2950 | return VERR_NOT_SUPPORTED;
|
---|
2951 | #endif
|
---|
2952 | }
|
---|
2953 |
|
---|
2954 |
|
---|
2955 | /* SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW 1186 */
|
---|
2956 | static int vmsvga3dCmdDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd, uint32_t cbCmd)
|
---|
2957 | {
|
---|
2958 | #ifdef VMSVGA3D_DX
|
---|
2959 | //DEBUG_BREAKPOINT_TEST();
|
---|
2960 | RT_NOREF(cbCmd);
|
---|
2961 | return vmsvga3dDXDestroyShaderResourceView(pThisCC, idDXContext, pCmd);
|
---|
2962 | #else
|
---|
2963 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2964 | return VERR_NOT_SUPPORTED;
|
---|
2965 | #endif
|
---|
2966 | }
|
---|
2967 |
|
---|
2968 |
|
---|
2969 | /* SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW 1187 */
|
---|
2970 | static int vmsvga3dCmdDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd, uint32_t cbCmd)
|
---|
2971 | {
|
---|
2972 | #ifdef VMSVGA3D_DX
|
---|
2973 | //DEBUG_BREAKPOINT_TEST();
|
---|
2974 | RT_NOREF(cbCmd);
|
---|
2975 | return vmsvga3dDXDefineRenderTargetView(pThisCC, idDXContext, pCmd);
|
---|
2976 | #else
|
---|
2977 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2978 | return VERR_NOT_SUPPORTED;
|
---|
2979 | #endif
|
---|
2980 | }
|
---|
2981 |
|
---|
2982 |
|
---|
2983 | /* SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW 1188 */
|
---|
2984 | static int vmsvga3dCmdDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd, uint32_t cbCmd)
|
---|
2985 | {
|
---|
2986 | #ifdef VMSVGA3D_DX
|
---|
2987 | //DEBUG_BREAKPOINT_TEST();
|
---|
2988 | RT_NOREF(cbCmd);
|
---|
2989 | return vmsvga3dDXDestroyRenderTargetView(pThisCC, idDXContext, pCmd);
|
---|
2990 | #else
|
---|
2991 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
2992 | return VERR_NOT_SUPPORTED;
|
---|
2993 | #endif
|
---|
2994 | }
|
---|
2995 |
|
---|
2996 |
|
---|
2997 | /* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW 1189 */
|
---|
2998 | static int vmsvga3dCmdDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView const *pCmd, uint32_t cbCmd)
|
---|
2999 | {
|
---|
3000 | #ifdef VMSVGA3D_DX
|
---|
3001 | //DEBUG_BREAKPOINT_TEST();
|
---|
3002 | RT_NOREF(cbCmd);
|
---|
3003 | SVGA3dCmdDXDefineDepthStencilView_v2 cmd;
|
---|
3004 | cmd.depthStencilViewId = pCmd->depthStencilViewId;
|
---|
3005 | cmd.sid = pCmd->sid;
|
---|
3006 | cmd.format = pCmd->format;
|
---|
3007 | cmd.resourceDimension = pCmd->resourceDimension;
|
---|
3008 | cmd.mipSlice = pCmd->mipSlice;
|
---|
3009 | cmd.firstArraySlice = pCmd->firstArraySlice;
|
---|
3010 | cmd.arraySize = pCmd->arraySize;
|
---|
3011 | cmd.flags = 0;
|
---|
3012 | return vmsvga3dDXDefineDepthStencilView(pThisCC, idDXContext, &cmd);
|
---|
3013 | #else
|
---|
3014 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3015 | return VERR_NOT_SUPPORTED;
|
---|
3016 | #endif
|
---|
3017 | }
|
---|
3018 |
|
---|
3019 |
|
---|
3020 | /* SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW 1190 */
|
---|
3021 | static int vmsvga3dCmdDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd, uint32_t cbCmd)
|
---|
3022 | {
|
---|
3023 | #ifdef VMSVGA3D_DX
|
---|
3024 | //DEBUG_BREAKPOINT_TEST();
|
---|
3025 | RT_NOREF(cbCmd);
|
---|
3026 | return vmsvga3dDXDestroyDepthStencilView(pThisCC, idDXContext, pCmd);
|
---|
3027 | #else
|
---|
3028 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3029 | return VERR_NOT_SUPPORTED;
|
---|
3030 | #endif
|
---|
3031 | }
|
---|
3032 |
|
---|
3033 |
|
---|
3034 | /* SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT 1191 */
|
---|
3035 | static int vmsvga3dCmdDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineElementLayout const *pCmd, uint32_t cbCmd)
|
---|
3036 | {
|
---|
3037 | #ifdef VMSVGA3D_DX
|
---|
3038 | //DEBUG_BREAKPOINT_TEST();
|
---|
3039 | SVGA3dInputElementDesc const *paDesc = (SVGA3dInputElementDesc *)&pCmd[1];
|
---|
3040 | uint32_t const cDesc = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dInputElementDesc);
|
---|
3041 | return vmsvga3dDXDefineElementLayout(pThisCC, idDXContext, pCmd->elementLayoutId, cDesc, paDesc);
|
---|
3042 | #else
|
---|
3043 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3044 | return VERR_NOT_SUPPORTED;
|
---|
3045 | #endif
|
---|
3046 | }
|
---|
3047 |
|
---|
3048 |
|
---|
3049 | /* SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT 1192 */
|
---|
3050 | static int vmsvga3dCmdDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyElementLayout const *pCmd, uint32_t cbCmd)
|
---|
3051 | {
|
---|
3052 | #ifdef VMSVGA3D_DX
|
---|
3053 | //DEBUG_BREAKPOINT_TEST();
|
---|
3054 | RT_NOREF(cbCmd);
|
---|
3055 | return vmsvga3dDXDestroyElementLayout(pThisCC, idDXContext, pCmd);
|
---|
3056 | #else
|
---|
3057 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3058 | return VERR_NOT_SUPPORTED;
|
---|
3059 | #endif
|
---|
3060 | }
|
---|
3061 |
|
---|
3062 |
|
---|
3063 | /* SVGA_3D_CMD_DX_DEFINE_BLEND_STATE 1193 */
|
---|
3064 | static int vmsvga3dCmdDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd, uint32_t cbCmd)
|
---|
3065 | {
|
---|
3066 | #ifdef VMSVGA3D_DX
|
---|
3067 | //DEBUG_BREAKPOINT_TEST();
|
---|
3068 | RT_NOREF(cbCmd);
|
---|
3069 | return vmsvga3dDXDefineBlendState(pThisCC, idDXContext, pCmd);
|
---|
3070 | #else
|
---|
3071 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3072 | return VERR_NOT_SUPPORTED;
|
---|
3073 | #endif
|
---|
3074 | }
|
---|
3075 |
|
---|
3076 |
|
---|
3077 | /* SVGA_3D_CMD_DX_DESTROY_BLEND_STATE 1194 */
|
---|
3078 | static int vmsvga3dCmdDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyBlendState const *pCmd, uint32_t cbCmd)
|
---|
3079 | {
|
---|
3080 | #ifdef VMSVGA3D_DX
|
---|
3081 | //DEBUG_BREAKPOINT_TEST();
|
---|
3082 | RT_NOREF(cbCmd);
|
---|
3083 | return vmsvga3dDXDestroyBlendState(pThisCC, idDXContext, pCmd);
|
---|
3084 | #else
|
---|
3085 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3086 | return VERR_NOT_SUPPORTED;
|
---|
3087 | #endif
|
---|
3088 | }
|
---|
3089 |
|
---|
3090 |
|
---|
3091 | /* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE 1195 */
|
---|
3092 | static int vmsvga3dCmdDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd, uint32_t cbCmd)
|
---|
3093 | {
|
---|
3094 | #ifdef VMSVGA3D_DX
|
---|
3095 | //DEBUG_BREAKPOINT_TEST();
|
---|
3096 | RT_NOREF(cbCmd);
|
---|
3097 | return vmsvga3dDXDefineDepthStencilState(pThisCC, idDXContext, pCmd);
|
---|
3098 | #else
|
---|
3099 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3100 | return VERR_NOT_SUPPORTED;
|
---|
3101 | #endif
|
---|
3102 | }
|
---|
3103 |
|
---|
3104 |
|
---|
3105 | /* SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE 1196 */
|
---|
3106 | static int vmsvga3dCmdDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilState const *pCmd, uint32_t cbCmd)
|
---|
3107 | {
|
---|
3108 | #ifdef VMSVGA3D_DX
|
---|
3109 | //DEBUG_BREAKPOINT_TEST();
|
---|
3110 | RT_NOREF(cbCmd);
|
---|
3111 | return vmsvga3dDXDestroyDepthStencilState(pThisCC, idDXContext, pCmd);
|
---|
3112 | #else
|
---|
3113 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3114 | return VERR_NOT_SUPPORTED;
|
---|
3115 | #endif
|
---|
3116 | }
|
---|
3117 |
|
---|
3118 |
|
---|
3119 | /* SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE 1197 */
|
---|
3120 | static int vmsvga3dCmdDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd, uint32_t cbCmd)
|
---|
3121 | {
|
---|
3122 | #ifdef VMSVGA3D_DX
|
---|
3123 | //DEBUG_BREAKPOINT_TEST();
|
---|
3124 | RT_NOREF(cbCmd);
|
---|
3125 | SVGA3dCmdDXDefineRasterizerState_v2 cmd;
|
---|
3126 | cmd.rasterizerId = pCmd->rasterizerId;
|
---|
3127 | cmd.fillMode = pCmd->fillMode;
|
---|
3128 | cmd.cullMode = pCmd->cullMode;
|
---|
3129 | cmd.frontCounterClockwise = pCmd->frontCounterClockwise;
|
---|
3130 | cmd.provokingVertexLast = pCmd->provokingVertexLast;
|
---|
3131 | cmd.depthBias = pCmd->depthBias;
|
---|
3132 | cmd.depthBiasClamp = pCmd->depthBiasClamp;
|
---|
3133 | cmd.slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
|
---|
3134 | cmd.depthClipEnable = pCmd->depthClipEnable;
|
---|
3135 | cmd.scissorEnable = pCmd->scissorEnable;
|
---|
3136 | cmd.multisampleEnable = pCmd->multisampleEnable;
|
---|
3137 | cmd.antialiasedLineEnable = pCmd->antialiasedLineEnable;
|
---|
3138 | cmd.lineWidth = pCmd->lineWidth;
|
---|
3139 | cmd.lineStippleEnable = pCmd->lineStippleEnable;
|
---|
3140 | cmd.lineStippleFactor = pCmd->lineStippleFactor;
|
---|
3141 | cmd.lineStipplePattern = pCmd->lineStipplePattern;
|
---|
3142 | cmd.forcedSampleCount = 0;
|
---|
3143 | return vmsvga3dDXDefineRasterizerState(pThisCC, idDXContext, &cmd);
|
---|
3144 | #else
|
---|
3145 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3146 | return VERR_NOT_SUPPORTED;
|
---|
3147 | #endif
|
---|
3148 | }
|
---|
3149 |
|
---|
3150 |
|
---|
3151 | /* SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE_V2 1288 */
|
---|
3152 | static int vmsvga3dCmdDXDefineRasterizerState_v2(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState_v2 const *pCmd, uint32_t cbCmd)
|
---|
3153 | {
|
---|
3154 | #ifdef VMSVGA3D_DX
|
---|
3155 | //DEBUG_BREAKPOINT_TEST();
|
---|
3156 | RT_NOREF(cbCmd);
|
---|
3157 | return vmsvga3dDXDefineRasterizerState(pThisCC, idDXContext, pCmd);
|
---|
3158 | #else
|
---|
3159 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3160 | return VERR_NOT_SUPPORTED;
|
---|
3161 | #endif
|
---|
3162 | }
|
---|
3163 |
|
---|
3164 |
|
---|
3165 | /* SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE 1198 */
|
---|
3166 | static int vmsvga3dCmdDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRasterizerState const *pCmd, uint32_t cbCmd)
|
---|
3167 | {
|
---|
3168 | #ifdef VMSVGA3D_DX
|
---|
3169 | //DEBUG_BREAKPOINT_TEST();
|
---|
3170 | RT_NOREF(cbCmd);
|
---|
3171 | return vmsvga3dDXDestroyRasterizerState(pThisCC, idDXContext, pCmd);
|
---|
3172 | #else
|
---|
3173 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3174 | return VERR_NOT_SUPPORTED;
|
---|
3175 | #endif
|
---|
3176 | }
|
---|
3177 |
|
---|
3178 |
|
---|
3179 | /* SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE 1199 */
|
---|
3180 | static int vmsvga3dCmdDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd, uint32_t cbCmd)
|
---|
3181 | {
|
---|
3182 | #ifdef VMSVGA3D_DX
|
---|
3183 | //DEBUG_BREAKPOINT_TEST();
|
---|
3184 | RT_NOREF(cbCmd);
|
---|
3185 | return vmsvga3dDXDefineSamplerState(pThisCC, idDXContext, pCmd);
|
---|
3186 | #else
|
---|
3187 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3188 | return VERR_NOT_SUPPORTED;
|
---|
3189 | #endif
|
---|
3190 | }
|
---|
3191 |
|
---|
3192 |
|
---|
3193 | /* SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE 1200 */
|
---|
3194 | static int vmsvga3dCmdDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroySamplerState const *pCmd, uint32_t cbCmd)
|
---|
3195 | {
|
---|
3196 | #ifdef VMSVGA3D_DX
|
---|
3197 | //DEBUG_BREAKPOINT_TEST();
|
---|
3198 | RT_NOREF(cbCmd);
|
---|
3199 | return vmsvga3dDXDestroySamplerState(pThisCC, idDXContext, pCmd);
|
---|
3200 | #else
|
---|
3201 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3202 | return VERR_NOT_SUPPORTED;
|
---|
3203 | #endif
|
---|
3204 | }
|
---|
3205 |
|
---|
3206 |
|
---|
3207 | /* SVGA_3D_CMD_DX_DEFINE_SHADER 1201 */
|
---|
3208 | static int vmsvga3dCmdDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd, uint32_t cbCmd)
|
---|
3209 | {
|
---|
3210 | #ifdef VMSVGA3D_DX
|
---|
3211 | //DEBUG_BREAKPOINT_TEST();
|
---|
3212 | RT_NOREF(cbCmd);
|
---|
3213 | return vmsvga3dDXDefineShader(pThisCC, idDXContext, pCmd);
|
---|
3214 | #else
|
---|
3215 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3216 | return VERR_NOT_SUPPORTED;
|
---|
3217 | #endif
|
---|
3218 | }
|
---|
3219 |
|
---|
3220 |
|
---|
3221 | /* SVGA_3D_CMD_DX_DESTROY_SHADER 1202 */
|
---|
3222 | static int vmsvga3dCmdDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd, uint32_t cbCmd)
|
---|
3223 | {
|
---|
3224 | #ifdef VMSVGA3D_DX
|
---|
3225 | //DEBUG_BREAKPOINT_TEST();
|
---|
3226 | RT_NOREF(cbCmd);
|
---|
3227 | return vmsvga3dDXDestroyShader(pThisCC, idDXContext, pCmd);
|
---|
3228 | #else
|
---|
3229 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3230 | return VERR_NOT_SUPPORTED;
|
---|
3231 | #endif
|
---|
3232 | }
|
---|
3233 |
|
---|
3234 |
|
---|
3235 | /* SVGA_3D_CMD_DX_BIND_SHADER 1203 */
|
---|
3236 | static int vmsvga3dCmdDXBindShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindShader const *pCmd, uint32_t cbCmd)
|
---|
3237 | {
|
---|
3238 | #ifdef VMSVGA3D_DX
|
---|
3239 | //DEBUG_BREAKPOINT_TEST();
|
---|
3240 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3241 | RT_NOREF(idDXContext, cbCmd);
|
---|
3242 | /* This returns NULL if mob does not exist. If the guest sends a wrong mob id, the current mob will be unbound. */
|
---|
3243 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
|
---|
3244 | return vmsvga3dDXBindShader(pThisCC, pCmd, pMob);
|
---|
3245 | #else
|
---|
3246 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3247 | return VERR_NOT_SUPPORTED;
|
---|
3248 | #endif
|
---|
3249 | }
|
---|
3250 |
|
---|
3251 |
|
---|
3252 | /* SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT 1204 */
|
---|
3253 | static int vmsvga3dCmdDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd, uint32_t cbCmd)
|
---|
3254 | {
|
---|
3255 | #ifdef VMSVGA3D_DX
|
---|
3256 | //DEBUG_BREAKPOINT_TEST();
|
---|
3257 | RT_NOREF(cbCmd);
|
---|
3258 | return vmsvga3dDXDefineStreamOutput(pThisCC, idDXContext, pCmd);
|
---|
3259 | #else
|
---|
3260 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3261 | return VERR_NOT_SUPPORTED;
|
---|
3262 | #endif
|
---|
3263 | }
|
---|
3264 |
|
---|
3265 |
|
---|
3266 | /* SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT 1205 */
|
---|
3267 | static int vmsvga3dCmdDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd, uint32_t cbCmd)
|
---|
3268 | {
|
---|
3269 | #ifdef VMSVGA3D_DX
|
---|
3270 | //DEBUG_BREAKPOINT_TEST();
|
---|
3271 | RT_NOREF(cbCmd);
|
---|
3272 | return vmsvga3dDXDestroyStreamOutput(pThisCC, idDXContext, pCmd);
|
---|
3273 | #else
|
---|
3274 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3275 | return VERR_NOT_SUPPORTED;
|
---|
3276 | #endif
|
---|
3277 | }
|
---|
3278 |
|
---|
3279 |
|
---|
3280 | /* SVGA_3D_CMD_DX_SET_STREAMOUTPUT 1206 */
|
---|
3281 | static int vmsvga3dCmdDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd, uint32_t cbCmd)
|
---|
3282 | {
|
---|
3283 | #ifdef VMSVGA3D_DX
|
---|
3284 | //DEBUG_BREAKPOINT_TEST();
|
---|
3285 | RT_NOREF(cbCmd);
|
---|
3286 | return vmsvga3dDXSetStreamOutput(pThisCC, idDXContext, pCmd);
|
---|
3287 | #else
|
---|
3288 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3289 | return VERR_NOT_SUPPORTED;
|
---|
3290 | #endif
|
---|
3291 | }
|
---|
3292 |
|
---|
3293 |
|
---|
3294 | /* SVGA_3D_CMD_DX_SET_COTABLE 1207 */
|
---|
3295 | static int vmsvga3dCmdDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, uint32_t cbCmd)
|
---|
3296 | {
|
---|
3297 | #ifdef VMSVGA3D_DX
|
---|
3298 | //DEBUG_BREAKPOINT_TEST();
|
---|
3299 | RT_NOREF(cbCmd);
|
---|
3300 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3301 | /* This returns NULL if mob does not exist. If the guest sends a wrong mob id, the current mob will be unbound. */
|
---|
3302 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
|
---|
3303 | return vmsvga3dDXSetCOTable(pThisCC, pCmd, pMob);
|
---|
3304 | #else
|
---|
3305 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
3306 | return VERR_NOT_SUPPORTED;
|
---|
3307 | #endif
|
---|
3308 | }
|
---|
3309 |
|
---|
3310 |
|
---|
3311 | /* SVGA_3D_CMD_DX_READBACK_COTABLE 1208 */
|
---|
3312 | static int vmsvga3dCmdDXReadbackCOTable(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackCOTable const *pCmd, uint32_t cbCmd)
|
---|
3313 | {
|
---|
3314 | #ifdef VMSVGA3D_DX
|
---|
3315 | //DEBUG_BREAKPOINT_TEST();
|
---|
3316 | RT_NOREF(idDXContext, cbCmd);
|
---|
3317 | return vmsvga3dDXReadbackCOTable(pThisCC, pCmd);
|
---|
3318 | #else
|
---|
3319 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3320 | return VERR_NOT_SUPPORTED;
|
---|
3321 | #endif
|
---|
3322 | }
|
---|
3323 |
|
---|
3324 |
|
---|
3325 | /* SVGA_3D_CMD_DX_BUFFER_COPY 1209 */
|
---|
3326 | static int vmsvga3dCmdDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBufferCopy const *pCmd, uint32_t cbCmd)
|
---|
3327 | {
|
---|
3328 | #ifdef VMSVGA3D_DX
|
---|
3329 | //DEBUG_BREAKPOINT_TEST();
|
---|
3330 | RT_NOREF(idDXContext, cbCmd);
|
---|
3331 |
|
---|
3332 | int rc;
|
---|
3333 |
|
---|
3334 | /** @todo Backend should o the copy is both buffers have a hardware resource. */
|
---|
3335 | SVGA3dSurfaceImageId imageBufferSrc;
|
---|
3336 | imageBufferSrc.sid = pCmd->src;
|
---|
3337 | imageBufferSrc.face = 0;
|
---|
3338 | imageBufferSrc.mipmap = 0;
|
---|
3339 |
|
---|
3340 | SVGA3dSurfaceImageId imageBufferDest;
|
---|
3341 | imageBufferDest.sid = pCmd->dest;
|
---|
3342 | imageBufferDest.face = 0;
|
---|
3343 | imageBufferDest.mipmap = 0;
|
---|
3344 |
|
---|
3345 | /*
|
---|
3346 | * Map the source buffer.
|
---|
3347 | */
|
---|
3348 | VMSVGA3D_MAPPED_SURFACE mapBufferSrc;
|
---|
3349 | rc = vmsvga3dSurfaceMap(pThisCC, &imageBufferSrc, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapBufferSrc);
|
---|
3350 | if (RT_SUCCESS(rc))
|
---|
3351 | {
|
---|
3352 | /*
|
---|
3353 | * Map the destination buffer.
|
---|
3354 | */
|
---|
3355 | VMSVGA3D_MAPPED_SURFACE mapBufferDest;
|
---|
3356 | rc = vmsvga3dSurfaceMap(pThisCC, &imageBufferDest, NULL, VMSVGA3D_SURFACE_MAP_WRITE, &mapBufferDest);
|
---|
3357 | if (RT_SUCCESS(rc))
|
---|
3358 | {
|
---|
3359 | /*
|
---|
3360 | * Copy the source buffer to the destination.
|
---|
3361 | */
|
---|
3362 | uint8_t const *pu8BufferSrc = (uint8_t *)mapBufferSrc.pvData;
|
---|
3363 | uint32_t const cbBufferSrc = mapBufferSrc.cbRow;
|
---|
3364 |
|
---|
3365 | uint8_t *pu8BufferDest = (uint8_t *)mapBufferDest.pvData;
|
---|
3366 | uint32_t const cbBufferDest = mapBufferDest.cbRow;
|
---|
3367 |
|
---|
3368 | if ( pCmd->srcX < cbBufferSrc
|
---|
3369 | && pCmd->width <= cbBufferSrc- pCmd->srcX
|
---|
3370 | && pCmd->destX < cbBufferDest
|
---|
3371 | && pCmd->width <= cbBufferDest - pCmd->destX)
|
---|
3372 | {
|
---|
3373 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
3374 |
|
---|
3375 | memcpy(&pu8BufferDest[pCmd->destX], &pu8BufferSrc[pCmd->srcX], pCmd->width);
|
---|
3376 | }
|
---|
3377 | else
|
---|
3378 | ASSERT_GUEST_FAILED_STMT(rc = VERR_INVALID_PARAMETER);
|
---|
3379 |
|
---|
3380 | vmsvga3dSurfaceUnmap(pThisCC, &imageBufferDest, &mapBufferDest, true);
|
---|
3381 | }
|
---|
3382 |
|
---|
3383 | vmsvga3dSurfaceUnmap(pThisCC, &imageBufferSrc, &mapBufferSrc, false);
|
---|
3384 | }
|
---|
3385 |
|
---|
3386 | return rc;
|
---|
3387 | #else
|
---|
3388 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3389 | return VERR_NOT_SUPPORTED;
|
---|
3390 | #endif
|
---|
3391 | }
|
---|
3392 |
|
---|
3393 |
|
---|
3394 | /* SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER 1210 */
|
---|
3395 | static int vmsvga3dCmdDXTransferFromBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXTransferFromBuffer const *pCmd, uint32_t cbCmd)
|
---|
3396 | {
|
---|
3397 | #ifdef VMSVGA3D_DX
|
---|
3398 | //DEBUG_BREAKPOINT_TEST();
|
---|
3399 | RT_NOREF(cbCmd);
|
---|
3400 |
|
---|
3401 | /* Plan:
|
---|
3402 | * - map the buffer;
|
---|
3403 | * - map the surface;
|
---|
3404 | * - copy from buffer map to the surface map.
|
---|
3405 | */
|
---|
3406 |
|
---|
3407 | int rc;
|
---|
3408 |
|
---|
3409 | SVGA3dSurfaceImageId imageBuffer;
|
---|
3410 | imageBuffer.sid = pCmd->srcSid;
|
---|
3411 | imageBuffer.face = 0;
|
---|
3412 | imageBuffer.mipmap = 0;
|
---|
3413 |
|
---|
3414 | SVGA3dSurfaceImageId imageSurface;
|
---|
3415 | imageSurface.sid = pCmd->destSid;
|
---|
3416 | rc = vmsvga3dCalcSurfaceMipmapAndFace(pThisCC, pCmd->destSid, pCmd->destSubResource, &imageSurface.mipmap, &imageSurface.face);
|
---|
3417 | AssertRCReturn(rc, rc);
|
---|
3418 |
|
---|
3419 | /*
|
---|
3420 | * Map the buffer.
|
---|
3421 | */
|
---|
3422 | VMSVGA3D_MAPPED_SURFACE mapBuffer;
|
---|
3423 | rc = vmsvga3dSurfaceMap(pThisCC, &imageBuffer, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapBuffer);
|
---|
3424 | if (RT_SUCCESS(rc))
|
---|
3425 | {
|
---|
3426 | /*
|
---|
3427 | * Map the surface.
|
---|
3428 | */
|
---|
3429 | VMSVGA3D_MAPPED_SURFACE mapSurface;
|
---|
3430 | rc = vmsvga3dSurfaceMap(pThisCC, &imageSurface, &pCmd->destBox, VMSVGA3D_SURFACE_MAP_WRITE, &mapSurface);
|
---|
3431 | if (RT_SUCCESS(rc))
|
---|
3432 | {
|
---|
3433 | /*
|
---|
3434 | * Copy the mapped buffer to the surface. "Raw byte wise transfer"
|
---|
3435 | */
|
---|
3436 | uint8_t const *pu8Buffer = (uint8_t *)mapBuffer.pvData;
|
---|
3437 | uint32_t const cbBuffer = mapBuffer.cbRow;
|
---|
3438 |
|
---|
3439 | if (pCmd->srcOffset <= cbBuffer)
|
---|
3440 | {
|
---|
3441 | RT_UNTRUSTED_VALIDATED_FENCE();
|
---|
3442 | uint8_t const *pu8BufferBegin = pu8Buffer;
|
---|
3443 | uint8_t const *pu8BufferEnd = pu8Buffer + cbBuffer;
|
---|
3444 |
|
---|
3445 | pu8Buffer += pCmd->srcOffset;
|
---|
3446 |
|
---|
3447 | uint8_t *pu8Surface = (uint8_t *)mapSurface.pvData;
|
---|
3448 |
|
---|
3449 | uint32_t const cbRowCopy = RT_MIN(pCmd->srcPitch, mapSurface.cbRow);
|
---|
3450 | for (uint32_t z = 0; z < mapSurface.box.d && RT_SUCCESS(rc); ++z)
|
---|
3451 | {
|
---|
3452 | uint8_t const *pu8BufferRow = pu8Buffer;
|
---|
3453 | uint8_t *pu8SurfaceRow = pu8Surface;
|
---|
3454 | for (uint32_t iRow = 0; iRow < mapSurface.cRows; ++iRow)
|
---|
3455 | {
|
---|
3456 | ASSERT_GUEST_STMT_BREAK( (uintptr_t)pu8BufferRow >= (uintptr_t)pu8BufferBegin
|
---|
3457 | && (uintptr_t)pu8BufferRow < (uintptr_t)pu8BufferEnd
|
---|
3458 | && (uintptr_t)pu8BufferRow < (uintptr_t)(pu8BufferRow + cbRowCopy)
|
---|
3459 | && (uintptr_t)(pu8BufferRow + cbRowCopy) > (uintptr_t)pu8BufferBegin
|
---|
3460 | && (uintptr_t)(pu8BufferRow + cbRowCopy) <= (uintptr_t)pu8BufferEnd,
|
---|
3461 | rc = VERR_INVALID_PARAMETER);
|
---|
3462 |
|
---|
3463 | memcpy(pu8SurfaceRow, pu8BufferRow, cbRowCopy);
|
---|
3464 |
|
---|
3465 | pu8SurfaceRow += mapSurface.cbRowPitch;
|
---|
3466 | pu8BufferRow += pCmd->srcPitch;
|
---|
3467 | }
|
---|
3468 |
|
---|
3469 | pu8Buffer += pCmd->srcSlicePitch;
|
---|
3470 | pu8Surface += mapSurface.cbDepthPitch;
|
---|
3471 | }
|
---|
3472 | }
|
---|
3473 | else
|
---|
3474 | ASSERT_GUEST_FAILED_STMT(rc = VERR_INVALID_PARAMETER);
|
---|
3475 |
|
---|
3476 | vmsvga3dSurfaceUnmap(pThisCC, &imageSurface, &mapSurface, true);
|
---|
3477 | }
|
---|
3478 |
|
---|
3479 | vmsvga3dSurfaceUnmap(pThisCC, &imageBuffer, &mapBuffer, false);
|
---|
3480 | }
|
---|
3481 |
|
---|
3482 | return rc;
|
---|
3483 | #else
|
---|
3484 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
3485 | return VERR_NOT_SUPPORTED;
|
---|
3486 | #endif
|
---|
3487 | }
|
---|
3488 |
|
---|
3489 |
|
---|
3490 | /* SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK 1211 */
|
---|
3491 | static int vmsvga3dCmdDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSurfaceCopyAndReadback const *pCmd, uint32_t cbCmd)
|
---|
3492 | {
|
---|
3493 | #ifdef VMSVGA3D_DX
|
---|
3494 | DEBUG_BREAKPOINT_TEST();
|
---|
3495 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3496 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3497 | return vmsvga3dDXSurfaceCopyAndReadback(pThisCC, idDXContext);
|
---|
3498 | #else
|
---|
3499 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3500 | return VERR_NOT_SUPPORTED;
|
---|
3501 | #endif
|
---|
3502 | }
|
---|
3503 |
|
---|
3504 |
|
---|
3505 | /* SVGA_3D_CMD_DX_MOVE_QUERY 1212 */
|
---|
3506 | static int vmsvga3dCmdDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXMoveQuery const *pCmd, uint32_t cbCmd)
|
---|
3507 | {
|
---|
3508 | #ifdef VMSVGA3D_DX
|
---|
3509 | DEBUG_BREAKPOINT_TEST();
|
---|
3510 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3511 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3512 | return vmsvga3dDXMoveQuery(pThisCC, idDXContext);
|
---|
3513 | #else
|
---|
3514 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3515 | return VERR_NOT_SUPPORTED;
|
---|
3516 | #endif
|
---|
3517 | }
|
---|
3518 |
|
---|
3519 |
|
---|
3520 | /* SVGA_3D_CMD_DX_BIND_ALL_QUERY 1213 */
|
---|
3521 | static int vmsvga3dCmdDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllQuery const *pCmd, uint32_t cbCmd)
|
---|
3522 | {
|
---|
3523 | #ifdef VMSVGA3D_DX
|
---|
3524 | //DEBUG_BREAKPOINT_TEST();
|
---|
3525 | RT_NOREF(cbCmd);
|
---|
3526 | return vmsvga3dDXBindAllQuery(pThisCC, idDXContext, pCmd);
|
---|
3527 | #else
|
---|
3528 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3529 | return VERR_NOT_SUPPORTED;
|
---|
3530 | #endif
|
---|
3531 | }
|
---|
3532 |
|
---|
3533 |
|
---|
3534 | /* SVGA_3D_CMD_DX_READBACK_ALL_QUERY 1214 */
|
---|
3535 | static int vmsvga3dCmdDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackAllQuery const *pCmd, uint32_t cbCmd)
|
---|
3536 | {
|
---|
3537 | #ifdef VMSVGA3D_DX
|
---|
3538 | //DEBUG_BREAKPOINT_TEST();
|
---|
3539 | RT_NOREF(cbCmd);
|
---|
3540 | return vmsvga3dDXReadbackAllQuery(pThisCC, idDXContext, pCmd);
|
---|
3541 | #else
|
---|
3542 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3543 | return VERR_NOT_SUPPORTED;
|
---|
3544 | #endif
|
---|
3545 | }
|
---|
3546 |
|
---|
3547 |
|
---|
3548 | /* SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER 1215 */
|
---|
3549 | static int vmsvga3dCmdDXPredTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredTransferFromBuffer const *pCmd, uint32_t cbCmd)
|
---|
3550 | {
|
---|
3551 | #ifdef VMSVGA3D_DX
|
---|
3552 | //DEBUG_BREAKPOINT_TEST();
|
---|
3553 | RT_NOREF(idDXContext, cbCmd);
|
---|
3554 |
|
---|
3555 | /* This command is executed in a context: "The context is implied from the command buffer header."
|
---|
3556 | * However the device design allows to do the transfer without a context, so re-use context-less command handler.
|
---|
3557 | */
|
---|
3558 | SVGA3dCmdDXTransferFromBuffer cmd;
|
---|
3559 | cmd.srcSid = pCmd->srcSid;
|
---|
3560 | cmd.srcOffset = pCmd->srcOffset;
|
---|
3561 | cmd.srcPitch = pCmd->srcPitch;
|
---|
3562 | cmd.srcSlicePitch = pCmd->srcSlicePitch;
|
---|
3563 | cmd.destSid = pCmd->destSid;
|
---|
3564 | cmd.destSubResource = pCmd->destSubResource;
|
---|
3565 | cmd.destBox = pCmd->destBox;
|
---|
3566 | return vmsvga3dCmdDXTransferFromBuffer(pThisCC, &cmd, sizeof(cmd));
|
---|
3567 | #else
|
---|
3568 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3569 | return VERR_NOT_SUPPORTED;
|
---|
3570 | #endif
|
---|
3571 | }
|
---|
3572 |
|
---|
3573 |
|
---|
3574 | /* SVGA_3D_CMD_DX_MOB_FENCE_64 1216 */
|
---|
3575 | static int vmsvga3dCmdDXMobFence64(PVGASTATECC pThisCC, SVGA3dCmdDXMobFence64 const *pCmd, uint32_t cbCmd)
|
---|
3576 | {
|
---|
3577 | #ifdef VMSVGA3D_DX
|
---|
3578 | //DEBUG_BREAKPOINT_TEST();
|
---|
3579 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3580 | RT_NOREF(cbCmd);
|
---|
3581 |
|
---|
3582 | PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobId);
|
---|
3583 | ASSERT_GUEST_RETURN(pMob, VERR_INVALID_PARAMETER);
|
---|
3584 |
|
---|
3585 | int rc = vmsvgaR3MobWrite(pSvgaR3State, pMob, pCmd->mobOffset, &pCmd->value, sizeof(pCmd->value));
|
---|
3586 | ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
|
---|
3587 |
|
---|
3588 | return VINF_SUCCESS;
|
---|
3589 | #else
|
---|
3590 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
3591 | return VERR_NOT_SUPPORTED;
|
---|
3592 | #endif
|
---|
3593 | }
|
---|
3594 |
|
---|
3595 |
|
---|
3596 | /* SVGA_3D_CMD_DX_BIND_ALL_SHADER 1217 */
|
---|
3597 | static int vmsvga3dCmdDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllShader const *pCmd, uint32_t cbCmd)
|
---|
3598 | {
|
---|
3599 | #ifdef VMSVGA3D_DX
|
---|
3600 | DEBUG_BREAKPOINT_TEST();
|
---|
3601 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3602 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3603 | return vmsvga3dDXBindAllShader(pThisCC, idDXContext);
|
---|
3604 | #else
|
---|
3605 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3606 | return VERR_NOT_SUPPORTED;
|
---|
3607 | #endif
|
---|
3608 | }
|
---|
3609 |
|
---|
3610 |
|
---|
3611 | /* SVGA_3D_CMD_DX_HINT 1218 */
|
---|
3612 | static int vmsvga3dCmdDXHint(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXHint const *pCmd, uint32_t cbCmd)
|
---|
3613 | {
|
---|
3614 | #ifdef VMSVGA3D_DX
|
---|
3615 | DEBUG_BREAKPOINT_TEST();
|
---|
3616 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3617 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3618 | return vmsvga3dDXHint(pThisCC, idDXContext);
|
---|
3619 | #else
|
---|
3620 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3621 | return VERR_NOT_SUPPORTED;
|
---|
3622 | #endif
|
---|
3623 | }
|
---|
3624 |
|
---|
3625 |
|
---|
3626 | /* SVGA_3D_CMD_DX_BUFFER_UPDATE 1219 */
|
---|
3627 | static int vmsvga3dCmdDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBufferUpdate const *pCmd, uint32_t cbCmd)
|
---|
3628 | {
|
---|
3629 | #ifdef VMSVGA3D_DX
|
---|
3630 | DEBUG_BREAKPOINT_TEST();
|
---|
3631 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3632 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3633 | return vmsvga3dDXBufferUpdate(pThisCC, idDXContext);
|
---|
3634 | #else
|
---|
3635 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3636 | return VERR_NOT_SUPPORTED;
|
---|
3637 | #endif
|
---|
3638 | }
|
---|
3639 |
|
---|
3640 |
|
---|
3641 | /* SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET 1220 */
|
---|
3642 | static int vmsvga3dCmdDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetVSConstantBufferOffset const *pCmd, uint32_t cbCmd)
|
---|
3643 | {
|
---|
3644 | #ifdef VMSVGA3D_DX
|
---|
3645 | //DEBUG_BREAKPOINT_TEST();
|
---|
3646 | RT_NOREF(cbCmd);
|
---|
3647 | return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_VS);
|
---|
3648 | #else
|
---|
3649 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3650 | return VERR_NOT_SUPPORTED;
|
---|
3651 | #endif
|
---|
3652 | }
|
---|
3653 |
|
---|
3654 |
|
---|
3655 | /* SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET 1221 */
|
---|
3656 | static int vmsvga3dCmdDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetPSConstantBufferOffset const *pCmd, uint32_t cbCmd)
|
---|
3657 | {
|
---|
3658 | #ifdef VMSVGA3D_DX
|
---|
3659 | //DEBUG_BREAKPOINT_TEST();
|
---|
3660 | RT_NOREF(cbCmd);
|
---|
3661 | return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_PS);
|
---|
3662 | #else
|
---|
3663 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3664 | return VERR_NOT_SUPPORTED;
|
---|
3665 | #endif
|
---|
3666 | }
|
---|
3667 |
|
---|
3668 |
|
---|
3669 | /* SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET 1222 */
|
---|
3670 | static int vmsvga3dCmdDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetGSConstantBufferOffset const *pCmd, uint32_t cbCmd)
|
---|
3671 | {
|
---|
3672 | #ifdef VMSVGA3D_DX
|
---|
3673 | //DEBUG_BREAKPOINT_TEST();
|
---|
3674 | RT_NOREF(cbCmd);
|
---|
3675 | return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_GS);
|
---|
3676 | #else
|
---|
3677 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3678 | return VERR_NOT_SUPPORTED;
|
---|
3679 | #endif
|
---|
3680 | }
|
---|
3681 |
|
---|
3682 |
|
---|
3683 | /* SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET 1223 */
|
---|
3684 | static int vmsvga3dCmdDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetHSConstantBufferOffset const *pCmd, uint32_t cbCmd)
|
---|
3685 | {
|
---|
3686 | #ifdef VMSVGA3D_DX
|
---|
3687 | //DEBUG_BREAKPOINT_TEST();
|
---|
3688 | RT_NOREF(cbCmd);
|
---|
3689 | return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_HS);
|
---|
3690 | #else
|
---|
3691 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3692 | return VERR_NOT_SUPPORTED;
|
---|
3693 | #endif
|
---|
3694 | }
|
---|
3695 |
|
---|
3696 |
|
---|
3697 | /* SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET 1224 */
|
---|
3698 | static int vmsvga3dCmdDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDSConstantBufferOffset const *pCmd, uint32_t cbCmd)
|
---|
3699 | {
|
---|
3700 | #ifdef VMSVGA3D_DX
|
---|
3701 | //DEBUG_BREAKPOINT_TEST();
|
---|
3702 | RT_NOREF(cbCmd);
|
---|
3703 | return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_DS);
|
---|
3704 | #else
|
---|
3705 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3706 | return VERR_NOT_SUPPORTED;
|
---|
3707 | #endif
|
---|
3708 | }
|
---|
3709 |
|
---|
3710 |
|
---|
3711 | /* SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET 1225 */
|
---|
3712 | static int vmsvga3dCmdDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetCSConstantBufferOffset const *pCmd, uint32_t cbCmd)
|
---|
3713 | {
|
---|
3714 | #ifdef VMSVGA3D_DX
|
---|
3715 | //DEBUG_BREAKPOINT_TEST();
|
---|
3716 | RT_NOREF(cbCmd);
|
---|
3717 | return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_CS);
|
---|
3718 | #else
|
---|
3719 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3720 | return VERR_NOT_SUPPORTED;
|
---|
3721 | #endif
|
---|
3722 | }
|
---|
3723 |
|
---|
3724 |
|
---|
3725 | /* SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER 1226 */
|
---|
3726 | static int vmsvga3dCmdDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXCondBindAllShader const *pCmd, uint32_t cbCmd)
|
---|
3727 | {
|
---|
3728 | #ifdef VMSVGA3D_DX
|
---|
3729 | DEBUG_BREAKPOINT_TEST();
|
---|
3730 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3731 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3732 | return vmsvga3dDXCondBindAllShader(pThisCC, idDXContext);
|
---|
3733 | #else
|
---|
3734 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3735 | return VERR_NOT_SUPPORTED;
|
---|
3736 | #endif
|
---|
3737 | }
|
---|
3738 |
|
---|
3739 |
|
---|
3740 | /* SVGA_3D_CMD_SCREEN_COPY 1227 */
|
---|
3741 | static int vmsvga3dCmdScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdScreenCopy const *pCmd, uint32_t cbCmd)
|
---|
3742 | {
|
---|
3743 | #ifdef VMSVGA3D_DX
|
---|
3744 | DEBUG_BREAKPOINT_TEST();
|
---|
3745 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3746 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3747 | return vmsvga3dScreenCopy(pThisCC, idDXContext);
|
---|
3748 | #else
|
---|
3749 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3750 | return VERR_NOT_SUPPORTED;
|
---|
3751 | #endif
|
---|
3752 | }
|
---|
3753 |
|
---|
3754 |
|
---|
3755 | /* SVGA_3D_CMD_GROW_OTABLE 1236 */
|
---|
3756 | static int vmsvga3dCmdGrowOTable(PVGASTATECC pThisCC, SVGA3dCmdGrowOTable const *pCmd, uint32_t cbCmd)
|
---|
3757 | {
|
---|
3758 | #ifdef VMSVGA3D_DX
|
---|
3759 | //DEBUG_BREAKPOINT_TEST();
|
---|
3760 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3761 | RT_NOREF(cbCmd);
|
---|
3762 | return vmsvgaR3OTableSetOrGrow(pSvgaR3State, pCmd->type, pCmd->baseAddress,
|
---|
3763 | pCmd->sizeInBytes, pCmd->validSizeInBytes, pCmd->ptDepth, /*fGrow*/ true);
|
---|
3764 | #else
|
---|
3765 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
3766 | return VERR_NOT_SUPPORTED;
|
---|
3767 | #endif
|
---|
3768 | }
|
---|
3769 |
|
---|
3770 |
|
---|
3771 | /* SVGA_3D_CMD_DX_GROW_COTABLE 1237 */
|
---|
3772 | static int vmsvga3dCmdDXGrowCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXGrowCOTable const *pCmd, uint32_t cbCmd)
|
---|
3773 | {
|
---|
3774 | #ifdef VMSVGA3D_DX
|
---|
3775 | //DEBUG_BREAKPOINT_TEST();
|
---|
3776 | RT_NOREF(cbCmd);
|
---|
3777 | return vmsvga3dDXGrowCOTable(pThisCC, pCmd);
|
---|
3778 | #else
|
---|
3779 | RT_NOREF(pThisCC, pCmd, cbCmd);
|
---|
3780 | return VERR_NOT_SUPPORTED;
|
---|
3781 | #endif
|
---|
3782 | }
|
---|
3783 |
|
---|
3784 |
|
---|
3785 | /* SVGA_3D_CMD_INTRA_SURFACE_COPY 1238 */
|
---|
3786 | static int vmsvga3dCmdIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdIntraSurfaceCopy const *pCmd, uint32_t cbCmd)
|
---|
3787 | {
|
---|
3788 | #ifdef VMSVGA3D_DX
|
---|
3789 | //DEBUG_BREAKPOINT_TEST();
|
---|
3790 | RT_NOREF(cbCmd);
|
---|
3791 | return vmsvga3dIntraSurfaceCopy(pThisCC, idDXContext, pCmd);
|
---|
3792 | #else
|
---|
3793 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3794 | return VERR_NOT_SUPPORTED;
|
---|
3795 | #endif
|
---|
3796 | }
|
---|
3797 |
|
---|
3798 |
|
---|
3799 | /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 1239 */
|
---|
3800 | static int vmsvga3dCmdDefineGBSurface_v3(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v3 const *pCmd)
|
---|
3801 | {
|
---|
3802 | #ifdef VMSVGA3D_DX
|
---|
3803 | //DEBUG_BREAKPOINT_TEST();
|
---|
3804 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3805 |
|
---|
3806 | /* Update the entry in the pSvgaR3State->pGboOTableSurface. */
|
---|
3807 | SVGAOTableSurfaceEntry entry;
|
---|
3808 | RT_ZERO(entry);
|
---|
3809 | entry.format = pCmd->format;
|
---|
3810 | entry.surface1Flags = (uint32_t)(pCmd->surfaceFlags);
|
---|
3811 | entry.numMipLevels = pCmd->numMipLevels;
|
---|
3812 | entry.multisampleCount = pCmd->multisampleCount;
|
---|
3813 | entry.autogenFilter = pCmd->autogenFilter;
|
---|
3814 | entry.size = pCmd->size;
|
---|
3815 | entry.mobid = SVGA_ID_INVALID;
|
---|
3816 | entry.arraySize = pCmd->arraySize;
|
---|
3817 | // entry.mobPitch = 0;
|
---|
3818 | entry.surface2Flags = (uint32_t)(pCmd->surfaceFlags >> UINT64_C(32));
|
---|
3819 | entry.multisamplePattern = pCmd->multisamplePattern;
|
---|
3820 | entry.qualityLevel = pCmd->qualityLevel;
|
---|
3821 | // entry.bufferByteStride = 0;
|
---|
3822 | // entry.minLOD = 0;
|
---|
3823 |
|
---|
3824 | int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
3825 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
3826 | if (RT_SUCCESS(rc))
|
---|
3827 | {
|
---|
3828 | /* Create the host surface. */
|
---|
3829 | vmsvga3dSurfaceDefine(pThisCC, pCmd->sid, pCmd->surfaceFlags, pCmd->format,
|
---|
3830 | pCmd->multisampleCount, pCmd->multisamplePattern, pCmd->qualityLevel, pCmd->autogenFilter,
|
---|
3831 | pCmd->numMipLevels, &pCmd->size, pCmd->arraySize, /* bufferByteStride = */ 0, /* fAllocMipLevels = */ false);
|
---|
3832 | }
|
---|
3833 | return rc;
|
---|
3834 | #else
|
---|
3835 | RT_NOREF(pThisCC, pCmd);
|
---|
3836 | return VERR_NOT_SUPPORTED;
|
---|
3837 | #endif
|
---|
3838 | }
|
---|
3839 |
|
---|
3840 |
|
---|
3841 | /* SVGA_3D_CMD_DX_RESOLVE_COPY 1240 */
|
---|
3842 | static int vmsvga3dCmdDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXResolveCopy const *pCmd, uint32_t cbCmd)
|
---|
3843 | {
|
---|
3844 | #ifdef VMSVGA3D_DX
|
---|
3845 | //DEBUG_BREAKPOINT_TEST();
|
---|
3846 | RT_NOREF(cbCmd);
|
---|
3847 | return vmsvga3dDXResolveCopy(pThisCC, idDXContext, pCmd);
|
---|
3848 | #else
|
---|
3849 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3850 | return VERR_NOT_SUPPORTED;
|
---|
3851 | #endif
|
---|
3852 | }
|
---|
3853 |
|
---|
3854 |
|
---|
3855 | /* SVGA_3D_CMD_DX_PRED_RESOLVE_COPY 1241 */
|
---|
3856 | static int vmsvga3dCmdDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredResolveCopy const *pCmd, uint32_t cbCmd)
|
---|
3857 | {
|
---|
3858 | #ifdef VMSVGA3D_DX
|
---|
3859 | DEBUG_BREAKPOINT_TEST();
|
---|
3860 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3861 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3862 | return vmsvga3dDXPredResolveCopy(pThisCC, idDXContext);
|
---|
3863 | #else
|
---|
3864 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3865 | return VERR_NOT_SUPPORTED;
|
---|
3866 | #endif
|
---|
3867 | }
|
---|
3868 |
|
---|
3869 |
|
---|
3870 | /* SVGA_3D_CMD_DX_PRED_CONVERT_REGION 1242 */
|
---|
3871 | static int vmsvga3dCmdDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredConvertRegion const *pCmd, uint32_t cbCmd)
|
---|
3872 | {
|
---|
3873 | #ifdef VMSVGA3D_DX
|
---|
3874 | DEBUG_BREAKPOINT_TEST();
|
---|
3875 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3876 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3877 | return vmsvga3dDXPredConvertRegion(pThisCC, idDXContext);
|
---|
3878 | #else
|
---|
3879 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3880 | return VERR_NOT_SUPPORTED;
|
---|
3881 | #endif
|
---|
3882 | }
|
---|
3883 |
|
---|
3884 |
|
---|
3885 | /* SVGA_3D_CMD_DX_PRED_CONVERT 1243 */
|
---|
3886 | static int vmsvga3dCmdDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredConvert const *pCmd, uint32_t cbCmd)
|
---|
3887 | {
|
---|
3888 | #ifdef VMSVGA3D_DX
|
---|
3889 | DEBUG_BREAKPOINT_TEST();
|
---|
3890 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3891 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3892 | return vmsvga3dDXPredConvert(pThisCC, idDXContext);
|
---|
3893 | #else
|
---|
3894 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3895 | return VERR_NOT_SUPPORTED;
|
---|
3896 | #endif
|
---|
3897 | }
|
---|
3898 |
|
---|
3899 |
|
---|
3900 | /* SVGA_3D_CMD_WHOLE_SURFACE_COPY 1244 */
|
---|
3901 | static int vmsvga3dCmdWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdWholeSurfaceCopy const *pCmd, uint32_t cbCmd)
|
---|
3902 | {
|
---|
3903 | #ifdef VMSVGA3D_DX
|
---|
3904 | DEBUG_BREAKPOINT_TEST();
|
---|
3905 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
3906 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
3907 | return vmsvga3dWholeSurfaceCopy(pThisCC, idDXContext);
|
---|
3908 | #else
|
---|
3909 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3910 | return VERR_NOT_SUPPORTED;
|
---|
3911 | #endif
|
---|
3912 | }
|
---|
3913 |
|
---|
3914 |
|
---|
3915 | /* SVGA_3D_CMD_DX_DEFINE_UA_VIEW 1245 */
|
---|
3916 | static int vmsvga3dCmdDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineUAView const *pCmd, uint32_t cbCmd)
|
---|
3917 | {
|
---|
3918 | #ifdef VMSVGA3D_DX
|
---|
3919 | //DEBUG_BREAKPOINT_TEST();
|
---|
3920 | RT_NOREF(cbCmd);
|
---|
3921 | return vmsvga3dDXDefineUAView(pThisCC, idDXContext, pCmd);
|
---|
3922 | #else
|
---|
3923 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3924 | return VERR_NOT_SUPPORTED;
|
---|
3925 | #endif
|
---|
3926 | }
|
---|
3927 |
|
---|
3928 |
|
---|
3929 | /* SVGA_3D_CMD_DX_DESTROY_UA_VIEW 1246 */
|
---|
3930 | static int vmsvga3dCmdDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyUAView const *pCmd, uint32_t cbCmd)
|
---|
3931 | {
|
---|
3932 | #ifdef VMSVGA3D_DX
|
---|
3933 | //DEBUG_BREAKPOINT_TEST();
|
---|
3934 | RT_NOREF(cbCmd);
|
---|
3935 | return vmsvga3dDXDestroyUAView(pThisCC, idDXContext, pCmd);
|
---|
3936 | #else
|
---|
3937 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3938 | return VERR_NOT_SUPPORTED;
|
---|
3939 | #endif
|
---|
3940 | }
|
---|
3941 |
|
---|
3942 |
|
---|
3943 | /* SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT 1247 */
|
---|
3944 | static int vmsvga3dCmdDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewUint const *pCmd, uint32_t cbCmd)
|
---|
3945 | {
|
---|
3946 | #ifdef VMSVGA3D_DX
|
---|
3947 | DEBUG_BREAKPOINT_TEST();
|
---|
3948 | RT_NOREF(cbCmd);
|
---|
3949 | return vmsvga3dDXClearUAViewUint(pThisCC, idDXContext, pCmd);
|
---|
3950 | #else
|
---|
3951 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3952 | return VERR_NOT_SUPPORTED;
|
---|
3953 | #endif
|
---|
3954 | }
|
---|
3955 |
|
---|
3956 |
|
---|
3957 | /* SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT 1248 */
|
---|
3958 | static int vmsvga3dCmdDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewFloat const *pCmd, uint32_t cbCmd)
|
---|
3959 | {
|
---|
3960 | #ifdef VMSVGA3D_DX
|
---|
3961 | DEBUG_BREAKPOINT_TEST();
|
---|
3962 | RT_NOREF(cbCmd);
|
---|
3963 | return vmsvga3dDXClearUAViewFloat(pThisCC, idDXContext, pCmd);
|
---|
3964 | #else
|
---|
3965 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3966 | return VERR_NOT_SUPPORTED;
|
---|
3967 | #endif
|
---|
3968 | }
|
---|
3969 |
|
---|
3970 |
|
---|
3971 | /* SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT 1249 */
|
---|
3972 | static int vmsvga3dCmdDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXCopyStructureCount const *pCmd, uint32_t cbCmd)
|
---|
3973 | {
|
---|
3974 | #ifdef VMSVGA3D_DX
|
---|
3975 | //DEBUG_BREAKPOINT_TEST();
|
---|
3976 | RT_NOREF(cbCmd);
|
---|
3977 | return vmsvga3dDXCopyStructureCount(pThisCC, idDXContext, pCmd);
|
---|
3978 | #else
|
---|
3979 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3980 | return VERR_NOT_SUPPORTED;
|
---|
3981 | #endif
|
---|
3982 | }
|
---|
3983 |
|
---|
3984 |
|
---|
3985 | /* SVGA_3D_CMD_DX_SET_UA_VIEWS 1250 */
|
---|
3986 | static int vmsvga3dCmdDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetUAViews const *pCmd, uint32_t cbCmd)
|
---|
3987 | {
|
---|
3988 | #ifdef VMSVGA3D_DX
|
---|
3989 | //DEBUG_BREAKPOINT_TEST();
|
---|
3990 | SVGA3dUAViewId const *paUAViewId = (SVGA3dUAViewId *)&pCmd[1];
|
---|
3991 | uint32_t const cUAViewId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dUAViewId);
|
---|
3992 | return vmsvga3dDXSetUAViews(pThisCC, idDXContext, pCmd, cUAViewId, paUAViewId);
|
---|
3993 | #else
|
---|
3994 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
3995 | return VERR_NOT_SUPPORTED;
|
---|
3996 | #endif
|
---|
3997 | }
|
---|
3998 |
|
---|
3999 |
|
---|
4000 | /* SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT 1251 */
|
---|
4001 | static int vmsvga3dCmdDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstancedIndirect const *pCmd, uint32_t cbCmd)
|
---|
4002 | {
|
---|
4003 | #ifdef VMSVGA3D_DX
|
---|
4004 | //DEBUG_BREAKPOINT_TEST();
|
---|
4005 | RT_NOREF(cbCmd);
|
---|
4006 | return vmsvga3dDXDrawIndexedInstancedIndirect(pThisCC, idDXContext, pCmd);
|
---|
4007 | #else
|
---|
4008 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4009 | return VERR_NOT_SUPPORTED;
|
---|
4010 | #endif
|
---|
4011 | }
|
---|
4012 |
|
---|
4013 |
|
---|
4014 | /* SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT 1252 */
|
---|
4015 | static int vmsvga3dCmdDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstancedIndirect const *pCmd, uint32_t cbCmd)
|
---|
4016 | {
|
---|
4017 | #ifdef VMSVGA3D_DX
|
---|
4018 | //DEBUG_BREAKPOINT_TEST();
|
---|
4019 | RT_NOREF(cbCmd);
|
---|
4020 | return vmsvga3dDXDrawInstancedIndirect(pThisCC, idDXContext, pCmd);
|
---|
4021 | #else
|
---|
4022 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4023 | return VERR_NOT_SUPPORTED;
|
---|
4024 | #endif
|
---|
4025 | }
|
---|
4026 |
|
---|
4027 |
|
---|
4028 | /* SVGA_3D_CMD_DX_DISPATCH 1253 */
|
---|
4029 | static int vmsvga3dCmdDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDispatch const *pCmd, uint32_t cbCmd)
|
---|
4030 | {
|
---|
4031 | #ifdef VMSVGA3D_DX
|
---|
4032 | //DEBUG_BREAKPOINT_TEST();
|
---|
4033 | RT_NOREF(cbCmd);
|
---|
4034 | return vmsvga3dDXDispatch(pThisCC, idDXContext, pCmd);
|
---|
4035 | #else
|
---|
4036 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4037 | return VERR_NOT_SUPPORTED;
|
---|
4038 | #endif
|
---|
4039 | }
|
---|
4040 |
|
---|
4041 |
|
---|
4042 | /* SVGA_3D_CMD_DX_DISPATCH_INDIRECT 1254 */
|
---|
4043 | static int vmsvga3dCmdDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDispatchIndirect const *pCmd, uint32_t cbCmd)
|
---|
4044 | {
|
---|
4045 | #ifdef VMSVGA3D_DX
|
---|
4046 | DEBUG_BREAKPOINT_TEST();
|
---|
4047 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4048 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4049 | return vmsvga3dDXDispatchIndirect(pThisCC, idDXContext);
|
---|
4050 | #else
|
---|
4051 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4052 | return VERR_NOT_SUPPORTED;
|
---|
4053 | #endif
|
---|
4054 | }
|
---|
4055 |
|
---|
4056 |
|
---|
4057 | /* SVGA_3D_CMD_WRITE_ZERO_SURFACE 1255 */
|
---|
4058 | static int vmsvga3dCmdWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdWriteZeroSurface const *pCmd, uint32_t cbCmd)
|
---|
4059 | {
|
---|
4060 | #ifdef VMSVGA3D_DX
|
---|
4061 | DEBUG_BREAKPOINT_TEST();
|
---|
4062 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4063 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4064 | return vmsvga3dWriteZeroSurface(pThisCC, idDXContext);
|
---|
4065 | #else
|
---|
4066 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4067 | return VERR_NOT_SUPPORTED;
|
---|
4068 | #endif
|
---|
4069 | }
|
---|
4070 |
|
---|
4071 |
|
---|
4072 | /* SVGA_3D_CMD_HINT_ZERO_SURFACE 1256 */
|
---|
4073 | static int vmsvga3dCmdHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdHintZeroSurface const *pCmd, uint32_t cbCmd)
|
---|
4074 | {
|
---|
4075 | #ifdef VMSVGA3D_DX
|
---|
4076 | DEBUG_BREAKPOINT_TEST();
|
---|
4077 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4078 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4079 | return vmsvga3dHintZeroSurface(pThisCC, idDXContext);
|
---|
4080 | #else
|
---|
4081 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4082 | return VERR_NOT_SUPPORTED;
|
---|
4083 | #endif
|
---|
4084 | }
|
---|
4085 |
|
---|
4086 |
|
---|
4087 | /* SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER 1257 */
|
---|
4088 | static int vmsvga3dCmdDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXTransferToBuffer const *pCmd, uint32_t cbCmd)
|
---|
4089 | {
|
---|
4090 | #ifdef VMSVGA3D_DX
|
---|
4091 | DEBUG_BREAKPOINT_TEST();
|
---|
4092 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4093 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4094 | return vmsvga3dDXTransferToBuffer(pThisCC, idDXContext);
|
---|
4095 | #else
|
---|
4096 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4097 | return VERR_NOT_SUPPORTED;
|
---|
4098 | #endif
|
---|
4099 | }
|
---|
4100 |
|
---|
4101 |
|
---|
4102 | /* SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT 1258 */
|
---|
4103 | static int vmsvga3dCmdDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStructureCount const *pCmd, uint32_t cbCmd)
|
---|
4104 | {
|
---|
4105 | #ifdef VMSVGA3D_DX
|
---|
4106 | //DEBUG_BREAKPOINT_TEST();
|
---|
4107 | RT_NOREF(cbCmd);
|
---|
4108 | return vmsvga3dDXSetStructureCount(pThisCC, idDXContext, pCmd);
|
---|
4109 | #else
|
---|
4110 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4111 | return VERR_NOT_SUPPORTED;
|
---|
4112 | #endif
|
---|
4113 | }
|
---|
4114 |
|
---|
4115 |
|
---|
4116 | /* SVGA_3D_CMD_LOGICOPS_BITBLT 1259 */
|
---|
4117 | static int vmsvga3dCmdLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsBitBlt const *pCmd, uint32_t cbCmd)
|
---|
4118 | {
|
---|
4119 | #ifdef VMSVGA3D_DX
|
---|
4120 | DEBUG_BREAKPOINT_TEST();
|
---|
4121 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4122 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4123 | return vmsvga3dLogicOpsBitBlt(pThisCC, idDXContext);
|
---|
4124 | #else
|
---|
4125 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4126 | return VERR_NOT_SUPPORTED;
|
---|
4127 | #endif
|
---|
4128 | }
|
---|
4129 |
|
---|
4130 |
|
---|
4131 | /* SVGA_3D_CMD_LOGICOPS_TRANSBLT 1260 */
|
---|
4132 | static int vmsvga3dCmdLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsTransBlt const *pCmd, uint32_t cbCmd)
|
---|
4133 | {
|
---|
4134 | #ifdef VMSVGA3D_DX
|
---|
4135 | DEBUG_BREAKPOINT_TEST();
|
---|
4136 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4137 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4138 | return vmsvga3dLogicOpsTransBlt(pThisCC, idDXContext);
|
---|
4139 | #else
|
---|
4140 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4141 | return VERR_NOT_SUPPORTED;
|
---|
4142 | #endif
|
---|
4143 | }
|
---|
4144 |
|
---|
4145 |
|
---|
4146 | /* SVGA_3D_CMD_LOGICOPS_STRETCHBLT 1261 */
|
---|
4147 | static int vmsvga3dCmdLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsStretchBlt const *pCmd, uint32_t cbCmd)
|
---|
4148 | {
|
---|
4149 | #ifdef VMSVGA3D_DX
|
---|
4150 | DEBUG_BREAKPOINT_TEST();
|
---|
4151 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4152 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4153 | return vmsvga3dLogicOpsStretchBlt(pThisCC, idDXContext);
|
---|
4154 | #else
|
---|
4155 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4156 | return VERR_NOT_SUPPORTED;
|
---|
4157 | #endif
|
---|
4158 | }
|
---|
4159 |
|
---|
4160 |
|
---|
4161 | /* SVGA_3D_CMD_LOGICOPS_COLORFILL 1262 */
|
---|
4162 | static int vmsvga3dCmdLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsColorFill const *pCmd, uint32_t cbCmd)
|
---|
4163 | {
|
---|
4164 | #ifdef VMSVGA3D_DX
|
---|
4165 | DEBUG_BREAKPOINT_TEST();
|
---|
4166 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4167 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4168 | return vmsvga3dLogicOpsColorFill(pThisCC, idDXContext);
|
---|
4169 | #else
|
---|
4170 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4171 | return VERR_NOT_SUPPORTED;
|
---|
4172 | #endif
|
---|
4173 | }
|
---|
4174 |
|
---|
4175 |
|
---|
4176 | /* SVGA_3D_CMD_LOGICOPS_ALPHABLEND 1263 */
|
---|
4177 | static int vmsvga3dCmdLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsAlphaBlend const *pCmd, uint32_t cbCmd)
|
---|
4178 | {
|
---|
4179 | #ifdef VMSVGA3D_DX
|
---|
4180 | DEBUG_BREAKPOINT_TEST();
|
---|
4181 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4182 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4183 | return vmsvga3dLogicOpsAlphaBlend(pThisCC, idDXContext);
|
---|
4184 | #else
|
---|
4185 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4186 | return VERR_NOT_SUPPORTED;
|
---|
4187 | #endif
|
---|
4188 | }
|
---|
4189 |
|
---|
4190 |
|
---|
4191 | /* SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND 1264 */
|
---|
4192 | static int vmsvga3dCmdLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsClearTypeBlend const *pCmd, uint32_t cbCmd)
|
---|
4193 | {
|
---|
4194 | #ifdef VMSVGA3D_DX
|
---|
4195 | DEBUG_BREAKPOINT_TEST();
|
---|
4196 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4197 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4198 | return vmsvga3dLogicOpsClearTypeBlend(pThisCC, idDXContext);
|
---|
4199 | #else
|
---|
4200 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4201 | return VERR_NOT_SUPPORTED;
|
---|
4202 | #endif
|
---|
4203 | }
|
---|
4204 |
|
---|
4205 |
|
---|
4206 | /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 1267 */
|
---|
4207 | static int vmsvga3dCmdDefineGBSurface_v4(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v4 const *pCmd)
|
---|
4208 | {
|
---|
4209 | #ifdef VMSVGA3D_DX
|
---|
4210 | //DEBUG_BREAKPOINT_TEST();
|
---|
4211 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4212 |
|
---|
4213 | /* Update the entry in the pSvgaR3State->pGboOTableSurface. */
|
---|
4214 | SVGAOTableSurfaceEntry entry;
|
---|
4215 | RT_ZERO(entry);
|
---|
4216 | entry.format = pCmd->format;
|
---|
4217 | entry.surface1Flags = (uint32_t)(pCmd->surfaceFlags);
|
---|
4218 | entry.numMipLevels = pCmd->numMipLevels;
|
---|
4219 | entry.multisampleCount = pCmd->multisampleCount;
|
---|
4220 | entry.autogenFilter = pCmd->autogenFilter;
|
---|
4221 | entry.size = pCmd->size;
|
---|
4222 | entry.mobid = SVGA_ID_INVALID;
|
---|
4223 | entry.arraySize = pCmd->arraySize;
|
---|
4224 | // entry.mobPitch = 0;
|
---|
4225 | entry.surface2Flags = (uint32_t)(pCmd->surfaceFlags >> UINT64_C(32));
|
---|
4226 | entry.multisamplePattern = pCmd->multisamplePattern;
|
---|
4227 | entry.qualityLevel = pCmd->qualityLevel;
|
---|
4228 | entry.bufferByteStride = pCmd->bufferByteStride;
|
---|
4229 | // entry.minLOD = 0;
|
---|
4230 |
|
---|
4231 | int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
|
---|
4232 | pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry));
|
---|
4233 | if (RT_SUCCESS(rc))
|
---|
4234 | {
|
---|
4235 | /* Create the host surface. */
|
---|
4236 | vmsvga3dSurfaceDefine(pThisCC, pCmd->sid, pCmd->surfaceFlags, pCmd->format,
|
---|
4237 | pCmd->multisampleCount, pCmd->multisamplePattern, pCmd->qualityLevel, pCmd->autogenFilter,
|
---|
4238 | pCmd->numMipLevels, &pCmd->size, pCmd->arraySize, pCmd->bufferByteStride, /* fAllocMipLevels = */ false);
|
---|
4239 | }
|
---|
4240 | return rc;
|
---|
4241 | #else
|
---|
4242 | RT_NOREF(pThisCC, pCmd);
|
---|
4243 | return VERR_NOT_SUPPORTED;
|
---|
4244 | #endif
|
---|
4245 | }
|
---|
4246 |
|
---|
4247 |
|
---|
4248 | /* SVGA_3D_CMD_DX_SET_CS_UA_VIEWS 1268 */
|
---|
4249 | static int vmsvga3dCmdDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetCSUAViews const *pCmd, uint32_t cbCmd)
|
---|
4250 | {
|
---|
4251 | #ifdef VMSVGA3D_DX
|
---|
4252 | //DEBUG_BREAKPOINT_TEST();
|
---|
4253 | SVGA3dUAViewId const *paUAViewId = (SVGA3dUAViewId *)&pCmd[1];
|
---|
4254 | uint32_t const cUAViewId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dUAViewId);
|
---|
4255 | return vmsvga3dDXSetCSUAViews(pThisCC, idDXContext, pCmd, cUAViewId, paUAViewId);
|
---|
4256 | #else
|
---|
4257 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4258 | return VERR_NOT_SUPPORTED;
|
---|
4259 | #endif
|
---|
4260 | }
|
---|
4261 |
|
---|
4262 |
|
---|
4263 | /* SVGA_3D_CMD_DX_SET_MIN_LOD 1269 */
|
---|
4264 | static int vmsvga3dCmdDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetMinLOD const *pCmd, uint32_t cbCmd)
|
---|
4265 | {
|
---|
4266 | #ifdef VMSVGA3D_DX
|
---|
4267 | DEBUG_BREAKPOINT_TEST();
|
---|
4268 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4269 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4270 | return vmsvga3dDXSetMinLOD(pThisCC, idDXContext);
|
---|
4271 | #else
|
---|
4272 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4273 | return VERR_NOT_SUPPORTED;
|
---|
4274 | #endif
|
---|
4275 | }
|
---|
4276 |
|
---|
4277 |
|
---|
4278 | /* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2 1272 */
|
---|
4279 | static int vmsvga3dCmdDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd, uint32_t cbCmd)
|
---|
4280 | {
|
---|
4281 | #ifdef VMSVGA3D_DX
|
---|
4282 | //DEBUG_BREAKPOINT_TEST();
|
---|
4283 | RT_NOREF(cbCmd);
|
---|
4284 | return vmsvga3dDXDefineDepthStencilView(pThisCC, idDXContext, pCmd);
|
---|
4285 | #else
|
---|
4286 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4287 | return VERR_NOT_SUPPORTED;
|
---|
4288 | #endif
|
---|
4289 | }
|
---|
4290 |
|
---|
4291 |
|
---|
4292 | /* SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB 1273 */
|
---|
4293 | static int vmsvga3dCmdDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutputWithMob const *pCmd, uint32_t cbCmd)
|
---|
4294 | {
|
---|
4295 | #ifdef VMSVGA3D_DX
|
---|
4296 | //DEBUG_BREAKPOINT_TEST();
|
---|
4297 | RT_NOREF(cbCmd);
|
---|
4298 | return vmsvga3dDXDefineStreamOutputWithMob(pThisCC, idDXContext, pCmd);
|
---|
4299 | #else
|
---|
4300 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4301 | return VERR_NOT_SUPPORTED;
|
---|
4302 | #endif
|
---|
4303 | }
|
---|
4304 |
|
---|
4305 |
|
---|
4306 | /* SVGA_3D_CMD_DX_SET_SHADER_IFACE 1274 */
|
---|
4307 | static int vmsvga3dCmdDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderIface const *pCmd, uint32_t cbCmd)
|
---|
4308 | {
|
---|
4309 | #ifdef VMSVGA3D_DX
|
---|
4310 | DEBUG_BREAKPOINT_TEST();
|
---|
4311 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4312 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4313 | return vmsvga3dDXSetShaderIface(pThisCC, idDXContext);
|
---|
4314 | #else
|
---|
4315 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4316 | return VERR_NOT_SUPPORTED;
|
---|
4317 | #endif
|
---|
4318 | }
|
---|
4319 |
|
---|
4320 |
|
---|
4321 | /* SVGA_3D_CMD_DX_BIND_STREAMOUTPUT 1275 */
|
---|
4322 | static int vmsvga3dCmdDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindStreamOutput const *pCmd, uint32_t cbCmd)
|
---|
4323 | {
|
---|
4324 | #ifdef VMSVGA3D_DX
|
---|
4325 | //DEBUG_BREAKPOINT_TEST();
|
---|
4326 | RT_NOREF(cbCmd);
|
---|
4327 | return vmsvga3dDXBindStreamOutput(pThisCC, idDXContext, pCmd);
|
---|
4328 | #else
|
---|
4329 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4330 | return VERR_NOT_SUPPORTED;
|
---|
4331 | #endif
|
---|
4332 | }
|
---|
4333 |
|
---|
4334 |
|
---|
4335 | /* SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS 1276 */
|
---|
4336 | static int vmsvga3dCmdSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdSurfaceStretchBltNonMSToMS const *pCmd, uint32_t cbCmd)
|
---|
4337 | {
|
---|
4338 | #ifdef VMSVGA3D_DX
|
---|
4339 | DEBUG_BREAKPOINT_TEST();
|
---|
4340 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4341 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4342 | return vmsvga3dSurfaceStretchBltNonMSToMS(pThisCC, idDXContext);
|
---|
4343 | #else
|
---|
4344 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4345 | return VERR_NOT_SUPPORTED;
|
---|
4346 | #endif
|
---|
4347 | }
|
---|
4348 |
|
---|
4349 |
|
---|
4350 | /* SVGA_3D_CMD_DX_BIND_SHADER_IFACE 1277 */
|
---|
4351 | static int vmsvga3dCmdDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindShaderIface const *pCmd, uint32_t cbCmd)
|
---|
4352 | {
|
---|
4353 | #ifdef VMSVGA3D_DX
|
---|
4354 | DEBUG_BREAKPOINT_TEST();
|
---|
4355 | PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4356 | RT_NOREF(pSvgaR3State, pCmd, cbCmd);
|
---|
4357 | return vmsvga3dDXBindShaderIface(pThisCC, idDXContext);
|
---|
4358 | #else
|
---|
4359 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4360 | return VERR_NOT_SUPPORTED;
|
---|
4361 | #endif
|
---|
4362 | }
|
---|
4363 |
|
---|
4364 |
|
---|
4365 | /* SVGA_3D_CMD_VB_DX_CLEAR_RENDERTARGET_VIEW_REGION 1083 */
|
---|
4366 | static int vmsvga3dCmdVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdVBDXClearRenderTargetViewRegion *pCmd, uint32_t cbCmd)
|
---|
4367 | {
|
---|
4368 | #ifdef VMSVGA3D_DX
|
---|
4369 | //DEBUG_BREAKPOINT_TEST();
|
---|
4370 | SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1];
|
---|
4371 | uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
|
---|
4372 | return vmsvga3dVBDXClearRenderTargetViewRegion(pThisCC, idDXContext, pCmd, cRect, paRect);
|
---|
4373 | #else
|
---|
4374 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4375 | return VERR_NOT_SUPPORTED;
|
---|
4376 | #endif
|
---|
4377 | }
|
---|
4378 |
|
---|
4379 |
|
---|
4380 | /* VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR VBSVGA_3D_CMD_BASE + 0 */
|
---|
4381 | static int vmsvga3dVBCmdDXDefineVideoProcessor(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDefineVideoProcessor *pCmd, uint32_t cbCmd)
|
---|
4382 | {
|
---|
4383 | #ifdef VMSVGA3D_DX
|
---|
4384 | //DEBUG_BREAKPOINT_TEST();
|
---|
4385 | RT_NOREF(cbCmd);
|
---|
4386 | return vmsvga3dVBDXDefineVideoProcessor(pThisCC, idDXContext, pCmd);
|
---|
4387 | #else
|
---|
4388 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4389 | return VERR_NOT_SUPPORTED;
|
---|
4390 | #endif
|
---|
4391 | }
|
---|
4392 |
|
---|
4393 |
|
---|
4394 | /* VBSVGA_3D_CMD_DX_DEFINE_VIDEO_DECODER_OUTPUT_VIEW VBSVGA_3D_CMD_BASE + 1 */
|
---|
4395 | static int vmsvga3dVBCmdDXDefineVideoDecoderOutputView(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDefineVideoDecoderOutputView *pCmd, uint32_t cbCmd)
|
---|
4396 | {
|
---|
4397 | #ifdef VMSVGA3D_DX
|
---|
4398 | //DEBUG_BREAKPOINT_TEST();
|
---|
4399 | RT_NOREF(cbCmd);
|
---|
4400 | return vmsvga3dVBDXDefineVideoDecoderOutputView(pThisCC, idDXContext, pCmd);
|
---|
4401 | #else
|
---|
4402 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4403 | return VERR_NOT_SUPPORTED;
|
---|
4404 | #endif
|
---|
4405 | }
|
---|
4406 |
|
---|
4407 |
|
---|
4408 | /* VBSVGA_3D_CMD_DX_DEFINE_VIDEO_DECODER VBSVGA_3D_CMD_BASE + 2 */
|
---|
4409 | static int vmsvga3dVBCmdDXDefineVideoDecoder(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDefineVideoDecoder *pCmd, uint32_t cbCmd)
|
---|
4410 | {
|
---|
4411 | #ifdef VMSVGA3D_DX
|
---|
4412 | //DEBUG_BREAKPOINT_TEST();
|
---|
4413 | RT_NOREF(cbCmd);
|
---|
4414 | return vmsvga3dVBDXDefineVideoDecoder(pThisCC, idDXContext, pCmd);
|
---|
4415 | #else
|
---|
4416 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4417 | return VERR_NOT_SUPPORTED;
|
---|
4418 | #endif
|
---|
4419 | }
|
---|
4420 |
|
---|
4421 |
|
---|
4422 | /* VBSVGA_3D_CMD_DX_VIDEO_DECODER_BEGIN_FRAME VBSVGA_3D_CMD_BASE + 3 */
|
---|
4423 | static int vmsvga3dVBCmdDXVideoDecoderBeginFrame(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoDecoderBeginFrame *pCmd, uint32_t cbCmd)
|
---|
4424 | {
|
---|
4425 | #ifdef VMSVGA3D_DX
|
---|
4426 | //DEBUG_BREAKPOINT_TEST();
|
---|
4427 | RT_NOREF(cbCmd);
|
---|
4428 | return vmsvga3dVBDXVideoDecoderBeginFrame(pThisCC, idDXContext, pCmd);
|
---|
4429 | #else
|
---|
4430 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4431 | return VERR_NOT_SUPPORTED;
|
---|
4432 | #endif
|
---|
4433 | }
|
---|
4434 |
|
---|
4435 |
|
---|
4436 | /* VBSVGA_3D_CMD_DX_VIDEO_DECODER_SUBMIT_BUFFERS VBSVGA_3D_CMD_BASE + 4 */
|
---|
4437 | static int vmsvga3dVBCmdDXVideoDecoderSubmitBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoDecoderSubmitBuffers *pCmd, uint32_t cbCmd)
|
---|
4438 | {
|
---|
4439 | #ifdef VMSVGA3D_DX
|
---|
4440 | //DEBUG_BREAKPOINT_TEST();
|
---|
4441 | VBSVGA3dVideoDecoderBufferDesc const *paBufferDesc = (VBSVGA3dVideoDecoderBufferDesc *)&pCmd[1];
|
---|
4442 | uint32_t const cBuffer = (cbCmd - sizeof(*pCmd)) / sizeof(VBSVGA3dVideoDecoderBufferDesc);
|
---|
4443 | return vmsvga3dVBDXVideoDecoderSubmitBuffers(pThisCC, idDXContext, pCmd, cBuffer, paBufferDesc);
|
---|
4444 | #else
|
---|
4445 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4446 | return VERR_NOT_SUPPORTED;
|
---|
4447 | #endif
|
---|
4448 | }
|
---|
4449 |
|
---|
4450 |
|
---|
4451 | /* VBSVGA_3D_CMD_DX_VIDEO_DECODER_END_FRAME VBSVGA_3D_CMD_BASE + 5 */
|
---|
4452 | static int vmsvga3dVBCmdDXVideoDecoderEndFrame(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoDecoderEndFrame *pCmd, uint32_t cbCmd)
|
---|
4453 | {
|
---|
4454 | #ifdef VMSVGA3D_DX
|
---|
4455 | //DEBUG_BREAKPOINT_TEST();
|
---|
4456 | RT_NOREF(cbCmd);
|
---|
4457 | return vmsvga3dVBDXVideoDecoderEndFrame(pThisCC, idDXContext, pCmd);
|
---|
4458 | #else
|
---|
4459 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4460 | return VERR_NOT_SUPPORTED;
|
---|
4461 | #endif
|
---|
4462 | }
|
---|
4463 |
|
---|
4464 |
|
---|
4465 | /* VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR_INPUT_VIEW VBSVGA_3D_CMD_BASE + 6 */
|
---|
4466 | static int vmsvga3dVBCmdDXDefineVideoProcessorInputView(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDefineVideoProcessorInputView *pCmd, uint32_t cbCmd)
|
---|
4467 | {
|
---|
4468 | #ifdef VMSVGA3D_DX
|
---|
4469 | //DEBUG_BREAKPOINT_TEST();
|
---|
4470 | RT_NOREF(cbCmd);
|
---|
4471 | return vmsvga3dVBDXDefineVideoProcessorInputView(pThisCC, idDXContext, pCmd);
|
---|
4472 | #else
|
---|
4473 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4474 | return VERR_NOT_SUPPORTED;
|
---|
4475 | #endif
|
---|
4476 | }
|
---|
4477 |
|
---|
4478 |
|
---|
4479 | /* VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR_OUTPUT_VIEW VBSVGA_3D_CMD_BASE + 7 */
|
---|
4480 | static int vmsvga3dVBCmdDXDefineVideoProcessorOutputView(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDefineVideoProcessorOutputView *pCmd, uint32_t cbCmd)
|
---|
4481 | {
|
---|
4482 | #ifdef VMSVGA3D_DX
|
---|
4483 | //DEBUG_BREAKPOINT_TEST();
|
---|
4484 | RT_NOREF(cbCmd);
|
---|
4485 | return vmsvga3dVBDXDefineVideoProcessorOutputView(pThisCC, idDXContext, pCmd);
|
---|
4486 | #else
|
---|
4487 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4488 | return VERR_NOT_SUPPORTED;
|
---|
4489 | #endif
|
---|
4490 | }
|
---|
4491 |
|
---|
4492 |
|
---|
4493 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_BLT VBSVGA_3D_CMD_BASE + 8 */
|
---|
4494 | static int vmsvga3dVBCmdDXVideoProcessorBlt(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorBlt *pCmd, uint32_t cbCmd)
|
---|
4495 | {
|
---|
4496 | #ifdef VMSVGA3D_DX
|
---|
4497 | //DEBUG_BREAKPOINT_TEST();
|
---|
4498 | return vmsvga3dVBDXVideoProcessorBlt(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4499 | #else
|
---|
4500 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4501 | return VERR_NOT_SUPPORTED;
|
---|
4502 | #endif
|
---|
4503 | }
|
---|
4504 |
|
---|
4505 |
|
---|
4506 | /* VBSVGA_3D_CMD_DX_DESTROY_VIDEO_DECODER VBSVGA_3D_CMD_BASE + 9 */
|
---|
4507 | static int vmsvga3dVBCmdDXDestroyVideoDecoder(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDestroyVideoDecoder *pCmd, uint32_t cbCmd)
|
---|
4508 | {
|
---|
4509 | #ifdef VMSVGA3D_DX
|
---|
4510 | //DEBUG_BREAKPOINT_TEST();
|
---|
4511 | RT_NOREF(cbCmd);
|
---|
4512 | return vmsvga3dVBDXDestroyVideoDecoder(pThisCC, idDXContext, pCmd);
|
---|
4513 | #else
|
---|
4514 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4515 | return VERR_NOT_SUPPORTED;
|
---|
4516 | #endif
|
---|
4517 | }
|
---|
4518 |
|
---|
4519 |
|
---|
4520 | /* VBSVGA_3D_CMD_DX_DESTROY_VIDEO_DECODER_OUTPUT_VIEW VBSVGA_3D_CMD_BASE + 10 */
|
---|
4521 | static int vmsvga3dVBCmdDXDestroyVideoDecoderOutputView(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDestroyVideoDecoderOutputView *pCmd, uint32_t cbCmd)
|
---|
4522 | {
|
---|
4523 | #ifdef VMSVGA3D_DX
|
---|
4524 | //DEBUG_BREAKPOINT_TEST();
|
---|
4525 | RT_NOREF(cbCmd);
|
---|
4526 | return vmsvga3dVBDXDestroyVideoDecoderOutputView(pThisCC, idDXContext, pCmd);
|
---|
4527 | #else
|
---|
4528 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4529 | return VERR_NOT_SUPPORTED;
|
---|
4530 | #endif
|
---|
4531 | }
|
---|
4532 |
|
---|
4533 |
|
---|
4534 | /* VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR VBSVGA_3D_CMD_BASE + 11 */
|
---|
4535 | static int vmsvga3dVBCmdDXDestroyVideoProcessor(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDestroyVideoProcessor *pCmd, uint32_t cbCmd)
|
---|
4536 | {
|
---|
4537 | #ifdef VMSVGA3D_DX
|
---|
4538 | //DEBUG_BREAKPOINT_TEST();
|
---|
4539 | RT_NOREF(cbCmd);
|
---|
4540 | return vmsvga3dVBDXDestroyVideoProcessor(pThisCC, idDXContext, pCmd);
|
---|
4541 | #else
|
---|
4542 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4543 | return VERR_NOT_SUPPORTED;
|
---|
4544 | #endif
|
---|
4545 | }
|
---|
4546 |
|
---|
4547 |
|
---|
4548 | /* VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR_INPUT_VIEW VBSVGA_3D_CMD_BASE + 12 */
|
---|
4549 | static int vmsvga3dVBCmdDXDestroyVideoProcessorInputView(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDestroyVideoProcessorInputView *pCmd, uint32_t cbCmd)
|
---|
4550 | {
|
---|
4551 | #ifdef VMSVGA3D_DX
|
---|
4552 | //DEBUG_BREAKPOINT_TEST();
|
---|
4553 | RT_NOREF(cbCmd);
|
---|
4554 | return vmsvga3dVBDXDestroyVideoProcessorInputView(pThisCC, idDXContext, pCmd);
|
---|
4555 | #else
|
---|
4556 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4557 | return VERR_NOT_SUPPORTED;
|
---|
4558 | #endif
|
---|
4559 | }
|
---|
4560 |
|
---|
4561 |
|
---|
4562 | /* VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR_OUTPUT_VIEW VBSVGA_3D_CMD_BASE + 13 */
|
---|
4563 | static int vmsvga3dVBCmdDXDestroyVideoProcessorOutputView(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXDestroyVideoProcessorOutputView *pCmd, uint32_t cbCmd)
|
---|
4564 | {
|
---|
4565 | #ifdef VMSVGA3D_DX
|
---|
4566 | //DEBUG_BREAKPOINT_TEST();
|
---|
4567 | RT_NOREF(cbCmd);
|
---|
4568 | return vmsvga3dVBDXDestroyVideoProcessorOutputView(pThisCC, idDXContext, pCmd);
|
---|
4569 | #else
|
---|
4570 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4571 | return VERR_NOT_SUPPORTED;
|
---|
4572 | #endif
|
---|
4573 | }
|
---|
4574 |
|
---|
4575 |
|
---|
4576 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_TARGET_RECT VBSVGA_3D_CMD_BASE + 14 */
|
---|
4577 | static int vmsvga3dVBCmdDXVideoProcessorSetOutputTargetRect(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetOutputTargetRect const *pCmd, uint32_t cbCmd)
|
---|
4578 | {
|
---|
4579 | #ifdef VMSVGA3D_DX
|
---|
4580 | //DEBUG_BREAKPOINT_TEST();
|
---|
4581 | RT_NOREF(cbCmd);
|
---|
4582 | return vmsvga3dVBDXVideoProcessorSetOutputTargetRect(pThisCC, idDXContext, pCmd);
|
---|
4583 | #else
|
---|
4584 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4585 | return VERR_NOT_SUPPORTED;
|
---|
4586 | #endif
|
---|
4587 | }
|
---|
4588 |
|
---|
4589 |
|
---|
4590 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_BACKGROUND_COLOR VBSVGA_3D_CMD_BASE + 15 */
|
---|
4591 | static int vmsvga3dVBCmdDXVideoProcessorSetOutputBackgroundColor(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetOutputBackgroundColor const *pCmd, uint32_t cbCmd)
|
---|
4592 | {
|
---|
4593 | #ifdef VMSVGA3D_DX
|
---|
4594 | //DEBUG_BREAKPOINT_TEST();
|
---|
4595 | RT_NOREF(cbCmd);
|
---|
4596 | return vmsvga3dVBDXVideoProcessorSetOutputBackgroundColor(pThisCC, idDXContext, pCmd);
|
---|
4597 | #else
|
---|
4598 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4599 | return VERR_NOT_SUPPORTED;
|
---|
4600 | #endif
|
---|
4601 | }
|
---|
4602 |
|
---|
4603 |
|
---|
4604 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_COLOR_SPACE VBSVGA_3D_CMD_BASE + 16 */
|
---|
4605 | static int vmsvga3dVBCmdDXVideoProcessorSetOutputColorSpace(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetOutputColorSpace const *pCmd, uint32_t cbCmd)
|
---|
4606 | {
|
---|
4607 | #ifdef VMSVGA3D_DX
|
---|
4608 | //DEBUG_BREAKPOINT_TEST();
|
---|
4609 | RT_NOREF(cbCmd);
|
---|
4610 | return vmsvga3dVBDXVideoProcessorSetOutputColorSpace(pThisCC, idDXContext, pCmd);
|
---|
4611 | #else
|
---|
4612 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4613 | return VERR_NOT_SUPPORTED;
|
---|
4614 | #endif
|
---|
4615 | }
|
---|
4616 |
|
---|
4617 |
|
---|
4618 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_ALPHA_FILL_MODE VBSVGA_3D_CMD_BASE + 17 */
|
---|
4619 | static int vmsvga3dVBCmdDXVideoProcessorSetOutputAlphaFillMode(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetOutputAlphaFillMode const *pCmd, uint32_t cbCmd)
|
---|
4620 | {
|
---|
4621 | #ifdef VMSVGA3D_DX
|
---|
4622 | //DEBUG_BREAKPOINT_TEST();
|
---|
4623 | RT_NOREF(cbCmd);
|
---|
4624 | return vmsvga3dVBDXVideoProcessorSetOutputAlphaFillMode(pThisCC, idDXContext, pCmd);
|
---|
4625 | #else
|
---|
4626 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4627 | return VERR_NOT_SUPPORTED;
|
---|
4628 | #endif
|
---|
4629 | }
|
---|
4630 |
|
---|
4631 |
|
---|
4632 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_CONSTRICTION VBSVGA_3D_CMD_BASE + 18 */
|
---|
4633 | static int vmsvga3dVBCmdDXVideoProcessorSetOutputConstriction(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetOutputConstriction const *pCmd, uint32_t cbCmd)
|
---|
4634 | {
|
---|
4635 | #ifdef VMSVGA3D_DX
|
---|
4636 | //DEBUG_BREAKPOINT_TEST();
|
---|
4637 | RT_NOREF(cbCmd);
|
---|
4638 | return vmsvga3dVBDXVideoProcessorSetOutputConstriction(pThisCC, idDXContext, pCmd);
|
---|
4639 | #else
|
---|
4640 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4641 | return VERR_NOT_SUPPORTED;
|
---|
4642 | #endif
|
---|
4643 | }
|
---|
4644 |
|
---|
4645 |
|
---|
4646 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_STEREO_MODE VBSVGA_3D_CMD_BASE + 19 */
|
---|
4647 | static int vmsvga3dVBCmdDXVideoProcessorSetOutputStereoMode(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetOutputStereoMode const *pCmd, uint32_t cbCmd)
|
---|
4648 | {
|
---|
4649 | #ifdef VMSVGA3D_DX
|
---|
4650 | //DEBUG_BREAKPOINT_TEST();
|
---|
4651 | RT_NOREF(cbCmd);
|
---|
4652 | return vmsvga3dVBDXVideoProcessorSetOutputStereoMode(pThisCC, idDXContext, pCmd);
|
---|
4653 | #else
|
---|
4654 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4655 | return VERR_NOT_SUPPORTED;
|
---|
4656 | #endif
|
---|
4657 | }
|
---|
4658 |
|
---|
4659 |
|
---|
4660 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_FRAME_FORMAT VBSVGA_3D_CMD_BASE + 20 */
|
---|
4661 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamFrameFormat(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamFrameFormat const *pCmd, uint32_t cbCmd)
|
---|
4662 | {
|
---|
4663 | #ifdef VMSVGA3D_DX
|
---|
4664 | //DEBUG_BREAKPOINT_TEST();
|
---|
4665 | RT_NOREF(cbCmd);
|
---|
4666 | return vmsvga3dVBDXVideoProcessorSetStreamFrameFormat(pThisCC, idDXContext, pCmd);
|
---|
4667 | #else
|
---|
4668 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4669 | return VERR_NOT_SUPPORTED;
|
---|
4670 | #endif
|
---|
4671 | }
|
---|
4672 |
|
---|
4673 |
|
---|
4674 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_COLOR_SPACE VBSVGA_3D_CMD_BASE + 21 */
|
---|
4675 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamColorSpace(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamColorSpace const *pCmd, uint32_t cbCmd)
|
---|
4676 | {
|
---|
4677 | #ifdef VMSVGA3D_DX
|
---|
4678 | //DEBUG_BREAKPOINT_TEST();
|
---|
4679 | RT_NOREF(cbCmd);
|
---|
4680 | return vmsvga3dVBDXVideoProcessorSetStreamColorSpace(pThisCC, idDXContext, pCmd);
|
---|
4681 | #else
|
---|
4682 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4683 | return VERR_NOT_SUPPORTED;
|
---|
4684 | #endif
|
---|
4685 | }
|
---|
4686 |
|
---|
4687 |
|
---|
4688 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_OUTPUT_RATE VBSVGA_3D_CMD_BASE + 22 */
|
---|
4689 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamOutputRate(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamOutputRate const *pCmd, uint32_t cbCmd)
|
---|
4690 | {
|
---|
4691 | #ifdef VMSVGA3D_DX
|
---|
4692 | //DEBUG_BREAKPOINT_TEST();
|
---|
4693 | RT_NOREF(cbCmd);
|
---|
4694 | return vmsvga3dVBDXVideoProcessorSetStreamOutputRate(pThisCC, idDXContext, pCmd);
|
---|
4695 | #else
|
---|
4696 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4697 | return VERR_NOT_SUPPORTED;
|
---|
4698 | #endif
|
---|
4699 | }
|
---|
4700 |
|
---|
4701 |
|
---|
4702 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_SOURCE_RECT VBSVGA_3D_CMD_BASE + 23 */
|
---|
4703 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamSourceRect(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamSourceRect const *pCmd, uint32_t cbCmd)
|
---|
4704 | {
|
---|
4705 | #ifdef VMSVGA3D_DX
|
---|
4706 | //DEBUG_BREAKPOINT_TEST();
|
---|
4707 | RT_NOREF(cbCmd);
|
---|
4708 | return vmsvga3dVBDXVideoProcessorSetStreamSourceRect(pThisCC, idDXContext, pCmd);
|
---|
4709 | #else
|
---|
4710 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4711 | return VERR_NOT_SUPPORTED;
|
---|
4712 | #endif
|
---|
4713 | }
|
---|
4714 |
|
---|
4715 |
|
---|
4716 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_DEST_RECT VBSVGA_3D_CMD_BASE + 24 */
|
---|
4717 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamDestRect(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamDestRect const *pCmd, uint32_t cbCmd)
|
---|
4718 | {
|
---|
4719 | #ifdef VMSVGA3D_DX
|
---|
4720 | //DEBUG_BREAKPOINT_TEST();
|
---|
4721 | RT_NOREF(cbCmd);
|
---|
4722 | return vmsvga3dVBDXVideoProcessorSetStreamDestRect(pThisCC, idDXContext, pCmd);
|
---|
4723 | #else
|
---|
4724 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4725 | return VERR_NOT_SUPPORTED;
|
---|
4726 | #endif
|
---|
4727 | }
|
---|
4728 |
|
---|
4729 |
|
---|
4730 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_ALPHA VBSVGA_3D_CMD_BASE + 25 */
|
---|
4731 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamAlpha(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamAlpha const *pCmd, uint32_t cbCmd)
|
---|
4732 | {
|
---|
4733 | #ifdef VMSVGA3D_DX
|
---|
4734 | //DEBUG_BREAKPOINT_TEST();
|
---|
4735 | RT_NOREF(cbCmd);
|
---|
4736 | return vmsvga3dVBDXVideoProcessorSetStreamAlpha(pThisCC, idDXContext, pCmd);
|
---|
4737 | #else
|
---|
4738 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4739 | return VERR_NOT_SUPPORTED;
|
---|
4740 | #endif
|
---|
4741 | }
|
---|
4742 |
|
---|
4743 |
|
---|
4744 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_PALETTE VBSVGA_3D_CMD_BASE + 26, */
|
---|
4745 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamPalette(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamPalette const *pCmd, uint32_t cbCmd)
|
---|
4746 | {
|
---|
4747 | #ifdef VMSVGA3D_DX
|
---|
4748 | //DEBUG_BREAKPOINT_TEST();
|
---|
4749 | uint32_t const *paEntries = (uint32_t *)&pCmd[1];
|
---|
4750 | uint32_t const cEntries = (cbCmd - sizeof(*pCmd)) / sizeof(uint32_t);
|
---|
4751 | return vmsvga3dVBDXVideoProcessorSetStreamPalette(pThisCC, idDXContext, pCmd, cEntries, paEntries);
|
---|
4752 | #else
|
---|
4753 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4754 | return VERR_NOT_SUPPORTED;
|
---|
4755 | #endif
|
---|
4756 | }
|
---|
4757 |
|
---|
4758 |
|
---|
4759 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_PIXEL_ASPECT_RATIO VBSVGA_3D_CMD_BASE + 27 */
|
---|
4760 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamPixelAspectRatio(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamPixelAspectRatio const *pCmd, uint32_t cbCmd)
|
---|
4761 | {
|
---|
4762 | #ifdef VMSVGA3D_DX
|
---|
4763 | //DEBUG_BREAKPOINT_TEST();
|
---|
4764 | RT_NOREF(cbCmd);
|
---|
4765 | return vmsvga3dVBDXVideoProcessorSetStreamPixelAspectRatio(pThisCC, idDXContext, pCmd);
|
---|
4766 | #else
|
---|
4767 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4768 | return VERR_NOT_SUPPORTED;
|
---|
4769 | #endif
|
---|
4770 | }
|
---|
4771 |
|
---|
4772 |
|
---|
4773 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_LUMA_KEY VBSVGA_3D_CMD_BASE + 28 */
|
---|
4774 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamLumaKey(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamLumaKey const *pCmd, uint32_t cbCmd)
|
---|
4775 | {
|
---|
4776 | #ifdef VMSVGA3D_DX
|
---|
4777 | //DEBUG_BREAKPOINT_TEST();
|
---|
4778 | RT_NOREF(cbCmd);
|
---|
4779 | return vmsvga3dVBDXVideoProcessorSetStreamLumaKey(pThisCC, idDXContext, pCmd);
|
---|
4780 | #else
|
---|
4781 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4782 | return VERR_NOT_SUPPORTED;
|
---|
4783 | #endif
|
---|
4784 | }
|
---|
4785 |
|
---|
4786 |
|
---|
4787 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_STEREO_FORMAT VBSVGA_3D_CMD_BASE + 29 */
|
---|
4788 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamStereoFormat(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamStereoFormat const *pCmd, uint32_t cbCmd)
|
---|
4789 | {
|
---|
4790 | #ifdef VMSVGA3D_DX
|
---|
4791 | //DEBUG_BREAKPOINT_TEST();
|
---|
4792 | RT_NOREF(cbCmd);
|
---|
4793 | return vmsvga3dVBDXVideoProcessorSetStreamStereoFormat(pThisCC, idDXContext, pCmd);
|
---|
4794 | #else
|
---|
4795 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4796 | return VERR_NOT_SUPPORTED;
|
---|
4797 | #endif
|
---|
4798 | }
|
---|
4799 |
|
---|
4800 |
|
---|
4801 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_AUTO_PROCESSING_MODE VBSVGA_3D_CMD_BASE + 30 */
|
---|
4802 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamAutoProcessingMode(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamAutoProcessingMode const *pCmd, uint32_t cbCmd)
|
---|
4803 | {
|
---|
4804 | #ifdef VMSVGA3D_DX
|
---|
4805 | //DEBUG_BREAKPOINT_TEST();
|
---|
4806 | RT_NOREF(cbCmd);
|
---|
4807 | return vmsvga3dVBDXVideoProcessorSetStreamAutoProcessingMode(pThisCC, idDXContext, pCmd);
|
---|
4808 | #else
|
---|
4809 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4810 | return VERR_NOT_SUPPORTED;
|
---|
4811 | #endif
|
---|
4812 | }
|
---|
4813 |
|
---|
4814 |
|
---|
4815 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_FILTER VBSVGA_3D_CMD_BASE + 31 */
|
---|
4816 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamFilter(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamFilter const *pCmd, uint32_t cbCmd)
|
---|
4817 | {
|
---|
4818 | #ifdef VMSVGA3D_DX
|
---|
4819 | //DEBUG_BREAKPOINT_TEST();
|
---|
4820 | RT_NOREF(cbCmd);
|
---|
4821 | return vmsvga3dVBDXVideoProcessorSetStreamFilter(pThisCC, idDXContext, pCmd);
|
---|
4822 | #else
|
---|
4823 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4824 | return VERR_NOT_SUPPORTED;
|
---|
4825 | #endif
|
---|
4826 | }
|
---|
4827 |
|
---|
4828 |
|
---|
4829 | /* VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_ROTATION VBSVGA_3D_CMD_BASE + 32 */
|
---|
4830 | static int vmsvga3dVBCmdDXVideoProcessorSetStreamRotation(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXVideoProcessorSetStreamRotation const *pCmd, uint32_t cbCmd)
|
---|
4831 | {
|
---|
4832 | #ifdef VMSVGA3D_DX
|
---|
4833 | //DEBUG_BREAKPOINT_TEST();
|
---|
4834 | RT_NOREF(cbCmd);
|
---|
4835 | return vmsvga3dVBDXVideoProcessorSetStreamRotation(pThisCC, idDXContext, pCmd);
|
---|
4836 | #else
|
---|
4837 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4838 | return VERR_NOT_SUPPORTED;
|
---|
4839 | #endif
|
---|
4840 | }
|
---|
4841 |
|
---|
4842 |
|
---|
4843 | /* VBSVGA_3D_CMD_DX_GET_VIDEO_CAPABILITY VBSVGA_3D_CMD_BASE + 33 */
|
---|
4844 | static int vmsvga3dVBCmdDXGetVideoCapability(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXGetVideoCapability const *pCmd, uint32_t cbCmd)
|
---|
4845 | {
|
---|
4846 | #ifdef VMSVGA3D_DX
|
---|
4847 | //DEBUG_BREAKPOINT_TEST();
|
---|
4848 | RT_NOREF(cbCmd);
|
---|
4849 | return vmsvga3dVBDXGetVideoCapability(pThisCC, idDXContext, pCmd);
|
---|
4850 | #else
|
---|
4851 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4852 | return VERR_NOT_SUPPORTED;
|
---|
4853 | #endif
|
---|
4854 | }
|
---|
4855 |
|
---|
4856 |
|
---|
4857 | /* VBSVGA_3D_CMD_DX_CLEAR_RTV VBSVGA_3D_CMD_BASE + 34 */
|
---|
4858 | static int vmsvga3dVBCmdDXClearRTV(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXClearView *pCmd, uint32_t cbCmd)
|
---|
4859 | {
|
---|
4860 | #ifdef VMSVGA3D_DX
|
---|
4861 | //DEBUG_BREAKPOINT_TEST();
|
---|
4862 | SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1];
|
---|
4863 | uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
|
---|
4864 | return vmsvga3dVBDXClearRTV(pThisCC, idDXContext, pCmd, cRect, cRect ? paRect : NULL);
|
---|
4865 | #else
|
---|
4866 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4867 | return VERR_NOT_SUPPORTED;
|
---|
4868 | #endif
|
---|
4869 | }
|
---|
4870 |
|
---|
4871 |
|
---|
4872 | /* VBSVGA_3D_CMD_DX_CLEAR_UAV VBSVGA_3D_CMD_BASE + 35 */
|
---|
4873 | static int vmsvga3dVBCmdDXClearUAV(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXClearView *pCmd, uint32_t cbCmd)
|
---|
4874 | {
|
---|
4875 | #ifdef VMSVGA3D_DX
|
---|
4876 | //DEBUG_BREAKPOINT_TEST();
|
---|
4877 | SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1];
|
---|
4878 | uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
|
---|
4879 | return vmsvga3dVBDXClearUAV(pThisCC, idDXContext, pCmd, cRect, cRect ? paRect : NULL);
|
---|
4880 | #else
|
---|
4881 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4882 | return VERR_NOT_SUPPORTED;
|
---|
4883 | #endif
|
---|
4884 | }
|
---|
4885 |
|
---|
4886 |
|
---|
4887 | /* VBSVGA_3D_CMD_DX_CLEAR_VDOV VBSVGA_3D_CMD_BASE + 36 */
|
---|
4888 | static int vmsvga3dVBCmdDXClearVDOV(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXClearView *pCmd, uint32_t cbCmd)
|
---|
4889 | {
|
---|
4890 | #ifdef VMSVGA3D_DX
|
---|
4891 | //DEBUG_BREAKPOINT_TEST();
|
---|
4892 | SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1];
|
---|
4893 | uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
|
---|
4894 | return vmsvga3dVBDXClearVDOV(pThisCC, idDXContext, pCmd, cRect, cRect ? paRect : NULL);
|
---|
4895 | #else
|
---|
4896 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4897 | return VERR_NOT_SUPPORTED;
|
---|
4898 | #endif
|
---|
4899 | }
|
---|
4900 |
|
---|
4901 |
|
---|
4902 | /* VBSVGA_3D_CMD_DX_CLEAR_VPIV VBSVGA_3D_CMD_BASE + 37 */
|
---|
4903 | static int vmsvga3dVBCmdDXClearVPIV(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXClearView *pCmd, uint32_t cbCmd)
|
---|
4904 | {
|
---|
4905 | #ifdef VMSVGA3D_DX
|
---|
4906 | //DEBUG_BREAKPOINT_TEST();
|
---|
4907 | SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1];
|
---|
4908 | uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
|
---|
4909 | return vmsvga3dVBDXClearVPIV(pThisCC, idDXContext, pCmd, cRect, cRect ? paRect : NULL);
|
---|
4910 | #else
|
---|
4911 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4912 | return VERR_NOT_SUPPORTED;
|
---|
4913 | #endif
|
---|
4914 | }
|
---|
4915 |
|
---|
4916 |
|
---|
4917 | /* VBSVGA_3D_CMD_DX_CLEAR_VPOV VBSVGA_3D_CMD_BASE + 38 */
|
---|
4918 | static int vmsvga3dVBCmdDXClearVPOV(PVGASTATECC pThisCC, uint32_t idDXContext, VBSVGA3dCmdDXClearView *pCmd, uint32_t cbCmd)
|
---|
4919 | {
|
---|
4920 | #ifdef VMSVGA3D_DX
|
---|
4921 | //DEBUG_BREAKPOINT_TEST();
|
---|
4922 | SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1];
|
---|
4923 | uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
|
---|
4924 | return vmsvga3dVBDXClearVPOV(pThisCC, idDXContext, pCmd, cRect, cRect ? paRect : NULL);
|
---|
4925 | #else
|
---|
4926 | RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
|
---|
4927 | return VERR_NOT_SUPPORTED;
|
---|
4928 | #endif
|
---|
4929 | }
|
---|
4930 |
|
---|
4931 |
|
---|
4932 | /** @def VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK
|
---|
4933 | * Check that the 3D command has at least a_cbMin of payload bytes after the
|
---|
4934 | * header. Will break out of the switch if it doesn't.
|
---|
4935 | */
|
---|
4936 | # define VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(a_cbMin) \
|
---|
4937 | if (1) { \
|
---|
4938 | AssertMsgBreak(cbCmd >= (a_cbMin), ("size=%#x a_cbMin=%#zx\n", cbCmd, (size_t)(a_cbMin))); \
|
---|
4939 | RT_UNTRUSTED_VALIDATED_FENCE(); \
|
---|
4940 | } else do {} while (0)
|
---|
4941 |
|
---|
4942 | # define VMSVGA_3D_CMD_NOTIMPL() \
|
---|
4943 | if (1) { \
|
---|
4944 | AssertMsgFailed(("Not implemented %d %s\n", enmCmdId, vmsvgaR3FifoCmdToString(enmCmdId))); \
|
---|
4945 | } else do {} while (0)
|
---|
4946 |
|
---|
4947 | /** SVGA_3D_CMD_* handler.
|
---|
4948 | * This function parses the command and calls the corresponding command handler.
|
---|
4949 | *
|
---|
4950 | * @param pThis The shared VGA/VMSVGA state.
|
---|
4951 | * @param pThisCC The VGA/VMSVGA state for the current context.
|
---|
4952 | * @param idDXContext VGPU10 DX context of the commands or SVGA3D_INVALID_ID if they are not for a specific context.
|
---|
4953 | * @param enmCmdId SVGA_3D_CMD_* command identifier.
|
---|
4954 | * @param cbCmd Size of the command in bytes.
|
---|
4955 | * @param pvCmd Pointer to the command.
|
---|
4956 | * @returns VBox status code if an error was detected parsing a command.
|
---|
4957 | */
|
---|
4958 | int vmsvgaR3Process3dCmd(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDXContext, SVGAFifo3dCmdId enmCmdId, uint32_t cbCmd, void const *pvCmd)
|
---|
4959 | {
|
---|
4960 | int rcParse = VINF_SUCCESS;
|
---|
4961 | PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
|
---|
4962 |
|
---|
4963 | switch (enmCmdId)
|
---|
4964 | {
|
---|
4965 | case SVGA_3D_CMD_SURFACE_DEFINE:
|
---|
4966 | {
|
---|
4967 | SVGA3dCmdDefineSurface *pCmd = (SVGA3dCmdDefineSurface *)pvCmd;
|
---|
4968 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
4969 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dSurfaceDefine);
|
---|
4970 |
|
---|
4971 | SVGA3dCmdDefineSurface_v2 cmd;
|
---|
4972 | cmd.sid = pCmd->sid;
|
---|
4973 | cmd.surfaceFlags = pCmd->surfaceFlags;
|
---|
4974 | cmd.format = pCmd->format;
|
---|
4975 | memcpy(cmd.face, pCmd->face, sizeof(cmd.face));
|
---|
4976 | cmd.multisampleCount = 0;
|
---|
4977 | cmd.autogenFilter = SVGA3D_TEX_FILTER_NONE;
|
---|
4978 |
|
---|
4979 | uint32_t const cMipLevelSizes = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dSize);
|
---|
4980 | vmsvga3dCmdDefineSurface(pThisCC, &cmd, cMipLevelSizes, (SVGA3dSize *)(pCmd + 1));
|
---|
4981 | # ifdef DEBUG_GMR_ACCESS
|
---|
4982 | VMR3ReqCallWaitU(PDMDevHlpGetUVM(pDevIns), VMCPUID_ANY, (PFNRT)vmsvgaR3ResetGmrHandlers, 1, pThis);
|
---|
4983 | # endif
|
---|
4984 | break;
|
---|
4985 | }
|
---|
4986 |
|
---|
4987 | case SVGA_3D_CMD_SURFACE_DEFINE_V2:
|
---|
4988 | {
|
---|
4989 | SVGA3dCmdDefineSurface_v2 *pCmd = (SVGA3dCmdDefineSurface_v2 *)pvCmd;
|
---|
4990 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
4991 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dSurfaceDefineV2);
|
---|
4992 |
|
---|
4993 | uint32_t const cMipLevelSizes = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dSize);
|
---|
4994 | vmsvga3dCmdDefineSurface(pThisCC, pCmd, cMipLevelSizes, (SVGA3dSize *)(pCmd + 1));
|
---|
4995 | # ifdef DEBUG_GMR_ACCESS
|
---|
4996 | VMR3ReqCallWaitU(PDMDevHlpGetUVM(pDevIns), VMCPUID_ANY, (PFNRT)vmsvgaR3ResetGmrHandlers, 1, pThis);
|
---|
4997 | # endif
|
---|
4998 | break;
|
---|
4999 | }
|
---|
5000 |
|
---|
5001 | case SVGA_3D_CMD_SURFACE_DESTROY:
|
---|
5002 | {
|
---|
5003 | SVGA3dCmdDestroySurface *pCmd = (SVGA3dCmdDestroySurface *)pvCmd;
|
---|
5004 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5005 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dSurfaceDestroy);
|
---|
5006 |
|
---|
5007 | vmsvga3dSurfaceDestroy(pThisCC, pCmd->sid);
|
---|
5008 | break;
|
---|
5009 | }
|
---|
5010 |
|
---|
5011 | case SVGA_3D_CMD_SURFACE_COPY:
|
---|
5012 | {
|
---|
5013 | SVGA3dCmdSurfaceCopy *pCmd = (SVGA3dCmdSurfaceCopy *)pvCmd;
|
---|
5014 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5015 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dSurfaceCopy);
|
---|
5016 |
|
---|
5017 | uint32_t const cCopyBoxes = (cbCmd - sizeof(pCmd)) / sizeof(SVGA3dCopyBox);
|
---|
5018 | vmsvga3dSurfaceCopy(pThisCC, pCmd->dest, pCmd->src, cCopyBoxes, (SVGA3dCopyBox *)(pCmd + 1));
|
---|
5019 | break;
|
---|
5020 | }
|
---|
5021 |
|
---|
5022 | case SVGA_3D_CMD_SURFACE_STRETCHBLT:
|
---|
5023 | {
|
---|
5024 | SVGA3dCmdSurfaceStretchBlt *pCmd = (SVGA3dCmdSurfaceStretchBlt *)pvCmd;
|
---|
5025 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5026 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dSurfaceStretchBlt);
|
---|
5027 |
|
---|
5028 | vmsvga3dSurfaceStretchBlt(pThis, pThisCC, &pCmd->dest, &pCmd->boxDest,
|
---|
5029 | &pCmd->src, &pCmd->boxSrc, pCmd->mode);
|
---|
5030 | break;
|
---|
5031 | }
|
---|
5032 |
|
---|
5033 | case SVGA_3D_CMD_SURFACE_DMA:
|
---|
5034 | {
|
---|
5035 | SVGA3dCmdSurfaceDMA *pCmd = (SVGA3dCmdSurfaceDMA *)pvCmd;
|
---|
5036 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5037 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dSurfaceDma);
|
---|
5038 |
|
---|
5039 | uint64_t u64NanoTS = 0;
|
---|
5040 | if (LogRelIs3Enabled())
|
---|
5041 | u64NanoTS = RTTimeNanoTS();
|
---|
5042 | uint32_t const cCopyBoxes = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dCopyBox);
|
---|
5043 | STAM_PROFILE_START(&pSvgaR3State->StatR3Cmd3dSurfaceDmaProf, a);
|
---|
5044 | vmsvga3dSurfaceDMA(pThis, pThisCC, pCmd->guest, pCmd->host, pCmd->transfer,
|
---|
5045 | cCopyBoxes, (SVGA3dCopyBox *)(pCmd + 1));
|
---|
5046 | STAM_PROFILE_STOP(&pSvgaR3State->StatR3Cmd3dSurfaceDmaProf, a);
|
---|
5047 | if (LogRelIs3Enabled())
|
---|
5048 | {
|
---|
5049 | if (cCopyBoxes)
|
---|
5050 | {
|
---|
5051 | SVGA3dCopyBox *pFirstBox = (SVGA3dCopyBox *)(pCmd + 1);
|
---|
5052 | LogRel3(("VMSVGA: SURFACE_DMA: %d us %d boxes %d,%d %dx%d%s\n",
|
---|
5053 | (RTTimeNanoTS() - u64NanoTS) / 1000ULL, cCopyBoxes,
|
---|
5054 | pFirstBox->x, pFirstBox->y, pFirstBox->w, pFirstBox->h,
|
---|
5055 | pCmd->transfer == SVGA3D_READ_HOST_VRAM ? " readback!!!" : ""));
|
---|
5056 | }
|
---|
5057 | }
|
---|
5058 | break;
|
---|
5059 | }
|
---|
5060 |
|
---|
5061 | case SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN:
|
---|
5062 | {
|
---|
5063 | SVGA3dCmdBlitSurfaceToScreen *pCmd = (SVGA3dCmdBlitSurfaceToScreen *)pvCmd;
|
---|
5064 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5065 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dSurfaceScreen);
|
---|
5066 |
|
---|
5067 | static uint64_t u64FrameStartNanoTS = 0;
|
---|
5068 | static uint64_t u64ElapsedPerSecNano = 0;
|
---|
5069 | static int cFrames = 0;
|
---|
5070 | uint64_t u64NanoTS = 0;
|
---|
5071 | if (LogRelIs3Enabled())
|
---|
5072 | u64NanoTS = RTTimeNanoTS();
|
---|
5073 | uint32_t const cRects = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
|
---|
5074 | STAM_REL_PROFILE_START(&pSvgaR3State->StatR3Cmd3dBlitSurfaceToScreenProf, a);
|
---|
5075 | vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, pCmd->destScreenId, pCmd->destRect, pCmd->srcImage,
|
---|
5076 | pCmd->srcRect, cRects, (SVGASignedRect *)(pCmd + 1));
|
---|
5077 | STAM_REL_PROFILE_STOP(&pSvgaR3State->StatR3Cmd3dBlitSurfaceToScreenProf, a);
|
---|
5078 | if (LogRelIs3Enabled())
|
---|
5079 | {
|
---|
5080 | uint64_t u64ElapsedNano = RTTimeNanoTS() - u64NanoTS;
|
---|
5081 | u64ElapsedPerSecNano += u64ElapsedNano;
|
---|
5082 |
|
---|
5083 | SVGASignedRect *pFirstRect = cRects ? (SVGASignedRect *)(pCmd + 1) : &pCmd->destRect;
|
---|
5084 | LogRel3(("VMSVGA: SURFACE_TO_SCREEN: %d us %d rects %d,%d %dx%d\n",
|
---|
5085 | (u64ElapsedNano) / 1000ULL, cRects,
|
---|
5086 | pFirstRect->left, pFirstRect->top,
|
---|
5087 | pFirstRect->right - pFirstRect->left, pFirstRect->bottom - pFirstRect->top));
|
---|
5088 |
|
---|
5089 | ++cFrames;
|
---|
5090 | if (u64NanoTS - u64FrameStartNanoTS >= UINT64_C(1000000000))
|
---|
5091 | {
|
---|
5092 | LogRel3(("VMSVGA: SURFACE_TO_SCREEN: FPS %d, elapsed %llu us\n",
|
---|
5093 | cFrames, u64ElapsedPerSecNano / 1000ULL));
|
---|
5094 | u64FrameStartNanoTS = u64NanoTS;
|
---|
5095 | cFrames = 0;
|
---|
5096 | u64ElapsedPerSecNano = 0;
|
---|
5097 | }
|
---|
5098 | }
|
---|
5099 | break;
|
---|
5100 | }
|
---|
5101 |
|
---|
5102 | case SVGA_3D_CMD_CONTEXT_DEFINE:
|
---|
5103 | {
|
---|
5104 | SVGA3dCmdDefineContext *pCmd = (SVGA3dCmdDefineContext *)pvCmd;
|
---|
5105 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5106 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dContextDefine);
|
---|
5107 |
|
---|
5108 | vmsvga3dContextDefine(pThisCC, pCmd->cid);
|
---|
5109 | break;
|
---|
5110 | }
|
---|
5111 |
|
---|
5112 | case SVGA_3D_CMD_CONTEXT_DESTROY:
|
---|
5113 | {
|
---|
5114 | SVGA3dCmdDestroyContext *pCmd = (SVGA3dCmdDestroyContext *)pvCmd;
|
---|
5115 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5116 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dContextDestroy);
|
---|
5117 |
|
---|
5118 | vmsvga3dContextDestroy(pThisCC, pCmd->cid);
|
---|
5119 | break;
|
---|
5120 | }
|
---|
5121 |
|
---|
5122 | case SVGA_3D_CMD_SETTRANSFORM:
|
---|
5123 | {
|
---|
5124 | SVGA3dCmdSetTransform *pCmd = (SVGA3dCmdSetTransform *)pvCmd;
|
---|
5125 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5126 | STAM_REL_COUNTER_INC(&pSvgaR3State->StatR3Cmd3dSetTransform);
|
---|
5127 |
|
---|
5128 | vmsvga3dSetTransform(pThisCC, pCmd->cid, pCmd->type, pCmd->matrix);
|
---|
5129 | break;
|
---|
5130 | }
|
---|
5131 |
|
---|
5132 | case SVGA_3D_CMD_SETZRANGE:
|
---|
5133 | {
|
---|
5134 | SVGA3dCmdSetZRange *pCmd = (SVGA3dCmdSetZRange *)pvCmd;
|
---|
5135 | VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
|
---|
5136 | STAM_REL_COUNTER_INC |
---|