VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevIchHdaCodec.cpp@ 60404

Last change on this file since 60404 was 60353, checked in by vboxsync, 8 years ago

Audio: Added HDA support for newer Linux guests; more work on surround support (disabled by default).
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File size: 129.7 KB
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1/* $Id: DevIchHdaCodec.cpp 60353 2016-04-06 11:54:39Z vboxsync $ */
2/** @file
3 * DevIchHdaCodec - VBox ICH Intel HD Audio Codec.
4 *
5 * Implemented against "Intel I/O Controller Hub 6 (ICH6) High Definition
6 * Audio / AC '97 - Programmer's Reference Manual (PRM)", document number
7 * 302349-003.
8 */
9
10/*
11 * Copyright (C) 2006-2016 Oracle Corporation
12 *
13 * This file is part of VirtualBox Open Source Edition (OSE), as
14 * available from http://www.virtualbox.org. This file is free software;
15 * you can redistribute it and/or modify it under the terms of the GNU
16 * General Public License (GPL) as published by the Free Software
17 * Foundation, in version 2 as it comes in the "COPYING" file of the
18 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
19 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
20 */
21
22
23/*********************************************************************************************************************************
24* Header Files *
25*********************************************************************************************************************************/
26#define LOG_GROUP LOG_GROUP_DEV_HDA_CODEC
27#include <VBox/vmm/pdmdev.h>
28#include <VBox/vmm/pdmaudioifs.h>
29#include <iprt/assert.h>
30#include <iprt/uuid.h>
31#include <iprt/string.h>
32#include <iprt/mem.h>
33#include <iprt/asm.h>
34#include <iprt/cpp/utils.h>
35
36#include "VBoxDD.h"
37#include "DevIchHdaCodec.h"
38#include "DevIchHdaCommon.h"
39#include "AudioMixer.h"
40
41
42/*********************************************************************************************************************************
43* Defined Constants And Macros *
44*********************************************************************************************************************************/
45/* PRM 5.3.1 */
46/** Codec address mask. */
47#define CODEC_CAD_MASK 0xF0000000
48/** Codec address shift. */
49#define CODEC_CAD_SHIFT 28
50#define CODEC_DIRECT_MASK RT_BIT(27)
51/** Node ID mask. */
52#define CODEC_NID_MASK 0x07F00000
53/** Node ID shift. */
54#define CODEC_NID_SHIFT 20
55#define CODEC_VERBDATA_MASK 0x000FFFFF
56#define CODEC_VERB_4BIT_CMD 0x000FFFF0
57#define CODEC_VERB_4BIT_DATA 0x0000000F
58#define CODEC_VERB_8BIT_CMD 0x000FFF00
59#define CODEC_VERB_8BIT_DATA 0x000000FF
60#define CODEC_VERB_16BIT_CMD 0x000F0000
61#define CODEC_VERB_16BIT_DATA 0x0000FFFF
62
63#define CODEC_CAD(cmd) (((cmd) & CODEC_CAD_MASK) >> CODEC_CAD_SHIFT)
64#define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)
65#define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)
66#define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)
67#define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))
68#define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))
69#define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))
70#define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))
71#define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA)
72#define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA)
73#define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA)
74
75#define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15)
76#define CODEC_VERB_GET_AMP_SIDE RT_BIT(13)
77#define CODEC_VERB_GET_AMP_INDEX 0x7
78
79/* HDA spec 7.3.3.7 NoteA */
80#define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)
81#define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)
82#define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))
83
84/* HDA spec 7.3.3.7 NoteC */
85#define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15)
86#define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14)
87#define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13)
88#define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12)
89#define CODEC_VERB_SET_AMP_INDEX (0x7 << 8)
90#define CODEC_VERB_SET_AMP_MUTE RT_BIT(7)
91/** Note: 7-bit value [6:0]. */
92#define CODEC_VERB_SET_AMP_GAIN 0x7F
93
94#define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0)
95#define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0)
96#define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0)
97#define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0)
98#define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7)
99#define CODEC_SET_AMP_MUTE(cmd) ((cmd) & CODEC_VERB_SET_AMP_MUTE)
100#define CODEC_SET_AMP_GAIN(cmd) ((cmd) & CODEC_VERB_SET_AMP_GAIN)
101
102/* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */
103/* VendorID (7.3.4.1) */
104#define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))
105#define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF)
106#define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF)
107
108/** RevisionID (7.3.4.2). */
109#define CODEC_MAKE_F00_02(majRev, minRev, venFix, venProg, stepFix, stepProg) \
110 ( (((majRev) & 0xF) << 20) \
111 | (((minRev) & 0xF) << 16) \
112 | (((venFix) & 0xF) << 12) \
113 | (((venProg) & 0xF) << 8) \
114 | (((stepFix) & 0xF) << 4) \
115 | ((stepProg) & 0xF))
116
117/** Subordinate node count (7.3.4.3). */
118#define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF))
119#define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF)
120#define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF)
121/*
122 * Function Group Type (7.3.4.4)
123 * 0 & [0x3-0x7f] are reserved types
124 * [0x80 - 0xff] are vendor defined function groups
125 */
126#define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType))
127#define CODEC_F00_05_UNSOL RT_BIT(8)
128#define CODEC_F00_05_AFG (0x1)
129#define CODEC_F00_05_MFG (0x2)
130#define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8))
131#define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff)
132/* Audio Function Group capabilities (7.3.4.5). */
133#define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF))
134#define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16)
135
136/* Converter Stream, Channel (7.3.3.11). */
137#define CODEC_F00_06_GET_STREAM_ID(cmd) (((cmd) >> 4) & 0x0F)
138#define CODEC_F00_06_GET_CHANNEL_ID(cmd) (((cmd) & 0x0F))
139
140/* Widget Capabilities (7.3.4.6). */
141#define CODEC_MAKE_F00_09(type, delay, chan_ext) \
142 ( (((type) & 0xF) << 20) \
143 | (((delay) & 0xF) << 16) \
144 | (((chan_ext) & 0xF) << 13))
145/* note: types 0x8-0xe are reserved */
146#define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0)
147#define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1)
148#define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2)
149#define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3)
150#define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4)
151#define CODEC_F00_09_TYPE_POWER_WIDGET (0x5)
152#define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6)
153#define CODEC_F00_09_TYPE_BEEP_GEN (0x7)
154#define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF)
155
156#define CODEC_F00_09_CAP_CP RT_BIT(12)
157#define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11)
158#define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10)
159#define CODEC_F00_09_CAP_DIGITAL RT_BIT(9)
160#define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8)
161#define CODEC_F00_09_CAP_UNSOL RT_BIT(7)
162#define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6)
163#define CODEC_F00_09_CAP_STRIPE RT_BIT(5)
164#define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4)
165#define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3)
166#define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2)
167#define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1)
168#define CODEC_F00_09_CAP_STEREO RT_BIT(0)
169
170#define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF)
171
172#define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12))
173#define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11))
174#define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10))
175#define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9))
176#define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8))
177#define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7))
178#define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6))
179#define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5))
180#define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4))
181#define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3))
182#define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2))
183#define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1))
184#define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0))
185
186/* Supported PCM size, rates (7.3.4.7) */
187#define CODEC_F00_0A_32_BIT RT_BIT(19)
188#define CODEC_F00_0A_24_BIT RT_BIT(18)
189#define CODEC_F00_0A_16_BIT RT_BIT(17)
190#define CODEC_F00_0A_8_BIT RT_BIT(16)
191
192#define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11)
193#define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10)
194#define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9)
195#define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8)
196#define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7)
197#define CODEC_F00_0A_48KHZ RT_BIT(6)
198#define CODEC_F00_0A_44_1KHZ RT_BIT(5)
199/* 2/3 * 48kHz */
200#define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4)
201/* 1/2 * 44.1kHz */
202#define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3)
203/* 1/3 * 48kHz */
204#define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2)
205/* 1/4 * 44.1kHz */
206#define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1)
207/* 1/6 * 48kHz */
208#define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0)
209
210/* Supported streams formats (7.3.4.8) */
211#define CODEC_F00_0B_AC3 RT_BIT(2)
212#define CODEC_F00_0B_FLOAT32 RT_BIT(1)
213#define CODEC_F00_0B_PCM RT_BIT(0)
214
215/* Pin Capabilities (7.3.4.9)*/
216#define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8)
217#define CODEC_F00_0C_CAP_HBR RT_BIT(27)
218#define CODEC_F00_0C_CAP_DP RT_BIT(24)
219#define CODEC_F00_0C_CAP_EAPD RT_BIT(16)
220#define CODEC_F00_0C_CAP_HDMI RT_BIT(7)
221#define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6)
222#define CODEC_F00_0C_CAP_INPUT RT_BIT(5)
223#define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4)
224#define CODEC_F00_0C_CAP_HEADPHONE_AMP RT_BIT(3)
225#define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2)
226#define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1)
227#define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0)
228
229#define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27))
230#define CODEC_F00_0C_IS_CAP_DP(f00_0c) ((f00_0c) & RT_BIT(24))
231#define CODEC_F00_0C_IS_CAP_EAPD(f00_0c) ((f00_0c) & RT_BIT(16))
232#define CODEC_F00_0C_IS_CAP_HDMI(f00_0c) ((f00_0c) & RT_BIT(7))
233#define CODEC_F00_0C_IS_CAP_BALANCED_IO(f00_0c) ((f00_0c) & RT_BIT(6))
234#define CODEC_F00_0C_IS_CAP_INPUT(f00_0c) ((f00_0c) & RT_BIT(5))
235#define CODEC_F00_0C_IS_CAP_OUTPUT(f00_0c) ((f00_0c) & RT_BIT(4))
236#define CODEC_F00_0C_IS_CAP_HP(f00_0c) ((f00_0c) & RT_BIT(3))
237#define CODEC_F00_0C_IS_CAP_PRESENSE_DETECT(f00_0c) ((f00_0c) & RT_BIT(2))
238#define CODEC_F00_0C_IS_CAP_TRIGGER_REQUIRED(f00_0c) ((f00_0c) & RT_BIT(1))
239#define CODEC_F00_0C_IS_CAP_IMPENDANCE_SENSE(f00_0c) ((f00_0c) & RT_BIT(0))
240
241/* Input Amplifier capabilities (7.3.4.10). */
242#define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \
243 ( (((mute_cap) & 0x1) << 31) \
244 | (((step_size) & 0xFF) << 16) \
245 | (((num_steps) & 0xFF) << 8) \
246 | ((offset) & 0xFF))
247
248#define CODEC_F00_0D_CAP_MUTE RT_BIT(7)
249
250#define CODEC_F00_0D_IS_CAP_MUTE(f00_0d) ( ( f00_0d) & RT_BIT(31))
251#define CODEC_F00_0D_STEP_SIZE(f00_0d) ((( f00_0d) & (0x7F << 16)) >> 16)
252#define CODEC_F00_0D_NUM_STEPS(f00_0d) ((((f00_0d) & (0x7F << 8)) >> 8) + 1)
253#define CODEC_F00_0D_OFFSET(f00_0d) ( (f00_0d) & 0x7F)
254
255/** Indicates that the amplifier can be muted. */
256#define CODEC_AMP_CAP_MUTE 0x1
257/** The amplifier's maximum number of steps. We want
258 * a ~90dB dynamic range, so 64 steps with 1.25dB each
259 * should do the trick.
260 *
261 * As we want to map our range to [0..128] values we can avoid
262 * multiplication and simply doing a shift later.
263 *
264 * Produces -96dB to +0dB.
265 * "0" indicates a step of 0.25dB, "127" indicates a step of 32dB.
266 */
267#define CODEC_AMP_NUM_STEPS 0x7F
268/** The initial gain offset (and when doing a node reset). */
269#define CODEC_AMP_OFF_INITIAL 0x40
270/** The amplifier's gain step size. */
271#define CODEC_AMP_STEP_SIZE 0x2
272
273/* Output Amplifier capabilities (7.3.4.10) */
274#define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D
275
276#define CODEC_F00_12_IS_CAP_MUTE(f00_12) CODEC_F00_0D_IS_CAP_MUTE(f00_12)
277#define CODEC_F00_12_STEP_SIZE(f00_12) CODEC_F00_0D_STEP_SIZE(f00_12)
278#define CODEC_F00_12_NUM_STEPS(f00_12) CODEC_F00_0D_NUM_STEPS(f00_12)
279#define CODEC_F00_12_OFFSET(f00_12) CODEC_F00_0D_OFFSET(f00_12)
280
281/* Connection list lenght (7.3.4.11). */
282#define CODEC_MAKE_F00_0E(long_form, length) \
283 ( (((long_form) & 0x1) << 7) \
284 | ((length) & 0x7F))
285/* Indicates short-form NIDs. */
286#define CODEC_F00_0E_LIST_NID_SHORT 0
287/* Indicates long-form NIDs. */
288#define CODEC_F00_0E_LIST_NID_LONG 1
289#define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7))
290#define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F)
291/* Supported Power States (7.3.4.12) */
292#define CODEC_F00_0F_EPSS RT_BIT(31)
293#define CODEC_F00_0F_CLKSTOP RT_BIT(30)
294#define CODEC_F00_0F_S3D3 RT_BIT(29)
295#define CODEC_F00_0F_D3COLD RT_BIT(4)
296#define CODEC_F00_0F_D3 RT_BIT(3)
297#define CODEC_F00_0F_D2 RT_BIT(2)
298#define CODEC_F00_0F_D1 RT_BIT(1)
299#define CODEC_F00_0F_D0 RT_BIT(0)
300
301/* Processing capabilities 7.3.4.13 */
302#define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1))
303#define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8)
304#define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1)
305
306/* GPIO count (7.3.4.14). */
307#define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \
308 ( (((wake) & 0x1) << 31) \
309 | (((unsol) & 0x1) << 30) \
310 | (((numgpi) & 0xFF) << 16) \
311 | (((numgpo) & 0xFF) << 8) \
312 | ((numgpio) & 0xFF))
313
314/* Processing States (7.3.3.4). */
315#define CODEC_F03_OFF (0)
316#define CODEC_F03_ON RT_BIT(0)
317#define CODEC_F03_BENING RT_BIT(1)
318/* Power States (7.3.3.10). */
319#define CODEC_MAKE_F05(reset, stopok, error, act, set) \
320 ( (((reset) & 0x1) << 10) \
321 | (((stopok) & 0x1) << 9) \
322 | (((error) & 0x1) << 8) \
323 | (((act) & 0xF) << 4) \
324 | ((set) & 0xF))
325#define CODEC_F05_D3COLD (4)
326#define CODEC_F05_D3 (3)
327#define CODEC_F05_D2 (2)
328#define CODEC_F05_D1 (1)
329#define CODEC_F05_D0 (0)
330
331#define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)
332#define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)
333#define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)
334#define CODEC_F05_ACT(value) (((value) & 0xF0) >> 4)
335#define CODEC_F05_SET(value) (((value) & 0xF))
336
337#define CODEC_F05_GE(p0, p1) ((p0) <= (p1))
338#define CODEC_F05_LE(p0, p1) ((p0) >= (p1))
339
340/* Converter Stream, Channel (7.3.3.11). */
341#define CODEC_MAKE_F06(stream, channel) \
342 ( (((stream) & 0xF) << 4) \
343 | ((channel) & 0xF))
344#define CODEC_F06_STREAM(value) ((value) & 0xF0)
345#define CODEC_F06_CHANNEL(value) ((value) & 0xF)
346
347/* Pin Widged Control (7.3.3.13). */
348#define CODEC_F07_VREF_HIZ (0)
349#define CODEC_F07_VREF_50 (0x1)
350#define CODEC_F07_VREF_GROUND (0x2)
351#define CODEC_F07_VREF_80 (0x4)
352#define CODEC_F07_VREF_100 (0x5)
353#define CODEC_F07_IN_ENABLE RT_BIT(5)
354#define CODEC_F07_OUT_ENABLE RT_BIT(6)
355#define CODEC_F07_OUT_H_ENABLE RT_BIT(7)
356
357/* Volume Knob Control (7.3.3.29). */
358#define CODEC_F0F_IS_DIRECT RT_BIT(7)
359#define CODEC_F0F_VOLUME (0x7F)
360
361/* Unsolicited enabled (7.3.3.14). */
362#define CODEC_MAKE_F08(enable, tag) ((((enable) & 1) << 7) | ((tag) & 0x3F))
363
364/* Converter formats (7.3.3.8) and (3.7.1). */
365/* This is the same format as SDnFMT. */
366#define CODEC_MAKE_A HDA_SDFMT_MAKE
367
368#define CODEC_A_TYPE HDA_SDFMT_TYPE
369#define CODEC_A_TYPE_PCM HDA_SDFMT_TYPE_PCM
370#define CODEC_A_TYPE_NON_PCM HDA_SDFMT_TYPE_NON_PCM
371
372#define CODEC_A_BASE HDA_SDFMT_BASE
373#define CODEC_A_BASE_48KHZ HDA_SDFMT_BASE_48KHZ
374#define CODEC_A_BASE_44KHZ HDA_SDFMT_BASE_44KHZ
375
376/* Pin Sense (7.3.3.15). */
377#define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \
378( (((fPresent) & 0x1) << 31) \
379 | (((impedance) & 0x7FFFFFFF)))
380#define CODEC_F09_ANALOG_NA 0x7FFFFFFF
381#define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \
382( (((fPresent) & 0x1) << 31) \
383 | (((fELDValid) & 0x1) << 30))
384
385#define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1))
386#define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2))
387#define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1))
388#define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0))
389/* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */
390/* Configuration's port connection */
391#define CODEC_F1C_PORT_MASK (0x3)
392#define CODEC_F1C_PORT_SHIFT (30)
393
394#define CODEC_F1C_PORT_COMPLEX (0x0)
395#define CODEC_F1C_PORT_NO_PHYS (0x1)
396#define CODEC_F1C_PORT_FIXED (0x2)
397#define CODEC_F1C_BOTH (0x3)
398
399/* Configuration default: connection */
400#define CODEC_F1C_PORT_MASK (0x3)
401#define CODEC_F1C_PORT_SHIFT (30)
402
403/* Connected to a jack (1/8", ATAPI, ...). */
404#define CODEC_F1C_PORT_COMPLEX (0x0)
405/* No physical connection. */
406#define CODEC_F1C_PORT_NO_PHYS (0x1)
407/* Fixed function device (integrated speaker, integrated mic, ...). */
408#define CODEC_F1C_PORT_FIXED (0x2)
409/* Both, a jack and an internal device are attached. */
410#define CODEC_F1C_BOTH (0x3)
411
412/* Configuration default: Location */
413#define CODEC_F1C_LOCATION_MASK (0x3F)
414#define CODEC_F1C_LOCATION_SHIFT (24)
415
416/* [4:5] bits of location region means chassis attachment */
417#define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)
418#define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4)
419#define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5)
420#define CODEC_F1C_LOCATION_OTHER RT_BIT(5)
421
422/* [0:3] bits of location region means geometry location attachment */
423#define CODEC_F1C_LOCATION_NA (0)
424#define CODEC_F1C_LOCATION_REAR (0x1)
425#define CODEC_F1C_LOCATION_FRONT (0x2)
426#define CODEC_F1C_LOCATION_LEFT (0x3)
427#define CODEC_F1C_LOCATION_RIGTH (0x4)
428#define CODEC_F1C_LOCATION_TOP (0x5)
429#define CODEC_F1C_LOCATION_BOTTOM (0x6)
430#define CODEC_F1C_LOCATION_SPECIAL_0 (0x7)
431#define CODEC_F1C_LOCATION_SPECIAL_1 (0x8)
432#define CODEC_F1C_LOCATION_SPECIAL_2 (0x9)
433
434/* Configuration default: Device type */
435#define CODEC_F1C_DEVICE_MASK (0xF)
436#define CODEC_F1C_DEVICE_SHIFT (20)
437#define CODEC_F1C_DEVICE_LINE_OUT (0)
438#define CODEC_F1C_DEVICE_SPEAKER (0x1)
439#define CODEC_F1C_DEVICE_HP (0x2)
440#define CODEC_F1C_DEVICE_CD (0x3)
441#define CODEC_F1C_DEVICE_SPDIF_OUT (0x4)
442#define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5)
443#define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6)
444#define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7)
445#define CODEC_F1C_DEVICE_LINE_IN (0x8)
446#define CODEC_F1C_DEVICE_AUX (0x9)
447#define CODEC_F1C_DEVICE_MIC (0xA)
448#define CODEC_F1C_DEVICE_PHONE (0xB)
449#define CODEC_F1C_DEVICE_SPDIF_IN (0xC)
450#define CODEC_F1C_DEVICE_RESERVED (0xE)
451#define CODEC_F1C_DEVICE_OTHER (0xF)
452
453/* Configuration default: Connection type */
454#define CODEC_F1C_CONNECTION_TYPE_MASK (0xF)
455#define CODEC_F1C_CONNECTION_TYPE_SHIFT (16)
456
457#define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)
458#define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1)
459#define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2)
460#define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3)
461#define CODEC_F1C_CONNECTION_TYPE_RCA (0x4)
462#define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5)
463#define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6)
464#define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7)
465#define CODEC_F1C_CONNECTION_TYPE_DIN (0x8)
466#define CODEC_F1C_CONNECTION_TYPE_XLR (0x9)
467#define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA)
468#define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB)
469#define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF)
470
471/* Configuration's color */
472#define CODEC_F1C_COLOR_MASK (0xF)
473#define CODEC_F1C_COLOR_SHIFT (12)
474#define CODEC_F1C_COLOR_UNKNOWN (0)
475#define CODEC_F1C_COLOR_BLACK (0x1)
476#define CODEC_F1C_COLOR_GREY (0x2)
477#define CODEC_F1C_COLOR_BLUE (0x3)
478#define CODEC_F1C_COLOR_GREEN (0x4)
479#define CODEC_F1C_COLOR_RED (0x5)
480#define CODEC_F1C_COLOR_ORANGE (0x6)
481#define CODEC_F1C_COLOR_YELLOW (0x7)
482#define CODEC_F1C_COLOR_PURPLE (0x8)
483#define CODEC_F1C_COLOR_PINK (0x9)
484#define CODEC_F1C_COLOR_RESERVED_0 (0xA)
485#define CODEC_F1C_COLOR_RESERVED_1 (0xB)
486#define CODEC_F1C_COLOR_RESERVED_2 (0xC)
487#define CODEC_F1C_COLOR_RESERVED_3 (0xD)
488#define CODEC_F1C_COLOR_WHITE (0xE)
489#define CODEC_F1C_COLOR_OTHER (0xF)
490
491/* Configuration's misc */
492#define CODEC_F1C_MISC_MASK (0xF)
493#define CODEC_F1C_MISC_SHIFT (8)
494#define CODEC_F1C_MISC_NONE 0
495#define CODEC_F1C_MISC_JACK_NO_PRESENCE_DETECT RT_BIT(0)
496#define CODEC_F1C_MISC_RESERVED_0 RT_BIT(1)
497#define CODEC_F1C_MISC_RESERVED_1 RT_BIT(2)
498#define CODEC_F1C_MISC_RESERVED_2 RT_BIT(3)
499
500/* Configuration default: Association */
501#define CODEC_F1C_ASSOCIATION_MASK (0xF)
502#define CODEC_F1C_ASSOCIATION_SHIFT (4)
503
504/** Reserved; don't use. */
505#define CODEC_F1C_ASSOCIATION_INVALID 0x0
506#define CODEC_F1C_ASSOCIATION_GROUP_0 0x1
507#define CODEC_F1C_ASSOCIATION_GROUP_1 0x2
508#define CODEC_F1C_ASSOCIATION_GROUP_2 0x3
509#define CODEC_F1C_ASSOCIATION_GROUP_3 0x4
510#define CODEC_F1C_ASSOCIATION_GROUP_4 0x5
511#define CODEC_F1C_ASSOCIATION_GROUP_5 0x6
512#define CODEC_F1C_ASSOCIATION_GROUP_6 0x7
513#define CODEC_F1C_ASSOCIATION_GROUP_7 0x8
514#define CODEC_F1C_ASSOCIATION_GROUP_15 0xF
515
516/* Configuration default: Association Sequence. */
517#define CODEC_F1C_SEQ_MASK (0xF)
518#define CODEC_F1C_SEQ_SHIFT (0)
519
520/* Implementation identification (7.3.3.30). */
521#define CODEC_MAKE_F20(bmid, bsku, aid) \
522 ( (((bmid) & 0xFFFF) << 16) \
523 | (((bsku) & 0xFF) << 8) \
524 | (((aid) & 0xFF)) \
525 )
526
527/* Macro definition helping in filling the configuration registers. */
528#define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \
529 ( (((port_connectivity) & 0xF) << CODEC_F1C_PORT_SHIFT) \
530 | (((location) & 0xF) << CODEC_F1C_LOCATION_SHIFT) \
531 | (((device) & 0xF) << CODEC_F1C_DEVICE_SHIFT) \
532 | (((connection_type) & 0xF) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \
533 | (((color) & 0xF) << CODEC_F1C_COLOR_SHIFT) \
534 | (((misc) & 0xF) << CODEC_F1C_MISC_SHIFT) \
535 | (((association) & 0xF) << CODEC_F1C_ASSOCIATION_SHIFT) \
536 | (((sequence) & 0xF)))
537
538
539/*********************************************************************************************************************************
540* Structures and Typedefs *
541*********************************************************************************************************************************/
542/** The F00 parameter length (in dwords). */
543#define CODECNODE_F00_PARAM_LENGTH 20
544/** The F02 parameter length (in dwords). */
545#define CODECNODE_F02_PARAM_LENGTH 16
546
547/**
548 * Common (or core) codec node structure.
549 */
550typedef struct CODECCOMMONNODE
551{
552 /** Node id - 7 bit format */
553 uint8_t id;
554 /** The node name. */
555 char const *pszName;
556 /* PRM 5.3.6 */
557 uint32_t au32F00_param[CODECNODE_F00_PARAM_LENGTH];
558 uint32_t au32F02_param[CODECNODE_F02_PARAM_LENGTH];
559} CODECCOMMONNODE;
560typedef CODECCOMMONNODE *PCODECCOMMONNODE;
561AssertCompile(CODECNODE_F00_PARAM_LENGTH == 20); /* saved state */
562AssertCompile(CODECNODE_F02_PARAM_LENGTH == 16); /* saved state */
563
564/**
565 * Compile time assertion on the expected node size.
566 */
567#define AssertNodeSize(a_Node, a_cParams) \
568 AssertCompile((a_cParams) <= (60 + 6)); /* the max size - saved state */ \
569 AssertCompile( sizeof(a_Node) - sizeof(CODECCOMMONNODE) \
570 == (((a_cParams) * sizeof(uint32_t) + sizeof(void *) - 1) & ~(sizeof(void *) - 1)) )
571
572typedef struct ROOTCODECNODE
573{
574 CODECCOMMONNODE node;
575} ROOTCODECNODE, *PROOTCODECNODE;
576AssertNodeSize(ROOTCODECNODE, 0);
577
578#define AMPLIFIER_SIZE 60
579typedef uint32_t AMPLIFIER[AMPLIFIER_SIZE];
580#define AMPLIFIER_IN 0
581#define AMPLIFIER_OUT 1
582#define AMPLIFIER_LEFT 1
583#define AMPLIFIER_RIGHT 0
584#define AMPLIFIER_REGISTER(amp, inout, side, index) ((amp)[30*(inout) + 15*(side) + (index)])
585typedef struct DACNODE
586{
587 CODECCOMMONNODE node;
588 uint32_t u32F0d_param;
589 uint32_t u32F04_param;
590 uint32_t u32F05_param;
591 uint32_t u32F06_param;
592 uint32_t u32F0c_param;
593
594 uint32_t u32A_param;
595 AMPLIFIER B_params;
596
597} DACNODE, *PDACNODE;
598AssertNodeSize(DACNODE, 6 + 60);
599
600typedef struct ADCNODE
601{
602 CODECCOMMONNODE node;
603 uint32_t u32F01_param;
604 uint32_t u32F03_param;
605 uint32_t u32F05_param;
606 uint32_t u32F06_param;
607 uint32_t u32F09_param;
608
609 uint32_t u32A_param;
610 AMPLIFIER B_params;
611} ADCNODE, *PADCNODE;
612AssertNodeSize(DACNODE, 6 + 60);
613
614typedef struct SPDIFOUTNODE
615{
616 CODECCOMMONNODE node;
617 uint32_t u32F05_param;
618 uint32_t u32F06_param;
619 uint32_t u32F09_param;
620 uint32_t u32F0d_param;
621
622 uint32_t u32A_param;
623 AMPLIFIER B_params;
624} SPDIFOUTNODE, *PSPDIFOUTNODE;
625AssertNodeSize(SPDIFOUTNODE, 5 + 60);
626
627typedef struct SPDIFINNODE
628{
629 CODECCOMMONNODE node;
630 uint32_t u32F05_param;
631 uint32_t u32F06_param;
632 uint32_t u32F09_param;
633 uint32_t u32F0d_param;
634
635 uint32_t u32A_param;
636 AMPLIFIER B_params;
637} SPDIFINNODE, *PSPDIFINNODE;
638AssertNodeSize(SPDIFINNODE, 5 + 60);
639
640typedef struct AFGCODECNODE
641{
642 CODECCOMMONNODE node;
643 uint32_t u32F05_param;
644 uint32_t u32F08_param;
645 uint32_t u32F17_param;
646 uint32_t u32F20_param;
647} AFGCODECNODE, *PAFGCODECNODE;
648AssertNodeSize(AFGCODECNODE, 4);
649
650typedef struct PORTNODE
651{
652 CODECCOMMONNODE node;
653 uint32_t u32F01_param;
654 uint32_t u32F07_param;
655 uint32_t u32F08_param;
656 uint32_t u32F09_param;
657 uint32_t u32F1c_param;
658 AMPLIFIER B_params;
659} PORTNODE, *PPORTNODE;
660AssertNodeSize(PORTNODE, 5 + 60);
661
662typedef struct DIGOUTNODE
663{
664 CODECCOMMONNODE node;
665 uint32_t u32F01_param;
666 uint32_t u32F05_param;
667 uint32_t u32F07_param;
668 uint32_t u32F08_param;
669 uint32_t u32F09_param;
670 uint32_t u32F1c_param;
671} DIGOUTNODE, *PDIGOUTNODE;
672AssertNodeSize(DIGOUTNODE, 6);
673
674typedef struct DIGINNODE
675{
676 CODECCOMMONNODE node;
677 uint32_t u32F05_param;
678 uint32_t u32F07_param;
679 uint32_t u32F08_param;
680 uint32_t u32F09_param;
681 uint32_t u32F0c_param;
682 uint32_t u32F1c_param;
683 uint32_t u32F1e_param;
684} DIGINNODE, *PDIGINNODE;
685AssertNodeSize(DIGINNODE, 7);
686
687typedef struct ADCMUXNODE
688{
689 CODECCOMMONNODE node;
690 uint32_t u32F01_param;
691
692 uint32_t u32A_param;
693 AMPLIFIER B_params;
694} ADCMUXNODE, *PADCMUXNODE;
695AssertNodeSize(ADCMUXNODE, 2 + 60);
696
697typedef struct PCBEEPNODE
698{
699 CODECCOMMONNODE node;
700 uint32_t u32F07_param;
701 uint32_t u32F0a_param;
702
703 uint32_t u32A_param;
704 AMPLIFIER B_params;
705 uint32_t u32F1c_param;
706} PCBEEPNODE, *PPCBEEPNODE;
707AssertNodeSize(PCBEEPNODE, 3 + 60 + 1);
708
709typedef struct CDNODE
710{
711 CODECCOMMONNODE node;
712 uint32_t u32F07_param;
713 uint32_t u32F1c_param;
714} CDNODE, *PCDNODE;
715AssertNodeSize(CDNODE, 2);
716
717typedef struct VOLUMEKNOBNODE
718{
719 CODECCOMMONNODE node;
720 uint32_t u32F08_param;
721 uint32_t u32F0f_param;
722} VOLUMEKNOBNODE, *PVOLUMEKNOBNODE;
723AssertNodeSize(VOLUMEKNOBNODE, 2);
724
725typedef struct ADCVOLNODE
726{
727 CODECCOMMONNODE node;
728 uint32_t u32F0c_param;
729 uint32_t u32F01_param;
730 uint32_t u32A_params;
731 AMPLIFIER B_params;
732} ADCVOLNODE, *PADCVOLNODE;
733AssertNodeSize(ADCVOLNODE, 3 + 60);
734
735typedef struct RESNODE
736{
737 CODECCOMMONNODE node;
738 uint32_t u32F05_param;
739 uint32_t u32F06_param;
740 uint32_t u32F07_param;
741 uint32_t u32F1c_param;
742
743 uint32_t u32A_param;
744} RESNODE, *PRESNODE;
745AssertNodeSize(RESNODE, 5);
746
747/**
748 * Used for the saved state.
749 */
750typedef struct CODECSAVEDSTATENODE
751{
752 CODECCOMMONNODE Core;
753 uint32_t au32Params[60 + 6];
754} CODECSAVEDSTATENODE;
755AssertNodeSize(CODECSAVEDSTATENODE, 60 + 6);
756
757typedef union CODECNODE
758{
759 CODECCOMMONNODE node;
760 ROOTCODECNODE root;
761 AFGCODECNODE afg;
762 DACNODE dac;
763 ADCNODE adc;
764 SPDIFOUTNODE spdifout;
765 SPDIFINNODE spdifin;
766 PORTNODE port;
767 DIGOUTNODE digout;
768 DIGINNODE digin;
769 ADCMUXNODE adcmux;
770 PCBEEPNODE pcbeep;
771 CDNODE cdnode;
772 VOLUMEKNOBNODE volumeKnob;
773 ADCVOLNODE adcvol;
774 RESNODE reserved;
775 CODECSAVEDSTATENODE SavedState;
776} CODECNODE, *PCODECNODE;
777AssertNodeSize(CODECNODE, 60 + 6);
778
779
780/*********************************************************************************************************************************
781* Global Variables *
782*********************************************************************************************************************************/
783/* STAC9220 - Nodes IDs / names. */
784#define STAC9220_NID_ROOT 0x0 /* Root node */
785#define STAC9220_NID_AFG 0x1 /* Audio Configuration Group */
786#define STAC9220_NID_DAC0 0x2 /* Out */
787#define STAC9220_NID_DAC1 0x3 /* Out */
788#define STAC9220_NID_DAC2 0x4 /* Out */
789#define STAC9220_NID_DAC3 0x5 /* Out */
790#define STAC9220_NID_ADC0 0x6 /* In */
791#define STAC9220_NID_ADC1 0x7 /* In */
792#define STAC9220_NID_SPDIF_OUT 0x8 /* Out */
793#define STAC9220_NID_SPDIF_IN 0x9 /* In */
794/** Also known as PIN_A. */
795#define STAC9220_NID_PIN_HEADPHONE0 0xA /* In, Out */
796#define STAC9220_NID_PIN_B 0xB /* In, Out */
797#define STAC9220_NID_PIN_C 0xC /* In, Out */
798/** Also known as PIN D. */
799#define STAC9220_NID_PIN_HEADPHONE1 0xD /* In, Out */
800#define STAC9220_NID_PIN_E 0xE /* In */
801#define STAC9220_NID_PIN_F 0xF /* In, Out */
802/** Also known as DIGOUT0. */
803#define STAC9220_NID_PIN_SPDIF_OUT 0x10 /* Out */
804/** Also known as DIGIN. */
805#define STAC9220_NID_PIN_SPDIF_IN 0x11 /* In */
806#define STAC9220_NID_ADC0_MUX 0x12 /* In */
807#define STAC9220_NID_ADC1_MUX 0x13 /* In */
808#define STAC9220_NID_PCBEEP 0x14 /* Out */
809#define STAC9220_NID_PIN_CD 0x15 /* In */
810#define STAC9220_NID_VOL_KNOB 0x16
811#define STAC9220_NID_AMP_ADC0 0x17 /* In */
812#define STAC9220_NID_AMP_ADC1 0x18 /* In */
813/* Only for STAC9221. */
814#define STAC9221_NID_ADAT_OUT 0x19 /* Out */
815#define STAC9221_NID_I2S_OUT 0x1A /* Out */
816#define STAC9221_NID_PIN_I2S_OUT 0x1B /* Out */
817
818/** Number of total nodes emulated. */
819#define STAC9221_NUM_NODES 0x1C
820
821/* STAC9220 - Referenced through STAC9220WIDGET in the constructor below. */
822static uint8_t const g_abStac9220Ports[] = { STAC9220_NID_PIN_HEADPHONE0, STAC9220_NID_PIN_B, STAC9220_NID_PIN_C, STAC9220_NID_PIN_HEADPHONE1, STAC9220_NID_PIN_E, STAC9220_NID_PIN_F, 0 };
823static uint8_t const g_abStac9220Dacs[] = { STAC9220_NID_DAC0, STAC9220_NID_DAC1, STAC9220_NID_DAC2, STAC9220_NID_DAC3, 0 };
824static uint8_t const g_abStac9220Adcs[] = { STAC9220_NID_ADC0, STAC9220_NID_ADC1, 0 };
825static uint8_t const g_abStac9220SpdifOuts[] = { STAC9220_NID_SPDIF_OUT, 0 };
826static uint8_t const g_abStac9220SpdifIns[] = { STAC9220_NID_SPDIF_IN, 0 };
827static uint8_t const g_abStac9220DigOutPins[] = { STAC9220_NID_PIN_SPDIF_OUT, 0 };
828static uint8_t const g_abStac9220DigInPins[] = { STAC9220_NID_PIN_SPDIF_IN, 0 };
829static uint8_t const g_abStac9220AdcVols[] = { STAC9220_NID_AMP_ADC0, STAC9220_NID_AMP_ADC1, 0 };
830static uint8_t const g_abStac9220AdcMuxs[] = { STAC9220_NID_ADC0_MUX, STAC9220_NID_ADC1_MUX, 0 };
831static uint8_t const g_abStac9220Pcbeeps[] = { STAC9220_NID_PCBEEP, 0 };
832static uint8_t const g_abStac9220Cds[] = { STAC9220_NID_PIN_CD, 0 };
833static uint8_t const g_abStac9220VolKnobs[] = { STAC9220_NID_VOL_KNOB, 0 };
834/* STAC 9221. */
835/** @todo Is STAC9220_NID_SPDIF_IN really correct for reserved nodes? */
836static uint8_t const g_abStac9220Reserveds[] = { STAC9220_NID_SPDIF_IN, STAC9221_NID_ADAT_OUT, STAC9221_NID_I2S_OUT, STAC9221_NID_PIN_I2S_OUT, 0 };
837
838/** SSM description of a CODECNODE. */
839static SSMFIELD const g_aCodecNodeFields[] =
840{
841 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.id),
842 SSMFIELD_ENTRY_PAD_HC_AUTO(3, 3),
843 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F00_param),
844 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F02_param),
845 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, au32Params),
846 SSMFIELD_ENTRY_TERM()
847};
848
849/** Backward compatibility with v1 of the CODECNODE. */
850static SSMFIELD const g_aCodecNodeFieldsV1[] =
851{
852 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.id),
853 SSMFIELD_ENTRY_PAD_HC_AUTO(3, 7),
854 SSMFIELD_ENTRY_OLD_HCPTR(Core.name),
855 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F00_param),
856 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F02_param),
857 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, au32Params),
858 SSMFIELD_ENTRY_TERM()
859};
860
861
862
863
864static DECLCALLBACK(void) stac9220DbgNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
865{
866 for (int i = 1; i < pThis->cTotalNodes; i++)
867 {
868 PCODECNODE pNode = &pThis->paNodes[i];
869 AMPLIFIER *pAmp = &pNode->dac.B_params;
870
871 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, AMPLIFIER_OUT, AMPLIFIER_LEFT, 0) & 0x7f;
872 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, AMPLIFIER_OUT, AMPLIFIER_RIGHT, 0) & 0x7f;
873
874 pHlp->pfnPrintf(pHlp, "0x%x: lVol=%RU8, rVol=%RU8\n", i, lVol, rVol);
875 }
876}
877
878
879static DECLCALLBACK(int) stac9220ResetNode(PHDACODEC pThis, uint8_t uNID, PCODECNODE pNode)
880{
881 LogFlowFunc(("NID=0x%x (%RU8)\n", uNID, uNID));
882
883 if ( !pThis->fInReset
884 && ( uNID != STAC9220_NID_ROOT
885 && uNID != STAC9220_NID_AFG)
886 )
887 {
888 RT_ZERO(pNode->node);
889 }
890
891 /* Set common parameters across all nodes. */
892 pNode->node.id = uNID;
893
894 switch (uNID)
895 {
896 /* Root node. */
897 case STAC9220_NID_ROOT:
898 {
899 /* Set the revision ID. */
900 pNode->root.node.au32F00_param[0x02] = CODEC_MAKE_F00_02(0x1, 0x0, 0x3, 0x4, 0x0, 0x1);
901 break;
902 }
903
904 /*
905 * AFG (Audio Function Group).
906 */
907 case STAC9220_NID_AFG:
908 {
909 pNode->afg.node.au32F00_param[0x08] = CODEC_MAKE_F00_08(1, 0xd, 0xd);
910 /* We set the AFG's PCM capabitilies fixed to 44.1kHz, 16-bit signed. */
911 pNode->afg.node.au32F00_param[0x0A] = CODEC_F00_0A_44_1KHZ | CODEC_F00_0A_16_BIT;
912 pNode->afg.node.au32F00_param[0x0B] = CODEC_F00_0B_PCM;
913 pNode->afg.node.au32F00_param[0x0C] = CODEC_MAKE_F00_0C(0x17)
914 | CODEC_F00_0C_CAP_BALANCED_IO
915 | CODEC_F00_0C_CAP_INPUT
916 | CODEC_F00_0C_CAP_OUTPUT
917 | CODEC_F00_0C_CAP_PRESENSE_DETECT
918 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
919 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;
920
921 /* Default input amplifier capabilities. */
922 pNode->node.au32F00_param[0x0D] = CODEC_MAKE_F00_0D(CODEC_AMP_CAP_MUTE,
923 0 /* Step size */,
924 CODEC_AMP_NUM_STEPS,
925 0 /* Initial offset */);
926 /* Default output amplifier capabilities. */
927 pNode->node.au32F00_param[0x12] = CODEC_MAKE_F00_12(CODEC_AMP_CAP_MUTE,
928 CODEC_AMP_STEP_SIZE,
929 CODEC_AMP_NUM_STEPS,
930 CODEC_AMP_OFF_INITIAL);
931
932 pNode->afg.node.au32F00_param[0x11] = CODEC_MAKE_F00_11(1, 1, 0, 0, 4);
933 pNode->afg.node.au32F00_param[0x0F] = CODEC_F00_0F_D3
934 | CODEC_F00_0F_D2
935 | CODEC_F00_0F_D1
936 | CODEC_F00_0F_D0;
937
938 pNode->afg.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D2, CODEC_F05_D2); /* PS-Act: D2, PS->Set D2. */
939 pNode->afg.u32F08_param = 0;
940 pNode->afg.u32F17_param = 0;
941 break;
942 }
943
944 /*
945 * DACs.
946 */
947 case STAC9220_NID_DAC0: /* DAC0: Headphones 0 + 1 */
948 case STAC9220_NID_DAC1: /* DAC1: PIN C */
949 case STAC9220_NID_DAC2: /* DAC2: PIN B */
950 case STAC9220_NID_DAC3: /* DAC3: PIN F */
951 {
952 pNode->dac.u32A_param = CODEC_MAKE_A(HDA_SDFMT_TYPE_PCM, HDA_SDFMT_BASE_44KHZ,
953 HDA_SDFMT_MULT_1X, HDA_SDFMT_DIV_1X, HDA_SDFMT_16_BIT,
954 HDA_SDFMT_CHAN_STEREO);
955
956 /* 7.3.4.6: Audio widget capabilities. */
957 pNode->dac.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 13, 0)
958 | CODEC_F00_09_CAP_L_R_SWAP
959 | CODEC_F00_09_CAP_POWER_CTRL
960 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
961 | CODEC_F00_09_CAP_STEREO;
962
963 /* Connection list; must be 0 if the only connection for the widget is
964 * to the High Definition Audio Link. */
965 pNode->dac.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 0 /* Entries */);
966
967 pNode->dac.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);
968
969 RT_ZERO(pNode->dac.B_params);
970 AMPLIFIER_REGISTER(pNode->dac.B_params, AMPLIFIER_OUT, AMPLIFIER_LEFT, 0) = 0x7F | RT_BIT(7);
971 AMPLIFIER_REGISTER(pNode->dac.B_params, AMPLIFIER_OUT, AMPLIFIER_RIGHT, 0) = 0x7F | RT_BIT(7);
972 break;
973 }
974
975 /*
976 * ADCs.
977 */
978 case STAC9220_NID_ADC0: /* Analog input. */
979 {
980 pNode->node.au32F02_param[0] = STAC9220_NID_AMP_ADC0;
981 goto adc_init;
982 }
983
984 case STAC9220_NID_ADC1: /* Analog input (CD). */
985 {
986 pNode->node.au32F02_param[0] = STAC9220_NID_AMP_ADC1;
987
988 /* Fall through is intentional. */
989 adc_init:
990
991 pNode->adc.u32A_param = CODEC_MAKE_A(HDA_SDFMT_TYPE_PCM, HDA_SDFMT_BASE_44KHZ,
992 HDA_SDFMT_MULT_1X, HDA_SDFMT_DIV_1X, HDA_SDFMT_16_BIT,
993 HDA_SDFMT_CHAN_STEREO);
994
995 pNode->adc.u32F03_param = RT_BIT(0);
996 pNode->adc.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3); /* PS-Act: D3 Set: D3 */
997
998 pNode->adc.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 13, 0)
999 | CODEC_F00_09_CAP_POWER_CTRL
1000 | CODEC_F00_09_CAP_CONNECTION_LIST
1001 | CODEC_F00_09_CAP_PROC_WIDGET
1002 | CODEC_F00_09_CAP_STEREO;
1003 /* Connection list entries. */
1004 pNode->adc.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1005 break;
1006 }
1007
1008 /*
1009 * SP/DIF In/Out.
1010 */
1011 case STAC9220_NID_SPDIF_OUT:
1012 {
1013 pNode->spdifout.u32A_param = CODEC_MAKE_A(HDA_SDFMT_TYPE_PCM, HDA_SDFMT_BASE_44KHZ,
1014 HDA_SDFMT_MULT_1X, HDA_SDFMT_DIV_1X, HDA_SDFMT_16_BIT,
1015 HDA_SDFMT_CHAN_STEREO);
1016 pNode->spdifout.u32F06_param = 0;
1017 pNode->spdifout.u32F0d_param = 0;
1018
1019 pNode->spdifout.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 4, 0)
1020 | CODEC_F00_09_CAP_DIGITAL
1021 | CODEC_F00_09_CAP_FMT_OVERRIDE
1022 | CODEC_F00_09_CAP_STEREO;
1023
1024 /* Use a fixed format from AFG. */
1025 pNode->spdifout.node.au32F00_param[0xA] = pThis->paNodes[STAC9220_NID_AFG].node.au32F00_param[0xA];
1026 pNode->spdifout.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
1027 break;
1028 }
1029
1030 case STAC9220_NID_SPDIF_IN:
1031 {
1032 pNode->spdifin.u32A_param = CODEC_MAKE_A(HDA_SDFMT_TYPE_PCM, HDA_SDFMT_BASE_44KHZ,
1033 HDA_SDFMT_MULT_1X, HDA_SDFMT_DIV_1X, HDA_SDFMT_16_BIT,
1034 HDA_SDFMT_CHAN_STEREO);
1035
1036 pNode->spdifin.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 4, 0)
1037 | CODEC_F00_09_CAP_DIGITAL
1038 | CODEC_F00_09_CAP_CONNECTION_LIST
1039 | CODEC_F00_09_CAP_FMT_OVERRIDE
1040 | CODEC_F00_09_CAP_STEREO;
1041
1042 /* Use a fixed format from AFG. */
1043 pNode->spdifin.node.au32F00_param[0xA] = pThis->paNodes[STAC9220_NID_AFG].node.au32F00_param[0xA];
1044 pNode->spdifin.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
1045
1046 /* Connection list entries. */
1047 pNode->spdifin.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1048 pNode->spdifin.node.au32F02_param[0] = 0x11;
1049 break;
1050 }
1051
1052 /*
1053 * PINs / Ports.
1054 */
1055 case STAC9220_NID_PIN_HEADPHONE0: /* Port A: Headphone in/out (front). */
1056 {
1057 pNode->port.node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1058 | CODEC_F00_0C_CAP_INPUT
1059 | CODEC_F00_0C_CAP_OUTPUT
1060 | CODEC_F00_0C_CAP_HEADPHONE_AMP
1061 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1062 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED;
1063
1064 /* Connection list entry 0: Goes to DAC0. */
1065 pNode->port.node.au32F02_param[0] = STAC9220_NID_DAC0;
1066
1067 if (!pThis->fInReset)
1068 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1069 CODEC_F1C_LOCATION_FRONT,
1070 CODEC_F1C_DEVICE_HP,
1071 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1072 CODEC_F1C_COLOR_GREEN,
1073 CODEC_F1C_MISC_NONE,
1074 CODEC_F1C_ASSOCIATION_GROUP_0, 0xF /* Seq */);
1075 goto port_init;
1076 }
1077
1078 case STAC9220_NID_PIN_B: /* Port B: Rear CLFE (Center / Subwoofer). */
1079 {
1080 pNode->port.node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1081 | CODEC_F00_0C_CAP_INPUT
1082 | CODEC_F00_0C_CAP_OUTPUT
1083 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1084 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED;
1085
1086 /* Connection list entry 0: Goes to DAC2. */
1087 pNode->port.node.au32F02_param[0] = STAC9220_NID_DAC2;
1088
1089 if (!pThis->fInReset)
1090 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1091 CODEC_F1C_LOCATION_REAR,
1092 CODEC_F1C_DEVICE_SPEAKER,
1093 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1094 CODEC_F1C_COLOR_BLACK,
1095 CODEC_F1C_MISC_NONE,
1096 CODEC_F1C_ASSOCIATION_GROUP_1, 0xE /* Seq */);
1097 goto port_init;
1098 }
1099
1100 case STAC9220_NID_PIN_C: /* Rear Speaker. */
1101 {
1102 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1, CODEC_F09_ANALOG_NA);
1103
1104 pNode->port.node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1105 | CODEC_F00_0C_CAP_INPUT
1106 | CODEC_F00_0C_CAP_OUTPUT
1107 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1108 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED;
1109
1110 /* Connection list entry 0: Goes to DAC1. */
1111 pNode->port.node.au32F02_param[0x0] = STAC9220_NID_DAC1;
1112
1113 if (!pThis->fInReset)
1114 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1115 CODEC_F1C_LOCATION_REAR,
1116 CODEC_F1C_DEVICE_SPEAKER,
1117 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1118 CODEC_F1C_COLOR_GREEN,
1119 CODEC_F1C_MISC_NONE,
1120 CODEC_F1C_ASSOCIATION_GROUP_0, 0x0 /* Seq */);
1121 goto port_init;
1122 }
1123
1124 case STAC9220_NID_PIN_HEADPHONE1: /* Also known as PIN_D. */
1125 {
1126 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1, CODEC_F09_ANALOG_NA);
1127
1128 pNode->port.node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1129 | CODEC_F00_0C_CAP_INPUT
1130 | CODEC_F00_0C_CAP_OUTPUT
1131 | CODEC_F00_0C_CAP_HEADPHONE_AMP
1132 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1133 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED;
1134
1135 /* Connection list entry 0: Goes to DAC1. */
1136 pNode->port.node.au32F02_param[0x0] = STAC9220_NID_DAC0;
1137
1138 if (!pThis->fInReset)
1139 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1140 CODEC_F1C_LOCATION_FRONT,
1141 CODEC_F1C_DEVICE_MIC,
1142 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1143 CODEC_F1C_COLOR_PINK,
1144 CODEC_F1C_MISC_NONE,
1145 CODEC_F1C_ASSOCIATION_GROUP_15, 0xD /* Seq */);
1146 /* Fall through is intentional. */
1147 port_init:
1148
1149 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE
1150 | CODEC_F07_OUT_ENABLE;
1151 pNode->port.u32F08_param = 0;
1152 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(true /* fPresent */, CODEC_F09_ANALOG_NA);
1153
1154 pNode->port.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1155 | CODEC_F00_09_CAP_CONNECTION_LIST
1156 | CODEC_F00_09_CAP_UNSOL
1157 | CODEC_F00_09_CAP_STEREO;
1158 /* Connection list entries. */
1159 pNode->port.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1160 break;
1161 }
1162
1163 case STAC9220_NID_PIN_E:
1164 {
1165 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
1166 pNode->port.u32F08_param = 0;
1167 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(true /* fPresent */, CODEC_F09_ANALOG_NA);
1168
1169 pNode->port.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1170 | CODEC_F00_09_CAP_UNSOL
1171 | CODEC_F00_09_CAP_STEREO;
1172 pNode->port.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT
1173 | CODEC_F00_0C_CAP_PRESENSE_DETECT;
1174
1175 if (!pThis->fInReset)
1176 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1177 CODEC_F1C_LOCATION_REAR,
1178 CODEC_F1C_DEVICE_LINE_IN,
1179 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1180 CODEC_F1C_COLOR_BLUE,
1181 CODEC_F1C_MISC_NONE,
1182 CODEC_F1C_ASSOCIATION_GROUP_15, 0xE /* Seq */);
1183 break;
1184 }
1185
1186 case STAC9220_NID_PIN_F:
1187 {
1188 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE | CODEC_F07_OUT_ENABLE;
1189 pNode->port.u32F08_param = 0;
1190 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(true /* fPresent */, CODEC_F09_ANALOG_NA);
1191
1192 pNode->port.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1193 | CODEC_F00_09_CAP_CONNECTION_LIST
1194 | CODEC_F00_09_CAP_UNSOL
1195 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
1196 | CODEC_F00_09_CAP_STEREO;
1197 pNode->port.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT
1198 | CODEC_F00_0C_CAP_OUTPUT;
1199
1200 /* Connection list entry 0: Goes to DAC3. */
1201 pNode->port.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1202 pNode->port.node.au32F02_param[0x0] = STAC9220_NID_DAC3;
1203
1204 if (!pThis->fInReset)
1205 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1206 CODEC_F1C_LOCATION_INTERNAL,
1207 CODEC_F1C_DEVICE_SPEAKER,
1208 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1209 CODEC_F1C_COLOR_ORANGE,
1210 CODEC_F1C_MISC_NONE,
1211 CODEC_F1C_ASSOCIATION_GROUP_1, 0x0 /* Seq */);
1212 break;
1213 }
1214
1215 case STAC9220_NID_PIN_SPDIF_OUT: /* Rear SPDIF Out. */
1216 {
1217 pNode->digout.u32F07_param = CODEC_F07_OUT_ENABLE;
1218 pNode->digout.u32F09_param = 0;
1219
1220 pNode->digout.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1221 | CODEC_F00_09_CAP_DIGITAL
1222 | CODEC_F00_09_CAP_CONNECTION_LIST
1223 | CODEC_F00_09_CAP_STEREO;
1224 pNode->digout.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT
1225 | CODEC_F00_0C_CAP_PRESENSE_DETECT;
1226
1227 /* Connection list entries. */
1228 pNode->digout.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 3 /* Entries */);
1229 pNode->digout.node.au32F02_param[0x0] = RT_MAKE_U32_FROM_U8(STAC9220_NID_SPDIF_OUT,
1230 STAC9220_NID_AMP_ADC0, STAC9221_NID_ADAT_OUT, 0);
1231 if (!pThis->fInReset)
1232 pNode->digout.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1233 CODEC_F1C_LOCATION_REAR,
1234 CODEC_F1C_DEVICE_SPDIF_OUT,
1235 CODEC_F1C_CONNECTION_TYPE_DIN,
1236 CODEC_F1C_COLOR_BLACK,
1237 CODEC_F1C_MISC_NONE,
1238 CODEC_F1C_ASSOCIATION_GROUP_2, 0x0 /* Seq */);
1239 break;
1240 }
1241
1242 case STAC9220_NID_PIN_SPDIF_IN:
1243 {
1244 pNode->digin.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3); /* PS-Act: D3 -> D3 */
1245 pNode->digin.u32F07_param = CODEC_F07_IN_ENABLE;
1246 pNode->digin.u32F08_param = 0;
1247 pNode->digin.u32F09_param = CODEC_MAKE_F09_DIGITAL(0, 0);
1248 pNode->digin.u32F0c_param = 0;
1249
1250 pNode->digin.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 3, 0)
1251 | CODEC_F00_09_CAP_POWER_CTRL
1252 | CODEC_F00_09_CAP_DIGITAL
1253 | CODEC_F00_09_CAP_UNSOL
1254 | CODEC_F00_09_CAP_STEREO;
1255
1256 pNode->digin.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_EAPD
1257 | CODEC_F00_0C_CAP_INPUT
1258 | CODEC_F00_0C_CAP_PRESENSE_DETECT;
1259 if (!pThis->fInReset)
1260 pNode->digin.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1261 CODEC_F1C_LOCATION_REAR,
1262 CODEC_F1C_DEVICE_SPDIF_IN,
1263 CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL,
1264 CODEC_F1C_COLOR_BLACK,
1265 CODEC_F1C_MISC_NONE,
1266 CODEC_F1C_ASSOCIATION_GROUP_3, 0x0 /* Seq */);
1267 break;
1268 }
1269
1270 case STAC9220_NID_ADC0_MUX:
1271 {
1272 pNode->adcmux.u32F01_param = 0; /* Connection select control index (STAC9220_NID_PIN_E). */
1273 goto adcmux_init;
1274 }
1275
1276 case STAC9220_NID_ADC1_MUX:
1277 {
1278 pNode->adcmux.u32F01_param = 1; /* Connection select control index (STAC9220_NID_PIN_CD). */
1279
1280 /* Fall through is intentional. */
1281 adcmux_init:
1282
1283 pNode->adcmux.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_SELECTOR, 0, 0)
1284 | CODEC_F00_09_CAP_CONNECTION_LIST
1285 | CODEC_F00_09_CAP_AMP_FMT_OVERRIDE
1286 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
1287 | CODEC_F00_09_CAP_STEREO;
1288
1289 pNode->adcmux.node.au32F00_param[0xD] = CODEC_MAKE_F00_0D(0, 27, 4, 0);
1290
1291 /* Connection list entries. */
1292 pNode->adcmux.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 7 /* Entries */);
1293 pNode->adcmux.node.au32F02_param[0x0] = RT_MAKE_U32_FROM_U8(STAC9220_NID_PIN_E,
1294 STAC9220_NID_PIN_CD,
1295 STAC9220_NID_PIN_F,
1296 STAC9220_NID_PIN_B);
1297 pNode->adcmux.node.au32F02_param[0x4] = RT_MAKE_U32_FROM_U8(STAC9220_NID_PIN_C,
1298 STAC9220_NID_PIN_HEADPHONE1,
1299 STAC9220_NID_PIN_HEADPHONE0,
1300 0x0 /* Unused */);
1301
1302 /* STAC 9220 v10 6.21-22.{4,5} both(left and right) out amplifiers initialized with 0. */
1303 RT_BZERO(pNode->adcmux.B_params, AMPLIFIER_SIZE);
1304 break;
1305 }
1306
1307 case STAC9220_NID_PCBEEP:
1308 {
1309 pNode->pcbeep.u32F0a_param = 0;
1310
1311 pNode->pcbeep.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_BEEP_GEN, 0, 0)
1312 | CODEC_F00_09_CAP_AMP_FMT_OVERRIDE
1313 | CODEC_F00_09_CAP_OUT_AMP_PRESENT;
1314 pNode->pcbeep.node.au32F00_param[0xD] = CODEC_MAKE_F00_0D(0, 17, 3, 3);
1315
1316 RT_BZERO(pNode->pcbeep.B_params, AMPLIFIER_SIZE);
1317 break;
1318 }
1319
1320 case STAC9220_NID_PIN_CD:
1321 {
1322 pNode->cdnode.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1323 | CODEC_F00_09_CAP_STEREO;
1324 pNode->cdnode.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT;
1325
1326 if (!pThis->fInReset)
1327 pNode->cdnode.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_FIXED,
1328 CODEC_F1C_LOCATION_INTERNAL,
1329 CODEC_F1C_DEVICE_CD,
1330 CODEC_F1C_CONNECTION_TYPE_ATAPI,
1331 CODEC_F1C_COLOR_UNKNOWN,
1332 CODEC_F1C_MISC_NONE,
1333 CODEC_F1C_ASSOCIATION_GROUP_15, 0xF /* Seq */);
1334 break;
1335 }
1336
1337 case STAC9220_NID_VOL_KNOB:
1338 {
1339 pNode->volumeKnob.u32F08_param = 0;
1340 pNode->volumeKnob.u32F0f_param = 0x7f;
1341
1342 pNode->volumeKnob.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VOLUME_KNOB, 0, 0);
1343 pNode->volumeKnob.node.au32F00_param[0xD] = RT_BIT(7) | 0x7F;
1344
1345 /* Connection list entries. */
1346 pNode->volumeKnob.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 4 /* Entries */);
1347 pNode->volumeKnob.node.au32F02_param[0x0] = RT_MAKE_U32_FROM_U8(STAC9220_NID_DAC0,
1348 STAC9220_NID_DAC1,
1349 STAC9220_NID_DAC2,
1350 STAC9220_NID_DAC3);
1351 break;
1352 }
1353
1354 case STAC9220_NID_AMP_ADC0:
1355 {
1356 pNode->adcvol.node.au32F02_param[0] = STAC9220_NID_ADC0_MUX;
1357 goto adcvol_init;
1358 }
1359
1360 case STAC9220_NID_AMP_ADC1:
1361 {
1362 pNode->adcvol.node.au32F02_param[0] = STAC9220_NID_ADC1_MUX;
1363
1364 /* Fall through is intentional. */
1365 adcvol_init:
1366
1367 pNode->adcvol.u32F0c_param = 0;
1368
1369 pNode->adcvol.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_SELECTOR, 0, 0)
1370 | CODEC_F00_09_CAP_L_R_SWAP
1371 | CODEC_F00_09_CAP_CONNECTION_LIST
1372 | CODEC_F00_09_CAP_IN_AMP_PRESENT
1373 | CODEC_F00_09_CAP_STEREO;
1374
1375
1376 pNode->adcvol.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1377
1378 RT_BZERO(pNode->adcvol.B_params, AMPLIFIER_SIZE);
1379 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_LEFT, 0) = RT_BIT(7);
1380 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_RIGHT, 0) = RT_BIT(7);
1381 break;
1382 }
1383
1384 /*
1385 * STAC9221 nodes.
1386 */
1387
1388 case STAC9221_NID_ADAT_OUT:
1389 {
1390 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VENDOR_DEFINED, 3, 0)
1391 | CODEC_F00_09_CAP_DIGITAL
1392 | CODEC_F00_09_CAP_STEREO;
1393 break;
1394 }
1395
1396 case STAC9221_NID_I2S_OUT:
1397 {
1398 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 3, 0)
1399 | CODEC_F00_09_CAP_DIGITAL
1400 | CODEC_F00_09_CAP_STEREO;
1401 break;
1402 }
1403
1404 case STAC9221_NID_PIN_I2S_OUT:
1405 {
1406 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1407 | CODEC_F00_09_CAP_DIGITAL
1408 | CODEC_F00_09_CAP_CONNECTION_LIST
1409 | CODEC_F00_09_CAP_STEREO;
1410 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT;
1411
1412 /* Connection list entries. */
1413 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1414 pNode->node.au32F02_param[0] = STAC9221_NID_I2S_OUT;
1415
1416 if (!pThis->fInReset)
1417 pNode->reserved.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_NO_PHYS,
1418 CODEC_F1C_LOCATION_NA,
1419 CODEC_F1C_DEVICE_LINE_OUT,
1420 CODEC_F1C_CONNECTION_TYPE_UNKNOWN,
1421 CODEC_F1C_COLOR_UNKNOWN,
1422 CODEC_F1C_MISC_NONE,
1423 CODEC_F1C_ASSOCIATION_GROUP_15, 0xB /* Seq */);
1424 break;
1425 }
1426
1427 default:
1428 AssertMsgFailed(("Node %RU8 not implemented\n", uNID));
1429 break;
1430 }
1431
1432 return VINF_SUCCESS;
1433}
1434
1435
1436static int stac9220Construct(PHDACODEC pThis)
1437{
1438 unconst(pThis->cTotalNodes) = STAC9221_NUM_NODES;
1439
1440 pThis->pfnCodecNodeReset = stac9220ResetNode;
1441
1442 pThis->u16VendorId = 0x8384; /* SigmaTel */
1443 /*
1444 * Note: The Linux kernel uses "patch_stac922x" for the fixups,
1445 * which in turn uses "ref922x_pin_configs" for the configuration
1446 * defaults tweaking in sound/pci/hda/patch_sigmatel.c.
1447 */
1448 pThis->u16DeviceId = 0x7680; /* STAC9221 A1 */
1449 pThis->u8BSKU = 0x76;
1450 pThis->u8AssemblyId = 0x80;
1451
1452 pThis->paNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pThis->cTotalNodes);
1453 if (!pThis->paNodes)
1454 return VERR_NO_MEMORY;
1455
1456 pThis->fInReset = false;
1457
1458#define STAC9220WIDGET(type) pThis->au8##type##s = g_abStac9220##type##s
1459 STAC9220WIDGET(Port);
1460 STAC9220WIDGET(Dac);
1461 STAC9220WIDGET(Adc);
1462 STAC9220WIDGET(AdcVol);
1463 STAC9220WIDGET(AdcMux);
1464 STAC9220WIDGET(Pcbeep);
1465 STAC9220WIDGET(SpdifIn);
1466 STAC9220WIDGET(SpdifOut);
1467 STAC9220WIDGET(DigInPin);
1468 STAC9220WIDGET(DigOutPin);
1469 STAC9220WIDGET(Cd);
1470 STAC9220WIDGET(VolKnob);
1471 STAC9220WIDGET(Reserved);
1472#undef STAC9220WIDGET
1473
1474 unconst(pThis->u8AdcVolsLineIn) = STAC9220_NID_AMP_ADC0;
1475 unconst(pThis->u8DacLineOut) = STAC9220_NID_DAC1;
1476
1477 return VINF_SUCCESS;
1478}
1479
1480
1481/*
1482 * Some generic predicate functions.
1483 */
1484
1485#define DECLISNODEOFTYPE(type) \
1486 DECLINLINE(bool) hdaCodecIs##type##Node(PHDACODEC pThis, uint8_t cNode) \
1487 { \
1488 Assert(pThis->au8##type##s); \
1489 for (int i = 0; pThis->au8##type##s[i] != 0; ++i) \
1490 if (pThis->au8##type##s[i] == cNode) \
1491 return true; \
1492 return false; \
1493 }
1494/* hdaCodecIsPortNode */
1495DECLISNODEOFTYPE(Port)
1496/* hdaCodecIsDacNode */
1497DECLISNODEOFTYPE(Dac)
1498/* hdaCodecIsAdcVolNode */
1499DECLISNODEOFTYPE(AdcVol)
1500/* hdaCodecIsAdcNode */
1501DECLISNODEOFTYPE(Adc)
1502/* hdaCodecIsAdcMuxNode */
1503DECLISNODEOFTYPE(AdcMux)
1504/* hdaCodecIsPcbeepNode */
1505DECLISNODEOFTYPE(Pcbeep)
1506/* hdaCodecIsSpdifOutNode */
1507DECLISNODEOFTYPE(SpdifOut)
1508/* hdaCodecIsSpdifInNode */
1509DECLISNODEOFTYPE(SpdifIn)
1510/* hdaCodecIsDigInPinNode */
1511DECLISNODEOFTYPE(DigInPin)
1512/* hdaCodecIsDigOutPinNode */
1513DECLISNODEOFTYPE(DigOutPin)
1514/* hdaCodecIsCdNode */
1515DECLISNODEOFTYPE(Cd)
1516/* hdaCodecIsVolKnobNode */
1517DECLISNODEOFTYPE(VolKnob)
1518/* hdaCodecIsReservedNode */
1519DECLISNODEOFTYPE(Reserved)
1520
1521
1522/*
1523 * Misc helpers.
1524 */
1525static int hdaCodecToAudVolume(PHDACODEC pThis, AMPLIFIER *pAmp, PDMAUDIOMIXERCTL enmMixerCtl)
1526{
1527 uint8_t iDir;
1528 switch (enmMixerCtl)
1529 {
1530 case PDMAUDIOMIXERCTL_VOLUME:
1531 case PDMAUDIOMIXERCTL_FRONT:
1532 iDir = AMPLIFIER_OUT;
1533 break;
1534 case PDMAUDIOMIXERCTL_LINE_IN:
1535 case PDMAUDIOMIXERCTL_MIC_IN:
1536 iDir = AMPLIFIER_IN;
1537 break;
1538 default:
1539 AssertMsgFailedReturn(("Invalid mixer control %ld\n", enmMixerCtl), VERR_INVALID_PARAMETER);
1540 break;
1541 }
1542
1543 int iMute;
1544 iMute = AMPLIFIER_REGISTER(*pAmp, iDir, AMPLIFIER_LEFT, 0) & RT_BIT(7);
1545 iMute |= AMPLIFIER_REGISTER(*pAmp, iDir, AMPLIFIER_RIGHT, 0) & RT_BIT(7);
1546 iMute >>=7;
1547 iMute &= 0x1;
1548
1549 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, iDir, AMPLIFIER_LEFT, 0) & 0x7f;
1550 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, iDir, AMPLIFIER_RIGHT, 0) & 0x7f;
1551
1552 /*
1553 * The STAC9220 volume controls have 0 to -96dB attenuation range in 128 steps.
1554 * We have 0 to -96dB range in 256 steps. HDA volume setting of 127 must map
1555 * to 255 internally (0dB), while HDA volume setting of 0 (-96dB) should map
1556 * to 1 (rather than zero) internally.
1557 */
1558 lVol = (lVol + 1) * (2 * 255) / 256;
1559 rVol = (rVol + 1) * (2 * 255) / 256;
1560
1561 PDMAUDIOVOLUME Vol = { RT_BOOL(iMute), lVol, rVol };
1562 return pThis->pfnMixerSetVolume(pThis->pHDAState, enmMixerCtl, &Vol);
1563}
1564
1565DECLINLINE(void) hdaCodecSetRegister(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset, uint32_t mask)
1566{
1567 Assert((pu32Reg && u8Offset < 32));
1568 *pu32Reg &= ~(mask << u8Offset);
1569 *pu32Reg |= (u32Cmd & mask) << u8Offset;
1570}
1571
1572DECLINLINE(void) hdaCodecSetRegisterU8(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset)
1573{
1574 hdaCodecSetRegister(pu32Reg, u32Cmd, u8Offset, CODEC_VERB_8BIT_DATA);
1575}
1576
1577DECLINLINE(void) hdaCodecSetRegisterU16(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset)
1578{
1579 hdaCodecSetRegister(pu32Reg, u32Cmd, u8Offset, CODEC_VERB_16BIT_DATA);
1580}
1581
1582
1583/*
1584 * Verb processor functions.
1585 */
1586DECLINLINE(bool) vrbIsValidNode(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1587{
1588 AssertPtrReturn(pThis, false);
1589 AssertPtrReturn(pResp, false);
1590
1591 Assert(CODEC_CAD(cmd) == pThis->id);
1592 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1593 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1594 {
1595 *pResp = 0;
1596
1597 AssertMsgFailed(("Invalid node address: 0x%x (NID=0x%x [%RU8])\n", cmd, CODEC_NID(cmd)));
1598 return false;
1599 }
1600
1601 return true;
1602}
1603
1604static DECLCALLBACK(int) vrbProcUnimplemented(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1605{
1606 LogFlowFunc(("cmd(raw:%x: cad:%x, d:%c, nid:%x, verb:%x)\n", cmd,
1607 CODEC_CAD(cmd), CODEC_DIRECT(cmd) ? 'N' : 'Y', CODEC_NID(cmd), CODEC_VERBDATA(cmd)));
1608 *pResp = 0;
1609 return VINF_SUCCESS;
1610}
1611
1612static DECLCALLBACK(int) vrbProcBreak(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1613{
1614 int rc;
1615 rc = vrbProcUnimplemented(pThis, cmd, pResp);
1616 *pResp |= CODEC_RESPONSE_UNSOLICITED;
1617 return rc;
1618}
1619
1620/* B-- */
1621static DECLCALLBACK(int) vrbProcGetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1622{
1623 if (!vrbIsValidNode(pThis, cmd, pResp))
1624 return VINF_SUCCESS;
1625
1626 *pResp = 0;
1627
1628 /* HDA spec 7.3.3.7 Note A */
1629 /** @todo: If index out of range response should be 0. */
1630 uint8_t u8Index = CODEC_GET_AMP_DIRECTION(cmd) == AMPLIFIER_OUT ? 0 : CODEC_GET_AMP_INDEX(cmd);
1631
1632 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)];
1633 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1634 *pResp = AMPLIFIER_REGISTER(pNode->dac.B_params,
1635 CODEC_GET_AMP_DIRECTION(cmd),
1636 CODEC_GET_AMP_SIDE(cmd),
1637 u8Index);
1638 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1639 *pResp = AMPLIFIER_REGISTER(pNode->adcvol.B_params,
1640 CODEC_GET_AMP_DIRECTION(cmd),
1641 CODEC_GET_AMP_SIDE(cmd),
1642 u8Index);
1643 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1644 *pResp = AMPLIFIER_REGISTER(pNode->adcmux.B_params,
1645 CODEC_GET_AMP_DIRECTION(cmd),
1646 CODEC_GET_AMP_SIDE(cmd),
1647 u8Index);
1648 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1649 *pResp = AMPLIFIER_REGISTER(pNode->pcbeep.B_params,
1650 CODEC_GET_AMP_DIRECTION(cmd),
1651 CODEC_GET_AMP_SIDE(cmd),
1652 u8Index);
1653 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1654 *pResp = AMPLIFIER_REGISTER(pNode->port.B_params,
1655 CODEC_GET_AMP_DIRECTION(cmd),
1656 CODEC_GET_AMP_SIDE(cmd),
1657 u8Index);
1658 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1659 *pResp = AMPLIFIER_REGISTER(pNode->adc.B_params,
1660 CODEC_GET_AMP_DIRECTION(cmd),
1661 CODEC_GET_AMP_SIDE(cmd),
1662 u8Index);
1663 else
1664 LogRel2(("HDA: Warning: Unhandled get amplifier command: 0x%x (NID=0x%x [%RU8])\n", cmd, CODEC_NID(cmd)));
1665
1666 return VINF_SUCCESS;
1667}
1668
1669/* 3-- */
1670static DECLCALLBACK(int) vrbProcSetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1671{
1672 if (!vrbIsValidNode(pThis, cmd, pResp))
1673 return VINF_SUCCESS;
1674
1675 *pResp = 0;
1676
1677 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)];
1678 AMPLIFIER *pAmplifier = NULL;
1679 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1680 pAmplifier = &pNode->dac.B_params;
1681 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1682 pAmplifier = &pNode->adcvol.B_params;
1683 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1684 pAmplifier = &pNode->adcmux.B_params;
1685 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1686 pAmplifier = &pNode->pcbeep.B_params;
1687 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1688 pAmplifier = &pNode->port.B_params;
1689 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1690 pAmplifier = &pNode->adc.B_params;
1691 else
1692 LogRel2(("HDA: Warning: Unhandled set amplifier command: 0x%x (Payload=%RU16, NID=0x%x [%RU8])\n",
1693 cmd, CODEC_VERB_PAYLOAD16(cmd), CODEC_NID(cmd)));
1694
1695 if (!pAmplifier)
1696 return VINF_SUCCESS;
1697
1698 bool fIsOut = CODEC_SET_AMP_IS_OUT_DIRECTION(cmd);
1699 bool fIsIn = CODEC_SET_AMP_IS_IN_DIRECTION(cmd);
1700 bool fIsRight = CODEC_SET_AMP_IS_RIGHT_SIDE(cmd);
1701 bool fIsLeft = CODEC_SET_AMP_IS_LEFT_SIDE(cmd);
1702 uint8_t u8Index = CODEC_SET_AMP_INDEX(cmd);
1703
1704 if ( (!fIsLeft && !fIsRight)
1705 || (!fIsOut && !fIsIn))
1706 return VINF_SUCCESS;
1707
1708 if (fIsIn)
1709 {
1710 if (fIsLeft)
1711 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_LEFT, u8Index), cmd, 0);
1712 if (fIsRight)
1713 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_RIGHT, u8Index), cmd, 0);
1714
1715 /** @todo Fix ID of u8AdcVolsLineIn! */
1716 hdaCodecToAudVolume(pThis, pAmplifier, PDMAUDIOMIXERCTL_LINE_IN);
1717 }
1718 if (fIsOut)
1719 {
1720 if (fIsLeft)
1721 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_LEFT, u8Index), cmd, 0);
1722 if (fIsRight)
1723 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_RIGHT, u8Index), cmd, 0);
1724
1725 if (CODEC_NID(cmd) == pThis->u8DacLineOut)
1726 hdaCodecToAudVolume(pThis, pAmplifier, PDMAUDIOMIXERCTL_FRONT);
1727 }
1728
1729 return VINF_SUCCESS;
1730}
1731
1732static DECLCALLBACK(int) vrbProcGetParameter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1733{
1734 if (!vrbIsValidNode(pThis, cmd, pResp))
1735 return VINF_SUCCESS;
1736
1737 Assert((cmd & CODEC_VERB_8BIT_DATA) < CODECNODE_F00_PARAM_LENGTH);
1738 if ((cmd & CODEC_VERB_8BIT_DATA) >= CODECNODE_F00_PARAM_LENGTH)
1739 {
1740 *pResp = 0;
1741
1742 LogFlowFunc(("invalid F00 parameter %d\n", (cmd & CODEC_VERB_8BIT_DATA)));
1743 return VINF_SUCCESS;
1744 }
1745
1746 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA];
1747 return VINF_SUCCESS;
1748}
1749
1750/* F01 */
1751static DECLCALLBACK(int) vrbProcGetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1752{
1753 if (!vrbIsValidNode(pThis, cmd, pResp))
1754 return VINF_SUCCESS;
1755
1756 *pResp = 0;
1757
1758 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1759 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
1760 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1761 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
1762 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1763 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param;
1764 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1765 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
1766 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1767 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
1768 else
1769 LogRel2(("HDA: Warning: Unhandled get connection select control command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
1770
1771 return VINF_SUCCESS;
1772}
1773
1774/* 701 */
1775static DECLCALLBACK(int) vrbProcSetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1776{
1777 if (!vrbIsValidNode(pThis, cmd, pResp))
1778 return VINF_SUCCESS;
1779
1780 *pResp = 0;
1781
1782 uint32_t *pu32Reg = NULL;
1783 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1784 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
1785 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1786 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
1787 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1788 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param;
1789 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1790 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
1791 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1792 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
1793 else
1794 LogRel2(("HDA: Warning: Unhandled set connection select control command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
1795
1796 if (pu32Reg)
1797 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1798
1799 return VINF_SUCCESS;
1800}
1801
1802/* F07 */
1803static DECLCALLBACK(int) vrbProcGetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1804{
1805 if (!vrbIsValidNode(pThis, cmd, pResp))
1806 return VINF_SUCCESS;
1807
1808 *pResp = 0;
1809
1810 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1811 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param;
1812 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1813 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
1814 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1815 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
1816 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
1817 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
1818 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1819 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
1820 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
1821 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
1822 else
1823 LogRel2(("HDA: Warning: Unhandled get pin control command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
1824
1825 return VINF_SUCCESS;
1826}
1827
1828/* 707 */
1829static DECLCALLBACK(int) vrbProcSetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1830{
1831 if (!vrbIsValidNode(pThis, cmd, pResp))
1832 return VINF_SUCCESS;
1833
1834 *pResp = 0;
1835
1836 uint32_t *pu32Reg = NULL;
1837 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1838 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param;
1839 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1840 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
1841 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1842 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
1843 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
1844 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
1845 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1846 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
1847 else if ( hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))
1848 && CODEC_NID(cmd) == 0x1b)
1849 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
1850 else
1851 LogRel2(("HDA: Warning: Unhandled set pin control command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
1852
1853 if (pu32Reg)
1854 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1855
1856 return VINF_SUCCESS;
1857}
1858
1859/* F08 */
1860static DECLCALLBACK(int) vrbProcGetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1861{
1862 if (!vrbIsValidNode(pThis, cmd, pResp))
1863 return VINF_SUCCESS;
1864
1865 *pResp = 0;
1866
1867 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1868 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param;
1869 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1870 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1871 else if ((cmd) == STAC9220_NID_AFG)
1872 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
1873 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
1874 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
1875 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1876 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
1877 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1878 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1879 else
1880 LogRel2(("HDA: Warning: Unhandled get unsolicited enabled command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
1881
1882 return VINF_SUCCESS;
1883}
1884
1885/* 708 */
1886static DECLCALLBACK(int) vrbProcSetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1887{
1888 if (!vrbIsValidNode(pThis, cmd, pResp))
1889 return VINF_SUCCESS;
1890
1891 *pResp = 0;
1892
1893 uint32_t *pu32Reg = NULL;
1894 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1895 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param;
1896 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1897 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1898 else if (CODEC_NID(cmd) == STAC9220_NID_AFG)
1899 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
1900 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
1901 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
1902 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1903 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1904 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1905 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
1906 else
1907 LogRel2(("HDA: Warning: Unhandled set unsolicited enabled command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
1908
1909 if (pu32Reg)
1910 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1911
1912 return VINF_SUCCESS;
1913}
1914
1915/* F09 */
1916static DECLCALLBACK(int) vrbProcGetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1917{
1918 if (!vrbIsValidNode(pThis, cmd, pResp))
1919 return VINF_SUCCESS;
1920
1921 *pResp = 0;
1922
1923 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1924 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param;
1925 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1926 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
1927 else
1928 LogRel2(("HDA: Warning: Unhandled get pin sense command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
1929
1930 return VINF_SUCCESS;
1931}
1932
1933/* 709 */
1934static DECLCALLBACK(int) vrbProcSetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1935{
1936 if (!vrbIsValidNode(pThis, cmd, pResp))
1937 return VINF_SUCCESS;
1938
1939 *pResp = 0;
1940
1941 uint32_t *pu32Reg = NULL;
1942 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1943 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param;
1944 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1945 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
1946 else
1947 LogRel2(("HDA: Warning: Unhandled set pin sense command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
1948
1949 if (pu32Reg)
1950 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1951
1952 return VINF_SUCCESS;
1953}
1954
1955static DECLCALLBACK(int) vrbProcGetConnectionListEntry(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1956{
1957 if (!vrbIsValidNode(pThis, cmd, pResp))
1958 return VINF_SUCCESS;
1959
1960 *pResp = 0;
1961
1962 Assert((cmd & CODEC_VERB_8BIT_DATA) < CODECNODE_F02_PARAM_LENGTH);
1963 if ((cmd & CODEC_VERB_8BIT_DATA) >= CODECNODE_F02_PARAM_LENGTH)
1964 {
1965 LogFlowFunc(("access to invalid F02 index %d\n", (cmd & CODEC_VERB_8BIT_DATA)));
1966 return VINF_SUCCESS;
1967 }
1968 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA];
1969 return VINF_SUCCESS;
1970}
1971
1972/* F03 */
1973static DECLCALLBACK(int) vrbProcGetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1974{
1975 if (!vrbIsValidNode(pThis, cmd, pResp))
1976 return VINF_SUCCESS;
1977
1978 *pResp = 0;
1979
1980 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1981 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param;
1982
1983 return VINF_SUCCESS;
1984}
1985
1986/* 703 */
1987static DECLCALLBACK(int) vrbProcSetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1988{
1989 if (!vrbIsValidNode(pThis, cmd, pResp))
1990 return VINF_SUCCESS;
1991
1992 *pResp = 0;
1993
1994 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1995 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0);
1996 return VINF_SUCCESS;
1997}
1998
1999/* F0D */
2000static DECLCALLBACK(int) vrbProcGetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2001{
2002 if (!vrbIsValidNode(pThis, cmd, pResp))
2003 return VINF_SUCCESS;
2004
2005 *pResp = 0;
2006
2007 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2008 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param;
2009 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2010 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param;
2011
2012 return VINF_SUCCESS;
2013}
2014
2015static int codecSetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset, uint64_t *pResp)
2016{
2017 if (!vrbIsValidNode(pThis, cmd, pResp))
2018 return VINF_SUCCESS;
2019
2020 *pResp = 0;
2021
2022 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2023 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset);
2024 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2025 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset);
2026 return VINF_SUCCESS;
2027}
2028
2029/* 70D */
2030static DECLCALLBACK(int) vrbProcSetDigitalConverter1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2031{
2032 return codecSetDigitalConverter(pThis, cmd, 0, pResp);
2033}
2034
2035/* 70E */
2036static DECLCALLBACK(int) vrbProcSetDigitalConverter2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2037{
2038 return codecSetDigitalConverter(pThis, cmd, 8, pResp);
2039}
2040
2041/* F20 */
2042static DECLCALLBACK(int) vrbProcGetSubId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2043{
2044 Assert(CODEC_CAD(cmd) == pThis->id);
2045 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2046 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2047 {
2048 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2049 return VINF_SUCCESS;
2050 }
2051 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2052 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
2053 else
2054 *pResp = 0;
2055 return VINF_SUCCESS;
2056}
2057
2058static int codecSetSubIdX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset)
2059{
2060 Assert(CODEC_CAD(cmd) == pThis->id);
2061 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2062 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2063 {
2064 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2065 return VINF_SUCCESS;
2066 }
2067 uint32_t *pu32Reg;
2068 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2069 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
2070 else
2071 AssertFailedReturn(VINF_SUCCESS);
2072 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset);
2073 return VINF_SUCCESS;
2074}
2075
2076/* 720 */
2077static DECLCALLBACK(int) vrbProcSetSubId0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2078{
2079 *pResp = 0;
2080 return codecSetSubIdX(pThis, cmd, 0);
2081}
2082
2083/* 721 */
2084static DECLCALLBACK(int) vrbProcSetSubId1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2085{
2086 *pResp = 0;
2087 return codecSetSubIdX(pThis, cmd, 8);
2088}
2089
2090/* 722 */
2091static DECLCALLBACK(int) vrbProcSetSubId2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2092{
2093 *pResp = 0;
2094 return codecSetSubIdX(pThis, cmd, 16);
2095}
2096
2097/* 723 */
2098static DECLCALLBACK(int) vrbProcSetSubId3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2099{
2100 *pResp = 0;
2101 return codecSetSubIdX(pThis, cmd, 24);
2102}
2103
2104static DECLCALLBACK(int) vrbProcReset(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2105{
2106 Assert(CODEC_CAD(cmd) == pThis->id);
2107 Assert(CODEC_NID(cmd) == STAC9220_NID_AFG);
2108 if ( CODEC_NID(cmd) == STAC9220_NID_AFG
2109 && pThis->pfnCodecNodeReset)
2110 {
2111 uint8_t i;
2112 LogFlowFunc(("enters reset\n"));
2113 Assert(pThis->pfnCodecNodeReset);
2114 for (i = 0; i < pThis->cTotalNodes; ++i)
2115 {
2116 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]);
2117 }
2118 pThis->fInReset = false;
2119 LogFlowFunc(("exits reset\n"));
2120 }
2121 *pResp = 0;
2122 return VINF_SUCCESS;
2123}
2124
2125/* F05 */
2126static DECLCALLBACK(int) vrbProcGetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2127{
2128 if (!vrbIsValidNode(pThis, cmd, pResp))
2129 return VINF_SUCCESS;
2130
2131 *pResp = 0;
2132
2133 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2134 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
2135 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2136 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
2137 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2138 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
2139 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2140 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F05_param;
2141 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2142 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
2143 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2144 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
2145 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2146 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
2147 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2148 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
2149 else
2150 LogRel2(("HDA: Warning: Unhandled get power state command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2151
2152 LogFunc(("NID=0x%x, fReset=%RTbool, fStopOk=%RTbool, Set=%RU8, Act=%RU8\n",
2153 CODEC_NID(cmd), CODEC_F05_IS_RESET(*pResp), CODEC_F05_IS_STOPOK(*pResp), CODEC_F05_SET(*pResp), CODEC_F05_ACT(*pResp)));
2154 return VINF_SUCCESS;
2155}
2156
2157/* 705 */
2158static DECLCALLBACK(int) vrbProcSetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2159{
2160 if (!vrbIsValidNode(pThis, cmd, pResp))
2161 return VINF_SUCCESS;
2162
2163 *pResp = 0;
2164
2165 uint32_t *pu32Reg = NULL;
2166 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2167 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
2168 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2169 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
2170 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2171 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
2172 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2173 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F05_param;
2174 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2175 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
2176 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2177 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
2178 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2179 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
2180 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2181 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
2182 else
2183 LogRel2(("HDA: Warning: Unhandled set power state command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2184
2185 if (!pu32Reg)
2186 return VINF_SUCCESS;
2187
2188 bool fReset = CODEC_F05_IS_RESET (*pu32Reg);
2189 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32Reg);
2190 uint8_t uPwrAct = CODEC_F05_ACT (*pu32Reg);
2191 uint8_t uPwrSet = CODEC_F05_SET (*pu32Reg);
2192 uint8_t uPwrCmd = CODEC_F05_SET (cmd);
2193
2194 LogFunc(("[NID=0x%x] Cmd=D%RU8, Act=D%RU8, Set=D%RU8 (AFG Act=D%RU8, Set=D%RU8)\n",
2195 CODEC_NID(cmd), uPwrCmd, uPwrAct, uPwrSet,
2196 CODEC_F05_ACT(pThis->paNodes[STAC9220_NID_AFG].afg.u32F05_param),
2197 CODEC_F05_SET(pThis->paNodes[STAC9220_NID_AFG].afg.u32F05_param)));
2198
2199 const uint8_t uAFGPwrSet = CODEC_F05_SET(pThis->paNodes[STAC9220_NID_AFG].afg.u32F05_param);
2200
2201 /* If this is the AFG node, PS-Act always matches the PS-Set power state.*/
2202 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2203 {
2204 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, uPwrCmd /* PS-Act */, uPwrCmd /* PS-Set */);
2205
2206 /* Propagate to all other nodes under this AFG. */
2207 LogFunc(("Propagating Set=D%RU8 to all nodes ...\n", uPwrCmd));
2208
2209#define PROPAGATE_PWR_STATE(_aList, _aMember) \
2210 { \
2211 const uint8_t *pu8NodeIndex = &_aList[0]; \
2212 while (*(pu8NodeIndex++)) \
2213 { \
2214 pThis->paNodes[*pu8NodeIndex]._aMember.u32F05_param = \
2215 CODEC_MAKE_F05(fReset, fStopOk, 0, RT_MIN((uAFGPwrSet + 1), CODEC_F05_D3), \
2216 uPwrCmd /* Always update PS-Set with command power state just received. */); \
2217 LogFunc(("\t[NID=0x%x]: Act=D%RU8, Set=D%RU8\n", *pu8NodeIndex, \
2218 CODEC_F05_ACT(pThis->paNodes[*pu8NodeIndex]._aMember.u32F05_param), \
2219 CODEC_F05_SET(pThis->paNodes[*pu8NodeIndex]._aMember.u32F05_param))); \
2220 } \
2221 }
2222
2223 PROPAGATE_PWR_STATE(pThis->au8Dacs, dac);
2224 PROPAGATE_PWR_STATE(pThis->au8Adcs, adc);
2225 PROPAGATE_PWR_STATE(pThis->au8DigInPins, digin);
2226 PROPAGATE_PWR_STATE(pThis->au8DigOutPins, digout);
2227 PROPAGATE_PWR_STATE(pThis->au8SpdifIns, spdifin);
2228 PROPAGATE_PWR_STATE(pThis->au8SpdifOuts, spdifout);
2229 PROPAGATE_PWR_STATE(pThis->au8Reserveds, reserved);
2230
2231#undef PROPAGATE_PWR_STATE
2232 }
2233 /*
2234 * If this node is a reqular node (not the AFG one), adpopt PS-Set of the AFG node
2235 * as PS-Set of this node. PS-Act always is one level under PS-Set here.
2236 */
2237 else
2238 {
2239 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0,
2240 RT_MIN((uAFGPwrSet + 1), CODEC_F05_D3),
2241 uPwrCmd /* Always update PS-Set with command power state just received. */);
2242 }
2243
2244 if (pu32Reg)
2245 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2246
2247 LogFunc(("[NID=0x%x] fReset=%RTbool, fStopOk=%RTbool, Act=D%RU8, Set=D%RU8\n",
2248 CODEC_NID(cmd), fReset, fStopOk, CODEC_F05_ACT(*pu32Reg), CODEC_F05_SET(*pu32Reg)));
2249
2250 return VINF_SUCCESS;
2251}
2252
2253static DECLCALLBACK(int) vrbProcGetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2254{
2255 if (!vrbIsValidNode(pThis, cmd, pResp))
2256 return VINF_SUCCESS;
2257
2258 *pResp = 0;
2259
2260 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2261 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
2262 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2263 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
2264 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2265 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
2266 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2267 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
2268 else if (CODEC_NID(cmd) == STAC9221_NID_I2S_OUT)
2269 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
2270 else
2271 LogRel2(("HDA: Warning: Unhandled get stream ID command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2272
2273 LogFlowFunc(("[NID0x%x] Stream ID is 0x%x\n",
2274 CODEC_NID(cmd), CODEC_F00_06_GET_STREAM_ID(*pResp)));
2275
2276 return VINF_SUCCESS;
2277}
2278
2279/* F06 */
2280static DECLCALLBACK(int) vrbProcSetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2281{
2282 if (!vrbIsValidNode(pThis, cmd, pResp))
2283 return VINF_SUCCESS;
2284
2285 *pResp = 0;
2286
2287 uint32_t *pu32Addr = NULL;
2288 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2289 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
2290 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2291 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
2292 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2293 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
2294 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2295 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
2296 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2297 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
2298 else
2299 LogRel2(("HDA: Warning: Unhandled set stream ID command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2300
2301 LogFlowFunc(("[NID0x%x] Setting new stream ID to 0x%x\n",
2302 CODEC_NID(cmd), CODEC_F00_06_GET_STREAM_ID(cmd)));
2303
2304 if (pu32Addr)
2305 hdaCodecSetRegisterU8(pu32Addr, cmd, 0);
2306
2307 return VINF_SUCCESS;
2308}
2309
2310/* A0 */
2311static DECLCALLBACK(int) vrbProcGetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2312{
2313 if (!vrbIsValidNode(pThis, cmd, pResp))
2314 return VINF_SUCCESS;
2315
2316 *pResp = 0;
2317
2318 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2319 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param;
2320 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2321 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param;
2322 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2323 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param;
2324 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2325 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param;
2326 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2327 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32A_param;
2328 else
2329 LogRel2(("HDA: Warning: Unhandled get converter format command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2330
2331 return VINF_SUCCESS;
2332}
2333
2334/* Also see section 3.7.1. */
2335static DECLCALLBACK(int) vrbProcSetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2336{
2337 if (!vrbIsValidNode(pThis, cmd, pResp))
2338 return VINF_SUCCESS;
2339
2340 *pResp = 0;
2341
2342 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2343 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0);
2344 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2345 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0);
2346 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2347 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0);
2348 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2349 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0);
2350 else
2351 LogRel2(("HDA: Warning: Unhandled set converter format command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2352
2353 return VINF_SUCCESS;
2354}
2355
2356/* F0C */
2357static DECLCALLBACK(int) vrbProcGetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2358{
2359 if (!vrbIsValidNode(pThis, cmd, pResp))
2360 return VINF_SUCCESS;
2361
2362 *pResp = 0;
2363
2364 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
2365 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
2366 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2367 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
2368 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2369 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
2370 else
2371 LogRel2(("HDA: Warning: Unhandled get EAPD/BTL enabled command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2372
2373 return VINF_SUCCESS;
2374}
2375
2376/* 70C */
2377static DECLCALLBACK(int) vrbProcSetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2378{
2379 if (!vrbIsValidNode(pThis, cmd, pResp))
2380 return VINF_SUCCESS;
2381
2382 *pResp = 0;
2383
2384 uint32_t *pu32Reg = NULL;
2385 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
2386 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
2387 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2388 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
2389 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2390 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
2391 else
2392 LogRel2(("HDA: Warning: Unhandled set EAPD/BTL enabled command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2393
2394 if (pu32Reg)
2395 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2396
2397 return VINF_SUCCESS;
2398}
2399
2400/* F0F */
2401static DECLCALLBACK(int) vrbProcGetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2402{
2403 if (!vrbIsValidNode(pThis, cmd, pResp))
2404 return VINF_SUCCESS;
2405
2406 *pResp = 0;
2407
2408 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
2409 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
2410 else
2411 LogRel2(("HDA: Warning: Unhandled get volume knob control command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2412
2413 return VINF_SUCCESS;
2414}
2415
2416/* 70F */
2417static DECLCALLBACK(int) vrbProcSetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2418{
2419 if (!vrbIsValidNode(pThis, cmd, pResp))
2420 return VINF_SUCCESS;
2421
2422 *pResp = 0;
2423
2424 uint32_t *pu32Reg = NULL;
2425 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
2426 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
2427 else
2428 LogRel2(("HDA: Warning: Unhandled set volume knob control command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2429
2430 if (pu32Reg)
2431 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2432
2433 return VINF_SUCCESS;
2434}
2435
2436/* F15 */
2437static DECLCALLBACK(int) vrbProcGetGPIOData(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2438{
2439 if (!vrbIsValidNode(pThis, cmd, pResp))
2440 return VINF_SUCCESS;
2441
2442 *pResp = 0;
2443
2444 return VINF_SUCCESS;
2445}
2446
2447/* 715 */
2448static DECLCALLBACK(int) vrbProcSetGPIOData(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2449{
2450 if (!vrbIsValidNode(pThis, cmd, pResp))
2451 return VINF_SUCCESS;
2452
2453 *pResp = 0;
2454
2455 return VINF_SUCCESS;
2456}
2457
2458/* F16 */
2459static DECLCALLBACK(int) vrbProcGetGPIOEnableMask(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2460{
2461 if (!vrbIsValidNode(pThis, cmd, pResp))
2462 return VINF_SUCCESS;
2463
2464 *pResp = 0;
2465
2466 return VINF_SUCCESS;
2467}
2468
2469/* 716 */
2470static DECLCALLBACK(int) vrbProcSetGPIOEnableMask(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2471{
2472 if (!vrbIsValidNode(pThis, cmd, pResp))
2473 return VINF_SUCCESS;
2474
2475 *pResp = 0;
2476
2477 return VINF_SUCCESS;
2478}
2479
2480/* F17 */
2481static DECLCALLBACK(int) vrbProcGetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2482{
2483 if (!vrbIsValidNode(pThis, cmd, pResp))
2484 return VINF_SUCCESS;
2485
2486 *pResp = 0;
2487
2488 /* Note: this is true for ALC885. */
2489 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2490 *pResp = pThis->paNodes[1].afg.u32F17_param;
2491 else
2492 LogRel2(("HDA: Warning: Unhandled get GPIO unsolisted command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2493
2494 return VINF_SUCCESS;
2495}
2496
2497/* 717 */
2498static DECLCALLBACK(int) vrbProcSetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2499{
2500 if (!vrbIsValidNode(pThis, cmd, pResp))
2501 return VINF_SUCCESS;
2502
2503 *pResp = 0;
2504
2505 uint32_t *pu32Reg = NULL;
2506 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2507 pu32Reg = &pThis->paNodes[1].afg.u32F17_param;
2508 else
2509 LogRel2(("HDA: Warning: Unhandled set GPIO unsolisted command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2510
2511 if (pu32Reg)
2512 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2513
2514 return VINF_SUCCESS;
2515}
2516
2517/* F1C */
2518static DECLCALLBACK(int) vrbProcGetConfig(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2519{
2520 if (!vrbIsValidNode(pThis, cmd, pResp))
2521 return VINF_SUCCESS;
2522
2523 *pResp = 0;
2524
2525 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
2526 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
2527 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2528 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
2529 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2530 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
2531 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
2532 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
2533 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
2534 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
2535 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2536 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
2537 else
2538 LogRel2(("HDA: Warning: Unhandled get config command for NID0x%x: 0x%x\n", CODEC_NID(cmd), cmd));
2539
2540 return VINF_SUCCESS;
2541}
2542
2543static int codecSetConfigX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset)
2544{
2545 uint32_t *pu32Reg = NULL;
2546 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
2547 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
2548 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2549 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
2550 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2551 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
2552 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
2553 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
2554 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
2555 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
2556 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2557 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
2558 else
2559 LogRel2(("HDA: Warning: Unhandled set config command (%RU8) for NID0x%x: 0x%x\n", u8Offset, CODEC_NID(cmd), cmd));
2560
2561 if (pu32Reg)
2562 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset);
2563
2564 return VINF_SUCCESS;
2565}
2566
2567/* 71C */
2568static DECLCALLBACK(int) vrbProcSetConfig0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2569{
2570 if (!vrbIsValidNode(pThis, cmd, pResp))
2571 return VINF_SUCCESS;
2572
2573 *pResp = 0;
2574 return codecSetConfigX(pThis, cmd, 0);
2575}
2576
2577/* 71D */
2578static DECLCALLBACK(int) vrbProcSetConfig1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2579{
2580 if (!vrbIsValidNode(pThis, cmd, pResp))
2581 return VINF_SUCCESS;
2582
2583 *pResp = 0;
2584 return codecSetConfigX(pThis, cmd, 8);
2585}
2586
2587/* 71E */
2588static DECLCALLBACK(int) vrbProcSetConfig2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2589{
2590 if (!vrbIsValidNode(pThis, cmd, pResp))
2591 return VINF_SUCCESS;
2592
2593 *pResp = 0;
2594 return codecSetConfigX(pThis, cmd, 16);
2595}
2596
2597/* 71E */
2598static DECLCALLBACK(int) vrbProcSetConfig3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2599{
2600 if (!vrbIsValidNode(pThis, cmd, pResp))
2601 return VINF_SUCCESS;
2602
2603 *pResp = 0;
2604 return codecSetConfigX(pThis, cmd, 24);
2605}
2606
2607
2608/**
2609 * HDA codec verb map.
2610 * @todo Any reason not to use binary search here?
2611 */
2612static const CODECVERB g_aCodecVerbs[] =
2613{
2614/* verb | verb mask | callback */
2615/* ----------- -------------------- ----------------------- */
2616 { 0x000F0000, CODEC_VERB_8BIT_CMD , vrbProcGetParameter },
2617 { 0x000F0100, CODEC_VERB_8BIT_CMD , vrbProcGetConSelectCtrl },
2618 { 0x00070100, CODEC_VERB_8BIT_CMD , vrbProcSetConSelectCtrl },
2619 { 0x000F0600, CODEC_VERB_8BIT_CMD , vrbProcGetStreamId },
2620 { 0x00070600, CODEC_VERB_8BIT_CMD , vrbProcSetStreamId },
2621 { 0x000F0700, CODEC_VERB_8BIT_CMD , vrbProcGetPinCtrl },
2622 { 0x00070700, CODEC_VERB_8BIT_CMD , vrbProcSetPinCtrl },
2623 { 0x000F0800, CODEC_VERB_8BIT_CMD , vrbProcGetUnsolicitedEnabled },
2624 { 0x00070800, CODEC_VERB_8BIT_CMD , vrbProcSetUnsolicitedEnabled },
2625 { 0x000F0900, CODEC_VERB_8BIT_CMD , vrbProcGetPinSense },
2626 { 0x00070900, CODEC_VERB_8BIT_CMD , vrbProcSetPinSense },
2627 { 0x000F0200, CODEC_VERB_8BIT_CMD , vrbProcGetConnectionListEntry },
2628 { 0x000F0300, CODEC_VERB_8BIT_CMD , vrbProcGetProcessingState },
2629 { 0x00070300, CODEC_VERB_8BIT_CMD , vrbProcSetProcessingState },
2630 { 0x000F0D00, CODEC_VERB_8BIT_CMD , vrbProcGetDigitalConverter },
2631 { 0x00070D00, CODEC_VERB_8BIT_CMD , vrbProcSetDigitalConverter1 },
2632 { 0x00070E00, CODEC_VERB_8BIT_CMD , vrbProcSetDigitalConverter2 },
2633 { 0x000F2000, CODEC_VERB_8BIT_CMD , vrbProcGetSubId },
2634 { 0x00072000, CODEC_VERB_8BIT_CMD , vrbProcSetSubId0 },
2635 { 0x00072100, CODEC_VERB_8BIT_CMD , vrbProcSetSubId1 },
2636 { 0x00072200, CODEC_VERB_8BIT_CMD , vrbProcSetSubId2 },
2637 { 0x00072300, CODEC_VERB_8BIT_CMD , vrbProcSetSubId3 },
2638 { 0x0007FF00, CODEC_VERB_8BIT_CMD , vrbProcReset },
2639 { 0x000F0500, CODEC_VERB_8BIT_CMD , vrbProcGetPowerState },
2640 { 0x00070500, CODEC_VERB_8BIT_CMD , vrbProcSetPowerState },
2641 { 0x000F0C00, CODEC_VERB_8BIT_CMD , vrbProcGetEAPD_BTLEnabled },
2642 { 0x00070C00, CODEC_VERB_8BIT_CMD , vrbProcSetEAPD_BTLEnabled },
2643 { 0x000F0F00, CODEC_VERB_8BIT_CMD , vrbProcGetVolumeKnobCtrl },
2644 { 0x00070F00, CODEC_VERB_8BIT_CMD , vrbProcSetVolumeKnobCtrl },
2645 { 0x000F1500, CODEC_VERB_8BIT_CMD , vrbProcGetGPIOData },
2646 { 0x00071500, CODEC_VERB_8BIT_CMD , vrbProcSetGPIOData },
2647 { 0x000F1600, CODEC_VERB_8BIT_CMD , vrbProcGetGPIOEnableMask },
2648 { 0x00071600, CODEC_VERB_8BIT_CMD , vrbProcSetGPIOEnableMask },
2649 { 0x000F1700, CODEC_VERB_8BIT_CMD , vrbProcGetGPIOUnsolisted },
2650 { 0x00071700, CODEC_VERB_8BIT_CMD , vrbProcSetGPIOUnsolisted },
2651 { 0x000F1C00, CODEC_VERB_8BIT_CMD , vrbProcGetConfig },
2652 { 0x00071C00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig0 },
2653 { 0x00071D00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig1 },
2654 { 0x00071E00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig2 },
2655 { 0x00071F00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig3 },
2656 { 0x000A0000, CODEC_VERB_16BIT_CMD, vrbProcGetConverterFormat },
2657 { 0x00020000, CODEC_VERB_16BIT_CMD, vrbProcSetConverterFormat },
2658 { 0x000B0000, CODEC_VERB_16BIT_CMD, vrbProcGetAmplifier },
2659 { 0x00030000, CODEC_VERB_16BIT_CMD, vrbProcSetAmplifier },
2660 /** @todo Implement 0x7e7: IDT Set GPIO (STAC922x only). */
2661};
2662
2663#ifdef DEBUG
2664typedef struct CODECDBGINFO
2665{
2666 /** DBGF info helpers. */
2667 PCDBGFINFOHLP pHlp;
2668 /** Current recursion level. */
2669 uint8_t uLevel;
2670 /** Pointer to codec state. */
2671 PHDACODEC pThis;
2672
2673} CODECDBGINFO, *PCODECDBGINFO;
2674
2675#define CODECDBG_INDENT pInfo->uLevel++;
2676#define CODECDBG_UNINDENT if (pInfo->uLevel) pInfo->uLevel--;
2677
2678#define CODECDBG_PRINT(...) pInfo->pHlp->pfnPrintf(pInfo->pHlp, __VA_ARGS__)
2679#define CODECDBG_PRINTI(...) codecDbgPrintf(pInfo, __VA_ARGS__)
2680
2681static void codecDbgPrintfIndentV(PCODECDBGINFO pInfo, uint16_t uIndent, const char *pszFormat, va_list va)
2682{
2683 char *pszValueFormat;
2684 if (RTStrAPrintfV(&pszValueFormat, pszFormat, va))
2685 {
2686 pInfo->pHlp->pfnPrintf(pInfo->pHlp, "%*s%s", uIndent, "", pszValueFormat);
2687 RTStrFree(pszValueFormat);
2688 }
2689}
2690
2691static void codecDbgPrintf(PCODECDBGINFO pInfo, const char *pszFormat, ...)
2692{
2693 va_list va;
2694 va_start(va, pszFormat);
2695 codecDbgPrintfIndentV(pInfo, pInfo->uLevel * 4, pszFormat, va);
2696 va_end(va);
2697}
2698
2699/* Power state */
2700static void codecDbgPrintNodeRegF05(PCODECDBGINFO pInfo, uint32_t u32Reg)
2701{
2702 codecDbgPrintf(pInfo, "Power (F05): fReset=%RTbool, fStopOk=%RTbool, Set=%RU8, Act=%RU8\n",
2703 CODEC_F05_IS_RESET(u32Reg), CODEC_F05_IS_STOPOK(u32Reg), CODEC_F05_SET(u32Reg), CODEC_F05_ACT(u32Reg));
2704}
2705
2706static void codecDbgPrintNodeRegA(PCODECDBGINFO pInfo, uint32_t u32Reg)
2707{
2708 codecDbgPrintf(pInfo, "RegA: %x\n", u32Reg);
2709}
2710
2711static void codecDbgPrintNodeRegF00(PCODECDBGINFO pInfo, uint32_t *paReg00)
2712{
2713 codecDbgPrintf(pInfo, "Parameters (F00):\n");
2714
2715 CODECDBG_INDENT
2716 codecDbgPrintf(pInfo, "Amplifier Caps:\n");
2717 uint32_t uReg = paReg00[0xD];
2718 CODECDBG_INDENT
2719 codecDbgPrintf(pInfo, "Input Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n",
2720 CODEC_F00_0D_NUM_STEPS(uReg),
2721 CODEC_F00_0D_STEP_SIZE(uReg),
2722 CODEC_F00_0D_OFFSET(uReg),
2723 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg)));
2724
2725 uReg = paReg00[0x12];
2726 codecDbgPrintf(pInfo, "Output Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n",
2727 CODEC_F00_12_NUM_STEPS(uReg),
2728 CODEC_F00_12_STEP_SIZE(uReg),
2729 CODEC_F00_12_OFFSET(uReg),
2730 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg)));
2731 CODECDBG_UNINDENT
2732 CODECDBG_UNINDENT
2733}
2734
2735static void codecDbgPrintNodeAmp(PCODECDBGINFO pInfo, uint32_t *paReg, uint8_t uIdx, uint8_t uDir)
2736{
2737#define CODECDBG_AMP(reg, chan) \
2738 codecDbgPrintf(pInfo, "Amp %RU8 %s %s: In=%RTbool, Out=%RTbool, Left=%RTbool, Right=%RTbool, Idx=%RU8, fMute=%RTbool, uGain=%RU8\n", \
2739 uIdx, chan, uDir == AMPLIFIER_IN ? "In" : "Out", \
2740 RT_BOOL(CODEC_SET_AMP_IS_IN_DIRECTION(reg)), RT_BOOL(CODEC_SET_AMP_IS_OUT_DIRECTION(reg)), \
2741 RT_BOOL(CODEC_SET_AMP_IS_LEFT_SIDE(reg)), RT_BOOL(CODEC_SET_AMP_IS_RIGHT_SIDE(reg)), \
2742 CODEC_SET_AMP_INDEX(reg), RT_BOOL(CODEC_SET_AMP_MUTE(reg)), CODEC_SET_AMP_GAIN(reg));
2743
2744 uint32_t regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_LEFT, uIdx);
2745 CODECDBG_AMP(regAmp, "Left");
2746 regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_RIGHT, uIdx);
2747 CODECDBG_AMP(regAmp, "Right");
2748
2749#undef CODECDBG_AMP
2750}
2751
2752static void codecDbgPrintNodeConnections(PCODECDBGINFO pInfo, PCODECNODE pNode)
2753{
2754 if (pNode->node.au32F00_param[0xE] == 0) /* Directly connected to HDA link. */
2755 {
2756 codecDbgPrintf(pInfo, "[HDA LINK]\n");
2757 return;
2758 }
2759}
2760
2761static void codecDbgPrintNode(PCODECDBGINFO pInfo, PCODECNODE pNode)
2762{
2763 codecDbgPrintf(pInfo, "Node 0x%02x (%02RU8): ", pNode->node.id, pNode->node.id);
2764
2765 if (pNode->node.id == STAC9220_NID_ROOT)
2766 {
2767 CODECDBG_PRINT("ROOT\n");
2768 }
2769 else if (pNode->node.id == STAC9220_NID_AFG)
2770 {
2771 CODECDBG_PRINT("AFG\n");
2772 CODECDBG_INDENT
2773 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2774 codecDbgPrintNodeRegF05(pInfo, pNode->afg.u32F05_param);
2775 CODECDBG_UNINDENT
2776 }
2777 else if (hdaCodecIsPortNode(pInfo->pThis, pNode->node.id))
2778 {
2779 CODECDBG_PRINT("PORT\n");
2780 }
2781 else if (hdaCodecIsDacNode(pInfo->pThis, pNode->node.id))
2782 {
2783 CODECDBG_PRINT("DAC\n");
2784 CODECDBG_INDENT
2785 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2786 codecDbgPrintNodeRegF05(pInfo, pNode->dac.u32F05_param);
2787 codecDbgPrintNodeRegA (pInfo, pNode->dac.u32A_param);
2788 codecDbgPrintNodeAmp (pInfo, pNode->dac.B_params, 0, AMPLIFIER_OUT);
2789 CODECDBG_UNINDENT
2790 }
2791 else if (hdaCodecIsAdcVolNode(pInfo->pThis, pNode->node.id))
2792 {
2793 CODECDBG_PRINT("ADC VOLUME\n");
2794 CODECDBG_INDENT
2795 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2796 codecDbgPrintNodeRegA (pInfo, pNode->adcvol.u32A_params);
2797 codecDbgPrintNodeAmp (pInfo, pNode->adcvol.B_params, 0, AMPLIFIER_IN);
2798 CODECDBG_UNINDENT
2799 }
2800 else if (hdaCodecIsAdcNode(pInfo->pThis, pNode->node.id))
2801 {
2802 CODECDBG_PRINT("ADC\n");
2803 CODECDBG_INDENT
2804 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2805 codecDbgPrintNodeRegF05(pInfo, pNode->adc.u32F05_param);
2806 codecDbgPrintNodeRegA (pInfo, pNode->adc.u32A_param);
2807 codecDbgPrintNodeAmp (pInfo, pNode->adc.B_params, 0, AMPLIFIER_IN);
2808 CODECDBG_UNINDENT
2809 }
2810 else if (hdaCodecIsAdcMuxNode(pInfo->pThis, pNode->node.id))
2811 {
2812 CODECDBG_PRINT("ADC MUX\n");
2813 CODECDBG_INDENT
2814 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2815 codecDbgPrintNodeRegA (pInfo, pNode->adcmux.u32A_param);
2816 codecDbgPrintNodeAmp (pInfo, pNode->adcmux.B_params, 0, AMPLIFIER_IN);
2817 CODECDBG_UNINDENT
2818 }
2819 else if (hdaCodecIsPcbeepNode(pInfo->pThis, pNode->node.id))
2820 {
2821 CODECDBG_PRINT("PC BEEP\n");
2822 }
2823 else if (hdaCodecIsSpdifOutNode(pInfo->pThis, pNode->node.id))
2824 {
2825 CODECDBG_PRINT("SPDIF OUT\n");
2826 }
2827 else if (hdaCodecIsSpdifInNode(pInfo->pThis, pNode->node.id))
2828 {
2829 CODECDBG_PRINT("SPDIF IN\n");
2830 }
2831 else if (hdaCodecIsDigInPinNode(pInfo->pThis, pNode->node.id))
2832 {
2833 CODECDBG_PRINT("DIGITAL IN PIN\n");
2834 }
2835 else if (hdaCodecIsDigOutPinNode(pInfo->pThis, pNode->node.id))
2836 {
2837 CODECDBG_PRINT("DIGITAL OUT PIN\n");
2838 }
2839 else if (hdaCodecIsCdNode(pInfo->pThis, pNode->node.id))
2840 {
2841 CODECDBG_PRINT("CD\n");
2842 }
2843 else if (hdaCodecIsVolKnobNode(pInfo->pThis, pNode->node.id))
2844 {
2845 CODECDBG_PRINT("VOLUME KNOB\n");
2846 }
2847 else if (hdaCodecIsReservedNode(pInfo->pThis, pNode->node.id))
2848 {
2849 CODECDBG_PRINT("RESERVED\n");
2850 }
2851 else
2852 CODECDBG_PRINT("UNKNOWN TYPE 0x%x\n", pNode->node.id);
2853}
2854
2855static DECLCALLBACK(void) codecDbgListNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
2856{
2857 pHlp->pfnPrintf(pHlp, "HDA LINK\n");
2858
2859 CODECDBGINFO dbgInfo;
2860 dbgInfo.pHlp = pHlp;
2861 dbgInfo.pThis = pThis;
2862 dbgInfo.uLevel = 0;
2863
2864 PCODECDBGINFO pInfo = &dbgInfo;
2865
2866 CODECDBG_INDENT
2867 for (uint8_t i = 0; i < pThis->cTotalNodes; i++)
2868 {
2869 PCODECNODE pNode = &pThis->paNodes[i];
2870 if (pNode->node.au32F00_param[0xE] == 0) /* Start with all nodes connected directly to the HDA (Azalia) link. */
2871 codecDbgPrintNode(&dbgInfo, pNode);
2872 }
2873 CODECDBG_UNINDENT
2874}
2875
2876static DECLCALLBACK(void) codecDbgSelector(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
2877{
2878
2879}
2880#endif
2881
2882static DECLCALLBACK(int) codecLookup(PHDACODEC pThis, uint32_t cmd, PPFNHDACODECVERBPROCESSOR pfn)
2883{
2884 Assert(CODEC_CAD(cmd) == pThis->id);
2885
2886 if ( CODEC_VERBDATA(cmd) == 0
2887 || CODEC_NID(cmd) >= pThis->cTotalNodes)
2888 {
2889 *pfn = vrbProcUnimplemented;
2890 AssertMsgFailed(("Unknown / invalid node 0x%x\n", CODEC_NID(cmd)));
2891 return VINF_SUCCESS;
2892 }
2893
2894 for (int i = 0; i < pThis->cVerbs; i++)
2895 {
2896 if ((CODEC_VERBDATA(cmd) & pThis->paVerbs[i].mask) == pThis->paVerbs[i].verb)
2897 {
2898 *pfn = pThis->paVerbs[i].pfn;
2899 return VINF_SUCCESS;
2900 }
2901 }
2902
2903 *pfn = vrbProcUnimplemented;
2904
2905 LogFlowFunc(("[NID0x%x] Callback for %x not found\n", CODEC_NID(cmd), CODEC_VERBDATA(cmd)));
2906 return VINF_SUCCESS;
2907}
2908
2909/*
2910 * APIs exposed to DevHDA.
2911 */
2912
2913int hdaCodecAddStream(PHDACODEC pThis, PDMAUDIOMIXERCTL enmMixerCtl, PPDMAUDIOSTREAMCFG pCfg)
2914{
2915 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2916 AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
2917
2918 int rc = VINF_SUCCESS;
2919
2920 switch (enmMixerCtl)
2921 {
2922 case PDMAUDIOMIXERCTL_LINE_IN:
2923#ifdef VBOX_WITH_HDA_MIC_IN
2924 case PDMAUDIOMIXERCTL_MIC_IN:
2925#endif
2926 {
2927 pCfg->enmDir = PDMAUDIODIR_IN;
2928 break;
2929 }
2930
2931 case PDMAUDIOMIXERCTL_VOLUME:
2932 case PDMAUDIOMIXERCTL_FRONT:
2933 {
2934 pCfg->enmDir = PDMAUDIODIR_OUT;
2935 break;
2936 }
2937
2938 default:
2939 AssertMsgFailed(("Mixer control %ld not implemented\n", enmMixerCtl));
2940 rc = VERR_NOT_IMPLEMENTED;
2941 break;
2942 }
2943
2944 if (RT_SUCCESS(rc))
2945 rc = pThis->pfnMixerAddStream(pThis->pHDAState, enmMixerCtl, pCfg);
2946
2947 LogFlowFuncLeaveRC(rc);
2948 return rc;
2949}
2950
2951int hdaCodecRemoveStream(PHDACODEC pThis, PDMAUDIOMIXERCTL enmMixerCtl)
2952{
2953 return VINF_SUCCESS;
2954}
2955
2956int hdaCodecSaveState(PHDACODEC pThis, PSSMHANDLE pSSM)
2957{
2958 AssertLogRelMsgReturn(pThis->cTotalNodes == STAC9221_NUM_NODES, ("cTotalNodes=%#x, should be 0x1c", pThis->cTotalNodes),
2959 VERR_INTERNAL_ERROR);
2960 SSMR3PutU32(pSSM, pThis->cTotalNodes);
2961 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode)
2962 SSMR3PutStructEx(pSSM, &pThis->paNodes[idxNode].SavedState, sizeof(pThis->paNodes[idxNode].SavedState),
2963 0 /*fFlags*/, g_aCodecNodeFields, NULL /*pvUser*/);
2964 return VINF_SUCCESS;
2965}
2966
2967int hdaCodecLoadState(PHDACODEC pThis, PSSMHANDLE pSSM, uint32_t uVersion)
2968{
2969 PCSSMFIELD pFields;
2970 uint32_t fFlags;
2971 switch (uVersion)
2972 {
2973 case HDA_SSM_VERSION_1:
2974 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2975 pFields = g_aCodecNodeFieldsV1;
2976 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED;
2977 break;
2978
2979 case HDA_SSM_VERSION_2:
2980 case HDA_SSM_VERSION_3:
2981 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2982 pFields = g_aCodecNodeFields;
2983 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED;
2984 break;
2985
2986 /* Since version 4 a flexible node count is supported. */
2987 case HDA_SSM_VERSION_4:
2988 case HDA_SSM_VERSION_5:
2989 case HDA_SSM_VERSION:
2990 {
2991 uint32_t cNodes;
2992 int rc2 = SSMR3GetU32(pSSM, &cNodes);
2993 AssertRCReturn(rc2, rc2);
2994 if (cNodes != 0x1c)
2995 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
2996 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2997
2998 pFields = g_aCodecNodeFields;
2999 fFlags = 0;
3000 break;
3001 }
3002
3003 default:
3004 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3005 }
3006
3007 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode)
3008 {
3009 uint8_t idOld = pThis->paNodes[idxNode].SavedState.Core.id;
3010 int rc = SSMR3GetStructEx(pSSM, &pThis->paNodes[idxNode].SavedState,
3011 sizeof(pThis->paNodes[idxNode].SavedState),
3012 fFlags, pFields, NULL);
3013 if (RT_FAILURE(rc))
3014 return rc;
3015 AssertLogRelMsgReturn(idOld == pThis->paNodes[idxNode].SavedState.Core.id,
3016 ("loaded %#x, expected %#x\n", pThis->paNodes[idxNode].SavedState.Core.id, idOld),
3017 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3018 }
3019
3020 /*
3021 * Update stuff after changing the state.
3022 */
3023 if (hdaCodecIsDacNode(pThis, pThis->u8DacLineOut))
3024 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_FRONT);
3025 else if (hdaCodecIsSpdifOutNode(pThis, pThis->u8DacLineOut))
3026 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].spdifout.B_params, PDMAUDIOMIXERCTL_FRONT);
3027 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
3028
3029 return VINF_SUCCESS;
3030}
3031
3032int hdaCodecDestruct(PHDACODEC pThis)
3033{
3034 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
3035
3036 if (pThis->paNodes)
3037 {
3038 RTMemFree(pThis->paNodes);
3039 pThis->paNodes = NULL;
3040 }
3041
3042 return VINF_SUCCESS;
3043}
3044
3045int hdaCodecConstruct(PPDMDEVINS pDevIns, PHDACODEC pThis,
3046 uint16_t uLUN, PCFGMNODE pCfg)
3047{
3048 AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
3049 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
3050 AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
3051
3052 pThis->id = uLUN;
3053 pThis->paVerbs = &g_aCodecVerbs[0];
3054 pThis->cVerbs = RT_ELEMENTS(g_aCodecVerbs);
3055
3056#ifdef DEBUG
3057 pThis->pfnDbgSelector = codecDbgSelector;
3058 pThis->pfnDbgListNodes = codecDbgListNodes;
3059#endif
3060 pThis->pfnLookup = codecLookup;
3061
3062 int rc = stac9220Construct(pThis);
3063 AssertRC(rc);
3064
3065 /* Common root node initializers. */
3066 pThis->paNodes[STAC9220_NID_ROOT].root.node.au32F00_param[0] = CODEC_MAKE_F00_00(pThis->u16VendorId, pThis->u16DeviceId);
3067 pThis->paNodes[STAC9220_NID_ROOT].root.node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1);
3068
3069 /* Common AFG node initializers. */
3070 pThis->paNodes[STAC9220_NID_AFG].afg.node.au32F00_param[0x4] = CODEC_MAKE_F00_04(0x2, pThis->cTotalNodes - 2);
3071 pThis->paNodes[STAC9220_NID_AFG].afg.node.au32F00_param[0x5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG);
3072 pThis->paNodes[STAC9220_NID_AFG].afg.node.au32F00_param[0xA] = CODEC_F00_0A_44_1KHZ | CODEC_F00_0A_16_BIT;
3073 pThis->paNodes[STAC9220_NID_AFG].afg.u32F20_param = CODEC_MAKE_F20(pThis->u16VendorId, pThis->u8BSKU, pThis->u8AssemblyId);
3074
3075 /* Initialize the streams to some default values (44.1 kHz, 16-bit signed, 2 channels).
3076 * The codec's (fixed) delivery rate is 48kHz, so a frame will be delivered every 20.83us. */
3077 PDMAUDIOSTREAMCFG strmCfg;
3078 strmCfg.uHz = 44100;
3079 strmCfg.cChannels = 2;
3080 strmCfg.enmFormat = AUD_FMT_S16;
3081 strmCfg.enmEndianness = PDMAUDIOHOSTENDIANNESS;
3082
3083 /*
3084 * Output streams.
3085 */
3086 strmCfg.enmDir = PDMAUDIODIR_OUT;
3087
3088 /* Front. */
3089 strmCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
3090 rc = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_FRONT, &strmCfg);
3091 AssertRC(rc);
3092
3093#ifdef VBOX_WITH_HDA_51_SURROUND
3094 /* Center / LFE. */
3095 strmCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_CENTER_LFE;
3096 rc = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_CENTER_LFE, &strmCfg);
3097 AssertRC(rc);
3098
3099 /* Rear. */
3100 strmCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_REAR;
3101 rc = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_REAR, &strmCfg);
3102 AssertRC(rc);
3103#endif
3104
3105 /*
3106 * Input streams.
3107 */
3108 strmCfg.enmDir = PDMAUDIODIR_IN;
3109
3110#ifdef VBOX_WITH_HDA_MIC_IN
3111 strmCfg.DestSource.Source = PDMAUDIORECSOURCE_MIC;
3112 rc = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_MIC_IN, &strmCfg);
3113 AssertRC(rc);
3114#endif
3115 strmCfg.DestSource.Source = PDMAUDIORECSOURCE_LINE;
3116 rc = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_LINE_IN, &strmCfg);
3117 AssertRC(rc);
3118
3119 /*
3120 * Reset nodes.
3121 */
3122 AssertPtr(pThis->paNodes);
3123 AssertPtr(pThis->pfnCodecNodeReset);
3124
3125 for (uint8_t i = 0; i < pThis->cTotalNodes; i++)
3126 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]);
3127
3128 /*
3129 * Set initial volume.
3130 */
3131 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_FRONT);
3132 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
3133#ifdef VBOX_WITH_HDA_MIC_IN
3134 #error "Implement mic-in support!"
3135#endif
3136
3137 return VINF_SUCCESS;
3138}
3139
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