[30985] | 1 | /* $Id: DevHdaCodec.h 98103 2023-01-17 14:15:46Z vboxsync $ */
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| 2 | /** @file
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[88235] | 3 | * Intel HD Audio Controller Emulation - Codec, Sigmatel/IDT STAC9220.
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[30985] | 4 | */
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| 5 |
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| 6 | /*
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[98103] | 7 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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[30985] | 8 | *
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[96407] | 9 | * This file is part of VirtualBox base platform packages, as
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| 10 | * available from https://www.virtualbox.org.
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| 11 | *
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| 12 | * This program is free software; you can redistribute it and/or
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| 13 | * modify it under the terms of the GNU General Public License
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| 14 | * as published by the Free Software Foundation, in version 3 of the
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| 15 | * License.
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| 16 | *
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| 17 | * This program is distributed in the hope that it will be useful, but
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| 18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | * General Public License for more details.
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| 21 | *
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| 22 | * You should have received a copy of the GNU General Public License
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| 23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | *
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| 25 | * SPDX-License-Identifier: GPL-3.0-only
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[30985] | 26 | */
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[44637] | 27 |
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[88228] | 28 | #ifndef VBOX_INCLUDED_SRC_Audio_DevHdaCodec_h
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| 29 | #define VBOX_INCLUDED_SRC_Audio_DevHdaCodec_h
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[76520] | 30 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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| 31 | # pragma once
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| 32 | #endif
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[53442] | 33 |
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[89869] | 34 | #ifndef VBOX_INCLUDED_SRC_Audio_DevHda_h
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| 35 | # error "Only include DevHda.h!"
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| 36 | #endif
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| 37 |
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[67899] | 38 | #include <iprt/list.h>
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| 39 | #include "AudioMixer.h"
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| 40 |
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[88502] | 41 |
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| 42 | /** The ICH HDA (Intel) ring-3 codec state. */
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[87799] | 43 | typedef struct HDACODECR3 *PHDACODECR3;
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[88502] | 44 |
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[44668] | 45 | /**
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[87799] | 46 | * Enumeration specifying the codec type to use.
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| 47 | */
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[90134] | 48 | typedef enum CODECTYPE
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[87799] | 49 | {
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| 50 | /** Invalid, do not use. */
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[90134] | 51 | CODECTYPE_INVALID = 0,
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[87799] | 52 | /** SigmaTel 9220 (922x). */
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[90134] | 53 | CODECTYPE_STAC9220,
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[87799] | 54 | /** Hack to blow the type up to 32-bit. */
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[90134] | 55 | CODECTYPE_32BIT_HACK = 0x7fffffff
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| 56 | } CODECTYPE;
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[87799] | 57 |
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[44667] | 58 | /* PRM 5.3.1 */
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[87799] | 59 | /** Codec address mask. */
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| 60 | #define CODEC_CAD_MASK 0xF0000000
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| 61 | /** Codec address shift. */
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| 62 | #define CODEC_CAD_SHIFT 28
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| 63 | #define CODEC_DIRECT_MASK RT_BIT(27)
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| 64 | /** Node ID mask. */
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| 65 | #define CODEC_NID_MASK 0x07F00000
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| 66 | /** Node ID shift. */
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| 67 | #define CODEC_NID_SHIFT 20
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| 68 | #define CODEC_VERBDATA_MASK 0x000FFFFF
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| 69 | #define CODEC_VERB_4BIT_CMD 0x000FFFF0
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| 70 | #define CODEC_VERB_4BIT_DATA 0x0000000F
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| 71 | #define CODEC_VERB_8BIT_CMD 0x000FFF00
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| 72 | #define CODEC_VERB_8BIT_DATA 0x000000FF
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| 73 | #define CODEC_VERB_16BIT_CMD 0x000F0000
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| 74 | #define CODEC_VERB_16BIT_DATA 0x0000FFFF
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| 75 |
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| 76 | #define CODEC_CAD(cmd) (((cmd) & CODEC_CAD_MASK) >> CODEC_CAD_SHIFT)
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| 77 | #define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)
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| 78 | #define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)
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| 79 | #define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)
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| 80 | #define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))
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| 81 | #define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))
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| 82 | #define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))
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| 83 | #define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))
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| 84 | #define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA)
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| 85 | #define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA)
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| 86 | #define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA)
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| 87 |
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| 88 | #define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15)
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| 89 | #define CODEC_VERB_GET_AMP_SIDE RT_BIT(13)
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| 90 | #define CODEC_VERB_GET_AMP_INDEX 0x7
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| 91 |
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| 92 | /* HDA spec 7.3.3.7 NoteA */
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| 93 | #define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)
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| 94 | #define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)
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| 95 | #define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))
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| 96 |
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| 97 | /* HDA spec 7.3.3.7 NoteC */
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| 98 | #define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15)
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| 99 | #define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14)
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| 100 | #define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13)
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| 101 | #define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12)
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| 102 | #define CODEC_VERB_SET_AMP_INDEX (0x7 << 8)
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| 103 | #define CODEC_VERB_SET_AMP_MUTE RT_BIT(7)
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| 104 | /** Note: 7-bit value [6:0]. */
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| 105 | #define CODEC_VERB_SET_AMP_GAIN 0x7F
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| 106 |
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| 107 | #define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0)
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| 108 | #define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0)
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| 109 | #define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0)
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| 110 | #define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0)
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| 111 | #define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7)
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| 112 | #define CODEC_SET_AMP_MUTE(cmd) ((cmd) & CODEC_VERB_SET_AMP_MUTE)
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| 113 | #define CODEC_SET_AMP_GAIN(cmd) ((cmd) & CODEC_VERB_SET_AMP_GAIN)
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| 114 |
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| 115 | /* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */
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| 116 | /* VendorID (7.3.4.1) */
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| 117 | #define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))
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| 118 | #define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF)
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| 119 | #define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF)
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| 120 |
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| 121 | /** RevisionID (7.3.4.2). */
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| 122 | #define CODEC_MAKE_F00_02(majRev, minRev, venFix, venProg, stepFix, stepProg) \
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| 123 | ( (((majRev) & 0xF) << 20) \
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| 124 | | (((minRev) & 0xF) << 16) \
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| 125 | | (((venFix) & 0xF) << 12) \
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| 126 | | (((venProg) & 0xF) << 8) \
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| 127 | | (((stepFix) & 0xF) << 4) \
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| 128 | | ((stepProg) & 0xF))
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| 129 |
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| 130 | /** Subordinate node count (7.3.4.3). */
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| 131 | #define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF))
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| 132 | #define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF)
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| 133 | #define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF)
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| 134 | /*
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| 135 | * Function Group Type (7.3.4.4)
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| 136 | * 0 & [0x3-0x7f] are reserved types
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| 137 | * [0x80 - 0xff] are vendor defined function groups
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| 138 | */
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| 139 | #define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType))
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| 140 | #define CODEC_F00_05_UNSOL RT_BIT(8)
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| 141 | #define CODEC_F00_05_AFG (0x1)
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| 142 | #define CODEC_F00_05_MFG (0x2)
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| 143 | #define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8))
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| 144 | #define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff)
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| 145 | /* Audio Function Group capabilities (7.3.4.5). */
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| 146 | #define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF))
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| 147 | #define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16)
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| 148 |
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| 149 | /* Converter Stream, Channel (7.3.3.11). */
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| 150 | #define CODEC_F00_06_GET_STREAM_ID(cmd) (((cmd) >> 4) & 0x0F)
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| 151 | #define CODEC_F00_06_GET_CHANNEL_ID(cmd) (((cmd) & 0x0F))
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| 152 |
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| 153 | /* Widget Capabilities (7.3.4.6). */
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| 154 | #define CODEC_MAKE_F00_09(type, delay, chan_ext) \
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| 155 | ( (((type) & 0xF) << 20) \
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| 156 | | (((delay) & 0xF) << 16) \
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| 157 | | (((chan_ext) & 0xF) << 13))
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| 158 | /* note: types 0x8-0xe are reserved */
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| 159 | #define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0)
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| 160 | #define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1)
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| 161 | #define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2)
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| 162 | #define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3)
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| 163 | #define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4)
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| 164 | #define CODEC_F00_09_TYPE_POWER_WIDGET (0x5)
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| 165 | #define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6)
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| 166 | #define CODEC_F00_09_TYPE_BEEP_GEN (0x7)
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| 167 | #define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF)
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| 168 |
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| 169 | #define CODEC_F00_09_CAP_CP RT_BIT(12)
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| 170 | #define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11)
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| 171 | #define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10)
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| 172 | #define CODEC_F00_09_CAP_DIGITAL RT_BIT(9)
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| 173 | #define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8)
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| 174 | #define CODEC_F00_09_CAP_UNSOL RT_BIT(7)
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| 175 | #define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6)
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| 176 | #define CODEC_F00_09_CAP_STRIPE RT_BIT(5)
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| 177 | #define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4)
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| 178 | #define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3)
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| 179 | #define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2)
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| 180 | #define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1)
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| 181 | #define CODEC_F00_09_CAP_STEREO RT_BIT(0)
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| 182 |
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| 183 | #define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF)
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| 184 |
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| 185 | #define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12))
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| 186 | #define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11))
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| 187 | #define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10))
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| 188 | #define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9))
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| 189 | #define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8))
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| 190 | #define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7))
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| 191 | #define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6))
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| 192 | #define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5))
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| 193 | #define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4))
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| 194 | #define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3))
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| 195 | #define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2))
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| 196 | #define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1))
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| 197 | #define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0))
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| 198 |
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| 199 | /* Supported PCM size, rates (7.3.4.7) */
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| 200 | #define CODEC_F00_0A_32_BIT RT_BIT(19)
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| 201 | #define CODEC_F00_0A_24_BIT RT_BIT(18)
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| 202 | #define CODEC_F00_0A_16_BIT RT_BIT(17)
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| 203 | #define CODEC_F00_0A_8_BIT RT_BIT(16)
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| 204 |
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| 205 | #define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11)
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| 206 | #define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10)
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| 207 | #define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9)
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| 208 | #define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8)
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| 209 | #define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7)
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| 210 | #define CODEC_F00_0A_48KHZ RT_BIT(6)
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| 211 | #define CODEC_F00_0A_44_1KHZ RT_BIT(5)
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| 212 | /* 2/3 * 48kHz */
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| 213 | #define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4)
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| 214 | /* 1/2 * 44.1kHz */
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| 215 | #define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3)
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| 216 | /* 1/3 * 48kHz */
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| 217 | #define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2)
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| 218 | /* 1/4 * 44.1kHz */
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| 219 | #define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1)
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| 220 | /* 1/6 * 48kHz */
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| 221 | #define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0)
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| 222 |
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| 223 | /* Supported streams formats (7.3.4.8) */
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| 224 | #define CODEC_F00_0B_AC3 RT_BIT(2)
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| 225 | #define CODEC_F00_0B_FLOAT32 RT_BIT(1)
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| 226 | #define CODEC_F00_0B_PCM RT_BIT(0)
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| 227 |
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| 228 | /* Pin Capabilities (7.3.4.9)*/
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| 229 | #define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8)
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| 230 | #define CODEC_F00_0C_CAP_HBR RT_BIT(27)
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| 231 | #define CODEC_F00_0C_CAP_DP RT_BIT(24)
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| 232 | #define CODEC_F00_0C_CAP_EAPD RT_BIT(16)
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| 233 | #define CODEC_F00_0C_CAP_HDMI RT_BIT(7)
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| 234 | #define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6)
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| 235 | #define CODEC_F00_0C_CAP_INPUT RT_BIT(5)
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| 236 | #define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4)
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| 237 | #define CODEC_F00_0C_CAP_HEADPHONE_AMP RT_BIT(3)
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| 238 | #define CODEC_F00_0C_CAP_PRESENCE_DETECT RT_BIT(2)
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| 239 | #define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1)
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| 240 | #define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0)
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| 241 |
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| 242 | #define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27))
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| 243 | #define CODEC_F00_0C_IS_CAP_DP(f00_0c) ((f00_0c) & RT_BIT(24))
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| 244 | #define CODEC_F00_0C_IS_CAP_EAPD(f00_0c) ((f00_0c) & RT_BIT(16))
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| 245 | #define CODEC_F00_0C_IS_CAP_HDMI(f00_0c) ((f00_0c) & RT_BIT(7))
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| 246 | #define CODEC_F00_0C_IS_CAP_BALANCED_IO(f00_0c) ((f00_0c) & RT_BIT(6))
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| 247 | #define CODEC_F00_0C_IS_CAP_INPUT(f00_0c) ((f00_0c) & RT_BIT(5))
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| 248 | #define CODEC_F00_0C_IS_CAP_OUTPUT(f00_0c) ((f00_0c) & RT_BIT(4))
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| 249 | #define CODEC_F00_0C_IS_CAP_HP(f00_0c) ((f00_0c) & RT_BIT(3))
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| 250 | #define CODEC_F00_0C_IS_CAP_PRESENCE_DETECT(f00_0c) ((f00_0c) & RT_BIT(2))
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| 251 | #define CODEC_F00_0C_IS_CAP_TRIGGER_REQUIRED(f00_0c) ((f00_0c) & RT_BIT(1))
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| 252 | #define CODEC_F00_0C_IS_CAP_IMPENDANCE_SENSE(f00_0c) ((f00_0c) & RT_BIT(0))
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| 253 |
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| 254 | /* Input Amplifier capabilities (7.3.4.10). */
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| 255 | #define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \
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| 256 | ( (((mute_cap) & UINT32_C(0x1)) << 31) \
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| 257 | | (((step_size) & UINT32_C(0xFF)) << 16) \
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| 258 | | (((num_steps) & UINT32_C(0xFF)) << 8) \
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| 259 | | ((offset) & UINT32_C(0xFF)))
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| 260 |
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| 261 | #define CODEC_F00_0D_CAP_MUTE RT_BIT(7)
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| 262 |
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| 263 | #define CODEC_F00_0D_IS_CAP_MUTE(f00_0d) ( ( f00_0d) & RT_BIT(31))
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| 264 | #define CODEC_F00_0D_STEP_SIZE(f00_0d) ((( f00_0d) & (0x7F << 16)) >> 16)
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| 265 | #define CODEC_F00_0D_NUM_STEPS(f00_0d) ((((f00_0d) & (0x7F << 8)) >> 8) + 1)
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| 266 | #define CODEC_F00_0D_OFFSET(f00_0d) ( (f00_0d) & 0x7F)
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| 267 |
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| 268 | /** Indicates that the amplifier can be muted. */
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| 269 | #define CODEC_AMP_CAP_MUTE 0x1
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| 270 | /** The amplifier's maximum number of steps. We want
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| 271 | * a ~90dB dynamic range, so 64 steps with 1.25dB each
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| 272 | * should do the trick.
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| 273 | *
|
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| 274 | * As we want to map our range to [0..128] values we can avoid
|
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| 275 | * multiplication and simply doing a shift later.
|
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| 276 | *
|
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| 277 | * Produces -96dB to +0dB.
|
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| 278 | * "0" indicates a step of 0.25dB, "127" indicates a step of 32dB.
|
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| 279 | */
|
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| 280 | #define CODEC_AMP_NUM_STEPS 0x7F
|
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| 281 | /** The initial gain offset (and when doing a node reset). */
|
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| 282 | #define CODEC_AMP_OFF_INITIAL 0x7F
|
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| 283 | /** The amplifier's gain step size. */
|
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| 284 | #define CODEC_AMP_STEP_SIZE 0x2
|
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| 285 |
|
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| 286 | /* Output Amplifier capabilities (7.3.4.10) */
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| 287 | #define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D
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| 288 |
|
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| 289 | #define CODEC_F00_12_IS_CAP_MUTE(f00_12) CODEC_F00_0D_IS_CAP_MUTE(f00_12)
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| 290 | #define CODEC_F00_12_STEP_SIZE(f00_12) CODEC_F00_0D_STEP_SIZE(f00_12)
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| 291 | #define CODEC_F00_12_NUM_STEPS(f00_12) CODEC_F00_0D_NUM_STEPS(f00_12)
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| 292 | #define CODEC_F00_12_OFFSET(f00_12) CODEC_F00_0D_OFFSET(f00_12)
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| 293 |
|
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| 294 | /* Connection list lenght (7.3.4.11). */
|
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| 295 | #define CODEC_MAKE_F00_0E(long_form, length) \
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| 296 | ( (((long_form) & 0x1) << 7) \
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| 297 | | ((length) & 0x7F))
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| 298 | /* Indicates short-form NIDs. */
|
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| 299 | #define CODEC_F00_0E_LIST_NID_SHORT 0
|
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| 300 | /* Indicates long-form NIDs. */
|
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| 301 | #define CODEC_F00_0E_LIST_NID_LONG 1
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| 302 | #define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7))
|
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| 303 | #define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F)
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| 304 | /* Supported Power States (7.3.4.12) */
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| 305 | #define CODEC_F00_0F_EPSS RT_BIT(31)
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| 306 | #define CODEC_F00_0F_CLKSTOP RT_BIT(30)
|
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| 307 | #define CODEC_F00_0F_S3D3 RT_BIT(29)
|
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| 308 | #define CODEC_F00_0F_D3COLD RT_BIT(4)
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| 309 | #define CODEC_F00_0F_D3 RT_BIT(3)
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| 310 | #define CODEC_F00_0F_D2 RT_BIT(2)
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| 311 | #define CODEC_F00_0F_D1 RT_BIT(1)
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| 312 | #define CODEC_F00_0F_D0 RT_BIT(0)
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| 313 |
|
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| 314 | /* Processing capabilities 7.3.4.13 */
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| 315 | #define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1))
|
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| 316 | #define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8)
|
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| 317 | #define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1)
|
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| 318 |
|
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| 319 | /* GPIO count (7.3.4.14). */
|
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| 320 | #define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \
|
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| 321 | ( (((wake) & UINT32_C(0x1)) << 31) \
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| 322 | | (((unsol) & UINT32_C(0x1)) << 30) \
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| 323 | | (((numgpi) & UINT32_C(0xFF)) << 16) \
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| 324 | | (((numgpo) & UINT32_C(0xFF)) << 8) \
|
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| 325 | | ((numgpio) & UINT32_C(0xFF)))
|
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| 326 |
|
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| 327 | /* Processing States (7.3.3.4). */
|
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| 328 | #define CODEC_F03_OFF (0)
|
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| 329 | #define CODEC_F03_ON RT_BIT(0)
|
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| 330 | #define CODEC_F03_BENING RT_BIT(1)
|
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| 331 | /* Power States (7.3.3.10). */
|
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| 332 | #define CODEC_MAKE_F05(reset, stopok, error, act, set) \
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| 333 | ( (((reset) & 0x1) << 10) \
|
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| 334 | | (((stopok) & 0x1) << 9) \
|
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| 335 | | (((error) & 0x1) << 8) \
|
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| 336 | | (((act) & 0xF) << 4) \
|
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| 337 | | ((set) & 0xF))
|
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| 338 | #define CODEC_F05_D3COLD (4)
|
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| 339 | #define CODEC_F05_D3 (3)
|
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| 340 | #define CODEC_F05_D2 (2)
|
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| 341 | #define CODEC_F05_D1 (1)
|
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| 342 | #define CODEC_F05_D0 (0)
|
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| 343 |
|
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| 344 | #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)
|
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| 345 | #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)
|
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| 346 | #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)
|
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| 347 | #define CODEC_F05_ACT(value) (((value) & 0xF0) >> 4)
|
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| 348 | #define CODEC_F05_SET(value) (((value) & 0xF))
|
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| 349 |
|
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| 350 | #define CODEC_F05_GE(p0, p1) ((p0) <= (p1))
|
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| 351 | #define CODEC_F05_LE(p0, p1) ((p0) >= (p1))
|
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| 352 |
|
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| 353 | /* Converter Stream, Channel (7.3.3.11). */
|
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| 354 | #define CODEC_MAKE_F06(stream, channel) \
|
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| 355 | ( (((stream) & 0xF) << 4) \
|
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| 356 | | ((channel) & 0xF))
|
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| 357 | #define CODEC_F06_STREAM(value) ((value) & 0xF0)
|
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| 358 | #define CODEC_F06_CHANNEL(value) ((value) & 0xF)
|
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| 359 |
|
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| 360 | /* Pin Widged Control (7.3.3.13). */
|
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| 361 | #define CODEC_F07_VREF_HIZ (0)
|
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| 362 | #define CODEC_F07_VREF_50 (0x1)
|
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| 363 | #define CODEC_F07_VREF_GROUND (0x2)
|
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| 364 | #define CODEC_F07_VREF_80 (0x4)
|
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| 365 | #define CODEC_F07_VREF_100 (0x5)
|
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| 366 | #define CODEC_F07_IN_ENABLE RT_BIT(5)
|
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| 367 | #define CODEC_F07_OUT_ENABLE RT_BIT(6)
|
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| 368 | #define CODEC_F07_OUT_H_ENABLE RT_BIT(7)
|
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| 369 |
|
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| 370 | /* Volume Knob Control (7.3.3.29). */
|
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| 371 | #define CODEC_F0F_IS_DIRECT RT_BIT(7)
|
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| 372 | #define CODEC_F0F_VOLUME (0x7F)
|
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| 373 |
|
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| 374 | /* Unsolicited enabled (7.3.3.14). */
|
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| 375 | #define CODEC_MAKE_F08(enable, tag) ((((enable) & 1) << 7) | ((tag) & 0x3F))
|
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| 376 |
|
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| 377 | /* Converter formats (7.3.3.8) and (3.7.1). */
|
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| 378 | /* This is the same format as SDnFMT. */
|
---|
| 379 | #define CODEC_MAKE_A HDA_SDFMT_MAKE
|
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| 380 |
|
---|
| 381 | #define CODEC_A_TYPE HDA_SDFMT_TYPE
|
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| 382 | #define CODEC_A_TYPE_PCM HDA_SDFMT_TYPE_PCM
|
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| 383 | #define CODEC_A_TYPE_NON_PCM HDA_SDFMT_TYPE_NON_PCM
|
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| 384 |
|
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| 385 | #define CODEC_A_BASE HDA_SDFMT_BASE
|
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| 386 | #define CODEC_A_BASE_48KHZ HDA_SDFMT_BASE_48KHZ
|
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| 387 | #define CODEC_A_BASE_44KHZ HDA_SDFMT_BASE_44KHZ
|
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| 388 |
|
---|
| 389 | /* Pin Sense (7.3.3.15). */
|
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| 390 | #define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \
|
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| 391 | ( (((fPresent) & 0x1) << 31) \
|
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| 392 | | (((impedance) & UINT32_C(0x7FFFFFFF))))
|
---|
| 393 | #define CODEC_F09_ANALOG_NA UINT32_C(0x7FFFFFFF)
|
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| 394 | #define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \
|
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| 395 | ( (((fPresent) & UINT32_C(0x1)) << 31) \
|
---|
| 396 | | (((fELDValid) & UINT32_C(0x1)) << 30))
|
---|
| 397 |
|
---|
| 398 | #define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1))
|
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| 399 | #define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2))
|
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| 400 | #define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1))
|
---|
| 401 | #define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0))
|
---|
| 402 | /* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */
|
---|
| 403 | /* Configuration's port connection */
|
---|
| 404 | #define CODEC_F1C_PORT_MASK (0x3)
|
---|
| 405 | #define CODEC_F1C_PORT_SHIFT (30)
|
---|
| 406 |
|
---|
| 407 | #define CODEC_F1C_PORT_COMPLEX (0x0)
|
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| 408 | #define CODEC_F1C_PORT_NO_PHYS (0x1)
|
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| 409 | #define CODEC_F1C_PORT_FIXED (0x2)
|
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| 410 | #define CODEC_F1C_BOTH (0x3)
|
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| 411 |
|
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| 412 | /* Configuration default: connection */
|
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| 413 | #define CODEC_F1C_PORT_MASK (0x3)
|
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| 414 | #define CODEC_F1C_PORT_SHIFT (30)
|
---|
| 415 |
|
---|
| 416 | /* Connected to a jack (1/8", ATAPI, ...). */
|
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| 417 | #define CODEC_F1C_PORT_COMPLEX (0x0)
|
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| 418 | /* No physical connection. */
|
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| 419 | #define CODEC_F1C_PORT_NO_PHYS (0x1)
|
---|
| 420 | /* Fixed function device (integrated speaker, integrated mic, ...). */
|
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| 421 | #define CODEC_F1C_PORT_FIXED (0x2)
|
---|
| 422 | /* Both, a jack and an internal device are attached. */
|
---|
| 423 | #define CODEC_F1C_BOTH (0x3)
|
---|
| 424 |
|
---|
| 425 | /* Configuration default: Location */
|
---|
| 426 | #define CODEC_F1C_LOCATION_MASK (0x3F)
|
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| 427 | #define CODEC_F1C_LOCATION_SHIFT (24)
|
---|
| 428 |
|
---|
| 429 | /* [4:5] bits of location region means chassis attachment */
|
---|
| 430 | #define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)
|
---|
| 431 | #define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4)
|
---|
| 432 | #define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5)
|
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| 433 | #define CODEC_F1C_LOCATION_OTHER RT_BIT(5)
|
---|
| 434 |
|
---|
| 435 | /* [0:3] bits of location region means geometry location attachment */
|
---|
| 436 | #define CODEC_F1C_LOCATION_NA (0)
|
---|
| 437 | #define CODEC_F1C_LOCATION_REAR (0x1)
|
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| 438 | #define CODEC_F1C_LOCATION_FRONT (0x2)
|
---|
| 439 | #define CODEC_F1C_LOCATION_LEFT (0x3)
|
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| 440 | #define CODEC_F1C_LOCATION_RIGTH (0x4)
|
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| 441 | #define CODEC_F1C_LOCATION_TOP (0x5)
|
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| 442 | #define CODEC_F1C_LOCATION_BOTTOM (0x6)
|
---|
| 443 | #define CODEC_F1C_LOCATION_SPECIAL_0 (0x7)
|
---|
| 444 | #define CODEC_F1C_LOCATION_SPECIAL_1 (0x8)
|
---|
| 445 | #define CODEC_F1C_LOCATION_SPECIAL_2 (0x9)
|
---|
| 446 |
|
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| 447 | /* Configuration default: Device type */
|
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| 448 | #define CODEC_F1C_DEVICE_MASK (0xF)
|
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| 449 | #define CODEC_F1C_DEVICE_SHIFT (20)
|
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| 450 | #define CODEC_F1C_DEVICE_LINE_OUT (0)
|
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| 451 | #define CODEC_F1C_DEVICE_SPEAKER (0x1)
|
---|
| 452 | #define CODEC_F1C_DEVICE_HP (0x2)
|
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| 453 | #define CODEC_F1C_DEVICE_CD (0x3)
|
---|
| 454 | #define CODEC_F1C_DEVICE_SPDIF_OUT (0x4)
|
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| 455 | #define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5)
|
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| 456 | #define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6)
|
---|
| 457 | #define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7)
|
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| 458 | #define CODEC_F1C_DEVICE_LINE_IN (0x8)
|
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| 459 | #define CODEC_F1C_DEVICE_AUX (0x9)
|
---|
| 460 | #define CODEC_F1C_DEVICE_MIC (0xA)
|
---|
| 461 | #define CODEC_F1C_DEVICE_PHONE (0xB)
|
---|
| 462 | #define CODEC_F1C_DEVICE_SPDIF_IN (0xC)
|
---|
| 463 | #define CODEC_F1C_DEVICE_RESERVED (0xE)
|
---|
| 464 | #define CODEC_F1C_DEVICE_OTHER (0xF)
|
---|
| 465 |
|
---|
| 466 | /* Configuration default: Connection type */
|
---|
| 467 | #define CODEC_F1C_CONNECTION_TYPE_MASK (0xF)
|
---|
| 468 | #define CODEC_F1C_CONNECTION_TYPE_SHIFT (16)
|
---|
| 469 |
|
---|
| 470 | #define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)
|
---|
| 471 | #define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1)
|
---|
| 472 | #define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2)
|
---|
| 473 | #define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3)
|
---|
| 474 | #define CODEC_F1C_CONNECTION_TYPE_RCA (0x4)
|
---|
| 475 | #define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5)
|
---|
| 476 | #define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6)
|
---|
| 477 | #define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7)
|
---|
| 478 | #define CODEC_F1C_CONNECTION_TYPE_DIN (0x8)
|
---|
| 479 | #define CODEC_F1C_CONNECTION_TYPE_XLR (0x9)
|
---|
| 480 | #define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA)
|
---|
| 481 | #define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB)
|
---|
| 482 | #define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF)
|
---|
| 483 |
|
---|
| 484 | /* Configuration's color */
|
---|
| 485 | #define CODEC_F1C_COLOR_MASK (0xF)
|
---|
| 486 | #define CODEC_F1C_COLOR_SHIFT (12)
|
---|
| 487 | #define CODEC_F1C_COLOR_UNKNOWN (0)
|
---|
| 488 | #define CODEC_F1C_COLOR_BLACK (0x1)
|
---|
| 489 | #define CODEC_F1C_COLOR_GREY (0x2)
|
---|
| 490 | #define CODEC_F1C_COLOR_BLUE (0x3)
|
---|
| 491 | #define CODEC_F1C_COLOR_GREEN (0x4)
|
---|
| 492 | #define CODEC_F1C_COLOR_RED (0x5)
|
---|
| 493 | #define CODEC_F1C_COLOR_ORANGE (0x6)
|
---|
| 494 | #define CODEC_F1C_COLOR_YELLOW (0x7)
|
---|
| 495 | #define CODEC_F1C_COLOR_PURPLE (0x8)
|
---|
| 496 | #define CODEC_F1C_COLOR_PINK (0x9)
|
---|
| 497 | #define CODEC_F1C_COLOR_RESERVED_0 (0xA)
|
---|
| 498 | #define CODEC_F1C_COLOR_RESERVED_1 (0xB)
|
---|
| 499 | #define CODEC_F1C_COLOR_RESERVED_2 (0xC)
|
---|
| 500 | #define CODEC_F1C_COLOR_RESERVED_3 (0xD)
|
---|
| 501 | #define CODEC_F1C_COLOR_WHITE (0xE)
|
---|
| 502 | #define CODEC_F1C_COLOR_OTHER (0xF)
|
---|
| 503 |
|
---|
| 504 | /* Configuration's misc */
|
---|
| 505 | #define CODEC_F1C_MISC_MASK (0xF)
|
---|
| 506 | #define CODEC_F1C_MISC_SHIFT (8)
|
---|
| 507 | #define CODEC_F1C_MISC_NONE 0
|
---|
| 508 | #define CODEC_F1C_MISC_JACK_NO_PRESENCE_DETECT RT_BIT(0)
|
---|
| 509 | #define CODEC_F1C_MISC_RESERVED_0 RT_BIT(1)
|
---|
| 510 | #define CODEC_F1C_MISC_RESERVED_1 RT_BIT(2)
|
---|
| 511 | #define CODEC_F1C_MISC_RESERVED_2 RT_BIT(3)
|
---|
| 512 |
|
---|
| 513 | /* Configuration default: Association */
|
---|
| 514 | #define CODEC_F1C_ASSOCIATION_MASK (0xF)
|
---|
| 515 | #define CODEC_F1C_ASSOCIATION_SHIFT (4)
|
---|
| 516 |
|
---|
| 517 | /** Reserved; don't use. */
|
---|
| 518 | #define CODEC_F1C_ASSOCIATION_INVALID 0x0
|
---|
| 519 | #define CODEC_F1C_ASSOCIATION_GROUP_0 0x1
|
---|
| 520 | #define CODEC_F1C_ASSOCIATION_GROUP_1 0x2
|
---|
| 521 | #define CODEC_F1C_ASSOCIATION_GROUP_2 0x3
|
---|
| 522 | #define CODEC_F1C_ASSOCIATION_GROUP_3 0x4
|
---|
| 523 | #define CODEC_F1C_ASSOCIATION_GROUP_4 0x5
|
---|
| 524 | #define CODEC_F1C_ASSOCIATION_GROUP_5 0x6
|
---|
| 525 | #define CODEC_F1C_ASSOCIATION_GROUP_6 0x7
|
---|
| 526 | #define CODEC_F1C_ASSOCIATION_GROUP_7 0x8
|
---|
| 527 | /* Note: Windows OSes will treat group 15 (0xF) as single PIN devices.
|
---|
| 528 | * The sequence number associated with that group then will be ignored. */
|
---|
| 529 | #define CODEC_F1C_ASSOCIATION_GROUP_15 0xF
|
---|
| 530 |
|
---|
| 531 | /* Configuration default: Association Sequence. */
|
---|
| 532 | #define CODEC_F1C_SEQ_MASK (0xF)
|
---|
| 533 | #define CODEC_F1C_SEQ_SHIFT (0)
|
---|
| 534 |
|
---|
| 535 | /* Implementation identification (7.3.3.30). */
|
---|
| 536 | #define CODEC_MAKE_F20(bmid, bsku, aid) \
|
---|
| 537 | ( (((bmid) & 0xFFFF) << 16) \
|
---|
| 538 | | (((bsku) & 0xFF) << 8) \
|
---|
| 539 | | (((aid) & 0xFF)) \
|
---|
| 540 | )
|
---|
| 541 |
|
---|
| 542 | /* Macro definition helping in filling the configuration registers. */
|
---|
| 543 | #define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \
|
---|
| 544 | ( (((port_connectivity) & 0xF) << CODEC_F1C_PORT_SHIFT) \
|
---|
| 545 | | (((location) & 0xF) << CODEC_F1C_LOCATION_SHIFT) \
|
---|
| 546 | | (((device) & 0xF) << CODEC_F1C_DEVICE_SHIFT) \
|
---|
| 547 | | (((connection_type) & 0xF) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \
|
---|
| 548 | | (((color) & 0xF) << CODEC_F1C_COLOR_SHIFT) \
|
---|
| 549 | | (((misc) & 0xF) << CODEC_F1C_MISC_SHIFT) \
|
---|
| 550 | | (((association) & 0xF) << CODEC_F1C_ASSOCIATION_SHIFT) \
|
---|
| 551 | | (((sequence) & 0xF)))
|
---|
| 552 |
|
---|
| 553 |
|
---|
| 554 | /*********************************************************************************************************************************
|
---|
| 555 | * Structures and Typedefs *
|
---|
| 556 | *********************************************************************************************************************************/
|
---|
| 557 | /** The F00 parameter length (in dwords). */
|
---|
| 558 | #define CODECNODE_F00_PARAM_LENGTH 20
|
---|
| 559 | /** The F02 parameter length (in dwords). */
|
---|
| 560 | #define CODECNODE_F02_PARAM_LENGTH 16
|
---|
| 561 |
|
---|
| 562 | /* PRM 5.3.1 */
|
---|
[31156] | 563 | #define CODEC_RESPONSE_UNSOLICITED RT_BIT_64(34)
|
---|
| 564 |
|
---|
[87799] | 565 | #define AMPLIFIER_SIZE 60
|
---|
| 566 |
|
---|
| 567 | typedef uint32_t AMPLIFIER[AMPLIFIER_SIZE];
|
---|
| 568 |
|
---|
[60353] | 569 | /**
|
---|
[87799] | 570 | * Common (or core) codec node structure.
|
---|
[60353] | 571 | */
|
---|
[87799] | 572 | typedef struct CODECCOMMONNODE
|
---|
| 573 | {
|
---|
| 574 | /** The node's ID. */
|
---|
| 575 | uint8_t uID;
|
---|
| 576 | /** The node's name. */
|
---|
| 577 | /** The SDn ID this node is assigned to.
|
---|
| 578 | * 0 means not assigned, 1 is SDn0. */
|
---|
| 579 | uint8_t uSD;
|
---|
| 580 | /** The SDn's channel to use.
|
---|
| 581 | * Only valid if a valid SDn ID is set. */
|
---|
| 582 | uint8_t uChannel;
|
---|
| 583 | /* PRM 5.3.6 */
|
---|
| 584 | uint32_t au32F00_param[CODECNODE_F00_PARAM_LENGTH];
|
---|
| 585 | uint32_t au32F02_param[CODECNODE_F02_PARAM_LENGTH];
|
---|
| 586 | } CODECCOMMONNODE;
|
---|
| 587 | AssertCompile(CODECNODE_F00_PARAM_LENGTH == 20); /* saved state */
|
---|
| 588 | AssertCompile(CODECNODE_F02_PARAM_LENGTH == 16); /* saved state */
|
---|
[88502] | 589 | AssertCompileSize(CODECCOMMONNODE, (1 + 20 + 16) * sizeof(uint32_t));
|
---|
| 590 | typedef CODECCOMMONNODE *PCODECCOMMONNODE;
|
---|
[87799] | 591 |
|
---|
| 592 | /**
|
---|
| 593 | * Compile time assertion on the expected node size.
|
---|
| 594 | */
|
---|
| 595 | #define AssertNodeSize(a_Node, a_cParams) \
|
---|
| 596 | AssertCompile((a_cParams) <= (60 + 6)); /* the max size - saved state */ \
|
---|
| 597 | AssertCompile( sizeof(a_Node) - sizeof(CODECCOMMONNODE) \
|
---|
| 598 | == ((a_cParams) * sizeof(uint32_t)) )
|
---|
| 599 |
|
---|
| 600 | typedef struct ROOTCODECNODE
|
---|
| 601 | {
|
---|
| 602 | CODECCOMMONNODE node;
|
---|
| 603 | } ROOTCODECNODE, *PROOTCODECNODE;
|
---|
| 604 | AssertNodeSize(ROOTCODECNODE, 0);
|
---|
| 605 |
|
---|
| 606 | typedef struct DACNODE
|
---|
| 607 | {
|
---|
| 608 | CODECCOMMONNODE node;
|
---|
| 609 | uint32_t u32F0d_param;
|
---|
| 610 | uint32_t u32F04_param;
|
---|
| 611 | uint32_t u32F05_param;
|
---|
| 612 | uint32_t u32F06_param;
|
---|
| 613 | uint32_t u32F0c_param;
|
---|
| 614 |
|
---|
| 615 | uint32_t u32A_param;
|
---|
| 616 | AMPLIFIER B_params;
|
---|
| 617 |
|
---|
| 618 | } DACNODE, *PDACNODE;
|
---|
| 619 | AssertNodeSize(DACNODE, 6 + 60);
|
---|
| 620 |
|
---|
| 621 | typedef struct ADCNODE
|
---|
| 622 | {
|
---|
| 623 | CODECCOMMONNODE node;
|
---|
| 624 | uint32_t u32F01_param;
|
---|
| 625 | uint32_t u32F03_param;
|
---|
| 626 | uint32_t u32F05_param;
|
---|
| 627 | uint32_t u32F06_param;
|
---|
| 628 | uint32_t u32F09_param;
|
---|
| 629 |
|
---|
| 630 | uint32_t u32A_param;
|
---|
| 631 | AMPLIFIER B_params;
|
---|
| 632 | } ADCNODE, *PADCNODE;
|
---|
| 633 | AssertNodeSize(DACNODE, 6 + 60);
|
---|
| 634 |
|
---|
| 635 | typedef struct SPDIFOUTNODE
|
---|
| 636 | {
|
---|
| 637 | CODECCOMMONNODE node;
|
---|
| 638 | uint32_t u32F05_param;
|
---|
| 639 | uint32_t u32F06_param;
|
---|
| 640 | uint32_t u32F09_param;
|
---|
| 641 | uint32_t u32F0d_param;
|
---|
| 642 |
|
---|
| 643 | uint32_t u32A_param;
|
---|
| 644 | AMPLIFIER B_params;
|
---|
| 645 | } SPDIFOUTNODE, *PSPDIFOUTNODE;
|
---|
| 646 | AssertNodeSize(SPDIFOUTNODE, 5 + 60);
|
---|
| 647 |
|
---|
| 648 | typedef struct SPDIFINNODE
|
---|
| 649 | {
|
---|
| 650 | CODECCOMMONNODE node;
|
---|
| 651 | uint32_t u32F05_param;
|
---|
| 652 | uint32_t u32F06_param;
|
---|
| 653 | uint32_t u32F09_param;
|
---|
| 654 | uint32_t u32F0d_param;
|
---|
| 655 |
|
---|
| 656 | uint32_t u32A_param;
|
---|
| 657 | AMPLIFIER B_params;
|
---|
| 658 | } SPDIFINNODE, *PSPDIFINNODE;
|
---|
| 659 | AssertNodeSize(SPDIFINNODE, 5 + 60);
|
---|
| 660 |
|
---|
| 661 | typedef struct AFGCODECNODE
|
---|
| 662 | {
|
---|
| 663 | CODECCOMMONNODE node;
|
---|
| 664 | uint32_t u32F05_param;
|
---|
| 665 | uint32_t u32F08_param;
|
---|
| 666 | uint32_t u32F17_param;
|
---|
| 667 | uint32_t u32F20_param;
|
---|
| 668 | } AFGCODECNODE, *PAFGCODECNODE;
|
---|
| 669 | AssertNodeSize(AFGCODECNODE, 4);
|
---|
| 670 |
|
---|
| 671 | typedef struct PORTNODE
|
---|
| 672 | {
|
---|
| 673 | CODECCOMMONNODE node;
|
---|
| 674 | uint32_t u32F01_param;
|
---|
| 675 | uint32_t u32F07_param;
|
---|
| 676 | uint32_t u32F08_param;
|
---|
| 677 | uint32_t u32F09_param;
|
---|
| 678 | uint32_t u32F1c_param;
|
---|
| 679 | AMPLIFIER B_params;
|
---|
| 680 | } PORTNODE, *PPORTNODE;
|
---|
| 681 | AssertNodeSize(PORTNODE, 5 + 60);
|
---|
| 682 |
|
---|
| 683 | typedef struct DIGOUTNODE
|
---|
| 684 | {
|
---|
| 685 | CODECCOMMONNODE node;
|
---|
| 686 | uint32_t u32F01_param;
|
---|
| 687 | uint32_t u32F05_param;
|
---|
| 688 | uint32_t u32F07_param;
|
---|
| 689 | uint32_t u32F08_param;
|
---|
| 690 | uint32_t u32F09_param;
|
---|
| 691 | uint32_t u32F1c_param;
|
---|
| 692 | } DIGOUTNODE, *PDIGOUTNODE;
|
---|
| 693 | AssertNodeSize(DIGOUTNODE, 6);
|
---|
| 694 |
|
---|
| 695 | typedef struct DIGINNODE
|
---|
| 696 | {
|
---|
| 697 | CODECCOMMONNODE node;
|
---|
| 698 | uint32_t u32F05_param;
|
---|
| 699 | uint32_t u32F07_param;
|
---|
| 700 | uint32_t u32F08_param;
|
---|
| 701 | uint32_t u32F09_param;
|
---|
| 702 | uint32_t u32F0c_param;
|
---|
| 703 | uint32_t u32F1c_param;
|
---|
| 704 | uint32_t u32F1e_param;
|
---|
| 705 | } DIGINNODE, *PDIGINNODE;
|
---|
| 706 | AssertNodeSize(DIGINNODE, 7);
|
---|
| 707 |
|
---|
| 708 | typedef struct ADCMUXNODE
|
---|
| 709 | {
|
---|
| 710 | CODECCOMMONNODE node;
|
---|
| 711 | uint32_t u32F01_param;
|
---|
| 712 |
|
---|
| 713 | uint32_t u32A_param;
|
---|
| 714 | AMPLIFIER B_params;
|
---|
| 715 | } ADCMUXNODE, *PADCMUXNODE;
|
---|
| 716 | AssertNodeSize(ADCMUXNODE, 2 + 60);
|
---|
| 717 |
|
---|
| 718 | typedef struct PCBEEPNODE
|
---|
| 719 | {
|
---|
| 720 | CODECCOMMONNODE node;
|
---|
| 721 | uint32_t u32F07_param;
|
---|
| 722 | uint32_t u32F0a_param;
|
---|
| 723 |
|
---|
| 724 | uint32_t u32A_param;
|
---|
| 725 | AMPLIFIER B_params;
|
---|
| 726 | uint32_t u32F1c_param;
|
---|
| 727 | } PCBEEPNODE, *PPCBEEPNODE;
|
---|
| 728 | AssertNodeSize(PCBEEPNODE, 3 + 60 + 1);
|
---|
| 729 |
|
---|
| 730 | typedef struct CDNODE
|
---|
| 731 | {
|
---|
| 732 | CODECCOMMONNODE node;
|
---|
| 733 | uint32_t u32F07_param;
|
---|
| 734 | uint32_t u32F1c_param;
|
---|
| 735 | } CDNODE, *PCDNODE;
|
---|
| 736 | AssertNodeSize(CDNODE, 2);
|
---|
| 737 |
|
---|
| 738 | typedef struct VOLUMEKNOBNODE
|
---|
| 739 | {
|
---|
| 740 | CODECCOMMONNODE node;
|
---|
| 741 | uint32_t u32F08_param;
|
---|
| 742 | uint32_t u32F0f_param;
|
---|
| 743 | } VOLUMEKNOBNODE, *PVOLUMEKNOBNODE;
|
---|
| 744 | AssertNodeSize(VOLUMEKNOBNODE, 2);
|
---|
| 745 |
|
---|
| 746 | typedef struct ADCVOLNODE
|
---|
| 747 | {
|
---|
| 748 | CODECCOMMONNODE node;
|
---|
| 749 | uint32_t u32F0c_param;
|
---|
| 750 | uint32_t u32F01_param;
|
---|
| 751 | uint32_t u32A_params;
|
---|
| 752 | AMPLIFIER B_params;
|
---|
| 753 | } ADCVOLNODE, *PADCVOLNODE;
|
---|
| 754 | AssertNodeSize(ADCVOLNODE, 3 + 60);
|
---|
| 755 |
|
---|
| 756 | typedef struct RESNODE
|
---|
| 757 | {
|
---|
| 758 | CODECCOMMONNODE node;
|
---|
| 759 | uint32_t u32F05_param;
|
---|
| 760 | uint32_t u32F06_param;
|
---|
| 761 | uint32_t u32F07_param;
|
---|
| 762 | uint32_t u32F1c_param;
|
---|
| 763 |
|
---|
| 764 | uint32_t u32A_param;
|
---|
| 765 | } RESNODE, *PRESNODE;
|
---|
| 766 | AssertNodeSize(RESNODE, 5);
|
---|
| 767 |
|
---|
| 768 | /**
|
---|
| 769 | * Used for the saved state.
|
---|
| 770 | */
|
---|
| 771 | typedef struct CODECSAVEDSTATENODE
|
---|
| 772 | {
|
---|
| 773 | CODECCOMMONNODE Core;
|
---|
| 774 | uint32_t au32Params[60 + 6];
|
---|
| 775 | } CODECSAVEDSTATENODE;
|
---|
| 776 | AssertNodeSize(CODECSAVEDSTATENODE, 60 + 6);
|
---|
| 777 |
|
---|
| 778 | typedef union CODECNODE
|
---|
| 779 | {
|
---|
| 780 | CODECCOMMONNODE node;
|
---|
| 781 | ROOTCODECNODE root;
|
---|
| 782 | AFGCODECNODE afg;
|
---|
| 783 | DACNODE dac;
|
---|
| 784 | ADCNODE adc;
|
---|
| 785 | SPDIFOUTNODE spdifout;
|
---|
| 786 | SPDIFINNODE spdifin;
|
---|
| 787 | PORTNODE port;
|
---|
| 788 | DIGOUTNODE digout;
|
---|
| 789 | DIGINNODE digin;
|
---|
| 790 | ADCMUXNODE adcmux;
|
---|
| 791 | PCBEEPNODE pcbeep;
|
---|
| 792 | CDNODE cdnode;
|
---|
| 793 | VOLUMEKNOBNODE volumeKnob;
|
---|
| 794 | ADCVOLNODE adcvol;
|
---|
| 795 | RESNODE reserved;
|
---|
| 796 | CODECSAVEDSTATENODE SavedState;
|
---|
| 797 | } CODECNODE, *PCODECNODE;
|
---|
| 798 | AssertNodeSize(CODECNODE, 60 + 6);
|
---|
| 799 |
|
---|
| 800 | #define CODEC_NODES_MAX 32
|
---|
| 801 |
|
---|
[90144] | 802 | /** @name CODEC_NODE_CLS_XXX - node classification flags.
|
---|
| 803 | * @{ */
|
---|
| 804 | #define CODEC_NODE_CLS_Port UINT16_C(0x0001)
|
---|
| 805 | #define CODEC_NODE_CLS_Dac UINT16_C(0x0002)
|
---|
| 806 | #define CODEC_NODE_CLS_AdcVol UINT16_C(0x0004)
|
---|
| 807 | #define CODEC_NODE_CLS_Adc UINT16_C(0x0008)
|
---|
| 808 | #define CODEC_NODE_CLS_AdcMux UINT16_C(0x0010)
|
---|
| 809 | #define CODEC_NODE_CLS_Pcbeep UINT16_C(0x0020)
|
---|
| 810 | #define CODEC_NODE_CLS_SpdifIn UINT16_C(0x0040)
|
---|
| 811 | #define CODEC_NODE_CLS_SpdifOut UINT16_C(0x0080)
|
---|
| 812 | #define CODEC_NODE_CLS_DigInPin UINT16_C(0x0100)
|
---|
| 813 | #define CODEC_NODE_CLS_DigOutPin UINT16_C(0x0200)
|
---|
| 814 | #define CODEC_NODE_CLS_Cd UINT16_C(0x0400)
|
---|
| 815 | #define CODEC_NODE_CLS_VolKnob UINT16_C(0x0800)
|
---|
| 816 | #define CODEC_NODE_CLS_Reserved UINT16_C(0x1000)
|
---|
| 817 | /** @} */
|
---|
| 818 |
|
---|
[87799] | 819 | /**
|
---|
[90148] | 820 | * Codec configuration.
|
---|
[90147] | 821 | *
|
---|
| 822 | * This will not change after construction and is therefore kept in a const
|
---|
| 823 | * member of HDACODECR3 to encourage compiler optimizations and avoid accidental
|
---|
| 824 | * modification.
|
---|
[87799] | 825 | */
|
---|
[90147] | 826 | typedef struct HDACODECCFG
|
---|
[30985] | 827 | {
|
---|
[87799] | 828 | /** Codec implementation type. */
|
---|
[90143] | 829 | CODECTYPE enmType;
|
---|
[87799] | 830 | /** Codec ID. */
|
---|
[90143] | 831 | uint16_t id;
|
---|
| 832 | uint16_t idVendor;
|
---|
| 833 | uint16_t idDevice;
|
---|
| 834 | uint8_t bBSKU;
|
---|
| 835 | uint8_t idAssembly;
|
---|
[82450] | 836 |
|
---|
[90143] | 837 | uint8_t cTotalNodes;
|
---|
[90148] | 838 | uint8_t idxAdcVolsLineIn;
|
---|
| 839 | uint8_t idxDacLineOut;
|
---|
[87799] | 840 |
|
---|
[90140] | 841 | /** Align the lists below so they don't cross cache lines (assumes
|
---|
| 842 | * CODEC_NODES_MAX is 32). */
|
---|
[90147] | 843 | uint8_t const abPadding1[CODEC_NODES_MAX - 15];
|
---|
[88502] | 844 |
|
---|
[90143] | 845 | /** @name Node classifications.
|
---|
| 846 | * @note These are copies of the g_abStac9220Xxxx arrays in DevHdaCodec.cpp.
|
---|
| 847 | * They are used both for classifying a node and for processing a class of
|
---|
| 848 | * nodes.
|
---|
| 849 | * @{ */
|
---|
[90147] | 850 | uint8_t abPorts[CODEC_NODES_MAX];
|
---|
| 851 | uint8_t abDacs[CODEC_NODES_MAX];
|
---|
| 852 | uint8_t abAdcVols[CODEC_NODES_MAX];
|
---|
| 853 | uint8_t abAdcs[CODEC_NODES_MAX];
|
---|
| 854 | uint8_t abAdcMuxs[CODEC_NODES_MAX];
|
---|
| 855 | uint8_t abPcbeeps[CODEC_NODES_MAX];
|
---|
| 856 | uint8_t abSpdifIns[CODEC_NODES_MAX];
|
---|
| 857 | uint8_t abSpdifOuts[CODEC_NODES_MAX];
|
---|
| 858 | uint8_t abDigInPins[CODEC_NODES_MAX];
|
---|
| 859 | uint8_t abDigOutPins[CODEC_NODES_MAX];
|
---|
| 860 | uint8_t abCds[CODEC_NODES_MAX];
|
---|
| 861 | uint8_t abVolKnobs[CODEC_NODES_MAX];
|
---|
| 862 | uint8_t abReserveds[CODEC_NODES_MAX];
|
---|
[90143] | 863 | /** @} */
|
---|
[90140] | 864 |
|
---|
[90144] | 865 | /** The CODEC_NODE_CLS_XXX flags for each node. */
|
---|
[90147] | 866 | uint16_t afNodeClassifications[CODEC_NODES_MAX];
|
---|
| 867 | } HDACODECCFG;
|
---|
| 868 | AssertCompileMemberAlignment(HDACODECCFG, abPorts, CODEC_NODES_MAX);
|
---|
[90148] | 869 | AssertCompileSizeAlignment(HDACODECCFG, 64);
|
---|
[90140] | 870 |
|
---|
| 871 |
|
---|
[90147] | 872 | /**
|
---|
| 873 | * HDA codec state (ring-3, no shared state).
|
---|
| 874 | */
|
---|
| 875 | typedef struct HDACODECR3
|
---|
| 876 | {
|
---|
| 877 | /** The codec configuration - initialized at construction time. */
|
---|
| 878 | HDACODECCFG const Cfg;
|
---|
[90148] | 879 | /** The state data for each node. */
|
---|
[90147] | 880 | CODECNODE aNodes[CODEC_NODES_MAX];
|
---|
| 881 | /** Statistics. */
|
---|
| 882 | STAMCOUNTER StatLookupsR3;
|
---|
| 883 | /** Size alignment padding. */
|
---|
| 884 | uint64_t const au64Padding1[7];
|
---|
[90138] | 885 | } HDACODECR3;
|
---|
[90140] | 886 | AssertCompile(RT_IS_POWER_OF_TWO(CODEC_NODES_MAX));
|
---|
| 887 | AssertCompileMemberAlignment(HDACODECR3, aNodes, 64);
|
---|
| 888 | AssertCompileSizeAlignment(HDACODECR3, 64);
|
---|
[87799] | 889 |
|
---|
[60353] | 890 |
|
---|
[90137] | 891 | /** @name HDA Codec API used by the device emulation.
|
---|
| 892 | * @{ */
|
---|
[90138] | 893 | int hdaR3CodecConstruct(PPDMDEVINS pDevIns, PHDACODECR3 pThis, uint16_t uLUN, PCFGMNODE pCfg);
|
---|
| 894 | void hdaR3CodecPowerOff(PHDACODECR3 pThis);
|
---|
| 895 | int hdaR3CodecLoadState(PPDMDEVINS pDevIns, PHDACODECR3 pThis, PSSMHANDLE pSSM, uint32_t uVersion);
|
---|
| 896 | int hdaR3CodecAddStream(PHDACODECR3 pThis, PDMAUDIOMIXERCTL enmMixerCtl, PPDMAUDIOSTREAMCFG pCfg);
|
---|
| 897 | int hdaR3CodecRemoveStream(PHDACODECR3 pThis, PDMAUDIOMIXERCTL enmMixerCtl, bool fImmediate);
|
---|
[87799] | 898 |
|
---|
[90138] | 899 | int hdaCodecSaveState(PPDMDEVINS pDevIns, PHDACODECR3 pThis, PSSMHANDLE pSSM);
|
---|
| 900 | void hdaCodecDestruct(PHDACODECR3 pThis);
|
---|
| 901 | void hdaCodecReset(PHDACODECR3 pThis);
|
---|
[30985] | 902 |
|
---|
[90138] | 903 | DECLHIDDEN(int) hdaR3CodecLookup(PHDACODECR3 pThis, uint32_t uCmd, uint64_t *puResp);
|
---|
| 904 | DECLHIDDEN(void) hdaR3CodecDbgListNodes(PHDACODECR3 pThis, PCDBGFINFOHLP pHlp, const char *pszArgs);
|
---|
| 905 | DECLHIDDEN(void) hdaR3CodecDbgSelector(PHDACODECR3 pThis, PCDBGFINFOHLP pHlp, const char *pszArgs);
|
---|
[90137] | 906 | /** @} */
|
---|
[90135] | 907 |
|
---|
[88228] | 908 | #endif /* !VBOX_INCLUDED_SRC_Audio_DevHdaCodec_h */
|
---|
[53442] | 909 |
|
---|