VirtualBox

source: vbox/trunk/include/iprt/x86extra.mac

Last change on this file was 103611, checked in by vboxsync, 2 months ago

ValKit/bs3-cpu-instr-2: Test the alternate reg/reg encoding of and, or, xor, add, adc, sub, sbb and cmp. Extended x86extra.mac with macros for manually encoding reg/reg instructions like this. bugref:10376
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 13.1 KB
Line 
1;; @file
2; IPRT - X86 and AMD64 Structures and Definitions that are not automatically
3; converted from the C header file.
4;
5
6;
7; Copyright (C) 2012-2023 Oracle and/or its affiliates.
8;
9; This file is part of VirtualBox base platform packages, as
10; available from https://www.virtualbox.org.
11;
12; This program is free software; you can redistribute it and/or
13; modify it under the terms of the GNU General Public License
14; as published by the Free Software Foundation, in version 3 of the
15; License.
16;
17; This program is distributed in the hope that it will be useful, but
18; WITHOUT ANY WARRANTY; without even the implied warranty of
19; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20; General Public License for more details.
21;
22; You should have received a copy of the GNU General Public License
23; along with this program; if not, see <https://www.gnu.org/licenses>.
24;
25; The contents of this file may alternatively be used under the terms
26; of the Common Development and Distribution License Version 1.0
27; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28; in the VirtualBox distribution, in which case the provisions of the
29; CDDL are applicable instead of those of the GPL.
30;
31; You may elect to license modified versions of this file under the
32; terms and conditions of either the GPL or the CDDL or both.
33;
34; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35;
36
37%ifndef ___iprt_x86extra_mac
38%define ___iprt_x86extra_mac
39
40
41%define X86_XCPT_DE 0x00
42%define X86_XCPT_DB 0x01
43%define X86_XCPT_NMI 0x02
44%define X86_XCPT_BP 0x03
45%define X86_XCPT_OF 0x04
46%define X86_XCPT_BR 0x05
47%define X86_XCPT_UD 0x06
48%define X86_XCPT_NM 0x07
49%define X86_XCPT_DF 0x08
50%define X86_XCPT_CO_SEG_OVERRUN 0x09
51%define X86_XCPT_TS 0x0a
52%define X86_XCPT_NP 0x0b
53%define X86_XCPT_SS 0x0c
54%define X86_XCPT_GP 0x0d
55%define X86_XCPT_PF 0x0e
56%define X86_XCPT_MF 0x10
57%define X86_XCPT_AC 0x11
58%define X86_XCPT_MC 0x12
59%define X86_XCPT_XF 0x13
60%define X86_XCPT_VE 0x14
61%define X86_XCPT_SX 0x1f
62
63%define PAGE_SIZE 0x1000
64
65;; Same a ~(X86_CR0_PE | X86_CR0_PG) except it won't cause assembler warnings.
66%define X86_CR0_NO_PE_NO_PG 0x7ffffffe
67
68
69
70;;
71; 32-bit protected mode fstenv image.
72;
73struc X86FSTENV32P
74 .FCW resw 1
75 .padding1 resw 1
76 .FSW resw 1
77 .padding2 resw 1
78 .FTW resw 1
79 .padding3 resw 1
80 .FPUIP resd 1
81 .FPUCS resw 1
82 .FOP resw 1
83 .FPUDP resd 1
84 .FPUDS resw 1
85 .padding4 resw 1
86endstruc
87
88
89;;
90; The image saved by FXSAVE.
91;
92struc X86FXSTATE
93 .FCW resw 1
94 .FSW resw 1
95 .FTW resw 1
96 .FOP resw 1
97 .FPUIP resd 1
98 .FPUCS resw 1
99 .Rsrvd1 resw 1
100 .FPUDP resd 1
101 .FPUDS resw 1
102 .Rsrvd2 resw 1
103 .MXCSR resd 1
104 .MXCSR_MASK resd 1
105 .st0 resd 4
106 .st1 resd 4
107 .st2 resd 4
108 .st3 resd 4
109 .st4 resd 4
110 .st5 resd 4
111 .st6 resd 4
112 .st7 resd 4
113 .xmm0 resd 4
114 .xmm1 resd 4
115 .xmm2 resd 4
116 .xmm3 resd 4
117 .xmm4 resd 4
118 .xmm5 resd 4
119 .xmm6 resd 4
120 .xmm7 resd 4
121 .xmm8 resd 4
122 .xmm9 resd 4
123 .xmm10 resd 4
124 .xmm11 resd 4
125 .xmm12 resd 4
126 .xmm13 resd 4
127 .xmm14 resd 4
128 .xmm15 resd 4
129 .au32RsrvdRest resd 24
130endstruc
131
132
133struc X86TSS16
134 .selPrev resw 1
135 .sp0 resw 1
136 .ss0 resw 1
137 .sp1 resw 1
138 .ss1 resw 1
139 .sp2 resw 1
140 .ss2 resw 1
141 .ip resw 1
142 .flags resw 1
143 .ax resw 1
144 .cx resw 1
145 .dx resw 1
146 .bx resw 1
147 .sp resw 1
148 .bp resw 1
149 .si resw 1
150 .di resw 1
151 .es resw 1
152 .cs resw 1
153 .ss resw 1
154 .ds resw 1
155 .selLdt resw 1
156endstruc
157AssertCompileSize(X86TSS16, 44)
158
159
160struc X86TSS32
161 .selPrev resw 1
162 .padding1 resw 1
163 .esp0 resd 1
164 .ss0 resw 1
165 .padding_ss0 resw 1
166 .esp1 resd 1
167 .ss1 resw 1
168 .padding_ss1 resw 1
169 .esp2 resd 1
170 .ss2 resw 1
171 .padding_ss2 resw 1
172 .cr3 resd 1
173 .eip resd 1
174 .eflags resd 1
175 .eax resd 1
176 .ecx resd 1
177 .edx resd 1
178 .ebx resd 1
179 .esp resd 1
180 .ebp resd 1
181 .esi resd 1
182 .edi resd 1
183 .es resw 1
184 .padding_es resw 1
185 .cs resw 1
186 .padding_cs resw 1
187 .ss resw 1
188 .padding_ss resw 1
189 .ds resw 1
190 .padding_ds resw 1
191 .fs resw 1
192 .padding_fs resw 1
193 .gs resw 1
194 .padding_gs resw 1
195 .selLdt resw 1
196 .padding_ldt resw 1
197 .fDebugTrap resw 1
198 .offIoBitmap resw 1
199 ;.IntRedirBitmap resb 32 - this is optional.
200endstruc
201AssertCompileSize(X86TSS32,104)
202
203
204struc X86TSS64
205 .u32Reserved resd 1
206 .rsp0 resq 1
207 .rsp1 resq 1
208 .rsp2 resq 1
209 .u32Reserved2 resd 2
210 .ist1 resq 1
211 .ist2 resq 1
212 .ist3 resq 1
213 .ist4 resq 1
214 .ist5 resq 1
215 .ist6 resq 1
216 .ist7 resq 1
217 .u16Reserved resw 5
218 .offIoBitmap resw 1
219 ;.IntRedirBitmap resb 32 - this isn't really there!! VBox addition for x86TSS32 structure compatibility in x86.h.
220endstruc
221AssertCompileSize(X86TSS64, 104)
222
223
224;; @name Helper values for the X86_MKOP_XXX macros.
225;; @{
226%define X86_MKOP_GREG8_al 0
227%define X86_MKOP_GREG8_cl 1
228%define X86_MKOP_GREG8_dl 2
229%define X86_MKOP_GREG8_bl 3
230%define X86_MKOP_GREG8_ah 4
231%define X86_MKOP_GREG8_ch 5
232%define X86_MKOP_GREG8_dh 6
233%define X86_MKOP_GREG8_bh 7
234%define X86_MKOP_GREG8_spl 20
235%define X86_MKOP_GREG8_bpl 21
236%define X86_MKOP_GREG8_sil 22
237%define X86_MKOP_GREG8_dil 23
238%define X86_MKOP_GREG8_r8b 8
239%define X86_MKOP_GREG8_r9b 9
240%define X86_MKOP_GREG8_r10b 10
241%define X86_MKOP_GREG8_r11b 11
242%define X86_MKOP_GREG8_r12b 12
243%define X86_MKOP_GREG8_r13b 13
244%define X86_MKOP_GREG8_r14b 14
245%define X86_MKOP_GREG8_r15b 15
246
247%define X86_MKOP_GREG16_ax 0
248%define X86_MKOP_GREG16_cx 1
249%define X86_MKOP_GREG16_dx 2
250%define X86_MKOP_GREG16_bx 3
251%define X86_MKOP_GREG16_sp 4
252%define X86_MKOP_GREG16_bp 5
253%define X86_MKOP_GREG16_si 6
254%define X86_MKOP_GREG16_di 7
255%define X86_MKOP_GREG16_r8w 8
256%define X86_MKOP_GREG16_r9w 9
257%define X86_MKOP_GREG16_r10w 10
258%define X86_MKOP_GREG16_r11w 11
259%define X86_MKOP_GREG16_r12w 12
260%define X86_MKOP_GREG16_r13w 13
261%define X86_MKOP_GREG16_r14w 14
262%define X86_MKOP_GREG16_r15w 15
263
264%define X86_MKOP_GREG32_eax 0
265%define X86_MKOP_GREG32_ecx 1
266%define X86_MKOP_GREG32_edx 2
267%define X86_MKOP_GREG32_ebx 3
268%define X86_MKOP_GREG32_esp 4
269%define X86_MKOP_GREG32_ebp 5
270%define X86_MKOP_GREG32_esi 6
271%define X86_MKOP_GREG32_edi 7
272%define X86_MKOP_GREG32_r8d 8
273%define X86_MKOP_GREG32_r9d 9
274%define X86_MKOP_GREG32_r10d 10
275%define X86_MKOP_GREG32_r11d 11
276%define X86_MKOP_GREG32_r12d 12
277%define X86_MKOP_GREG32_r13d 13
278%define X86_MKOP_GREG32_r14d 14
279%define X86_MKOP_GREG32_r15d 15
280
281%define X86_MKOP_GREG64_rax 0
282%define X86_MKOP_GREG64_rcx 1
283%define X86_MKOP_GREG64_rdx 2
284%define X86_MKOP_GREG64_rbx 3
285%define X86_MKOP_GREG64_rsp 4
286%define X86_MKOP_GREG64_rbp 5
287%define X86_MKOP_GREG64_rsi 6
288%define X86_MKOP_GREG64_rdi 7
289%define X86_MKOP_GREG64_r8 8
290%define X86_MKOP_GREG64_r9 9
291%define X86_MKOP_GREG64_r10 10
292%define X86_MKOP_GREG64_r11 11
293%define X86_MKOP_GREG64_r12 12
294%define X86_MKOP_GREG64_r13 13
295%define X86_MKOP_GREG64_r14 14
296%define X86_MKOP_GREG64_r15 15
297;; @}
298
299;;
300; Encodes the MODRM byte for an instruction with 8-bit operand size.
301; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
302; @param 2 The MODRM.REG register mnemonic.
303; @param 3 The MODRM.RM register mnemonic.
304%macro X86_MKOP_MODRM8 3
305 %assign x86_mkop_modrm8_iReg X86_MKOP_GREG8_ %+ %2
306 %assign x86_mkop_modrm8_iRm X86_MKOP_GREG8_ %+ %3
307 db X86_MODRM_MAKE(%1, x86_mkop_modrm8_iReg & 7, x86_mkop_modrm8_iRm & 7)
308%endmacro
309
310;;
311; Encodes the optional REX prefix for an instruction with 8-bit operand size.
312; @param 1 The MODRM.REG register mnemonic.
313; @param 2 The MODRM.RM register mnemonic.
314%macro X86_MKOP_REX8 2
315 %assign x86_mkop_rex8_iReg X86_MKOP_GREG8_ %+ %1
316 %assign x86_mkop_rex8_iRm X86_MKOP_GREG8_ %+ %2
317 %if x86_mkop_rex8_iReg >= 8 || x86_mkop_rex8_iRm >= 8
318 %if __BITS__ == 64
319 %if (x86_mkop_rex8_iReg < 4 || x86_mkop_rex8_iReg >= 8) && (x86_mkop_rex8_iRm < 4 || x86_mkop_rex8_iRm >= 8)
320 db X86_OP_REX | (((x86_mkop_rex8_iReg >> 3) & 1) * X86_OP_REX_R) | (((x86_mkop_rex8_iRm >> 3) & 1) * X86_OP_REX_B)
321 %else
322 %error X86_MKOP_REX8: Invalid operand mix: %1, %2
323 %endif
324 %else
325 %error X86_MKOP_REX8: not in 64-bit code: %1, %2
326 %endif
327 %endif
328%endmacro
329
330
331;;
332; Encodes the MODRM byte for an instruction with 16-bit operand size.
333; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
334; @param 2 The MODRM.REG register mnemonic.
335; @param 3 The MODRM.RM register mnemonic.
336%macro X86_MKOP_MODRM16 3
337 %assign x86_mkop_modrm16_iReg X86_MKOP_GREG16_ %+ %2
338 %assign x86_mkop_modrm16_iRm X86_MKOP_GREG16_ %+ %3
339 db X86_MODRM_MAKE(%1, x86_mkop_modrm16_iReg & 7, x86_mkop_modrm16_iRm & 7)
340%endmacro
341
342;;
343; Encodes the optional REX prefix for an instruction with 16-bit operand size.
344; @param 1 The MODRM.REG register mnemonic.
345; @param 2 The MODRM.RM register mnemonic.
346%macro X86_MKOP_REX16 2
347 %assign x86_mkop_rex16_iReg X86_MKOP_GREG16_ %+ %1
348 %assign x86_mkop_rex16_iRm X86_MKOP_GREG16_ %+ %2
349 %if x86_mkop_rex16_iReg >= 8 || x86_mkop_rex16_iRm >= 8
350 %if __BITS__ == 64
351 db X86_OP_REX | ((x86_mkop_rex16_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex16_iRm >> 3) * X86_OP_REX_B)
352 %else
353 %error X86_MKOP_REX16: not in 64-bit code: %1, %2
354 %endif
355 %endif
356%endmacro
357
358
359;;
360; Encodes the MODRM byte for an instruction with 32-bit operand size.
361; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
362; @param 2 The MODRM.REG register mnemonic.
363; @param 3 The MODRM.RM register mnemonic.
364%macro X86_MKOP_MODRM32 3
365 %assign x86_mkop_modrm32_iReg X86_MKOP_GREG32_ %+ %2
366 %assign x86_mkop_modrm32_iRm X86_MKOP_GREG32_ %+ %3
367 db X86_MODRM_MAKE(%1, x86_mkop_modrm32_iReg & 7, x86_mkop_modrm32_iRm & 7)
368%endmacro
369
370;;
371; Encodes the optional REX prefix for an instruction with 32-bit operand size.
372; @param 1 The MODRM.REG register mnemonic.
373; @param 2 The MODRM.RM register mnemonic.
374%macro X86_MKOP_REX32 2
375 %assign x86_mkop_rex32_iReg X86_MKOP_GREG32_ %+ %1
376 %assign x86_mkop_rex32_iRm X86_MKOP_GREG32_ %+ %2
377 %if x86_mkop_rex32_iReg >= 8 || x86_mkop_rex32_iRm >= 8
378 %if __BITS__ == 64
379 db X86_OP_REX | ((x86_mkop_rex32_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex32_iRm >> 3) * X86_OP_REX_B)
380 %else
381 %error X86_MKOP_REX32: not in 64-bit code: %1, %2
382 %endif
383 %endif
384%endmacro
385
386
387;;
388; Encodes the MODRM byte for an instruction with 64-bit operand size.
389; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
390; @param 2 The MODRM.REG register mnemonic.
391; @param 3 The MODRM.RM register mnemonic.
392%macro X86_MKOP_MODRM64 3
393 %assign x86_mkop_modrm64_iReg X86_MKOP_GREG64_ %+ %2
394 %assign x86_mkop_modrm64_iRm X86_MKOP_GREG64_ %+ %3
395 db X86_MODRM_MAKE(%1, x86_mkop_modrm64_iReg & 7, x86_mkop_modrm64_iRm & 7)
396%endmacro
397
398;;
399; Encodes the REX prefix for an instruction with 64-bit operand size.
400; @param 1 The MODRM.REG register mnemonic.
401; @param 2 The MODRM.RM register mnemonic.
402%macro X86_MKOP_REX64 2
403 %assign x86_mkop_rex64_iReg X86_MKOP_GREG64_ %+ %1
404 %assign x86_mkop_rex64_iRm X86_MKOP_GREG64_ %+ %2
405 %if __BITS__ == 64
406 db X86_OP_REX_W | ((x86_mkop_rex64_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex64_iRm >> 3) * X86_OP_REX_B)
407 %else
408 %error X86_MKOP_REX64: not in 64-bit code: %1, %2
409 %endif
410%endmacro
411
412
413%endif
414
Note: See TracBrowser for help on using the repository browser.

© 2023 Oracle
Contact – Privacy policy – Terms of Use