| 1 | /** @file
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| 2 | * IPRT - Assembly Routines for Optimizing some Integers Math Operations.
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| 3 | */
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| 4 |
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| 5 | /*
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| 6 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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| 7 | *
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| 8 | * This file is part of VirtualBox base platform packages, as
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| 9 | * available from https://www.virtualbox.org.
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| 10 | *
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| 11 | * This program is free software; you can redistribute it and/or
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| 12 | * modify it under the terms of the GNU General Public License
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| 13 | * as published by the Free Software Foundation, in version 3 of the
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| 14 | * License.
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| 15 | *
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| 16 | * This program is distributed in the hope that it will be useful, but
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| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 19 | * General Public License for more details.
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| 20 | *
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| 21 | * You should have received a copy of the GNU General Public License
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| 22 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 23 | *
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| 24 | * The contents of this file may alternatively be used under the terms
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| 25 | * of the Common Development and Distribution License Version 1.0
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| 26 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 27 | * in the VirtualBox distribution, in which case the provisions of the
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| 28 | * CDDL are applicable instead of those of the GPL.
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| 29 | *
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| 30 | * You may elect to license modified versions of this file under the
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| 31 | * terms and conditions of either the GPL or the CDDL or both.
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| 32 | *
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| 33 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| 34 | */
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| 35 |
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| 36 | #ifndef IPRT_INCLUDED_asm_math_h
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| 37 | #define IPRT_INCLUDED_asm_math_h
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| 38 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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| 39 | # pragma once
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| 40 | #endif
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| 41 |
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| 42 | #include <iprt/types.h>
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| 43 |
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| 44 | #if defined(_MSC_VER) && RT_INLINE_ASM_USES_INTRIN
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| 45 | /* Emit the intrinsics at all optimization levels. */
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| 46 | # include <iprt/sanitized/intrin.h>
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| 47 | # pragma intrinsic(__emul)
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| 48 | # pragma intrinsic(__emulu)
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| 49 | # ifdef RT_ARCH_AMD64
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| 50 | # pragma intrinsic(_mul128)
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| 51 | # pragma intrinsic(_umul128)
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| 52 | # endif
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| 53 | #endif
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| 54 |
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| 55 |
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| 56 | /*
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| 57 | * Undefine all symbols we have Watcom C/C++ #pragma aux'es for.
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| 58 | */
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| 59 | #if defined(__WATCOMC__) && ARCH_BITS == 16 && defined(RT_ARCH_X86)
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| 60 | /*# include "asm-math-watcom-x86-16.h"*/
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| 61 | #elif defined(__WATCOMC__) && ARCH_BITS == 32 && defined(RT_ARCH_X86)
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| 62 | # include "asm-math-watcom-x86-32.h"
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| 63 | #endif
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| 64 |
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| 65 |
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| 66 | /** @defgroup grp_rt_asm_math Interger Math Optimizations
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| 67 | * @ingroup grp_rt_asm
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| 68 | * @{ */
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| 69 |
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| 70 | /**
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| 71 | * Multiplies two unsigned 32-bit values returning an unsigned 64-bit result.
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| 72 | *
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| 73 | * @returns u32F1 * u32F2.
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| 74 | */
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| 75 |
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| 76 | #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN && defined(RT_ARCH_X86)
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| 77 | RT_ASM_DECL_PRAGMA_WATCOM(uint64_t) ASMMult2xU32RetU64(uint32_t u32F1, uint32_t u32F2);
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| 78 | #else
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| 79 | DECLINLINE(uint64_t) ASMMult2xU32RetU64(uint32_t u32F1, uint32_t u32F2)
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| 80 | {
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| 81 | # ifdef RT_ARCH_X86
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| 82 | uint64_t u64;
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| 83 | # if RT_INLINE_ASM_GNU_STYLE
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| 84 | __asm__ __volatile__("mull %%edx"
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| 85 | : "=A" (u64)
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| 86 | : "a" (u32F2), "d" (u32F1));
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| 87 | # elif RT_INLINE_ASM_USES_INTRIN
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| 88 | u64 = __emulu(u32F1, u32F2);
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| 89 | # else
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| 90 | __asm
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| 91 | {
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| 92 | mov edx, [u32F1]
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| 93 | mov eax, [u32F2]
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| 94 | mul edx
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| 95 | mov dword ptr [u64], eax
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| 96 | mov dword ptr [u64 + 4], edx
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| 97 | }
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| 98 | # endif
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| 99 | return u64;
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| 100 | # else /* generic: */
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| 101 | return (uint64_t)u32F1 * u32F2;
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| 102 | # endif
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| 103 | }
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| 104 | #endif
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| 105 |
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| 106 |
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| 107 | /**
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| 108 | * Multiplies two signed 32-bit values returning a signed 64-bit result.
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| 109 | *
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| 110 | * @returns u32F1 * u32F2.
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| 111 | */
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| 112 | #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN && defined(RT_ARCH_X86)
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| 113 | RT_ASM_DECL_PRAGMA_WATCOM(int64_t) ASMMult2xS32RetS64(int32_t i32F1, int32_t i32F2);
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| 114 | #else
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| 115 | DECLINLINE(int64_t) ASMMult2xS32RetS64(int32_t i32F1, int32_t i32F2)
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| 116 | {
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| 117 | # ifdef RT_ARCH_X86
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| 118 | int64_t i64;
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| 119 | # if RT_INLINE_ASM_GNU_STYLE
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| 120 | __asm__ __volatile__("imull %%edx"
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| 121 | : "=A" (i64)
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| 122 | : "a" (i32F2), "d" (i32F1));
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| 123 | # elif RT_INLINE_ASM_USES_INTRIN
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| 124 | i64 = __emul(i32F1, i32F2);
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| 125 | # else
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| 126 | __asm
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| 127 | {
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| 128 | mov edx, [i32F1]
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| 129 | mov eax, [i32F2]
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| 130 | imul edx
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| 131 | mov dword ptr [i64], eax
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| 132 | mov dword ptr [i64 + 4], edx
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| 133 | }
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| 134 | # endif
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| 135 | return i64;
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| 136 | # else /* generic: */
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| 137 | return (int64_t)i32F1 * i32F2;
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| 138 | # endif
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| 139 | }
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| 140 | #endif
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| 141 |
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| 142 |
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| 143 | DECLINLINE(uint64_t) ASMMult2xU64Ret2xU64(uint64_t u64F1, uint64_t u64F2, uint64_t *pu64ProdHi)
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| 144 | {
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| 145 | #if defined(RT_ARCH_AMD64) && (RT_INLINE_ASM_GNU_STYLE || RT_INLINE_ASM_USES_INTRIN)
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| 146 | # if RT_INLINE_ASM_GNU_STYLE
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| 147 | uint64_t u64Low, u64High;
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| 148 | __asm__ __volatile__("mulq %%rdx"
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| 149 | : "=a" (u64Low), "=d" (u64High)
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| 150 | : "0" (u64F1), "1" (u64F2));
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| 151 | *pu64ProdHi = u64High;
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| 152 | return u64Low;
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| 153 | # elif RT_INLINE_ASM_USES_INTRIN
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| 154 | return _umul128(u64F1, u64F2, pu64ProdHi);
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| 155 | # else
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| 156 | # error "hmm"
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| 157 | # endif
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| 158 | #else /* generic: */
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| 159 | /*
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| 160 | * F1 * F2 = Prod
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| 161 | * -- --
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| 162 | * ab * cd = b*d + a*d*10 + b*c*10 + a*c*100
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| 163 | *
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| 164 | * Where a, b, c and d are 'digits', and 10 is max digit + 1.
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| 165 | *
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| 166 | * Our digits are 32-bit wide, so instead of 10 we multiply by 4G.
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| 167 | * Prod = F1.s.Lo*F2.s.Lo + F1.s.Hi*F2.s.Lo*4G
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| 168 | * + F1.s.Lo*F2.s.Hi*4G + F1.s.Hi*F2.s.Hi*4G*4G
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| 169 | */
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| 170 | RTUINT128U Prod;
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| 171 | RTUINT64U Tmp1;
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| 172 | uint64_t u64Tmp;
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| 173 | RTUINT64U F1, F2;
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| 174 | F1.u = u64F1;
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| 175 | F2.u = u64F2;
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| 176 |
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| 177 | Prod.s.Lo = ASMMult2xU32RetU64(F1.s.Lo, F2.s.Lo);
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| 178 |
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| 179 | Tmp1.u = ASMMult2xU32RetU64(F1.s.Hi, F2.s.Lo);
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| 180 | u64Tmp = (uint64_t)Prod.DWords.dw1 + Tmp1.s.Lo;
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| 181 | Prod.DWords.dw1 = (uint32_t)u64Tmp;
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| 182 | Prod.s.Hi = Tmp1.s.Hi;
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| 183 | Prod.s.Hi += u64Tmp >> 32; /* carry */
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| 184 |
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| 185 | Tmp1.u = ASMMult2xU32RetU64(F1.s.Lo, F2.s.Hi);
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| 186 | u64Tmp = (uint64_t)Prod.DWords.dw1 + Tmp1.s.Lo;
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| 187 | Prod.DWords.dw1 = (uint32_t)u64Tmp;
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| 188 | u64Tmp >>= 32; /* carry */
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| 189 | u64Tmp += Prod.DWords.dw2;
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| 190 | u64Tmp += Tmp1.s.Hi;
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| 191 | Prod.DWords.dw2 = (uint32_t)u64Tmp;
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| 192 | Prod.DWords.dw3 += u64Tmp >> 32; /* carry */
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| 193 |
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| 194 | Prod.s.Hi += ASMMult2xU32RetU64(F1.s.Hi, F2.s.Hi);
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| 195 | *pu64ProdHi = Prod.s.Hi;
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| 196 | return Prod.s.Lo;
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| 197 | #endif
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| 198 | }
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| 199 |
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| 200 |
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| 201 |
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| 202 | /**
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| 203 | * Divides a 64-bit unsigned by a 32-bit unsigned returning an unsigned 32-bit result.
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| 204 | *
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| 205 | * @returns u64 / u32.
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| 206 | */
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| 207 | #if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
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| 208 | RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMDivU64ByU32RetU32(uint64_t u64, uint32_t u32);
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| 209 | #else
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| 210 | DECLINLINE(uint32_t) ASMDivU64ByU32RetU32(uint64_t u64, uint32_t u32)
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| 211 | {
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| 212 | # ifdef RT_ARCH_X86
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| 213 | # if RT_INLINE_ASM_GNU_STYLE
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| 214 | RTCCUINTREG uDummy;
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| 215 | __asm__ __volatile__("divl %3"
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| 216 | : "=a" (u32), "=d"(uDummy)
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| 217 | : "A" (u64), "r" (u32));
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| 218 | # else
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| 219 | __asm
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| 220 | {
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| 221 | mov eax, dword ptr [u64]
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| 222 | mov edx, dword ptr [u64 + 4]
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| 223 | mov ecx, [u32]
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| 224 | div ecx
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| 225 | mov [u32], eax
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| 226 | }
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| 227 | # endif
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| 228 | return u32;
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| 229 | # else /* generic: */
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| 230 | return (uint32_t)(u64 / u32);
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| 231 | # endif
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| 232 | }
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| 233 | #endif
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| 234 |
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| 235 |
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| 236 | /**
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| 237 | * Divides a 64-bit signed by a 32-bit signed returning a signed 32-bit result.
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| 238 | *
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| 239 | * @returns u64 / u32.
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| 240 | */
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| 241 | #if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
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| 242 | RT_ASM_DECL_PRAGMA_WATCOM(int32_t) ASMDivS64ByS32RetS32(int64_t i64, int32_t i32);
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| 243 | #else
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| 244 | DECLINLINE(int32_t) ASMDivS64ByS32RetS32(int64_t i64, int32_t i32)
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| 245 | {
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| 246 | # ifdef RT_ARCH_X86
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| 247 | # if RT_INLINE_ASM_GNU_STYLE
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| 248 | RTCCUINTREG iDummy;
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| 249 | __asm__ __volatile__("idivl %3"
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| 250 | : "=a" (i32), "=d"(iDummy)
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| 251 | : "A" (i64), "r" (i32));
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| 252 | # else
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| 253 | __asm
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| 254 | {
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| 255 | mov eax, dword ptr [i64]
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| 256 | mov edx, dword ptr [i64 + 4]
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| 257 | mov ecx, [i32]
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| 258 | idiv ecx
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| 259 | mov [i32], eax
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| 260 | }
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| 261 | # endif
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| 262 | return i32;
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| 263 | # else /* generic: */
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| 264 | return (int32_t)(i64 / i32);
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| 265 | # endif
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| 266 | }
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| 267 | #endif
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| 268 |
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| 269 |
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| 270 | /**
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| 271 | * Performs 64-bit unsigned by a 32-bit unsigned division with a 32-bit unsigned result,
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| 272 | * returning the rest.
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| 273 | *
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| 274 | * @returns u64 % u32.
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| 275 | *
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| 276 | * @remarks It is important that the result is <= UINT32_MAX or we'll overflow and crash.
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| 277 | */
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| 278 | #if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
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| 279 | RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMModU64ByU32RetU32(uint64_t u64, uint32_t u32);
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| 280 | #else
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| 281 | DECLINLINE(uint32_t) ASMModU64ByU32RetU32(uint64_t u64, uint32_t u32)
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| 282 | {
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| 283 | # ifdef RT_ARCH_X86
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| 284 | # if RT_INLINE_ASM_GNU_STYLE
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| 285 | RTCCUINTREG uDummy;
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| 286 | __asm__ __volatile__("divl %3"
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| 287 | : "=a" (uDummy), "=d"(u32)
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| 288 | : "A" (u64), "r" (u32));
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| 289 | # else
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| 290 | __asm
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| 291 | {
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| 292 | mov eax, dword ptr [u64]
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| 293 | mov edx, dword ptr [u64 + 4]
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| 294 | mov ecx, [u32]
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| 295 | div ecx
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| 296 | mov [u32], edx
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| 297 | }
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| 298 | # endif
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| 299 | return u32;
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| 300 | # else /* generic: */
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| 301 | return (uint32_t)(u64 % u32);
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| 302 | # endif
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| 303 | }
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| 304 | #endif
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| 305 |
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| 306 |
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| 307 | /**
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| 308 | * Performs 64-bit signed by a 32-bit signed division with a 32-bit signed result,
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| 309 | * returning the rest.
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| 310 | *
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| 311 | * @returns u64 % u32.
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| 312 | *
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| 313 | * @remarks It is important that the result is <= UINT32_MAX or we'll overflow and crash.
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| 314 | */
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| 315 | #if RT_INLINE_ASM_EXTERNAL && defined(RT_ARCH_X86)
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| 316 | RT_ASM_DECL_PRAGMA_WATCOM(int32_t) ASMModS64ByS32RetS32(int64_t i64, int32_t i32);
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| 317 | #else
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| 318 | DECLINLINE(int32_t) ASMModS64ByS32RetS32(int64_t i64, int32_t i32)
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| 319 | {
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| 320 | # ifdef RT_ARCH_X86
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| 321 | # if RT_INLINE_ASM_GNU_STYLE
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| 322 | RTCCUINTREG iDummy;
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| 323 | __asm__ __volatile__("idivl %3"
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| 324 | : "=a" (iDummy), "=d"(i32)
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| 325 | : "A" (i64), "r" (i32));
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| 326 | # else
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| 327 | __asm
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| 328 | {
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| 329 | mov eax, dword ptr [i64]
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| 330 | mov edx, dword ptr [i64 + 4]
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| 331 | mov ecx, [i32]
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| 332 | idiv ecx
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| 333 | mov [i32], edx
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| 334 | }
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| 335 | # endif
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| 336 | return i32;
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| 337 | # else /* generic: */
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| 338 | return (int32_t)(i64 % i32);
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| 339 | # endif
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| 340 | }
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| 341 | #endif
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| 342 |
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| 343 |
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| 344 | /**
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| 345 | * Multiple a 32-bit by a 32-bit integer and divide the result by a 32-bit integer
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| 346 | * using a 64 bit intermediate result.
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| 347 | *
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| 348 | * @returns (u32A * u32B) / u32C.
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| 349 | * @param u32A The 32-bit value (A).
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| 350 | * @param u32B The 32-bit value to multiple by A.
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| 351 | * @param u32C The 32-bit value to divide A*B by.
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| 352 | *
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| 353 | * @remarks Architecture specific.
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| 354 | * @remarks Make sure the result won't ever exceed 32-bit, because hardware
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| 355 | * exception may be raised if it does.
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| 356 | * @remarks On x86 this may be used to avoid dragging in 64-bit builtin
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| 357 | * arithmetics functions.
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| 358 | */
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| 359 | #if RT_INLINE_ASM_EXTERNAL && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
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| 360 | RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMMultU32ByU32DivByU32(uint32_t u32A, uint32_t u32B, uint32_t u32C);
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| 361 | #else
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| 362 | DECLINLINE(uint32_t) ASMMultU32ByU32DivByU32(uint32_t u32A, uint32_t u32B, uint32_t u32C)
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| 363 | {
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| 364 | # if RT_INLINE_ASM_GNU_STYLE && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
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| 365 | uint32_t u32Result, u32Spill;
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| 366 | __asm__ __volatile__("mull %2\n\t"
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| 367 | "divl %3\n\t"
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| 368 | : "=&a" (u32Result),
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| 369 | "=&d" (u32Spill)
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| 370 | : "r" (u32B),
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| 371 | "r" (u32C),
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| 372 | "0" (u32A));
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| 373 | return u32Result;
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| 374 | # else
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| 375 | return (uint32_t)(((uint64_t)u32A * u32B) / u32C);
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| 376 | # endif
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| 377 | }
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| 378 | #endif
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| 379 |
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| 380 |
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| 381 | /**
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| 382 | * Multiple a 64-bit by a 32-bit integer and divide the result by a 32-bit integer
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| 383 | * using a 96 bit intermediate result.
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| 384 | *
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| 385 | * @returns (u64A * u32B) / u32C.
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| 386 | * @param u64A The 64-bit value.
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| 387 | * @param u32B The 32-bit value to multiple by A.
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| 388 | * @param u32C The 32-bit value to divide A*B by.
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| 389 | *
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| 390 | * @remarks Architecture specific.
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| 391 | * @remarks Make sure the result won't ever exceed 64-bit, because hardware
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| 392 | * exception may be raised if it does.
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| 393 | * @remarks On x86 this may be used to avoid dragging in 64-bit builtin
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| 394 | * arithmetics function.
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| 395 | */
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| 396 | #if RT_INLINE_ASM_EXTERNAL || !defined(__GNUC__) || (!defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86))
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| 397 | DECLASM(uint64_t) ASMMultU64ByU32DivByU32(uint64_t u64A, uint32_t u32B, uint32_t u32C);
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| 398 | #else
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| 399 | DECLINLINE(uint64_t) ASMMultU64ByU32DivByU32(uint64_t u64A, uint32_t u32B, uint32_t u32C)
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| 400 | {
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| 401 | # if RT_INLINE_ASM_GNU_STYLE
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| 402 | # ifdef RT_ARCH_AMD64
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| 403 | uint64_t u64Result, u64Spill;
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| 404 | __asm__ __volatile__("mulq %2\n\t"
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| 405 | "divq %3\n\t"
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|---|
| 406 | : "=&a" (u64Result),
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| 407 | "=&d" (u64Spill)
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|---|
| 408 | : "r" ((uint64_t)u32B),
|
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| 409 | "r" ((uint64_t)u32C),
|
|---|
| 410 | "0" (u64A));
|
|---|
| 411 | return u64Result;
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|---|
| 412 | # else
|
|---|
| 413 | uint32_t u32Dummy;
|
|---|
| 414 | uint64_t u64Result;
|
|---|
| 415 | __asm__ __volatile__("mull %%ecx \n\t" /* eax = u64Lo.lo = (u64A.lo * u32B).lo
|
|---|
| 416 | edx = u64Lo.hi = (u64A.lo * u32B).hi */
|
|---|
| 417 | "xchg %%eax,%%esi \n\t" /* esi = u64Lo.lo
|
|---|
| 418 | eax = u64A.hi */
|
|---|
| 419 | "xchg %%edx,%%edi \n\t" /* edi = u64Low.hi
|
|---|
| 420 | edx = u32C */
|
|---|
| 421 | "xchg %%edx,%%ecx \n\t" /* ecx = u32C
|
|---|
| 422 | edx = u32B */
|
|---|
| 423 | "mull %%edx \n\t" /* eax = u64Hi.lo = (u64A.hi * u32B).lo
|
|---|
| 424 | edx = u64Hi.hi = (u64A.hi * u32B).hi */
|
|---|
| 425 | "addl %%edi,%%eax \n\t" /* u64Hi.lo += u64Lo.hi */
|
|---|
| 426 | "adcl $0,%%edx \n\t" /* u64Hi.hi += carry */
|
|---|
| 427 | "divl %%ecx \n\t" /* eax = u64Hi / u32C
|
|---|
| 428 | edx = u64Hi % u32C */
|
|---|
| 429 | "movl %%eax,%%edi \n\t" /* edi = u64Result.hi = u64Hi / u32C */
|
|---|
| 430 | "movl %%esi,%%eax \n\t" /* eax = u64Lo.lo */
|
|---|
| 431 | "divl %%ecx \n\t" /* u64Result.lo */
|
|---|
| 432 | "movl %%edi,%%edx \n\t" /* u64Result.hi */
|
|---|
| 433 | : "=A"(u64Result), "=c"(u32Dummy),
|
|---|
| 434 | "=S"(u32Dummy), "=D"(u32Dummy)
|
|---|
| 435 | : "a"((uint32_t)u64A),
|
|---|
| 436 | "S"((uint32_t)(u64A >> 32)),
|
|---|
| 437 | "c"(u32B),
|
|---|
| 438 | "D"(u32C));
|
|---|
| 439 | return u64Result;
|
|---|
| 440 | # endif
|
|---|
| 441 | # else
|
|---|
| 442 | RTUINT64U u;
|
|---|
| 443 | uint64_t u64Lo = (uint64_t)(u64A & 0xffffffff) * u32B;
|
|---|
| 444 | uint64_t u64Hi = (uint64_t)(u64A >> 32) * u32B;
|
|---|
| 445 | u64Hi += (u64Lo >> 32);
|
|---|
| 446 | u.s.Hi = (uint32_t)(u64Hi / u32C);
|
|---|
| 447 | u.s.Lo = (uint32_t)((((u64Hi % u32C) << 32) + (u64Lo & 0xffffffff)) / u32C);
|
|---|
| 448 | return u.u;
|
|---|
| 449 | # endif
|
|---|
| 450 | }
|
|---|
| 451 | #endif
|
|---|
| 452 |
|
|---|
| 453 | /** @} */
|
|---|
| 454 |
|
|---|
| 455 | /*
|
|---|
| 456 | * Include #pragma aux definitions for Watcom C/C++.
|
|---|
| 457 | */
|
|---|
| 458 | #if defined(__WATCOMC__) && ARCH_BITS == 16 && defined(RT_ARCH_X86)
|
|---|
| 459 | # define IPRT_ASM_WATCOM_X86_16_WITH_PRAGMAS
|
|---|
| 460 | # undef IPRT_INCLUDED_asm_math_watcom_x86_16_h
|
|---|
| 461 | /*# include "asm-math-watcom-x86-16.h"*/
|
|---|
| 462 | #elif defined(__WATCOMC__) && ARCH_BITS == 32 && defined(RT_ARCH_X86)
|
|---|
| 463 | # define IPRT_ASM_WATCOM_X86_32_WITH_PRAGMAS
|
|---|
| 464 | # undef IPRT_INCLUDED_asm_math_watcom_x86_32_h
|
|---|
| 465 | # include "asm-math-watcom-x86-32.h"
|
|---|
| 466 | #endif
|
|---|
| 467 |
|
|---|
| 468 | #endif /* !IPRT_INCLUDED_asm_math_h */
|
|---|
| 469 |
|
|---|
