[87197] | 1 | /** @file
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| 2 | * IPRT - ARM Specific Assembly Functions.
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| 3 | */
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| 4 |
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| 5 | /*
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[98103] | 6 | * Copyright (C) 2015-2023 Oracle and/or its affiliates.
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[87197] | 7 | *
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[96407] | 8 | * This file is part of VirtualBox base platform packages, as
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| 9 | * available from https://www.virtualbox.org.
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[87197] | 10 | *
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[96407] | 11 | * This program is free software; you can redistribute it and/or
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| 12 | * modify it under the terms of the GNU General Public License
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| 13 | * as published by the Free Software Foundation, in version 3 of the
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| 14 | * License.
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| 15 | *
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| 16 | * This program is distributed in the hope that it will be useful, but
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| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 19 | * General Public License for more details.
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| 20 | *
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| 21 | * You should have received a copy of the GNU General Public License
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| 22 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 23 | *
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[87197] | 24 | * The contents of this file may alternatively be used under the terms
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| 25 | * of the Common Development and Distribution License Version 1.0
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[96407] | 26 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 27 | * in the VirtualBox distribution, in which case the provisions of the
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[87197] | 28 | * CDDL are applicable instead of those of the GPL.
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| 29 | *
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| 30 | * You may elect to license modified versions of this file under the
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| 31 | * terms and conditions of either the GPL or the CDDL or both.
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[96407] | 32 | *
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| 33 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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[87197] | 34 | */
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| 35 |
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[87218] | 36 | #ifndef IPRT_INCLUDED_asm_arm_h
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| 37 | #define IPRT_INCLUDED_asm_arm_h
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| 38 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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| 39 | # pragma once
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| 40 | #endif
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[87197] | 41 |
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| 42 | #include <iprt/types.h>
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| 43 | #if !defined(RT_ARCH_ARM64) && !defined(RT_ARCH_ARM32)
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| 44 | # error "Not on ARM64 or ARM32"
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| 45 | #endif
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| 46 |
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| 47 | /** @defgroup grp_rt_asm_arm ARM Specific ASM Routines
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| 48 | * @ingroup grp_rt_asm
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| 49 | * @{
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| 50 | */
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| 51 |
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| 52 | /**
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[87256] | 53 | * Gets the content of the CNTVCT_EL0 (or CNTPCT) register.
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[87197] | 54 | *
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[87256] | 55 | * @returns CNTVCT_EL0 value.
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| 56 | * @note We call this TSC to better fit in with existing x86/amd64 based code.
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[87197] | 57 | */
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| 58 | #if RT_INLINE_ASM_EXTERNAL
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| 59 | DECLASM(uint64_t) ASMReadTSC(void);
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| 60 | #else
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| 61 | DECLINLINE(uint64_t) ASMReadTSC(void)
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| 62 | {
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| 63 | # if RT_INLINE_ASM_GNU_STYLE
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[87256] | 64 | uint64_t u64;
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| 65 | # ifdef RT_ARCH_ARM64
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[101228] | 66 | __asm__ __volatile__("Lstart_ASMReadTSC_%=:\n\t"
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| 67 | "isb\n\t"
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[87256] | 68 | "mrs %0, CNTVCT_EL0\n\t"
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| 69 | : "=r" (u64));
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| 70 | # else
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| 71 | uint32_t u32Spill;
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| 72 | uint32_t u32Comp;
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[101228] | 73 | __asm__ __volatile__("Lstart_ASMReadTSC_%=:\n\t"
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| 74 | "isb\n"
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| 75 | "Ltry_again_ASMReadTSC_%=:\n\t"
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[87256] | 76 | "mrrc p15, 0, %[uSpill], %H[uRet], c14\n\t" /* CNTPCT high into uRet.hi */
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| 77 | "mrrc p15, 0, %[uRet], %[uSpill], c14\n\t" /* CNTPCT low into uRet.lo */
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| 78 | "mrrc p15, 0, %[uSpill], %[uHiComp], c14\n\t" /* CNTPCT high into uHiComp */
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| 79 | "cmp %H[uRet], %[uHiComp]\n\t"
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[101228] | 80 | "b.eq Ltry_again_ASMReadTSC_%=\n\t" /* Redo if high value changed. */
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[87256] | 81 | : [uRet] "=r" (u64)
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| 82 | , "=r" (uHiComp)
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| 83 | , "=r" (uSpill));
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| 84 | # endif
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| 85 | return u64;
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| 86 |
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[87197] | 87 | # else
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| 88 | # error "Unsupported compiler"
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| 89 | # endif
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| 90 | }
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| 91 | #endif
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| 92 |
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[99978] | 93 |
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| 94 | /**
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| 95 | * Gets the content of the CNTFRQ_EL0 register.
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| 96 | *
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| 97 | * @returns CNTFRQ_EL0 value.
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| 98 | */
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| 99 | #if RT_INLINE_ASM_EXTERNAL
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| 100 | DECLASM(uint64_t) ASMReadCntFrqEl0(void);
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| 101 | #else
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| 102 | DECLINLINE(uint64_t) ASMReadCntFrqEl0(void)
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| 103 | {
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| 104 | # if RT_INLINE_ASM_GNU_STYLE
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| 105 | uint64_t u64;
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| 106 | # ifdef RT_ARCH_ARM64
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[101228] | 107 | __asm__ __volatile__("Lstart_ASMReadCntFrqEl0_%=:\n\t"
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| 108 | "isb\n\t"
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[99978] | 109 | "mrs %0, CNTFRQ_EL0\n\t"
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| 110 | : "=r" (u64));
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| 111 | # else
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| 112 | u64 = 0;
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[101228] | 113 | __asm__ __volatile__("Lstart_ASMReadCntFrqEl0_%=:\n\t"
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| 114 | "isb\n\t"
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[99978] | 115 | "mrc p15, 0, %[uRet], c14, 0, 0\n\t" /* CNTFRQ */
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| 116 | : [uRet] "=r" (u64));
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| 117 | # endif
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| 118 | return u64;
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| 119 |
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| 120 | # else
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| 121 | # error "Unsupported compiler"
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| 122 | # endif
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| 123 | }
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| 124 | #endif
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| 125 |
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| 126 |
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[87197] | 127 | /**
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| 128 | * Enables interrupts (IRQ and FIQ).
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| 129 | */
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| 130 | #if RT_INLINE_ASM_EXTERNAL
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| 131 | DECLASM(void) ASMIntEnable(void);
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| 132 | #else
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| 133 | DECLINLINE(void) ASMIntEnable(void)
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| 134 | {
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[100193] | 135 | # if RT_INLINE_ASM_GNU_STYLE
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| 136 | # ifdef RT_ARCH_ARM64
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[101228] | 137 | __asm__ __volatile__("Lstart_ASMIntEnable_%=:\n\t"
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| 138 | "msr daifclr, #0xf\n\t");
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[100193] | 139 | # else
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[87197] | 140 | RTCCUINTREG uFlags;
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[101228] | 141 | __asm__ __volatile__("Lstart_ASMIntEnable_%=:\n\t"
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| 142 | "mrs %0, cpsr\n\t"
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[87197] | 143 | "bic %0, %0, #0xc0\n\t"
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| 144 | "msr cpsr_c, %0\n\t"
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| 145 | : "=r" (uFlags));
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[100193] | 146 | # endif
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[87197] | 147 | # else
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| 148 | # error "Unsupported compiler"
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| 149 | # endif
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| 150 | }
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| 151 | #endif
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| 152 |
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| 153 |
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| 154 | /**
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| 155 | * Disables interrupts (IRQ and FIQ).
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| 156 | */
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| 157 | #if RT_INLINE_ASM_EXTERNAL
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| 158 | DECLASM(void) ASMIntDisable(void);
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| 159 | #else
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| 160 | DECLINLINE(void) ASMIntDisable(void)
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| 161 | {
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[100193] | 162 | # if RT_INLINE_ASM_GNU_STYLE
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| 163 | # ifdef RT_ARCH_ARM64
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[101228] | 164 | __asm__ __volatile__("Lstart_ASMIntDisable_%=:\n\t"
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| 165 | "msr daifset, #0xf\n\t");
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[100193] | 166 | # else
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[87197] | 167 | RTCCUINTREG uFlags;
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[101228] | 168 | __asm__ __volatile__("Lstart_ASMIntDisable_%=:\n\t"
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| 169 | "mrs %0, cpsr\n\t"
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[87197] | 170 | "orr %0, %0, #0xc0\n\t"
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| 171 | "msr cpsr_c, %0\n\t"
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| 172 | : "=r" (uFlags));
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[100193] | 173 | # endif
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[87197] | 174 | # else
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| 175 | # error "Unsupported compiler"
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| 176 | # endif
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| 177 | }
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| 178 | #endif
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| 179 |
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| 180 |
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| 181 | /**
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| 182 | * Disables interrupts and returns previous uFLAGS.
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| 183 | */
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| 184 | #if RT_INLINE_ASM_EXTERNAL
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| 185 | DECLASM(RTCCUINTREG) ASMIntDisableFlags(void);
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| 186 | #else
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| 187 | DECLINLINE(RTCCUINTREG) ASMIntDisableFlags(void)
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| 188 | {
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| 189 | RTCCUINTREG uFlags;
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| 190 | # if RT_INLINE_ASM_GNU_STYLE
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[100193] | 191 | # ifdef RT_ARCH_ARM64
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[101228] | 192 | __asm__ __volatile__("Lstart_ASMIntDisableFlags_%=:\n\t"
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| 193 | "mrs %[uRet], daif\n\t"
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[100193] | 194 | "msr daifset, #0xf\n\t"
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| 195 | : [uRet] "=r" (uFlags));
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| 196 | # else
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[87197] | 197 | RTCCUINTREG uNewFlags;
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[101228] | 198 | __asm__ __volatile__("Lstart_ASMIntDisableFlags_%=:\n\t"
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| 199 | "mrs %0, cpsr\n\t"
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[87197] | 200 | "orr %1, %0, #0xc0\n\t"
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| 201 | "msr cpsr_c, %1\n\t"
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| 202 | : "=r" (uFlags)
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| 203 | , "=r" (uNewFlags));
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[100193] | 204 | # endif
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[87197] | 205 | # else
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| 206 | # error "Unsupported compiler"
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| 207 | # endif
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| 208 | return uFlags;
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| 209 | }
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[100193] | 210 |
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| 211 |
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| 212 | /**
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| 213 | * Get the CPSR/PSTATE register.
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| 214 | * @returns CPSR/PSTATE.
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| 215 | */
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| 216 | #if RT_INLINE_ASM_EXTERNAL
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| 217 | DECLASM(RTCCUINTREG) ASMGetFlags(void);
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| 218 | #else
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| 219 | DECLINLINE(RTCCUINTREG) ASMGetFlags(void)
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| 220 | {
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| 221 | RTCCUINTREG uFlags;
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| 222 | # if RT_INLINE_ASM_GNU_STYLE
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| 223 | # ifdef RT_ARCH_ARM64
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[101228] | 224 | __asm__ __volatile__("Lstart_ASMGetFlags_%=:\n\t"
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| 225 | "isb\n\t"
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[100193] | 226 | "mrs %0, daif\n\t"
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| 227 | : "=r" (uFlags));
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| 228 | # else
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| 229 | # error "Implementation required for arm32"
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| 230 | # endif
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| 231 | # else
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| 232 | # error "Unsupported compiler"
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| 233 | # endif
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| 234 | return uFlags;
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| 235 | }
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[87197] | 236 | #endif
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| 237 |
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| 238 |
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| 239 | /**
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[100193] | 240 | * Get the CPSR/PSTATE register.
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| 241 | */
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| 242 | #if RT_INLINE_ASM_EXTERNAL
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| 243 | DECLASM(void) ASMSetFlags(RTCCUINTREG uFlags);
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| 244 | #else
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| 245 | DECLINLINE(void) ASMSetFlags(RTCCUINTREG uFlags)
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| 246 | {
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| 247 | # if RT_INLINE_ASM_GNU_STYLE
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| 248 | # ifdef RT_ARCH_ARM64
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[101228] | 249 | __asm__ __volatile__("Lstart_ASMSetFlags_%=:\n\t"
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| 250 | "isb\n\t"
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[100193] | 251 | "msr daif, %[uFlags]\n\t"
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| 252 | : : [uFlags] "r" (uFlags));
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| 253 | # else
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| 254 | # error "Implementation required for arm32"
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| 255 | # endif
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| 256 | # else
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| 257 | # error "Unsupported compiler"
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| 258 | # endif
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| 259 | }
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| 260 | #endif
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| 261 |
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| 262 |
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| 263 | /**
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[87197] | 264 | * Are interrupts enabled?
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| 265 | *
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| 266 | * @returns true / false.
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| 267 | */
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| 268 | DECLINLINE(bool) ASMIntAreEnabled(void)
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| 269 | {
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| 270 | return ASMGetFlags() & 0xc0 /* IRQ and FIQ bits */ ? true : false;
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| 271 | }
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| 272 |
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| 273 | #endif
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| 274 |
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| 275 | /**
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| 276 | * Halts the CPU until interrupted.
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| 277 | */
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| 278 | #if RT_INLINE_ASM_EXTERNAL
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| 279 | DECLASM(void) ASMHalt(void);
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| 280 | #else
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| 281 | DECLINLINE(void) ASMHalt(void)
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| 282 | {
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| 283 | # if RT_INLINE_ASM_GNU_STYLE
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[101228] | 284 | __asm__ __volatile__ ("Lstart_ASMHalt_%=:\n\t"
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| 285 | "wfi\n\t"); /* wait for interrupt */
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[87197] | 286 | # else
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| 287 | # error "Unsupported compiler"
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| 288 | # endif
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| 289 | }
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| 290 | #endif
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| 291 |
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| 292 | #if 0
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| 293 | /**
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| 294 | * Gets the CPU ID of the current CPU.
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| 295 | *
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| 296 | * @returns the CPU ID.
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| 297 | * @note the name of this method is a bit misleading but serves the purpose
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| 298 | * and prevents #ifdef orgies in other places.
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| 299 | */
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| 300 | #if RT_INLINE_ASM_EXTERNAL
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| 301 | DECLASM(uint8_t) ASMGetApicId(void);
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| 302 | #else
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| 303 | DECLINLINE(uint8_t) ASMGetApicId(void)
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| 304 | {
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| 305 | # if RT_INLINE_ASM_GNU_STYLE
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| 306 | RTCCUINTREG uCpuId;
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[101228] | 307 | __asm__ ("Lstart_ASMGetApicId_%=:\n\t"
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| 308 | "mrc p15, 0, %0, c0, c0, 5\n\t" /* CPU ID Register, privileged */
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[87197] | 309 | : "=r" (uCpuId));
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| 310 | return uCpuId;
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| 311 | # else
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| 312 | # error "Unsupported compiler"
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| 313 | # endif
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| 314 | }
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| 315 | #endif
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| 316 | #endif
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| 317 |
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| 318 | #if 0
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| 319 |
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| 320 | /**
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| 321 | * Invalidate page.
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| 322 | *
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| 323 | * @param pv Address of the page to invalidate.
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| 324 | */
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| 325 | #if RT_INLINE_ASM_EXTERNAL
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| 326 | DECLASM(void) ASMInvalidatePage(void *pv);
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| 327 | #else
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| 328 | DECLINLINE(void) ASMInvalidatePage(void *pv)
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| 329 | {
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| 330 | # if RT_INLINE_ASM_GNU_STYLE
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| 331 |
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| 332 | # else
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| 333 | # error "Unsupported compiler"
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| 334 | # endif
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| 335 | }
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| 336 | #endif
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| 337 |
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| 338 |
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| 339 | /**
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| 340 | * Write back the internal caches and invalidate them.
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| 341 | */
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| 342 | #if RT_INLINE_ASM_EXTERNAL
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| 343 | DECLASM(void) ASMWriteBackAndInvalidateCaches(void);
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| 344 | #else
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| 345 | DECLINLINE(void) ASMWriteBackAndInvalidateCaches(void)
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| 346 | {
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| 347 | # if RT_INLINE_ASM_GNU_STYLE
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| 348 |
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| 349 | # else
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| 350 | # error "Unsupported compiler"
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| 351 | # endif
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| 352 | }
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| 353 | #endif
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| 354 |
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| 355 |
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| 356 | /**
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| 357 | * Invalidate internal and (perhaps) external caches without first
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| 358 | * flushing dirty cache lines. Use with extreme care.
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| 359 | */
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| 360 | #if RT_INLINE_ASM_EXTERNAL
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| 361 | DECLASM(void) ASMInvalidateInternalCaches(void);
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| 362 | #else
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| 363 | DECLINLINE(void) ASMInvalidateInternalCaches(void)
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| 364 | {
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| 365 | # if RT_INLINE_ASM_GNU_STYLE
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| 366 |
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| 367 | # else
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| 368 | # error "Unsupported compiler"
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| 369 | # endif
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| 370 | }
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| 371 | #endif
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| 372 |
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| 373 | #endif
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| 374 |
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| 375 |
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| 376 | /** @} */
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[87218] | 377 | #endif /* !IPRT_INCLUDED_asm_arm_h */
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[87197] | 378 |
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