VirtualBox

source: vbox/trunk/include/VBox/vmm/vm.h

Last change on this file was 104339, checked in by vboxsync, 2 months ago

VMM/IEM: Implement native emitters for psubb, psubw, psubd and psubdq, bugref:10652
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[35361]1/** @file
2 * VM - The Virtual Machine, data.
3 */
4
5/*
[98103]6 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
[35361]7 *
[96407]8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
[35361]10 *
[96407]11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
[35361]24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
[96407]26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
[35361]28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
[96407]32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
[35361]34 */
35
[76558]36#ifndef VBOX_INCLUDED_vmm_vm_h
37#define VBOX_INCLUDED_vmm_vm_h
[76507]38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
[35361]41
[41247]42#ifndef VBOX_FOR_DTRACE_LIB
[80309]43# ifndef USING_VMM_COMMON_DEFS
[90460]44# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/VMM/Config.kmk - make sure you really need to include this file!"
[80309]45# endif
[59652]46# include <iprt/param.h>
[78431]47# include <VBox/param.h>
[41247]48# include <VBox/types.h>
49# include <VBox/vmm/cpum.h>
50# include <VBox/vmm/stam.h>
51# include <VBox/vmm/vmapi.h>
52# include <VBox/vmm/vmm.h>
53# include <VBox/sup.h>
54#else
55# pragma D depends_on library vbox-types.d
[41259]56# pragma D depends_on library CPUMInternal.d
[76561]57# define VMM_INCLUDED_SRC_include_CPUMInternal_h
[41247]58#endif
[35361]59
60
[41247]61
[35361]62/** @defgroup grp_vm The Virtual Machine
[58110]63 * @ingroup grp_vmm
[35361]64 * @{
65 */
66
67/**
68 * The state of a Virtual CPU.
69 *
70 * The basic state indicated here is whether the CPU has been started or not. In
71 * addition, there are sub-states when started for assisting scheduling (GVMM
72 * mostly).
73 *
[41279]74 * The transition out of the STOPPED state is done by a vmR3PowerOn.
75 * The transition back to the STOPPED state is done by vmR3PowerOff.
[35361]76 *
77 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
78 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
79 */
80typedef enum VMCPUSTATE
81{
82 /** The customary invalid zero. */
83 VMCPUSTATE_INVALID = 0,
84
85 /** Virtual CPU has not yet been started. */
86 VMCPUSTATE_STOPPED,
87
88 /** CPU started. */
89 VMCPUSTATE_STARTED,
[45749]90 /** CPU started in HM context. */
91 VMCPUSTATE_STARTED_HM,
92 /** Executing guest code and can be poked (RC or STI bits of HM). */
[35361]93 VMCPUSTATE_STARTED_EXEC,
[71041]94 /** Executing guest code using NEM. */
95 VMCPUSTATE_STARTED_EXEC_NEM,
[71129]96 VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
97 VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
[35361]98 /** Halted. */
99 VMCPUSTATE_STARTED_HALTED,
100
101 /** The end of valid virtual CPU states. */
102 VMCPUSTATE_END,
103
104 /** Ensure 32-bit type. */
105 VMCPUSTATE_32BIT_HACK = 0x7fffffff
106} VMCPUSTATE;
107
[74835]108/** Enables 64-bit FFs. */
109#define VMCPU_WITH_64_BIT_FFS
[35361]110
[74835]111
[35361]112/**
[45618]113 * The cross context virtual CPU structure.
114 *
115 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
[35361]116 */
117typedef struct VMCPU
118{
[74797]119 /** @name Volatile per-cpu data.
120 * @{ */
[35361]121 /** Per CPU forced action.
122 * See the VMCPU_FF_* \#defines. Updated atomically. */
[74798]123#ifdef VMCPU_WITH_64_BIT_FFS
124 uint64_t volatile fLocalForcedActions;
125#else
[74797]126 uint32_t volatile fLocalForcedActions;
127 uint32_t fForLocalForcedActionsExpansion;
[74798]128#endif
[35361]129 /** The CPU state. */
[74797]130 VMCPUSTATE volatile enmState;
[35361]131
[100000]132#if defined(VBOX_VMM_TARGET_ARMV8)
133 uint32_t u32Alignment0;
134 /** The number of nano seconds when the vTimer of the associated vCPU is supposed to activate
135 * required to get out of a halt (due to wfi/wfe).
136 *
137 * @note This actually should go into TMCPU but this drags in a whole lot of padding changes
138 * and I'm not sure yet whether this will remain in this form anyway.
139 */
140 uint64_t cNsVTimerActivate;
[74797]141 /** Padding up to 64 bytes. */
[100000]142 uint8_t abAlignment0[64 - 12 - 8 - 4];
143#else
144 /** Padding up to 64 bytes. */
[90380]145 uint8_t abAlignment0[64 - 12];
[100000]146#endif
[74797]147 /** @} */
[35361]148
[62000]149 /** IEM part.
150 * @remarks This comes first as it allows the use of 8-bit immediates for the
151 * first 64 bytes of the structure, reducing code size a wee bit. */
[98993]152#if defined(VMM_INCLUDED_SRC_include_IEMInternal_h) || defined(VMM_INCLUDED_SRC_include_IEMInternal_armv8_h) /* For PDB hacking. */
[62232]153 union VMCPUUNIONIEMFULL
154#else
155 union VMCPUUNIONIEMSTUB
156#endif
[62000]157 {
[98993]158#if defined(VMM_INCLUDED_SRC_include_IEMInternal_h) || defined(VMM_INCLUDED_SRC_include_IEMInternal_armv8_h)
[62000]159 struct IEMCPU s;
160#endif
[104339]161 uint8_t padding[131136]; /* multiple of 64 */
[62000]162 } iem;
163
[74797]164 /** @name Static per-cpu data.
165 * (Putting this after IEM, hoping that it's less frequently used than it.)
166 * @{ */
167 /** Ring-3 Host Context VM Pointer. */
168 PVMR3 pVMR3;
[80319]169 /** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
170 RTR0PTR pVCpuR0ForVtg;
[80080]171 /** Raw-mode Context VM Pointer. */
172 uint32_t pVMRC;
173 /** Padding for new raw-mode (long mode). */
174 uint32_t pVMRCPadding;
[74797]175 /** Pointer to the ring-3 UVMCPU structure. */
176 PUVMCPU pUVCpu;
177 /** The native thread handle. */
178 RTNATIVETHREAD hNativeThread;
179 /** The native R0 thread handle. (different from the R3 handle!) */
180 RTNATIVETHREAD hNativeThreadR0;
[90460]181 /** The IPRT thread handle (for VMMDevTesting). */
182 RTTHREAD hThread;
[80080]183 /** The CPU ID.
184 * This is the index into the VM::aCpu array. */
[80331]185#ifdef IN_RING0
[80274]186 VMCPUID idCpuUnsafe;
187#else
[80080]188 VMCPUID idCpu;
[80274]189#endif
[80080]190
[74797]191 /** Align the structures below bit on a 64-byte boundary and make sure it starts
192 * at the same offset in both 64-bit and 32-bit builds.
193 *
194 * @remarks The alignments of the members that are larger than 48 bytes should be
195 * 64-byte for cache line reasons. structs containing small amounts of
196 * data could be lumped together at the end with a < 64 byte padding
197 * following it (to grow into and align the struct size).
198 */
[90460]199 uint8_t abAlignment1[64 - 6 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
[74797]200 /** @} */
201
[43387]202 /** HM part. */
[62232]203 union VMCPUUNIONHM
[35361]204 {
[76561]205#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
[43387]206 struct HMCPU s;
[35361]207#endif
[91265]208 uint8_t padding[9984]; /* multiple of 64 */
[43387]209 } hm;
[35361]210
[70918]211 /** NEM part. */
212 union VMCPUUNIONNEM
213 {
[76561]214#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
[70918]215 struct NEMCPU s;
216#endif
[92358]217 uint8_t padding[4608]; /* multiple of 64 */
[70918]218 } nem;
219
[35361]220 /** TRPM part. */
[62232]221 union VMCPUUNIONTRPM
[35361]222 {
[76561]223#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
[35361]224 struct TRPMCPU s;
225#endif
226 uint8_t padding[128]; /* multiple of 64 */
227 } trpm;
228
229 /** TM part. */
[62232]230 union VMCPUUNIONTM
[35361]231 {
[76561]232#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
[35361]233 struct TMCPU s;
234#endif
[80115]235 uint8_t padding[5760]; /* multiple of 64 */
[35361]236 } tm;
237
238 /** VMM part. */
[62232]239 union VMCPUUNIONVMM
[35361]240 {
[76561]241#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
[35361]242 struct VMMCPU s;
243#endif
[92408]244 uint8_t padding[9536]; /* multiple of 64 */
[35361]245 } vmm;
246
247 /** PDM part. */
[62232]248 union VMCPUUNIONPDM
[35361]249 {
[76561]250#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
[35361]251 struct PDMCPU s;
252#endif
[45152]253 uint8_t padding[256]; /* multiple of 64 */
[35361]254 } pdm;
255
256 /** IOM part. */
[62232]257 union VMCPUUNIONIOM
[35361]258 {
[76561]259#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
[35361]260 struct IOMCPU s;
261#endif
262 uint8_t padding[512]; /* multiple of 64 */
263 } iom;
264
265 /** DBGF part.
266 * @todo Combine this with other tiny structures. */
[62232]267 union VMCPUUNIONDBGF
[35361]268 {
[76561]269#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
[35361]270 struct DBGFCPU s;
271#endif
[86098]272 uint8_t padding[512]; /* multiple of 64 */
[35361]273 } dbgf;
274
[50953]275 /** GIM part. */
[62232]276 union VMCPUUNIONGIM
[50953]277 {
[76561]278#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
[50953]279 struct GIMCPU s;
280#endif
[63648]281 uint8_t padding[512]; /* multiple of 64 */
[50953]282 } gim;
283
[99385]284#if defined(VBOX_VMM_TARGET_ARMV8)
285 /** GIC part. */
286 union VMCPUUNIONGIC
287 {
288# ifdef VMM_INCLUDED_SRC_include_GICInternal_h
289 struct GICCPU s;
290# endif
291 uint8_t padding[3840]; /* multiple of 64 */
292 } gic;
293#else
[60307]294 /** APIC part. */
[62232]295 union VMCPUUNIONAPIC
[60307]296 {
[99385]297# ifdef VMM_INCLUDED_SRC_include_APICInternal_h
[60307]298 struct APICCPU s;
[99385]299# endif
[85965]300 uint8_t padding[3840]; /* multiple of 64 */
[60307]301 } apic;
[99385]302#endif
[60307]303
[62000]304 /*
305 * Some less frequently used global members that doesn't need to take up
306 * precious space at the head of the structure.
307 */
308
309 /** Trace groups enable flags. */
310 uint32_t fTraceGroups; /* 64 / 44 */
[90597]311 /** Number of collisions hashing the ring-0 EMT handle. */
312 uint8_t cEmtHashCollisions;
313 uint8_t abAdHoc[3];
[62000]314 /** Profiling samples for use by ad hoc profiling. */
315 STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
316
[35361]317 /** Align the following members on page boundary. */
[95560]318 uint8_t abAlignment2[696];
[35361]319
320 /** PGM part. */
[62232]321 union VMCPUUNIONPGM
[35361]322 {
[76561]323#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
[35361]324 struct PGMCPU s;
325#endif
[91247]326 uint8_t padding[4096 + 28672]; /* multiple of 4096 */
[35361]327 } pgm;
328
[54898]329 /** CPUM part. */
[62232]330 union VMCPUUNIONCPUM
[54898]331 {
[98970]332#if defined(VMM_INCLUDED_SRC_include_CPUMInternal_h) || defined(VMM_INCLUDED_SRC_include_CPUMInternal_armv8_h)
[54898]333 struct CPUMCPU s;
334#endif
[62075]335#ifdef VMCPU_INCL_CPUM_GST_CTX
336 /** The guest CPUM context for direct use by execution engines.
337 * This is not for general consumption, but for HM, REM, IEM, and maybe a few
338 * others. The rest will use the function based CPUM API. */
339 CPUMCTX GstCtx;
340#endif
[91306]341 uint8_t padding[102400]; /* multiple of 4096 */
[54898]342 } cpum;
[72555]343
344 /** EM part. */
345 union VMCPUUNIONEM
346 {
[76561]347#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
[72555]348 struct EMCPU s;
349#endif
[72569]350 uint8_t padding[40960]; /* multiple of 4096 */
[72555]351 } em;
[93593]352
[35361]353} VMCPU;
354
355
[41218]356#ifndef VBOX_FOR_DTRACE_LIB
[96435]357/* Make sure the structure size is aligned on a 16384 boundary for arm64 purposes. */
[93593]358AssertCompileSizeAlignment(VMCPU, 16384);
[41218]359
[35361]360/** @name Operations on VMCPU::enmState
361 * @{ */
362/** Gets the VMCPU state. */
363#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
364/** Sets the VMCPU state. */
365#define VMCPU_SET_STATE(pVCpu, enmNewState) \
366 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
367/** Cmpares and sets the VMCPU state. */
368#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
369 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
370/** Checks the VMCPU state. */
[39034]371#ifdef VBOX_STRICT
372# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
[35361]373 do { \
374 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
375 AssertMsg(enmState == (enmExpectedState), \
376 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
377 enmState, enmExpectedState, (pVCpu)->idCpu)); \
378 } while (0)
[86118]379
380# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) \
381 do { \
382 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
383 AssertMsg( enmState == (enmExpectedState) \
384 || enmState == (a_enmExpectedState2), \
385 ("enmState=%d enmExpectedState=%d enmExpectedState2=%d idCpu=%u\n", \
386 enmState, enmExpectedState, a_enmExpectedState2, (pVCpu)->idCpu)); \
387 } while (0)
[39034]388#else
389# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
[86118]390# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) do { } while (0)
[39034]391#endif
[35361]392/** Tests if the state means that the CPU is started. */
393#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
394/** Tests if the state means that the CPU is stopped. */
395#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
396/** @} */
397
398
[56284]399/** The name of the raw-mode context VMM Core module. */
400#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
401/** The name of the ring-0 context VMM Core module. */
[35361]402#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
403
[45533]404
[35361]405/** VM Forced Action Flags.
406 *
407 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
408 * action mask of a VM.
409 *
[60840]410 * Available VM bits:
[81153]411 * 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
[60840]412 *
413 *
414 * Available VMCPU bits:
[77610]415 * 14, 15, 36 to 63
[60840]416 *
417 * @todo If we run low on VMCPU, we may consider merging the SELM bits
418 *
[35361]419 * @{
420 */
421/** The virtual sync clock has been stopped, go to TM until it has been
422 * restarted... */
[74794]423#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
424#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
[35361]425/** PDM Queues are pending. */
426#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
427/** The bit number for VM_FF_PDM_QUEUES. */
428#define VM_FF_PDM_QUEUES_BIT 3
429/** PDM DMA transfers are pending. */
430#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
431/** The bit number for VM_FF_PDM_DMA. */
432#define VM_FF_PDM_DMA_BIT 4
433/** This action forces the VM to call DBGF so DBGF can service debugger
434 * requests in the emulation thread.
435 * This action flag stays asserted till DBGF clears it.*/
436#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
437/** The bit number for VM_FF_DBGF. */
438#define VM_FF_DBGF_BIT 8
439/** This action forces the VM to service pending requests from other
440 * thread or requests which must be executed in another context. */
[74794]441#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
442#define VM_FF_REQUEST_BIT 9
[35361]443/** Check for VM state changes and take appropriate action. */
444#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
445/** The bit number for VM_FF_CHECK_VM_STATE. */
446#define VM_FF_CHECK_VM_STATE_BIT 10
447/** Reset the VM. (postponed) */
448#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
449/** The bit number for VM_FF_RESET. */
450#define VM_FF_RESET_BIT 11
451/** EMT rendezvous in VMM. */
452#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
453/** The bit number for VM_FF_EMT_RENDEZVOUS. */
454#define VM_FF_EMT_RENDEZVOUS_BIT 12
455
456/** PGM needs to allocate handy pages. */
[74794]457#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
458#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
[35361]459/** PGM is out of memory.
460 * Abandon all loops and code paths which can be resumed and get up to the EM
461 * loops. */
[74794]462#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
463#define VM_FF_PGM_NO_MEMORY_BIT 19
[35361]464 /** PGM is about to perform a lightweight pool flush
465 * Guest SMP: all EMT threads should return to ring 3
466 */
[74794]467#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
468#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
[35361]469/** Suspend the VM - debug only. */
[74794]470#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
471#define VM_FF_DEBUG_SUSPEND_BIT 31
[35361]472
473
[99576]474#if defined(VBOX_VMM_TARGET_ARMV8)
475/** This action forces the VM to inject an IRQ into the guest. */
[101639]476# define VMCPU_FF_INTERRUPT_IRQ RT_BIT_64(VMCPU_FF_INTERRUPT_IRQ_BIT)
477# define VMCPU_FF_INTERRUPT_IRQ_BIT 0
[99576]478/** This action forces the VM to inject an FIQ into the guest. */
[101639]479# define VMCPU_FF_INTERRUPT_FIQ RT_BIT_64(VMCPU_FF_INTERRUPT_FIQ_BIT)
480# define VMCPU_FF_INTERRUPT_FIQ_BIT 1
[99576]481#else
[60804]482/** This action forces the VM to check any pending interrupts on the APIC. */
[101639]483# define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
484# define VMCPU_FF_INTERRUPT_APIC_BIT 0
[35361]485/** This action forces the VM to check any pending interrups on the PIC. */
[101639]486# define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
487# define VMCPU_FF_INTERRUPT_PIC_BIT 1
[99576]488#endif
[35361]489/** This action forces the VM to schedule and run pending timer (TM).
490 * @remarks Don't move - PATM compatibility. */
[74835]491#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
[74794]492#define VMCPU_FF_TIMER_BIT 2
[35361]493/** This action forces the VM to check any pending NMIs. */
[74835]494#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
[35361]495#define VMCPU_FF_INTERRUPT_NMI_BIT 3
496/** This action forces the VM to check any pending SMIs. */
[74835]497#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
[35361]498#define VMCPU_FF_INTERRUPT_SMI_BIT 4
499/** PDM critical section unlocking is pending, process promptly upon return to R3. */
[74835]500#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
[74794]501#define VMCPU_FF_PDM_CRITSECT_BIT 5
[65794]502/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
503 * the virtual CPU out of the next (/current) halted state. It is not processed
504 * nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
505 * is cleared the next time EM leaves the HALTED state. */
[74835]506#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
[74794]507#define VMCPU_FF_UNHALT_BIT 6
508/** Pending IEM action (mask). */
[74835]509#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
[56628]510/** Pending IEM action (bit number). */
511#define VMCPU_FF_IEM_BIT 7
[60804]512/** Pending APIC action (bit number). */
513#define VMCPU_FF_UPDATE_APIC_BIT 8
514/** This action forces the VM to update APIC's asynchronously arrived
515 * interrupts as pending interrupts. */
[74835]516#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
[35361]517/** This action forces the VM to service pending requests from other
518 * thread or requests which must be executed in another context. */
[74835]519#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
[74794]520#define VMCPU_FF_REQUEST_BIT 9
[61628]521/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
[74835]522#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
[61628]523/** The bit number for VMCPU_FF_DBGF. */
524#define VMCPU_FF_DBGF_BIT 10
[75830]525/** Hardware virtualized nested-guest interrupt pending. */
526#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
527#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
[91580]528/** This action forces PGM to update changes to CR3 when the guest was in HM mode
529 * (when using nested paging). */
[74835]530#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
[74794]531#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
[100000]532#if defined(VBOX_VMM_TARGET_ARMV8)
533# define VMCPU_FF_VTIMER_ACTIVATED RT_BIT_64(VMCPU_FF_VTIMER_ACTIVATED_BIT)
534# define VMCPU_FF_VTIMER_ACTIVATED_BIT 13
535#else
[91271]536/* Bit 13 used to be VMCPU_FF_HM_UPDATE_PAE_PDPES. */
[100000]537#endif
[35361]538/** This action forces the VM to resync the page tables before going
539 * back to execute guest code. (GLOBAL FLUSH) */
[74835]540#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
[74794]541#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
[35361]542/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
543 * (NON-GLOBAL FLUSH) */
[74835]544#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
[74794]545#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
[57492]546/** Check for pending TLB shootdown actions (deprecated)
[94799]547 * Reserved for future HM re-use if necessary / safe.
[57492]548 * Consumer: HM */
[74835]549#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
[74794]550#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
[36054]551/** Check for pending TLB flush action.
[43387]552 * Consumer: HM
553 * @todo rename to VMCPU_FF_HM_TLB_FLUSH */
[74835]554#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
[35361]555/** The bit number for VMCPU_FF_TLB_FLUSH. */
556#define VMCPU_FF_TLB_FLUSH_BIT 19
[80020]557/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
558/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
559/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
560/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
[97286]561/* 24 used to be VMCPU_FF_INHIBIT_INTERRUPTS, which moved to CPUMCTX::eflags.uBoth in v7.0.4. */
562/* 25 used to be VMCPU_FF_BLOCK_NMIS, which moved to CPUMCTX::eflags.uBoth in v7.0.4. */
[35361]563/** Force return to Ring-3. */
[74835]564#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
[74794]565#define VMCPU_FF_TO_R3_BIT 28
[60847]566/** Force return to ring-3 to service pending I/O or MMIO write.
567 * This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
568 * VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
569 * status codes to be propagated at the same time without loss. */
[74835]570#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
[74794]571#define VMCPU_FF_IOM_BIT 29
[80020]572/* 30 used to be VMCPU_FF_CPUM */
[81786]573/** VMX-preemption timer expired. */
[75135]574#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
[75830]575#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
[101667]576/** Pending MTF (Monitor Trap Flag) event. */
[75301]577#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
[75830]578#define VMCPU_FF_VMX_MTF_BIT 32
[97406]579/** VMX APIC-write emulation pending.
580 * @todo possible candidate for internal EFLAGS, or maybe just a summary bit
[101667]581 * (see also VMCPU_FF_VMX_INT_WINDOW). */
[75620]582#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
[75830]583#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
[97406]584/** VMX interrupt-window event pending.
585 *
586 * "Pending" is misleading here, it would be better to say that the event need
587 * to be generated at the next opportunity and that this flag causes it to be
588 * polled for on every instruction boundrary and such.
589 *
590 * @todo Change the IEM side of this to not poll but to track down the places
591 * where it can be generated and set an internal EFLAGS bit that causes it
[101667]592 * to be checked out when finishing the current instruction. */
[77610]593#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
594#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
[97406]595/** VMX NMI-window event pending.
[101670]596 * Same "pending" comment and todo in VMCPU_FF_VMX_INT_WINDOW. */
[77610]597#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
598#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
[35361]599
[74794]600
[35361]601/** Externally VM forced actions. Used to quit the idle/wait loop. */
[61628]602#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS )
[35361]603/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
[61628]604#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST | VMCPU_FF_DBGF )
[35361]605
606/** Externally forced VM actions. Used to quit the idle/wait loop. */
[61628]607#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST \
608 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS )
[35361]609/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
[99576]610#if defined(VBOX_VMM_TARGET_ARMV8)
611# define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_IRQ | VMCPU_FF_INTERRUPT_FIQ \
612 | VMCPU_FF_REQUEST | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI \
[100000]613 | VMCPU_FF_UNHALT | VMCPU_FF_TIMER | VMCPU_FF_DBGF \
614 | VMCPU_FF_VTIMER_ACTIVATED)
[99576]615#else
616# define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
[61628]617 | VMCPU_FF_REQUEST | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI \
[75631]618 | VMCPU_FF_UNHALT | VMCPU_FF_TIMER | VMCPU_FF_DBGF \
619 | VMCPU_FF_INTERRUPT_NESTED_GUEST)
[99576]620#endif
[35361]621
622/** High priority VM pre-execution actions. */
[61628]623#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
624 | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
625 | VM_FF_EMT_RENDEZVOUS )
[35361]626/** High priority VMCPU pre-execution actions. */
[99576]627#if defined(VBOX_VMM_TARGET_ARMV8)
[101639]628# define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_IRQ | VMCPU_FF_INTERRUPT_FIQ \
629 | VMCPU_FF_DBGF )
[99576]630#else
[101639]631# define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
632 | VMCPU_FF_UPDATE_APIC | VMCPU_FF_DBGF \
633 | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
634 | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
635 | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW )
[99576]636#endif
[35361]637
638/** High priority VM pre raw-mode execution mask. */
[61628]639#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY )
[35361]640/** High priority VMCPU pre raw-mode execution mask. */
[97178]641#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL )
[35361]642
643/** High priority post-execution actions. */
[61628]644#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
[35361]645/** High priority post-execution actions. */
[91271]646#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_IEM | VMCPU_FF_IOM )
[35361]647
648/** Normal priority VM post-execution actions. */
649#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET \
[61628]650 | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
[35361]651/** Normal priority VMCPU post-execution actions. */
[80020]652#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
[35361]653
654/** Normal priority VM actions. */
[81153]655#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS)
[35361]656/** Normal priority VMCPU actions. */
[65794]657#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
[35361]658
659/** Flags to clear before resuming guest execution. */
[61628]660#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
[35361]661
[60871]662
663/** VM flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
[61628]664#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
665 | VM_FF_EMT_RENDEZVOUS | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_RESET)
[60871]666/** VM flags that cause the REP[|NE|E] STRINS loops to yield. */
667#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
668 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_DBGF | VM_FF_DEBUG_SUSPEND )
669/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
670#ifdef IN_RING3
[100230]671# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK (VMCPU_FF_DBGF | VMCPU_FF_VMX_MTF)
[60871]672#else
[100230]673# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK (VMCPU_FF_TO_R3 | VMCPU_FF_IEM | VMCPU_FF_IOM | VMCPU_FF_DBGF | VMCPU_FF_VMX_MTF)
[60871]674#endif
[99576]675
676#if !defined(VBOX_VMM_TARGET_ARMV8)
[60871]677/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
678 * enabled. */
[99576]679# define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
680 | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
681 | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_PDM_CRITSECT \
682 | VMCPU_FF_TIMER | VMCPU_FF_REQUEST \
683 | VMCPU_FF_INTERRUPT_NESTED_GUEST )
[60871]684/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
685 * disabled. */
[99576]686# define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
687 & ~( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
688 | VMCPU_FF_INTERRUPT_NESTED_GUEST) )
689#endif
[60871]690
[43387]691/** VM Flags that cause the HM loops to go back to ring-3. */
[45533]692#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
693 | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
[43387]694/** VMCPU Flags that cause the HM loops to go back to ring-3. */
[60847]695#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT \
696 | VMCPU_FF_IEM | VMCPU_FF_IOM)
[35361]697
[47671]698/** High priority ring-0 VM pre HM-mode execution mask. */
699#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
700/** High priority ring-0 VMCPU pre HM-mode execution mask. */
[61628]701#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 \
[80056]702 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_REQUEST \
703 | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_PREEMPT_TIMER)
[47671]704/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
705#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
706 | VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST \
707 | VM_FF_PDM_DMA) )
708/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
709#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
710 | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_REQUEST) )
711
[81786]712/** All the VMX nested-guest flags. */
713#define VMCPU_FF_VMX_ALL_MASK ( VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
714 | VMCPU_FF_VMX_INT_WINDOW | VMCPU_FF_VMX_NMI_WINDOW )
715
[35361]716/** All the forced VM flags. */
[62133]717#define VM_FF_ALL_MASK (UINT32_MAX)
[101667]718/** All the forced VMCPU flags. */
719#define VMCPU_FF_ALL_MASK ( UINT32_MAX \
[101668]720 | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_INT_WINDOW \
721 | VMCPU_FF_VMX_NMI_WINDOW )
[35361]722
[36054]723/** All the forced VM flags except those related to raw-mode and hardware
724 * assisted execution. */
[62133]725#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
[36054]726/** All the forced VMCPU flags except those related to raw-mode and hardware
727 * assisted execution. */
[80020]728#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH))
[100230]729
730#ifndef VBOX_FOR_DTRACE_LIB
731AssertCompile( ((VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK | VM_FF_YIELD_REPSTR_MASK)
732 & (VM_FF_HIGH_PRIORITY_PRE_RAW_MASK & ~VM_FF_ALL_REM_MASK)) == 0);
733AssertCompile((VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK & (VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK & ~VMCPU_FF_ALL_REM_MASK)) == 0);
734#endif
735
[35361]736/** @} */
737
738/** @def VM_FF_SET
[74792]739 * Sets a single force action flag.
[35361]740 *
[58125]741 * @param pVM The cross context VM structure.
[35361]742 * @param fFlag The flag to set.
743 */
[74795]744#define VM_FF_SET(pVM, fFlag) do { \
745 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
746 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
747 ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
748 } while (0)
[35361]749
750/** @def VMCPU_FF_SET
[74792]751 * Sets a single force action flag for the given VCPU.
[35361]752 *
[58124]753 * @param pVCpu The cross context virtual CPU structure.
[35361]754 * @param fFlag The flag to set.
[74792]755 * @sa VMCPU_FF_SET_MASK
[35361]756 */
[74798]757#ifdef VMCPU_WITH_64_BIT_FFS
758# define VMCPU_FF_SET(pVCpu, fFlag) do { \
[74795]759 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
[74835]760 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
[74798]761 ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
762 } while (0)
763#else
764# define VMCPU_FF_SET(pVCpu, fFlag) do { \
765 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
766 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
[74795]767 ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
768 } while (0)
[74798]769#endif
[35361]770
[74794]771/** @def VMCPU_FF_SET_MASK
[74792]772 * Sets a two or more force action flag for the given VCPU.
773 *
774 * @param pVCpu The cross context virtual CPU structure.
775 * @param fFlags The flags to set.
776 * @sa VMCPU_FF_SET
777 */
[74798]778#ifdef VMCPU_WITH_64_BIT_FFS
779# if ARCH_BITS > 32
[74803]780# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
781 do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
[74798]782# else
[74803]783# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
784 if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
785 else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
[74798]786 } while (0)
787# endif
788#else
[74803]789# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
790 do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
[74798]791#endif
[74792]792
[35361]793/** @def VM_FF_CLEAR
[74787]794 * Clears a single force action flag.
[35361]795 *
[58125]796 * @param pVM The cross context VM structure.
[35361]797 * @param fFlag The flag to clear.
798 */
[74795]799#define VM_FF_CLEAR(pVM, fFlag) do { \
800 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
801 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
802 ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
803 } while (0)
[35361]804
805/** @def VMCPU_FF_CLEAR
[74786]806 * Clears a single force action flag for the given VCPU.
[35361]807 *
[58124]808 * @param pVCpu The cross context virtual CPU structure.
[35361]809 * @param fFlag The flag to clear.
810 */
[74798]811#ifdef VMCPU_WITH_64_BIT_FFS
812# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
[74795]813 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
[74835]814 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
[74798]815 ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
816 } while (0)
817#else
818# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
819 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
820 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
[74795]821 ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
822 } while (0)
[74798]823#endif
[35361]824
[74786]825/** @def VMCPU_FF_CLEAR_MASK
826 * Clears two or more force action flags for the given VCPU.
827 *
828 * @param pVCpu The cross context virtual CPU structure.
829 * @param fFlags The flags to clear.
830 */
[74798]831#ifdef VMCPU_WITH_64_BIT_FFS
832# if ARCH_BITS > 32
833# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
834 do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
835# else
836# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
837 if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
838 else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
839 } while (0)
840# endif
841#else
842# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
[74793]843 do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
[74798]844#endif
[74786]845
[48558]846/** @def VM_FF_IS_SET
[74790]847 * Checks if single a force action flag is set.
[35361]848 *
[58125]849 * @param pVM The cross context VM structure.
[35361]850 * @param fFlag The flag to check.
[74790]851 * @sa VM_FF_IS_ANY_SET
[35361]852 */
[74790]853#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
[74798]854# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
[74790]855#else
856# define VM_FF_IS_SET(pVM, fFlag) \
857 ([](PVM a_pVM) -> bool \
858 { \
859 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
[74796]860 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
[74798]861 return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
[74790]862 }(pVM))
863#endif
[35361]864
[46420]865/** @def VMCPU_FF_IS_SET
[74790]866 * Checks if a single force action flag is set for the given VCPU.
[35361]867 *
[58124]868 * @param pVCpu The cross context virtual CPU structure.
[35361]869 * @param fFlag The flag to check.
[74789]870 * @sa VMCPU_FF_IS_ANY_SET
[35361]871 */
[74785]872#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
[74798]873# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
[74785]874#else
875# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
[79165]876 ([](PCVMCPU a_pVCpu) -> bool \
[74787]877 { \
878 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
[74835]879 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
[74798]880 return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
[74787]881 }(pVCpu))
[74785]882#endif
[35361]883
[74791]884/** @def VM_FF_IS_ANY_SET
[35361]885 * Checks if one or more force action in the specified set is pending.
886 *
[58125]887 * @param pVM The cross context VM structure.
[35361]888 * @param fFlags The flags to check for.
[74792]889 * @sa VM_FF_IS_SET
[35361]890 */
[74791]891#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
[35361]892
[74789]893/** @def VMCPU_FF_IS_ANY_SET
894 * Checks if two or more force action flags in the specified set is set for the given VCPU.
[74785]895 *
896 * @param pVCpu The cross context virtual CPU structure.
897 * @param fFlags The flags to check for.
[74789]898 * @sa VMCPU_FF_IS_SET
[74785]899 */
[74789]900#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
[74785]901
[58106]902/** @def VM_FF_TEST_AND_CLEAR
[35361]903 * Checks if one (!) force action in the specified set is pending and clears it atomically
904 *
905 * @returns true if the bit was set.
906 * @returns false if the bit was clear.
[58125]907 * @param pVM The cross context VM structure.
[74789]908 * @param fFlag Flag constant to check and clear (_BIT is appended).
[35361]909 */
[74789]910#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
[35361]911
[58106]912/** @def VMCPU_FF_TEST_AND_CLEAR
[35361]913 * Checks if one (!) force action in the specified set is pending and clears it atomically
914 *
915 * @returns true if the bit was set.
916 * @returns false if the bit was clear.
[58124]917 * @param pVCpu The cross context virtual CPU structure.
[74789]918 * @param fFlag Flag constant to check and clear (_BIT is appended).
[35361]919 */
[74789]920#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
[35361]921
[48558]922/** @def VM_FF_IS_PENDING_EXCEPT
[35361]923 * Checks if one or more force action in the specified set is pending while one
924 * or more other ones are not.
925 *
[58125]926 * @param pVM The cross context VM structure.
[35361]927 * @param fFlags The flags to check for.
928 * @param fExcpt The flags that should not be set.
929 */
[74789]930#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
931 ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
[35361]932
933/** @def VM_IS_EMT
934 * Checks if the current thread is the emulation thread (EMT).
935 *
936 * @remark The ring-0 variation will need attention if we expand the ring-0
937 * code to let threads other than EMT mess around with the VM.
938 */
939#ifdef IN_RC
940# define VM_IS_EMT(pVM) true
941#else
942# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
943#endif
944
945/** @def VMCPU_IS_EMT
946 * Checks if the current thread is the emulation thread (EMT) for the specified
947 * virtual CPU.
948 */
949#ifdef IN_RC
950# define VMCPU_IS_EMT(pVCpu) true
951#else
952# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
953#endif
954
955/** @def VM_ASSERT_EMT
956 * Asserts that the current thread IS the emulation thread (EMT).
957 */
958#ifdef IN_RC
959# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
960#elif defined(IN_RING0)
961# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
962#else
963# define VM_ASSERT_EMT(pVM) \
964 AssertMsg(VM_IS_EMT(pVM), \
965 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
966#endif
967
968/** @def VMCPU_ASSERT_EMT
969 * Asserts that the current thread IS the emulation thread (EMT) of the
970 * specified virtual CPU.
971 */
972#ifdef IN_RC
973# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
974#elif defined(IN_RING0)
[47989]975# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
976 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
977 RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
978 (pVCpu) ? (pVCpu)->idCpu : 0))
[35361]979#else
[50953]980# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
981 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
982 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
[35361]983#endif
984
985/** @def VM_ASSERT_EMT_RETURN
986 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
987 */
988#ifdef IN_RC
989# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
990#elif defined(IN_RING0)
991# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
992#else
993# define VM_ASSERT_EMT_RETURN(pVM, rc) \
994 AssertMsgReturn(VM_IS_EMT(pVM), \
995 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
996 (rc))
997#endif
998
999/** @def VMCPU_ASSERT_EMT_RETURN
1000 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
1001 */
1002#ifdef IN_RC
1003# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
1004#elif defined(IN_RING0)
1005# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
1006#else
1007# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
[53795]1008 AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
1009 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
1010 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
1011 (rc))
[35361]1012#endif
1013
[37357]1014/** @def VMCPU_ASSERT_EMT_OR_GURU
1015 * Asserts that the current thread IS the emulation thread (EMT) of the
1016 * specified virtual CPU.
1017 */
1018#if defined(IN_RC) || defined(IN_RING0)
1019# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
1020 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
1021 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
1022#else
1023# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
1024 AssertMsg( VMCPU_IS_EMT(pVCpu) \
1025 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
1026 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
1027 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
1028 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
1029#endif
1030
[37362]1031/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
[37357]1032 * Asserts that the current thread IS the emulation thread (EMT) of the
[60307]1033 * specified virtual CPU or the VM is not running.
[37357]1034 */
1035#if defined(IN_RC) || defined(IN_RING0)
[37362]1036# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
[60307]1037 Assert( VMCPU_IS_EMT(pVCpu) \
[68851]1038 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
[37357]1039#else
[37362]1040# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
[60307]1041 AssertMsg( VMCPU_IS_EMT(pVCpu) \
[68851]1042 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
[37357]1043 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
1044 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
1045#endif
1046
[73073]1047/** @def VMSTATE_IS_RUNNING
1048 * Checks if the given state indicates a running VM.
1049 */
1050#define VMSTATE_IS_RUNNING(a_enmVMState) \
[98122]1051 ( (a_enmVMState) == VMSTATE_RUNNING \
1052 || (a_enmVMState) == VMSTATE_RUNNING_LS )
[73073]1053
[68851]1054/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
[73073]1055 * Checks if the VM is running.
1056 * @note This is only for pure debug assertions. No AssertReturn or similar!
1057 * @sa VMSTATE_IS_RUNNING
[60307]1058 */
[68851]1059#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
1060 ( (pVM)->enmVMState == VMSTATE_RUNNING \
[80074]1061 || (pVM)->enmVMState == VMSTATE_RUNNING_LS )
[60307]1062
[98122]1063
1064/** @def VMSTATE_IS_POWERED_ON
1065 * Checks if the given state indicates the VM is powered on.
1066 *
1067 * @note Excludes all error states, so a powered on VM that hit a fatal error,
1068 * guru meditation, state load failure or similar will not be considered
1069 * powered on by this test.
1070 */
1071#define VMSTATE_IS_POWERED_ON(a_enmVMState) \
1072 ( (a_enmVMState) >= VMSTATE_RESUMING && (a_enmVMState) < VMSTATE_POWERING_OFF )
1073
[60307]1074/** @def VM_ASSERT_IS_NOT_RUNNING
1075 * Asserts that the VM is not running.
1076 */
1077#if defined(IN_RC) || defined(IN_RING0)
[68851]1078#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
[60307]1079#else
[68851]1080#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
1081 ("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
[60307]1082#endif
1083
[35361]1084/** @def VM_ASSERT_EMT0
1085 * Asserts that the current thread IS emulation thread \#0 (EMT0).
1086 */
[80331]1087#ifdef IN_RING3
[80191]1088# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1089#else
1090# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1091#endif
[35361]1092
1093/** @def VM_ASSERT_EMT0_RETURN
1094 * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1095 * it isn't.
1096 */
[80641]1097#ifdef IN_RING3
1098# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
1099#else
1100# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1101#endif
[35361]1102
1103
1104/**
1105 * Asserts that the current thread is NOT the emulation thread.
1106 */
1107#define VM_ASSERT_OTHER_THREAD(pVM) \
1108 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1109
1110
[60307]1111/** @def VM_ASSERT_STATE
[35361]1112 * Asserts a certain VM state.
1113 */
1114#define VM_ASSERT_STATE(pVM, _enmState) \
1115 AssertMsg((pVM)->enmVMState == (_enmState), \
1116 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1117
1118/** @def VM_ASSERT_STATE_RETURN
1119 * Asserts a certain VM state and returns if it doesn't match.
1120 */
1121#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1122 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1123 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1124 (rc))
1125
[46155]1126/** @def VM_IS_VALID_EXT
1127 * Asserts a the VM handle is valid for external access, i.e. not being destroy
1128 * or terminated. */
1129#define VM_IS_VALID_EXT(pVM) \
1130 ( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1131 && ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1132 || ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1133 && VM_IS_EMT(pVM))) )
1134
[35361]1135/** @def VM_ASSERT_VALID_EXT_RETURN
1136 * Asserts a the VM handle is valid for external access, i.e. not being
1137 * destroy or terminated.
1138 */
1139#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
[46155]1140 AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
[35361]1141 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1142 ? VMGetStateName(pVM->enmVMState) : ""), \
1143 (rc))
1144
1145/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1146 * Asserts a the VMCPU handle is valid for external access, i.e. not being
1147 * destroy or terminated.
1148 */
1149#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1150 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1151 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1152 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1153 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1154 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1155 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1156 (rc))
1157
[41218]1158#endif /* !VBOX_FOR_DTRACE_LIB */
[35361]1159
[41218]1160
[45618]1161/**
[70948]1162 * Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1163 *
1164 * ONLY HM and NEM MAY USE THIS!
1165 *
1166 * @param a_pVM The cross context VM structure.
1167 * @param a_bValue The new value.
1168 * @internal
1169 */
1170#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1171 do { \
1172 *const_cast<uint8_t *>(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1173 ASMCompilerBarrier(); /* just to be on the safe side */ \
1174 } while (0)
1175
1176/**
[93901]1177 * Checks whether iem-executes-all-mode is used.
[70948]1178 *
[93901]1179 * @retval true if IEM is used.
1180 * @retval false if not.
[70948]1181 *
1182 * @param a_pVM The cross context VM structure.
[70977]1183 * @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
[70948]1184 * @internal
1185 */
[93901]1186#define VM_IS_EXEC_ENGINE_IEM(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_IEM)
[70948]1187
1188/**
1189 * Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1190 *
1191 * @retval true if either is used.
1192 * @retval false if software virtualization (raw-mode) is used.
1193 *
1194 * @param a_pVM The cross context VM structure.
[93901]1195 * @sa VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
[70948]1196 * @internal
1197 */
[93901]1198#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_IEM)
[70948]1199
[70977]1200/**
1201 * Checks whether HM is being used by this VM.
1202 *
1203 * @retval true if HM (VT-x/AMD-v) is used.
1204 * @retval false if not.
1205 *
1206 * @param a_pVM The cross context VM structure.
[93901]1207 * @sa VM_IS_NEM_ENABLED, VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_OR_NEM_ENABLED.
[70977]1208 * @internal
1209 */
1210#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
[70948]1211
1212/**
[70977]1213 * Checks whether NEM is being used by this VM.
1214 *
1215 * @retval true if a native hypervisor API is used.
1216 * @retval false if not.
1217 *
1218 * @param a_pVM The cross context VM structure.
[93901]1219 * @sa VM_IS_HM_ENABLED, VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_OR_NEM_ENABLED.
[70977]1220 * @internal
1221 */
1222#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1223
1224
1225/**
[45618]1226 * The cross context VM structure.
[35361]1227 *
[45618]1228 * It contains all the VM data which have to be available in all contexts.
1229 * Even if it contains all the data the idea is to use APIs not to modify all
1230 * the members all around the place. Therefore we make use of unions to hide
1231 * everything which isn't local to the current source module. This means we'll
1232 * have to pay a little bit of attention when adding new members to structures
1233 * in the unions and make sure to keep the padding sizes up to date.
[35361]1234 *
[45618]1235 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
[35361]1236 */
1237typedef struct VM
1238{
1239 /** The state of the VM.
1240 * This field is read only to everyone except the VM and EM. */
1241 VMSTATE volatile enmVMState;
1242 /** Forced action flags.
1243 * See the VM_FF_* \#defines. Updated atomically.
1244 */
1245 volatile uint32_t fGlobalForcedActions;
1246 /** Pointer to the array of page descriptors for the VM structure allocation. */
1247 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1248 /** Session handle. For use when calling SUPR0 APIs. */
[80331]1249#ifdef IN_RING0
[80274]1250 PSUPDRVSESSION pSessionUnsafe;
1251#else
[35361]1252 PSUPDRVSESSION pSession;
[80274]1253#endif
[35361]1254 /** Pointer to the ring-3 VM structure. */
1255 PUVM pUVM;
1256 /** Ring-3 Host Context VM Pointer. */
[80331]1257#ifdef IN_RING0
[80281]1258 R3PTRTYPE(struct VM *) pVMR3Unsafe;
1259#else
[35361]1260 R3PTRTYPE(struct VM *) pVMR3;
[80281]1261#endif
1262 /** Ring-0 Host Context VM pointer for making ring-0 calls. */
1263 R0PTRTYPE(struct VM *) pVMR0ForCall;
[35361]1264 /** Raw-mode Context VM Pointer. */
[80080]1265 uint32_t pVMRC;
1266 /** Padding for new raw-mode (long mode). */
1267 uint32_t pVMRCPadding;
[35361]1268
1269 /** The GVM VM handle. Only the GVM should modify this field. */
[80331]1270#ifdef IN_RING0
[80274]1271 uint32_t hSelfUnsafe;
1272#else
[35361]1273 uint32_t hSelf;
[80274]1274#endif
[35361]1275 /** Number of virtual CPUs. */
[80331]1276#ifdef IN_RING0
[80268]1277 uint32_t cCpusUnsafe;
1278#else
[35361]1279 uint32_t cCpus;
[80268]1280#endif
[35361]1281 /** CPU excution cap (1-100) */
1282 uint32_t uCpuExecutionCap;
1283
[78431]1284 /** Size of the VM structure. */
1285 uint32_t cbSelf;
1286 /** Size of the VMCPU structure. */
1287 uint32_t cbVCpu;
[79995]1288 /** Structure version number (TBD). */
1289 uint32_t uStructVersion;
[35361]1290
1291 /** @name Various items that are frequently accessed.
1292 * @{ */
[70948]1293 /** The main execution engine, VM_EXEC_ENGINE_XXX.
1294 * This is set early during vmR3InitRing3 by HM or NEM. */
1295 uint8_t const bMainExecutionEngine;
1296
[35361]1297 /** Hardware VM support is available and enabled.
[45618]1298 * Determined very early during init.
[70948]1299 * This is placed here for performance reasons.
1300 * @todo obsoleted by bMainExecutionEngine, eliminate. */
[43387]1301 bool fHMEnabled;
[35361]1302 /** @} */
1303
[58106]1304 /** Alignment padding. */
[91345]1305 uint8_t uPadding1[6];
[41976]1306
[37410]1307 /** @name Debugging
1308 * @{ */
1309 /** Ring-3 Host Context VM Pointer. */
1310 R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1311 /** Ring-0 Host Context VM Pointer. */
1312 R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1313 /** @} */
[35361]1314
[90597]1315 /** Max EMT hash lookup collisions (in GVMM). */
1316 uint8_t cMaxEmtHashCollisions;
1317
[79995]1318 /** Padding - the unions must be aligned on a 64 bytes boundary. */
[90597]1319 uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 23 : 51];
[37416]1320
[35361]1321 /** CPUM part. */
1322 union
1323 {
[98970]1324#if defined(VMM_INCLUDED_SRC_include_CPUMInternal_h) || defined(VMM_INCLUDED_SRC_include_CPUMInternal_armv8_h)
[35361]1325 struct CPUM s;
1326#endif
[76558]1327#ifdef VBOX_INCLUDED_vmm_cpum_h
[58909]1328 /** Read only info exposed about the host and guest CPUs. */
[55229]1329 struct
1330 {
1331 /** Padding for hidden fields. */
[94959]1332 uint8_t abHidden0[64 + 48];
[55229]1333 /** Guest CPU feature information. */
1334 CPUMFEATURES GuestFeatures;
1335 } const ro;
1336#endif
[91266]1337 /** @todo this is rather bloated because of static MSR range allocation.
1338 * Probably a good idea to move it to a separate R0 allocation... */
[93593]1339 uint8_t padding[8832 + 128*8192 + 0x1d00]; /* multiple of 64 */
[35361]1340 } cpum;
1341
[93593]1342 /** PGM part.
1343 * @note 16384 aligned for zero and mmio page storage. */
1344 union
1345 {
1346#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1347 struct PGM s;
1348#endif
1349 uint8_t padding[53888]; /* multiple of 64 */
1350 } pgm;
1351
[35361]1352 /** VMM part. */
1353 union
1354 {
[76561]1355#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
[35361]1356 struct VMM s;
1357#endif
[37452]1358 uint8_t padding[1600]; /* multiple of 64 */
[35361]1359 } vmm;
1360
[43387]1361 /** HM part. */
[35361]1362 union
1363 {
[76561]1364#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
[43387]1365 struct HM s;
[35361]1366#endif
[82814]1367 uint8_t padding[5504]; /* multiple of 64 */
[43387]1368 } hm;
[35361]1369
1370 /** TRPM part. */
1371 union
1372 {
[76561]1373#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
[35361]1374 struct TRPM s;
1375#endif
[87777]1376 uint8_t padding[2048]; /* multiple of 64 */
[35361]1377 } trpm;
1378
1379 /** SELM part. */
1380 union
1381 {
[76561]1382#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
[35361]1383 struct SELM s;
1384#endif
[42407]1385 uint8_t padding[768]; /* multiple of 64 */
[35361]1386 } selm;
1387
1388 /** MM part. */
1389 union
1390 {
[76561]1391#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
[35361]1392 struct MM s;
1393#endif
1394 uint8_t padding[192]; /* multiple of 64 */
1395 } mm;
1396
1397 /** PDM part. */
1398 union
1399 {
[76561]1400#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
[35361]1401 struct PDM s;
1402#endif
[93635]1403 uint8_t padding[22400]; /* multiple of 64 */
[35361]1404 } pdm;
1405
1406 /** IOM part. */
1407 union
1408 {
[76561]1409#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
[35361]1410 struct IOM s;
1411#endif
[81162]1412 uint8_t padding[1152]; /* multiple of 64 */
[35361]1413 } iom;
1414
1415 /** EM part. */
1416 union
1417 {
[76561]1418#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
[35361]1419 struct EM s;
1420#endif
1421 uint8_t padding[256]; /* multiple of 64 */
1422 } em;
1423
[70918]1424 /** NEM part. */
1425 union
1426 {
[76561]1427#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
[70918]1428 struct NEM s;
1429#endif
[92465]1430 uint8_t padding[4608]; /* multiple of 64 */
[70918]1431 } nem;
1432
[35361]1433 /** TM part. */
1434 union
1435 {
[76561]1436#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
[35361]1437 struct TM s;
1438#endif
[90500]1439 uint8_t padding[10112]; /* multiple of 64 */
[35361]1440 } tm;
1441
1442 /** DBGF part. */
1443 union
1444 {
[76561]1445#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
[35361]1446 struct DBGF s;
1447#endif
[76558]1448#ifdef VBOX_INCLUDED_vmm_dbgf_h
[58909]1449 /** Read only info exposed about interrupt breakpoints and selected events. */
1450 struct
1451 {
1452 /** Bitmap of enabled hardware interrupt breakpoints. */
1453 uint32_t bmHardIntBreakpoints[256 / 32];
1454 /** Bitmap of enabled software interrupt breakpoints. */
1455 uint32_t bmSoftIntBreakpoints[256 / 32];
1456 /** Bitmap of selected events.
1457 * This includes non-selectable events too for simplicity, we maintain the
1458 * state for some of these, as it may come in handy. */
[58910]1459 uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
[58909]1460 /** Enabled hardware interrupt breakpoints. */
1461 uint32_t cHardIntBreakpoints;
1462 /** Enabled software interrupt breakpoints. */
1463 uint32_t cSoftIntBreakpoints;
[64770]1464 /** The number of selected events. */
[58909]1465 uint32_t cSelectedEvents;
[64770]1466 /** The number of enabled hardware breakpoints. */
1467 uint8_t cEnabledHwBreakpoints;
1468 /** The number of enabled hardware I/O breakpoints. */
1469 uint8_t cEnabledHwIoBreakpoints;
[87594]1470 uint8_t au8Alignment1[2]; /**< Alignment padding. */
[64770]1471 /** The number of enabled INT3 breakpoints. */
[87594]1472 uint32_t volatile cEnabledInt3Breakpoints;
[58909]1473 } const ro;
1474#endif
[73351]1475 uint8_t padding[2432]; /* multiple of 64 */
[35361]1476 } dbgf;
1477
1478 /** SSM part. */
1479 union
1480 {
[76561]1481#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
[35361]1482 struct SSM s;
1483#endif
[57989]1484 uint8_t padding[128]; /* multiple of 64 */
[35361]1485 } ssm;
1486
1487 union
1488 {
[76561]1489#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
[50953]1490 struct GIM s;
1491#endif
[58283]1492 uint8_t padding[448]; /* multiple of 64 */
[50953]1493 } gim;
1494
[99385]1495#if defined(VBOX_VMM_TARGET_ARMV8)
[62000]1496 union
1497 {
[99385]1498# ifdef VMM_INCLUDED_SRC_include_GICInternal_h
1499 struct GIC s;
1500# endif
1501 uint8_t padding[128]; /* multiple of 8 */
1502 } gic;
1503#else
1504 union
1505 {
1506# ifdef VMM_INCLUDED_SRC_include_APICInternal_h
[62000]1507 struct APIC s;
[99385]1508# endif
[62000]1509 uint8_t padding[128]; /* multiple of 8 */
1510 } apic;
[99385]1511#endif
[62000]1512
[35361]1513 /* ---- begin small stuff ---- */
1514
1515 /** VM part. */
1516 union
1517 {
[76561]1518#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
[35361]1519 struct VMINT s;
1520#endif
[73351]1521 uint8_t padding[32]; /* multiple of 8 */
[35361]1522 } vm;
1523
1524 /** CFGM part. */
1525 union
1526 {
[76561]1527#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
[35361]1528 struct CFGM s;
1529#endif
1530 uint8_t padding[8]; /* multiple of 8 */
1531 } cfgm;
1532
[93650]1533 /** IEM part. */
1534 union
1535 {
1536#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
1537 struct IEM s;
1538#endif
[96811]1539 uint8_t padding[16]; /* multiple of 8 */
[93650]1540 } iem;
1541
[82990]1542 /** Statistics for ring-0 only components. */
1543 struct
1544 {
1545 /** GMMR0 stats. */
1546 struct
1547 {
1548 /** Chunk TLB hits. */
1549 uint64_t cChunkTlbHits;
1550 /** Chunk TLB misses. */
1551 uint64_t cChunkTlbMisses;
1552 } gmm;
1553 uint64_t au64Padding[6]; /* probably more comming here... */
1554 } R0Stats;
1555
[94882]1556 union
1557 {
1558#ifdef VMM_INCLUDED_SRC_include_GCMInternal_h
1559 struct GCM s;
1560#endif
1561 uint8_t padding[32]; /* multiple of 8 */
1562 } gcm;
1563
[78431]1564 /** Padding for aligning the structure size on a page boundrary. */
[96811]1565 uint8_t abAlignment2[8872 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
[35361]1566
1567 /* ---- end small stuff ---- */
1568
[80253]1569 /** Array of VMCPU ring-3 pointers. */
[80191]1570 PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
[93593]1571
1572 /* This point is aligned on a 16384 boundrary (for arm64 purposes). */
[35361]1573} VM;
[93593]1574#ifndef VBOX_FOR_DTRACE_LIB
[93609]1575//AssertCompileSizeAlignment(VM, 16384);
[93593]1576#endif
[35361]1577
1578
1579#ifdef IN_RC
1580RT_C_DECLS_BEGIN
1581
1582/** The VM structure.
[56284]1583 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1584 * globals which we should avoid using.
[35361]1585 */
1586extern DECLIMPORT(VM) g_VM;
1587
[78438]1588/** The VMCPU structure for virtual CPU \#0.
1589 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1590 * globals which we should avoid using.
1591 */
1592extern DECLIMPORT(VMCPU) g_VCpu0;
1593
[35361]1594RT_C_DECLS_END
1595#endif
1596
1597/** @} */
1598
[76585]1599#endif /* !VBOX_INCLUDED_vmm_vm_h */
[37410]1600
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