VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 81369

Last change on this file since 81369 was 81031, checked in by vboxsync, 6 years ago

PDM,Devices: Moving the PDMPCIDEV structures into the PDMDEVINS allocation. Preps for extending the config space to 4KB. bugref:9218
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1/** @file
2 * PCI - The PCI Controller And Devices. (DEV)
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_pdmpcidev_h
27#define VBOX_INCLUDED_vmm_pdmpcidev_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/pci.h>
33#include <iprt/assert.h>
34
35
36/** @defgroup grp_pdm_pcidev PDM PCI Device
37 * @ingroup grp_pdm_device
38 * @{
39 */
40
41/**
42 * Callback function for intercept reading from the PCI configuration space.
43 *
44 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
45 * @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
46 * PDMDevHlpPCIConfigRead()).
47 *
48 * @param pDevIns Pointer to the device instance the PCI device
49 * belongs to.
50 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
51 * @param uAddress The configuration space register address. [0..4096]
52 * @param cb The register size. [1,2,4]
53 * @param pu32Value Where to return the register value.
54 *
55 * @remarks Called with the PDM lock held. The device lock is NOT take because
56 * that is very likely be a lock order violation.
57 */
58typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
59 uint32_t uAddress, unsigned cb, uint32_t *pu32Value);
60/** Pointer to a FNPCICONFIGREAD() function. */
61typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
62/** Pointer to a PFNPCICONFIGREAD. */
63typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
64
65/**
66 * Callback function for writing to the PCI configuration space.
67 *
68 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
69 * @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
70 * PDMDevHlpPCIConfigWrite()).
71 *
72 * @param pDevIns Pointer to the device instance the PCI device
73 * belongs to.
74 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
75 * @param uAddress The configuration space register address. [0..4096]
76 * @param cb The register size. [1,2,4]
77 * @param u32Value The value that's being written. The number of bits actually used from
78 * this value is determined by the cb parameter.
79 *
80 * @remarks Called with the PDM lock held. The device lock is NOT take because
81 * that is very likely be a lock order violation.
82 */
83typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
84 uint32_t uAddress, unsigned cb, uint32_t u32Value);
85/** Pointer to a FNPCICONFIGWRITE() function. */
86typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
87/** Pointer to a PFNPCICONFIGWRITE. */
88typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
89
90/**
91 * Callback function for mapping an PCI I/O region.
92 *
93 * @returns VBox status code.
94 * @param pDevIns Pointer to the device instance the PCI device
95 * belongs to.
96 * @param pPciDev Pointer to the PCI device.
97 * @param iRegion The region number.
98 * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
99 * is an I/O port, otherwise it's a physical address.
100 *
101 * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
102 * that the device deregister access handlers for it and update its internal
103 * state to reflect this.
104 *
105 * @param cb Size of the region in bytes.
106 * @param enmType One of the PCI_ADDRESS_SPACE_* values.
107 *
108 * @remarks Called with the PDM lock held. The device lock is NOT take because
109 * that is very likely be a lock order violation.
110 */
111typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
112 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
113/** Pointer to a FNPCIIOREGIONMAP() function. */
114typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
115
116
117/**
118 * Sets the size and type for old saved states from within a
119 * PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
120 *
121 * @returns VBox status code.
122 * @param pPciDev Pointer to the PCI device.
123 * @param iRegion The region number.
124 * @param cbRegion The region size.
125 * @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
126 */
127typedef DECLCALLBACK(int) FNPCIIOREGIONOLDSETTER(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, PCIADDRESSSPACE enmType);
128/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
129typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
130
131/**
132 * Swaps two PCI I/O regions from within a PDMPCIDEV::pfnRegionLoadChangeHookR3
133 * callback.
134 *
135 * @returns VBox status code.
136 * @param pPciDev Pointer to the PCI device.
137 * @param iRegion The region number.
138 * @param iOtherRegion The number of the region swap with.
139 * @sa @bugref{9359}
140 */
141typedef DECLCALLBACK(int) FNPCIIOREGIONSWAP(PPDMPCIDEV pPciDev, uint32_t iRegion, uint32_t iOtherRegion);
142/** Pointer to a FNPCIIOREGIONSWAP() function. */
143typedef FNPCIIOREGIONSWAP *PFNPCIIOREGIONSWAP;
144
145
146/*
147 * Hack to include the PDMPCIDEVINT structure at the right place
148 * to avoid duplications of FNPCIIOREGIONMAP and such.
149 */
150#ifdef PDMPCIDEV_INCLUDE_PRIVATE
151# include "pdmpcidevint.h"
152#endif
153
154/**
155 * PDM PCI Device structure.
156 *
157 * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
158 * devices associated with it. The first PCI device that it registers
159 * automatically becomes the default PCI device and can be used implicitly
160 * with the device helper APIs. Subsequent PCI devices must be specified
161 * explicitly to the device helper APIs when used.
162 */
163typedef struct PDMPCIDEV
164{
165 /** @name Read only data.
166 * @{
167 */
168 /** Magic number (PDMPCIDEV_MAGIC). */
169 uint32_t u32Magic;
170 /** PCI device number [11:3] and function [2:0] on the pci bus.
171 * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
172 uint32_t uDevFn;
173 /** Size of the valid config space (we always allocate 4KB). */
174 uint16_t cbConfig;
175 /** Size of the MSI-X state data optionally following the config space. */
176 uint16_t cbMsixState;
177 /** Index into the PDMDEVINS::apPciDev array. */
178 uint16_t idxSubDev;
179 uint16_t u16Padding;
180 /** Device name. */
181 R3PTRTYPE(const char *) pszNameR3;
182 /** @} */
183
184 /**
185 * Callback for dealing with size changes.
186 *
187 * This is set by the PCI device when needed. It is only needed if any changes
188 * in the PCI resources have been made that may be incompatible with saved state
189 * (i.e. does not reflect configuration, but configuration defaults changed).
190 *
191 * The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
192 * allocation down in size. There is currently no way of growing resources.
193 * Dropping a resource is automatic.
194 *
195 * @returns VBox status code.
196 * @param pDevIns Pointer to the device instance the PCI device
197 * belongs to.
198 * @param pPciDev Pointer to the PCI device.
199 * @param iRegion The region number or UINT32_MAX if old saved state call.
200 * @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
201 * call, or 0 for dummy 64-bit top half region.
202 * @param enmType The type being loaded, -1 if old saved state call, or
203 * 0xff if dummy 64-bit top half region.
204 * @param pfnOldSetter Callback for setting size and type for call
205 * regarding old saved states. NULL otherwise.
206 * @param pfnSwapRegions Used to swaps two regions. The second one must be a
207 * higher number than @a iRegion. NULL if old saved
208 * state.
209 */
210 DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
211 uint64_t cbRegion, PCIADDRESSSPACE enmType,
212 PFNPCIIOREGIONOLDSETTER pfnOldSetter,
213 PFNPCIIOREGIONSWAP pfnSwapRegion));
214
215 /** Internal data. */
216 union
217 {
218#ifdef PDMPCIDEVINT_DECLARED
219 PDMPCIDEVINT s;
220#endif
221 uint8_t padding[HC_ARCH_BITS == 32 ? 0x60 + 8 : 0x140];
222 } Int;
223
224 /** PCI config space.
225 * This is either 256 or 4096 in size. In the latter case it may be
226 * followed by a MSI-X state area. */
227 uint8_t abConfig[4096];
228 /** The MSI-X state data. Optional. */
229 uint8_t abMsixState[RT_FLEXIBLE_ARRAY];
230} PDMPCIDEV;
231#ifdef PDMPCIDEVINT_DECLARED
232AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
233#endif
234/** Magic number of PDMPCIDEV::u32Magic (Margaret Eleanor Atwood). */
235#define PDMPCIDEV_MAGIC UINT32_C(0x19391118)
236
237/** Checks that the PCI device structure is valid and belongs to the device
238 * instance, but does not return. */
239#ifdef VBOX_STRICT
240# define PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev) \
241 do { \
242 uintptr_t const offPciDevInTable = (uintptr_t)(a_pPciDev) - (uintptr_t)pDevIns->apPciDevs[0]; \
243 uint32_t const cbPciDevTmp = pDevIns->cbPciDev; \
244 ASMCompilerBarrier(); \
245 AssertMsg( offPciDevInTable < pDevIns->cPciDevs * cbPciDevTmp \
246 && cbPciDevTmp >= RT_UOFFSETOF(PDMPCIDEV, abConfig) + 256 \
247 && offPciDevInTable % cbPciDevTmp == 0, \
248 ("pPciDev=%p apPciDevs[0]=%p offPciDevInTable=%p cPciDevs=%#x cbPciDev=%#x\n", \
249 (a_pPciDev), pDevIns->apPciDevs[0], offPciDevInTable, pDevIns->cPciDevs, cbPciDevTmp)); \
250 AssertPtr((a_pPciDev)); \
251 AssertMsg((a_pPciDev)->u32Magic == PDMPCIDEV_MAGIC, ("%#x\n", (a_pPciDev)->u32Magic)); \
252 } while (0)
253#else
254# define PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev) do { } while (0)
255#endif
256
257/** Checks that the PCI device structure is valid, belongs to the device
258 * instance and that it is registered, but does not return. */
259#ifdef VBOX_STRICT
260# define PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(a_pDevIns, a_pPciDev) \
261 do { \
262 PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev); \
263 Assert((a_pPciDev)->Int.s.fRegistered); \
264 } while (0)
265#else
266# define PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(a_pDevIns, a_pPciDev) do { } while (0)
267#endif
268
269/** Checks that the PCI device structure is valid and belongs to the device
270 * instance, returns appropriate status code if not valid. */
271#define PDMPCIDEV_ASSERT_VALID_RET(a_pDevIns, a_pPciDev) \
272 do { \
273 uintptr_t const offPciDevInTable = (uintptr_t)(a_pPciDev) - (uintptr_t)pDevIns->apPciDevs[0]; \
274 uint32_t const cbPciDevTmp = pDevIns->cbPciDev; \
275 ASMCompilerBarrier(); \
276 AssertMsgReturn( offPciDevInTable < pDevIns->cPciDevs * cbPciDevTmp \
277 && cbPciDevTmp >= RT_UOFFSETOF(PDMPCIDEV, abConfig) + 256 \
278 && offPciDevInTable % cbPciDevTmp == 0, \
279 ("pPciDev=%p apPciDevs[0]=%p offPciDevInTable=%p cPciDevs=%#x cbPciDev=%#x\n", \
280 (a_pPciDev), pDevIns->apPciDevs[0], offPciDevInTable, pDevIns->cPciDevs, cbPciDevTmp), \
281 VERR_PDM_NOT_PCI_DEVICE); \
282 AssertMsgReturn((a_pPciDev)->u32Magic == PDMPCIDEV_MAGIC, ("%#x\n", (a_pPciDev)->u32Magic), VERR_PDM_NOT_PCI_DEVICE); \
283 AssertReturn((a_pPciDev)->Int.s.fRegistered, VERR_PDM_NOT_PCI_DEVICE); \
284 } while (0)
285
286
287
288/** @name PDM PCI config space accessor function.
289 * @{
290 */
291
292/** @todo handle extended space access. */
293
294DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
295{
296 Assert(offReg < sizeof(pPciDev->abConfig));
297 pPciDev->abConfig[offReg] = u8Value;
298}
299
300DECLINLINE(uint8_t) PDMPciDevGetByte(PCPDMPCIDEV pPciDev, uint32_t offReg)
301{
302 Assert(offReg < sizeof(pPciDev->abConfig));
303 return pPciDev->abConfig[offReg];
304}
305
306DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
307{
308 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
309 *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
310}
311
312DECLINLINE(uint16_t) PDMPciDevGetWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
313{
314 uint16_t u16Value;
315 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
316 u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
317 return RT_H2LE_U16(u16Value);
318}
319
320DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
321{
322 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
323 *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
324}
325
326DECLINLINE(uint32_t) PDMPciDevGetDWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
327{
328 uint32_t u32Value;
329 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
330 u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
331 return RT_H2LE_U32(u32Value);
332}
333
334DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
335{
336 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
337 *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
338}
339
340DECLINLINE(uint64_t) PDMPciDevGetQWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
341{
342 uint64_t u64Value;
343 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
344 u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
345 return RT_H2LE_U64(u64Value);
346}
347
348/**
349 * Sets the vendor id config register.
350 * @param pPciDev The PCI device.
351 * @param u16VendorId The vendor id.
352 */
353DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
354{
355 PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
356}
357
358/**
359 * Gets the vendor id config register.
360 * @returns the vendor id.
361 * @param pPciDev The PCI device.
362 */
363DECLINLINE(uint16_t) PDMPciDevGetVendorId(PCPDMPCIDEV pPciDev)
364{
365 return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
366}
367
368
369/**
370 * Sets the device id config register.
371 * @param pPciDev The PCI device.
372 * @param u16DeviceId The device id.
373 */
374DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
375{
376 PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
377}
378
379/**
380 * Gets the device id config register.
381 * @returns the device id.
382 * @param pPciDev The PCI device.
383 */
384DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PCPDMPCIDEV pPciDev)
385{
386 return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
387}
388
389/**
390 * Sets the command config register.
391 *
392 * @param pPciDev The PCI device.
393 * @param u16Command The command register value.
394 */
395DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
396{
397 PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
398}
399
400
401/**
402 * Gets the command config register.
403 * @returns The command register value.
404 * @param pPciDev The PCI device.
405 */
406DECLINLINE(uint16_t) PDMPciDevGetCommand(PCPDMPCIDEV pPciDev)
407{
408 return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
409}
410
411/**
412 * Checks if the given PCI device is a bus master.
413 * @returns true if the device is a bus master, false if not.
414 * @param pPciDev The PCI device.
415 */
416DECLINLINE(bool) PDMPciDevIsBusmaster(PCPDMPCIDEV pPciDev)
417{
418 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
419}
420
421/**
422 * Checks if INTx interrupts disabled in the command config register.
423 * @returns true if disabled.
424 * @param pPciDev The PCI device.
425 */
426DECLINLINE(bool) PDMPciDevIsIntxDisabled(PCPDMPCIDEV pPciDev)
427{
428 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
429}
430
431/**
432 * Gets the status config register.
433 *
434 * @returns status config register.
435 * @param pPciDev The PCI device.
436 */
437DECLINLINE(uint16_t) PDMPciDevGetStatus(PCPDMPCIDEV pPciDev)
438{
439 return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
440}
441
442/**
443 * Sets the status config register.
444 *
445 * @param pPciDev The PCI device.
446 * @param u16Status The status register value.
447 */
448DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
449{
450 PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
451}
452
453
454/**
455 * Sets the revision id config register.
456 *
457 * @param pPciDev The PCI device.
458 * @param u8RevisionId The revision id.
459 */
460DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
461{
462 PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
463}
464
465
466/**
467 * Sets the register level programming class config register.
468 *
469 * @param pPciDev The PCI device.
470 * @param u8ClassProg The new value.
471 */
472DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
473{
474 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
475}
476
477
478/**
479 * Sets the sub-class (aka device class) config register.
480 *
481 * @param pPciDev The PCI device.
482 * @param u8SubClass The sub-class.
483 */
484DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
485{
486 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
487}
488
489
490/**
491 * Sets the base class config register.
492 *
493 * @param pPciDev The PCI device.
494 * @param u8BaseClass The base class.
495 */
496DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
497{
498 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
499}
500
501/**
502 * Sets the header type config register.
503 *
504 * @param pPciDev The PCI device.
505 * @param u8HdrType The header type.
506 */
507DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
508{
509 PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
510}
511
512/**
513 * Gets the header type config register.
514 *
515 * @param pPciDev The PCI device.
516 * @returns u8HdrType The header type.
517 */
518DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PCPDMPCIDEV pPciDev)
519{
520 return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
521}
522
523/**
524 * Sets the BIST (built-in self-test) config register.
525 *
526 * @param pPciDev The PCI device.
527 * @param u8Bist The BIST value.
528 */
529DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
530{
531 PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
532}
533
534/**
535 * Gets the BIST (built-in self-test) config register.
536 *
537 * @param pPciDev The PCI device.
538 * @returns u8Bist The BIST.
539 */
540DECLINLINE(uint8_t) PDMPciDevGetBIST(PCPDMPCIDEV pPciDev)
541{
542 return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
543}
544
545
546/**
547 * Sets a base address config register.
548 *
549 * @param pPciDev The PCI device.
550 * @param iReg Base address register number (0..5).
551 * @param fIOSpace Whether it's I/O (true) or memory (false) space.
552 * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
553 * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
554 * @param u32Addr The address value.
555 */
556DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
557 uint32_t u32Addr)
558{
559 if (fIOSpace)
560 {
561 Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
562 u32Addr |= RT_BIT_32(0);
563 }
564 else
565 {
566 Assert(!(u32Addr & 0xf));
567 if (fPrefetchable)
568 u32Addr |= RT_BIT_32(3);
569 if (f64Bit)
570 u32Addr |= 0x2 << 1;
571 }
572 switch (iReg)
573 {
574 case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
575 case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
576 case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
577 case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
578 case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
579 case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
580 default: AssertFailedReturnVoid();
581 }
582
583 PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
584}
585
586/**
587 * Please document me. I don't seem to be getting as much as calculating
588 * the address of some PCI region.
589 */
590DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
591{
592 return iRegion == VBOX_PCI_ROM_SLOT
593 ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
594}
595
596/**
597 * Sets the sub-system vendor id config register.
598 *
599 * @param pPciDev The PCI device.
600 * @param u16SubSysVendorId The sub-system vendor id.
601 */
602DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
603{
604 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
605}
606
607/**
608 * Gets the sub-system vendor id config register.
609 * @returns the sub-system vendor id.
610 * @param pPciDev The PCI device.
611 */
612DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PCPDMPCIDEV pPciDev)
613{
614 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
615}
616
617
618/**
619 * Sets the sub-system id config register.
620 *
621 * @param pPciDev The PCI device.
622 * @param u16SubSystemId The sub-system id.
623 */
624DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
625{
626 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
627}
628
629/**
630 * Gets the sub-system id config register.
631 * @returns the sub-system id.
632 * @param pPciDev The PCI device.
633 */
634DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PCPDMPCIDEV pPciDev)
635{
636 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
637}
638
639/**
640 * Sets offset to capability list.
641 *
642 * @param pPciDev The PCI device.
643 * @param u8Offset The offset to capability list.
644 */
645DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
646{
647 PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
648}
649
650/**
651 * Returns offset to capability list.
652 *
653 * @returns offset to capability list.
654 * @param pPciDev The PCI device.
655 */
656DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PCPDMPCIDEV pPciDev)
657{
658 return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
659}
660
661/**
662 * Sets the interrupt line config register.
663 *
664 * @param pPciDev The PCI device.
665 * @param u8Line The interrupt line.
666 */
667DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
668{
669 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
670}
671
672/**
673 * Gets the interrupt line config register.
674 *
675 * @returns The interrupt line.
676 * @param pPciDev The PCI device.
677 */
678DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PCPDMPCIDEV pPciDev)
679{
680 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
681}
682
683/**
684 * Sets the interrupt pin config register.
685 *
686 * @param pPciDev The PCI device.
687 * @param u8Pin The interrupt pin.
688 */
689DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
690{
691 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
692}
693
694/**
695 * Gets the interrupt pin config register.
696 *
697 * @returns The interrupt pin.
698 * @param pPciDev The PCI device.
699 */
700DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PCPDMPCIDEV pPciDev)
701{
702 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
703}
704
705/** @} */
706
707/** @name Aliases for old function names.
708 * @{
709 */
710#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
711# define PCIDevSetByte PDMPciDevSetByte
712# define PCIDevGetByte PDMPciDevGetByte
713# define PCIDevSetWord PDMPciDevSetWord
714# define PCIDevGetWord PDMPciDevGetWord
715# define PCIDevSetDWord PDMPciDevSetDWord
716# define PCIDevGetDWord PDMPciDevGetDWord
717# define PCIDevSetQWord PDMPciDevSetQWord
718# define PCIDevGetQWord PDMPciDevGetQWord
719# define PCIDevSetVendorId PDMPciDevSetVendorId
720# define PCIDevGetVendorId PDMPciDevGetVendorId
721# define PCIDevSetDeviceId PDMPciDevSetDeviceId
722# define PCIDevGetDeviceId PDMPciDevGetDeviceId
723# define PCIDevSetCommand PDMPciDevSetCommand
724# define PCIDevGetCommand PDMPciDevGetCommand
725# define PCIDevIsBusmaster PDMPciDevIsBusmaster
726# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
727# define PCIDevGetStatus PDMPciDevGetStatus
728# define PCIDevSetStatus PDMPciDevSetStatus
729# define PCIDevSetRevisionId PDMPciDevSetRevisionId
730# define PCIDevSetClassProg PDMPciDevSetClassProg
731# define PCIDevSetClassSub PDMPciDevSetClassSub
732# define PCIDevSetClassBase PDMPciDevSetClassBase
733# define PCIDevSetHeaderType PDMPciDevSetHeaderType
734# define PCIDevGetHeaderType PDMPciDevGetHeaderType
735# define PCIDevSetBIST PDMPciDevSetBIST
736# define PCIDevGetBIST PDMPciDevGetBIST
737# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
738# define PCIDevGetRegionReg PDMPciDevGetRegionReg
739# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
740# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
741# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
742# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
743# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
744# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
745# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
746# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
747# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
748# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
749#endif
750/** @} */
751
752
753/** @name PDMIICH9BRIDGEPDMPCIDEV_IID - Ugly 3rd party bridge/raw PCI hack.
754 *
755 * When querying this IID via IBase::pfnQueryInterface on a ICH9 bridge, you
756 * will get a pointer to a PDMPCIDEV rather pointer to an interface function
757 * table as is the custom. This was needed by some unusual 3rd-party raw and/or
758 * pass-through implementation which need to provide different PCI configuration
759 * space content for bridges (as long as we don't allow pass-through of bridges
760 * or custom bridge device implementations). So, HACK ALERT to all of this!
761 * @{ */
762#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
763typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
764typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
765/** @} */
766
767
768/** @} */
769
770#endif /* !VBOX_INCLUDED_vmm_pdmpcidev_h */
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