VirtualBox

source: vbox/trunk/include/VBox/vmm/hm.h@ 58938

Last change on this file since 58938 was 58938, checked in by vboxsync, 9 years ago

HM,DBGF: Made DBGF notify HM about changes to VMM event and interrupt breakpoints. Made HM cache the basic info wrt ring-0 loop selection, opting for using a debug loop when debugging takes place to avoid cluttering slowing down the normal execution loop. The plan is to extend the single stepping loop and to put complicated dtrace probes into the same loop. Modified the VMX loop selection already.
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File size: 9.9 KB
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1/** @file
2 * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2015 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_hm_h
27#define ___VBox_vmm_hm_h
28
29#include <VBox/vmm/pgm.h>
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/vmm.h>
32#include <iprt/mp.h>
33
34
35/** @defgroup grp_hm The Hardware Assisted Virtualization Manager API
36 * @ingroup grp_vmm
37 * @{
38 */
39
40RT_C_DECLS_BEGIN
41
42/**
43 * Checks whether HM (VT-x/AMD-V) is being used by this VM.
44 *
45 * @retval true if used.
46 * @retval false if software virtualization (raw-mode) is used.
47 *
48 * @param a_pVM The cross context VM structure.
49 * @sa HMIsEnabledNotMacro, HMR3IsEnabled
50 * @internal
51 */
52#if defined(VBOX_STRICT) && defined(IN_RING3)
53# define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
54#else
55# define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
56#endif
57
58/**
59 * Checks whether raw-mode context is required for any purpose.
60 *
61 * @retval true if required either by raw-mode itself or by HM for doing
62 * switching the cpu to 64-bit mode.
63 * @retval false if not required.
64 *
65 * @param a_pVM The cross context VM structure.
66 * @internal
67 */
68#if HC_ARCH_BITS == 64
69# define HMIsRawModeCtxNeeded(a_pVM) (!HMIsEnabled(a_pVM))
70#else
71# define HMIsRawModeCtxNeeded(a_pVM) (!HMIsEnabled(a_pVM) || (a_pVM)->fHMNeedRawModeCtx)
72#endif
73
74 /**
75 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
76 *
77 * @returns boolean
78 * @param a_pVCpu Pointer to the shared virtual CPU structure.
79 * @internal
80 */
81#define HMCanEmulateIoBlock(a_pVCpu) (!CPUMIsGuestInPagedProtectedMode(a_pVCpu))
82
83 /**
84 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
85 *
86 * @returns boolean
87 * @param a_pCtx Pointer to the CPU context (within PVM).
88 * @internal
89 */
90#define HMCanEmulateIoBlockEx(a_pCtx) (!CPUMIsGuestInPagedProtectedModeEx(a_pCtx))
91
92/**
93 * Checks whether we're in the special hardware virtualization context.
94 * @returns true / false.
95 * @param a_pVCpu The caller's cross context virtual CPU structure.
96 * @thread EMT
97 */
98#ifdef IN_RING0
99# define HMIsInHwVirtCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_HM)
100#else
101# define HMIsInHwVirtCtx(a_pVCpu) (false)
102#endif
103
104/**
105 * Checks whether we're in the special hardware virtualization context and we
106 * cannot perform long jump without guru meditating and possibly messing up the
107 * host and/or guest state.
108 *
109 * This is after we've turned interrupts off and such.
110 *
111 * @returns true / false.
112 * @param a_pVCpu The caller's cross context virtual CPU structure.
113 * @thread EMT
114 */
115#ifdef IN_RING0
116# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_EXEC)
117#else
118# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (false)
119#endif
120
121/**
122 * 64-bit raw-mode (intermediate memory context) operations.
123 *
124 * These are special hypervisor eip values used when running 64-bit guests on
125 * 32-bit hosts. Each operation corresponds to a routine.
126 *
127 * @note Duplicated in the assembly code!
128 */
129typedef enum HM64ON32OP
130{
131 HM64ON32OP_INVALID = 0,
132 HM64ON32OP_VMXRCStartVM64,
133 HM64ON32OP_SVMRCVMRun64,
134 HM64ON32OP_HMRCSaveGuestFPU64,
135 HM64ON32OP_HMRCSaveGuestDebug64,
136 HM64ON32OP_HMRCTestSwitcher64,
137 HM64ON32OP_END,
138 HM64ON32OP_32BIT_HACK = 0x7fffffff
139} HM64ON32OP;
140
141VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
142VMM_INT_DECL(int) HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
143VMM_INT_DECL(bool) HMHasPendingIrq(PVM pVM);
144VMM_INT_DECL(PX86PDPE) HMGetPaePdpes(PVMCPU pVCpu);
145VMM_INT_DECL(int) HMAmdIsSubjectToErratum170(uint32_t *pu32Family, uint32_t *pu32Model, uint32_t *pu32Stepping);
146VMM_INT_DECL(bool) HMSetSingleInstruction(PVMCPU pVCpu, bool fEnable);
147VMM_INT_DECL(void) HMHypercallsEnable(PVMCPU pVCpu);
148VMM_INT_DECL(void) HMHypercallsDisable(PVMCPU pVCpu);
149
150#ifndef IN_RC
151VMM_INT_DECL(int) HMFlushTLB(PVMCPU pVCpu);
152VMM_INT_DECL(int) HMFlushTLBOnAllVCpus(PVM pVM);
153VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
154VMM_INT_DECL(int) HMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
155VMM_INT_DECL(bool) HMIsNestedPagingActive(PVM pVM);
156VMM_INT_DECL(bool) HMAreNestedPagingAndFullGuestExecEnabled(PVM pVM);
157VMM_INT_DECL(bool) HMIsLongModeAllowed(PVM pVM);
158VMM_INT_DECL(bool) HMAreMsrBitmapsAvailable(PVM pVM);
159VMM_INT_DECL(PGMMODE) HMGetShwPagingMode(PVM pVM);
160#else /* Nops in RC: */
161# define HMFlushTLB(pVCpu) do { } while (0)
162# define HMIsNestedPagingActive(pVM) false
163# define HMAreNestedPagingAndFullGuestExecEnabled(pVM) false
164# define HMIsLongModeAllowed(pVM) false
165# define HMAreMsrBitmapsAvailable(pVM) false
166# define HMFlushTLBOnAllVCpus(pVM) do { } while (0)
167#endif
168
169#ifdef IN_RING0
170/** @defgroup grp_hm_r0 The HM ring-0 Context API
171 * @{
172 */
173VMMR0_INT_DECL(int) HMR0Init(void);
174VMMR0_INT_DECL(int) HMR0Term(void);
175VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM);
176VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM);
177VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM);
178# ifdef VBOX_WITH_RAW_MODE
179VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
180VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
181# endif
182
183VMMR0_INT_DECL(void) HMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
184 unsigned uPort, unsigned uAndVal, unsigned cbSize);
185VMMR0_INT_DECL(void) HMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
186 unsigned uPort, unsigned uAndVal, unsigned cbSize);
187VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM);
188VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
189VMMR0_INT_DECL(int) HMR0Enter(PVM pVM, PVMCPU pVCpu);
190VMMR0_INT_DECL(int) HMR0EnterCpu(PVMCPU pVCpu);
191VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPU pVCpu);
192VMMR0_INT_DECL(void) HMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser);
193VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
194
195# if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
196VMMR0_INT_DECL(int) HMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
197VMMR0_INT_DECL(int) HMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
198VMMR0_INT_DECL(int) HMR0TestSwitcher3264(PVM pVM);
199# endif
200
201VMMR0_INT_DECL(int) HMR0EnsureCompleteBasicContext(PVMCPU pVCpu, PCPUMCTX pMixedCtx);
202
203/** @} */
204#endif /* IN_RING0 */
205
206
207#ifdef IN_RING3
208/** @defgroup grp_hm_r3 The HM ring-3 Context API
209 * @{
210 */
211VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
212VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
213VMMR3DECL(bool) HMR3IsVpidActive(PUVM pUVM);
214VMMR3DECL(bool) HMR3IsUXActive(PUVM pUVM);
215VMMR3DECL(bool) HMR3IsSvmEnabled(PUVM pUVM);
216VMMR3DECL(bool) HMR3IsVmxEnabled(PUVM pUVM);
217
218VMMR3_INT_DECL(bool) HMR3IsEventPending(PVMCPU pVCpu);
219VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
220VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
221VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
222VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
223VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
224VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
225VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
226VMMR3DECL(bool) HMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
227VMMR3_INT_DECL(void) HMR3NotifyScheduled(PVMCPU pVCpu);
228VMMR3_INT_DECL(void) HMR3NotifyEmulated(PVMCPU pVCpu);
229VMMR3_INT_DECL(void) HMR3NotifyDebugEventChanged(PVM pVM);
230VMMR3_INT_DECL(void) HMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu);
231VMMR3_INT_DECL(bool) HMR3IsActive(PVMCPU pVCpu);
232VMMR3_INT_DECL(void) HMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
233VMMR3_INT_DECL(int) HMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx);
234VMMR3_INT_DECL(VBOXSTRICTRC) HMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
235VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
236VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
237VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
238VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
239VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
240
241/** @} */
242#endif /* IN_RING3 */
243
244/** @} */
245RT_C_DECLS_END
246
247
248#endif
249
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