VirtualBox

source: vbox/trunk/include/VBox/vmm/hm.h@ 45754

Last change on this file since 45754 was 45754, checked in by vboxsync, 12 years ago

HMIsInHwVirtNoLongJmpCtx

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1/** @file
2 * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2013 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_hm_h
27#define ___VBox_vmm_hm_h
28
29#include <VBox/vmm/pgm.h>
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/vmm.h>
32#include <iprt/mp.h>
33
34
35/** @defgroup grp_hm The VM Hardware Manager API
36 * @{
37 */
38
39RT_C_DECLS_BEGIN
40
41/**
42 * Checks whether HM (VT-x/AMD-V) is being used by this VM.
43 *
44 * @retval @c true if used.
45 * @retval @c false if software virtualization (raw-mode) is used.
46 *
47 * @param a_pVM The cross context VM structure.
48 * @sa HMIsEnabledNotMacro, HMR3IsEnabled
49 * @internal
50 */
51#if defined(VBOX_STRICT) && defined(IN_RING3)
52# define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
53#else
54# define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
55#endif
56
57/**
58 * Checks whether raw-mode context is required for any purpose.
59 *
60 * @retval @c true if required either by raw-mode itself or by HM for doing
61 * switching the cpu to 64-bit mode.
62 * @retval @c false if not required.
63 *
64 * @param a_pVM The cross context VM structure.
65 * @internal
66 */
67#if HC_ARCH_BITS == 64
68# define HMIsRawModeCtxNeeded(a_pVM) (!HMIsEnabled(a_pVM))
69#else
70# define HMIsRawModeCtxNeeded(a_pVM) (!HMIsEnabled(a_pVM) || (a_pVM)->fHMNeedRawModeCtx)
71#endif
72
73 /**
74 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
75 *
76 * @returns boolean
77 * @param a_pVCpu Pointer to the shared virtual CPU structure.
78 * @internal
79 */
80#define HMCanEmulateIoBlock(a_pVCpu) (!CPUMIsGuestInPagedProtectedMode(a_pVCpu))
81
82 /**
83 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
84 *
85 * @returns boolean
86 * @param a_pCtx Pointer to the CPU context (within PVM).
87 * @internal
88 */
89#define HMCanEmulateIoBlockEx(a_pCtx) (!CPUMIsGuestInPagedProtectedModeEx(a_pCtx))
90
91/**
92 * Checks whether we're in the special hardware virtualization context.
93 * @returns true / false.
94 * @param a_pVCpu The caller's cross context virtual CPU structure.
95 * @thread EMT
96 */
97#ifdef IN_RING0
98# define HMIsInHwVirtCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_HM)
99#else
100# define HMIsInHwVirtCtx(a_pVCpu) (false)
101#endif
102
103/**
104 * Checks whether we're in the special hardware virtualization context and we
105 * cannot perform long jump without guru meditating and possibly messing up the
106 * host and/or guest state.
107 *
108 * This is after we've turned interrupts off and such.
109 *
110 * @returns true / false.
111 * @param a_pVCpu The caller's cross context virtual CPU structure.
112 * @thread EMT
113 */
114#ifdef IN_RING0
115# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_EXEC)
116#else
117# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (false)
118#endif
119
120
121VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
122VMM_INT_DECL(int) HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
123VMM_INT_DECL(bool) HMHasPendingIrq(PVM pVM);
124VMM_INT_DECL(PX86PDPE) HMGetPaePdpes(PVMCPU pVCpu);
125
126#ifndef IN_RC
127VMM_INT_DECL(int) HMFlushTLB(PVMCPU pVCpu);
128VMM_INT_DECL(int) HMFlushTLBOnAllVCpus(PVM pVM);
129VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
130VMM_INT_DECL(int) HMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
131VMM_INT_DECL(bool) HMIsNestedPagingActive(PVM pVM);
132VMM_INT_DECL(PGMMODE) HMGetShwPagingMode(PVM pVM);
133#else /* Nops in RC: */
134# define HMFlushTLB(pVCpu) do { } while (0)
135# define HMIsNestedPagingActive(pVM) false
136# define HMFlushTLBOnAllVCpus(pVM) do { } while (0)
137#endif
138
139#ifdef IN_RING0
140/** @defgroup grp_hm_r0 The VM Hardware Manager API
141 * @ingroup grp_hm
142 * @{
143 */
144VMMR0_INT_DECL(int) HMR0Init(void);
145VMMR0_INT_DECL(int) HMR0Term(void);
146VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM);
147VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM);
148VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM);
149VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
150VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
151
152VMMR0_INT_DECL(void) HMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
153 unsigned uPort, unsigned uAndVal, unsigned cbSize);
154VMMR0_INT_DECL(void) HMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
155 unsigned uPort, unsigned uAndVal, unsigned cbSize);
156
157/** @} */
158#endif /* IN_RING0 */
159
160
161#ifdef IN_RING3
162/** @defgroup grp_hm_r3 The VM Hardware Manager API
163 * @ingroup grp_hm
164 * @{
165 */
166VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
167VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
168VMMR3DECL(bool) HMR3IsVpidActive(PUVM pVUM);
169
170VMMR3_INT_DECL(bool) HMR3IsEventPending(PVMCPU pVCpu);
171VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
172VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
173VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
174VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
175VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
176VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
177VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
178VMMR3DECL(bool) HMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
179VMMR3_INT_DECL(void) HMR3NotifyScheduled(PVMCPU pVCpu);
180VMMR3_INT_DECL(void) HMR3NotifyEmulated(PVMCPU pVCpu);
181VMMR3_INT_DECL(bool) HMR3IsActive(PVMCPU pVCpu);
182VMMR3_INT_DECL(void) HMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
183VMMR3_INT_DECL(int) HMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx);
184VMMR3_INT_DECL(VBOXSTRICTRC) HMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
185VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
186VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
187VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
188VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
189VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
190
191/** @} */
192#endif /* IN_RING3 */
193
194#ifdef IN_RING0
195/** @addtogroup grp_hm_r0
196 * @{
197 */
198VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM);
199VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
200VMMR0_INT_DECL(int) HMR0Enter(PVM pVM, PVMCPU pVCpu);
201VMMR0_INT_DECL(int) HMR0Leave(PVM pVM, PVMCPU pVCpu);
202VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
203
204# if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
205VMMR0_INT_DECL(int) HMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
206VMMR0_INT_DECL(int) HMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
207VMMR0_INT_DECL(int) HMR0TestSwitcher3264(PVM pVM);
208# endif
209
210/** @} */
211#endif /* IN_RING0 */
212
213
214/** @} */
215RT_C_DECLS_END
216
217
218#endif
219
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