| [35361] | 1 | /** @file
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| [44373] | 2 | * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
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| [35361] | 3 | */
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| 4 |
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| 5 | /*
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| [98103] | 6 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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| [35361] | 7 | *
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| [96407] | 8 | * This file is part of VirtualBox base platform packages, as
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| 9 | * available from https://www.virtualbox.org.
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| [35361] | 10 | *
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| [96407] | 11 | * This program is free software; you can redistribute it and/or
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| 12 | * modify it under the terms of the GNU General Public License
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| 13 | * as published by the Free Software Foundation, in version 3 of the
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| 14 | * License.
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| 15 | *
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| 16 | * This program is distributed in the hope that it will be useful, but
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| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 19 | * General Public License for more details.
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| 20 | *
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| 21 | * You should have received a copy of the GNU General Public License
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| 22 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 23 | *
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| [35361] | 24 | * The contents of this file may alternatively be used under the terms
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| 25 | * of the Common Development and Distribution License Version 1.0
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| [96407] | 26 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 27 | * in the VirtualBox distribution, in which case the provisions of the
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| [35361] | 28 | * CDDL are applicable instead of those of the GPL.
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| 29 | *
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| 30 | * You may elect to license modified versions of this file under the
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| 31 | * terms and conditions of either the GPL or the CDDL or both.
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| [96407] | 32 | *
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| 33 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| [35361] | 34 | */
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| 35 |
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| [76558] | 36 | #ifndef VBOX_INCLUDED_vmm_hm_h
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| 37 | #define VBOX_INCLUDED_vmm_hm_h
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| [76507] | 38 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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| 39 | # pragma once
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| 40 | #endif
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| [35361] | 41 |
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| 42 | #include <VBox/vmm/pgm.h>
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| 43 | #include <VBox/vmm/cpum.h>
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| [43387] | 44 | #include <VBox/vmm/vmm.h>
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| [66022] | 45 | #include <VBox/vmm/hm_svm.h>
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| [73389] | 46 | #include <VBox/vmm/hm_vmx.h>
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| [67529] | 47 | #include <VBox/vmm/trpm.h>
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| [35361] | 48 | #include <iprt/mp.h>
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| 49 |
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| 50 |
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| [58110] | 51 | /** @defgroup grp_hm The Hardware Assisted Virtualization Manager API
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| 52 | * @ingroup grp_vmm
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| [35361] | 53 | * @{
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| 54 | */
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| 55 |
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| 56 | RT_C_DECLS_BEGIN
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| 57 |
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| 58 | /**
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| [45701] | 59 | * Checks whether HM (VT-x/AMD-V) is being used by this VM.
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| [35361] | 60 | *
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| [58106] | 61 | * @retval true if used.
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| [70948] | 62 | * @retval false if software virtualization (raw-mode) or NEM is used.
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| [45701] | 63 | *
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| 64 | * @param a_pVM The cross context VM structure.
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| [70977] | 65 | * @deprecated Please use VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED, or
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| 66 | * VM_IS_HM_ENABLED instead.
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| [44373] | 67 | * @internal
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| [35361] | 68 | */
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| [45618] | 69 | #if defined(VBOX_STRICT) && defined(IN_RING3)
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| [48565] | 70 | # define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
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| [45618] | 71 | #else
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| [48565] | 72 | # define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
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| [45618] | 73 | #endif
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| [35361] | 74 |
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| [45701] | 75 | /**
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| [73322] | 76 | * Checks whether raw-mode context is required for HM purposes
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| [45701] | 77 | *
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| [73322] | 78 | * @retval true if required by HM for doing switching the cpu to 64-bit mode.
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| 79 | * @retval false if not required by HM.
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| [45701] | 80 | *
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| 81 | * @param a_pVM The cross context VM structure.
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| 82 | * @internal
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| 83 | */
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| 84 | #if HC_ARCH_BITS == 64
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| [73322] | 85 | # define HMIsRawModeCtxNeeded(a_pVM) (false)
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| [45701] | 86 | #else
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| [73322] | 87 | # define HMIsRawModeCtxNeeded(a_pVM) ((a_pVM)->fHMNeedRawModeCtx)
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| [45701] | 88 | #endif
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| 89 |
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| [45749] | 90 | /**
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| 91 | * Checks whether we're in the special hardware virtualization context.
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| 92 | * @returns true / false.
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| 93 | * @param a_pVCpu The caller's cross context virtual CPU structure.
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| 94 | * @thread EMT
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| 95 | */
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| 96 | #ifdef IN_RING0
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| [48565] | 97 | # define HMIsInHwVirtCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_HM)
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| [45749] | 98 | #else
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| [48565] | 99 | # define HMIsInHwVirtCtx(a_pVCpu) (false)
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| [45749] | 100 | #endif
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| 101 |
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| [45754] | 102 | /**
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| 103 | * Checks whether we're in the special hardware virtualization context and we
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| 104 | * cannot perform long jump without guru meditating and possibly messing up the
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| 105 | * host and/or guest state.
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| 106 | *
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| 107 | * This is after we've turned interrupts off and such.
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| 108 | *
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| 109 | * @returns true / false.
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| 110 | * @param a_pVCpu The caller's cross context virtual CPU structure.
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| 111 | * @thread EMT
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| 112 | */
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| 113 | #ifdef IN_RING0
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| 114 | # define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_EXEC)
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| 115 | #else
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| 116 | # define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (false)
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| 117 | #endif
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| [45749] | 118 |
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| [67529] | 119 | /** @name All-context HM API.
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| 120 | * @{ */
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| [45618] | 121 | VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
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| [80281] | 122 | VMMDECL(bool) HMCanExecuteGuest(PVMCC pVM, PVMCPUCC pVCpu, PCCPUMCTX pCtx);
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| 123 | VMM_INT_DECL(int) HMInvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt);
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| 124 | VMM_INT_DECL(bool) HMHasPendingIrq(PVMCC pVM);
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| [80268] | 125 | VMM_INT_DECL(bool) HMSetSingleInstruction(PVMCC pVM, PVMCPUCC pVCpu, bool fEnable);
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| [73246] | 126 | VMM_INT_DECL(bool) HMIsSvmActive(PVM pVM);
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| 127 | VMM_INT_DECL(bool) HMIsVmxActive(PVM pVM);
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| [76993] | 128 | VMM_INT_DECL(const char *) HMGetVmxDiagDesc(VMXVDIAG enmDiag);
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| 129 | VMM_INT_DECL(const char *) HMGetVmxExitName(uint32_t uExit);
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| 130 | VMM_INT_DECL(const char *) HMGetSvmExitName(uint32_t uExit);
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| 131 | VMM_INT_DECL(void) HMDumpHwvirtVmxState(PVMCPU pVCpu);
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| [87488] | 132 | VMM_INT_DECL(void) HMHCChangedPagingMode(PVM pVM, PVMCPUCC pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
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| [76993] | 133 | VMM_INT_DECL(void) HMGetVmxMsrsFromHwvirtMsrs(PCSUPHWVIRTMSRS pMsrs, PVMXMSRS pVmxMsrs);
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| 134 | VMM_INT_DECL(void) HMGetSvmMsrsFromHwvirtMsrs(PCSUPHWVIRTMSRS pMsrs, PSVMMSRS pSvmMsrs);
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| [73606] | 135 | /** @} */
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| 136 |
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| 137 | /** @name All-context VMX helpers.
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| [75440] | 138 | *
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| 139 | * These are hardware-assisted VMX functions (used by IEM/REM/CPUM and HM). Helpers
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| 140 | * based purely on the Intel VT-x specification (used by IEM/REM and HM) can be
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| 141 | * found in CPUM.
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| [73606] | 142 | * @{ */
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| [93725] | 143 | #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
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| [81733] | 144 | VMM_INT_DECL(bool) HMIsSubjectToVmxPreemptTimerErratum(void);
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| [93725] | 145 | #endif
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| [80281] | 146 | VMM_INT_DECL(bool) HMCanExecuteVmxGuest(PVMCC pVM, PVMCPUCC pVCpu, PCCPUMCTX pCtx);
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| [79637] | 147 | VMM_INT_DECL(TRPMEVENT) HMVmxEventTypeToTrpmEventType(uint32_t uIntInfo);
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| [81002] | 148 | VMM_INT_DECL(uint32_t) HMTrpmEventTypeToVmxEventType(uint8_t uVector, TRPMEVENT enmTrpmEvent, bool fIcebp);
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| [67529] | 149 | /** @} */
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| [44373] | 150 |
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| [67529] | 151 | /** @name All-context SVM helpers.
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| [70462] | 152 | *
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| [75440] | 153 | * These are hardware-assisted SVM functions (used by IEM/REM/CPUM and HM). Helpers
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| 154 | * based purely on the AMD SVM specification (used by IEM/REM and HM) can be found
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| 155 | * in CPUM.
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| [67529] | 156 | * @{ */
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| [77902] | 157 | VMM_INT_DECL(TRPMEVENT) HMSvmEventToTrpmEventType(PCSVMEVENT pSvmEvent, uint8_t uVector);
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| [67529] | 158 | /** @} */
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| 159 |
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| [35361] | 160 | #ifndef IN_RC
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| [74287] | 161 |
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| 162 | /** @name R0, R3 HM (VMX/SVM agnostic) handlers.
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| 163 | * @{ */
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| [76993] | 164 | VMM_INT_DECL(int) HMFlushTlb(PVMCPU pVCpu);
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| [80268] | 165 | VMM_INT_DECL(int) HMFlushTlbOnAllVCpus(PVMCC pVM);
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| [80281] | 166 | VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVMCC pVM, RTGCPTR GCVirt);
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| [80268] | 167 | VMM_INT_DECL(int) HMInvalidatePhysPage(PVMCC pVM, RTGCPHYS GCPhys);
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| [87515] | 168 | VMM_INT_DECL(bool) HMAreNestedPagingAndFullGuestExecEnabled(PVMCC pVM);
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| [87518] | 169 | VMM_INT_DECL(bool) HMIsLongModeAllowed(PVMCC pVM);
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| [87515] | 170 | VMM_INT_DECL(bool) HMIsNestedPagingActive(PVMCC pVM);
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| [73389] | 171 | VMM_INT_DECL(bool) HMIsMsrBitmapActive(PVM pVM);
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| [79345] | 172 | # ifdef VBOX_WITH_NESTED_HWVIRT_VMX
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| 173 | VMM_INT_DECL(void) HMNotifyVmxNstGstVmexit(PVMCPU pVCpu);
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| 174 | VMM_INT_DECL(void) HMNotifyVmxNstGstCurrentVmcsChanged(PVMCPU pVCpu);
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| [78220] | 175 | # endif
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| [74287] | 176 | /** @} */
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| 177 |
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| 178 | /** @name R0, R3 SVM handlers.
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| 179 | * @{ */
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| [87511] | 180 | VMM_INT_DECL(bool) HMIsSvmVGifActive(PCVMCC pVM);
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| [72746] | 181 | # ifdef VBOX_WITH_NESTED_HWVIRT_SVM
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| [80281] | 182 | VMM_INT_DECL(void) HMNotifySvmNstGstVmexit(PVMCPUCC pVCpu, PCPUMCTX pCtx);
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| [72746] | 183 | # endif
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| [93725] | 184 | # if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
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| [76993] | 185 | VMM_INT_DECL(int) HMIsSubjectToSvmErratum170(uint32_t *pu32Family, uint32_t *pu32Model, uint32_t *pu32Stepping);
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| [93725] | 186 | # endif
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| [80268] | 187 | VMM_INT_DECL(int) HMHCMaybeMovTprSvmHypercall(PVMCC pVM, PVMCPUCC pVCpu);
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| [74287] | 188 | /** @} */
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| 189 |
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| [44373] | 190 | #else /* Nops in RC: */
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| [74287] | 191 |
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| 192 | /** @name RC HM (VMX/SVM agnostic) handlers.
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| 193 | * @{ */
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| [76993] | 194 | # define HMFlushTlb(pVCpu) do { } while (0)
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| 195 | # define HMFlushTlbOnAllVCpus(pVM) do { } while (0)
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| [73606] | 196 | # define HMInvalidatePageOnAllVCpus(pVM, GCVirt) do { } while (0)
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| 197 | # define HMInvalidatePhysPage(pVM, GCVirt) do { } while (0)
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| 198 | # define HMAreNestedPagingAndFullGuestExecEnabled(pVM) false
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| 199 | # define HMIsLongModeAllowed(pVM) false
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| 200 | # define HMIsNestedPagingActive(pVM) false
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| 201 | # define HMIsMsrBitmapsActive(pVM) false
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| [74287] | 202 | /** @} */
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| 203 |
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| 204 | /** @name RC SVM handlers.
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| 205 | * @{ */
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| [76993] | 206 | # define HMIsSvmVGifActive(pVM) false
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| 207 | # define HMNotifySvmNstGstVmexit(pVCpu, pCtx) do { } while (0)
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| [93725] | 208 | # if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
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| 209 | # define HMIsSubjectToSvmErratum170(puFamily, puModel, puStepping) false
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| 210 | # endif
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| [80268] | 211 | # define HMHCMaybeMovTprSvmHypercall(pVM, pVCpu) do { } while (0)
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| [74287] | 212 | /** @} */
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| 213 |
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| [35361] | 214 | #endif
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| 215 |
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| [93963] | 216 | /** @name HMVMX_READ_XXX - Flags for reading auxiliary VM-exit VMCS fields.
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| 217 | *
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| 218 | * These flags allow reading VMCS fields that are not necessarily part of the
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| 219 | * guest-CPU state but are needed while handling VM-exits.
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| 220 | *
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| 221 | * @note If you add any fields here, make sure to update VMXR0GetExitAuxInfo.
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| 222 | *
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| 223 | * @{
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| 224 | */
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| 225 | #define HMVMX_READ_IDT_VECTORING_INFO RT_BIT_32(0)
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| 226 | #define HMVMX_READ_IDT_VECTORING_ERROR_CODE RT_BIT_32(1)
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| 227 | #define HMVMX_READ_EXIT_QUALIFICATION RT_BIT_32(2)
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| 228 | #define HMVMX_READ_EXIT_INSTR_LEN RT_BIT_32(3)
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| 229 | #define HMVMX_READ_EXIT_INTERRUPTION_INFO RT_BIT_32(4)
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| 230 | #define HMVMX_READ_EXIT_INTERRUPTION_ERROR_CODE RT_BIT_32(5)
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| 231 | #define HMVMX_READ_EXIT_INSTR_INFO RT_BIT_32(6)
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| 232 | #define HMVMX_READ_GUEST_LINEAR_ADDR RT_BIT_32(7)
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| 233 | #define HMVMX_READ_GUEST_PHYSICAL_ADDR RT_BIT_32(8)
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| 234 | #define HMVMX_READ_GUEST_PENDING_DBG_XCPTS RT_BIT_32(9)
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| 235 |
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| 236 | /** All the VMCS fields required for processing of exception/NMI VM-exits. */
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| 237 | #define HMVMX_READ_XCPT_INFO ( HMVMX_READ_EXIT_INTERRUPTION_INFO \
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| 238 | | HMVMX_READ_EXIT_INTERRUPTION_ERROR_CODE \
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| 239 | | HMVMX_READ_EXIT_INSTR_LEN \
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| 240 | | HMVMX_READ_IDT_VECTORING_INFO \
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| 241 | | HMVMX_READ_IDT_VECTORING_ERROR_CODE)
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| 242 |
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| 243 | /** Mask of all valid HMVMX_READ_XXX flags. */
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| 244 | #define HMVMX_READ_VALID_MASK ( HMVMX_READ_IDT_VECTORING_INFO \
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| 245 | | HMVMX_READ_IDT_VECTORING_ERROR_CODE \
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| 246 | | HMVMX_READ_EXIT_QUALIFICATION \
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| 247 | | HMVMX_READ_EXIT_INSTR_LEN \
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| 248 | | HMVMX_READ_EXIT_INTERRUPTION_INFO \
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| 249 | | HMVMX_READ_EXIT_INTERRUPTION_ERROR_CODE \
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| 250 | | HMVMX_READ_EXIT_INSTR_INFO \
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| 251 | | HMVMX_READ_GUEST_LINEAR_ADDR \
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| 252 | | HMVMX_READ_GUEST_PHYSICAL_ADDR \
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| 253 | | HMVMX_READ_GUEST_PENDING_DBG_XCPTS)
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| 254 | /** @} */
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| 255 |
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| [93966] | 256 | #ifdef IN_RING0
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| 257 | /** @defgroup grp_hm_r0 The HM ring-0 Context API
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| 258 | * @{
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| 259 | */
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| [93963] | 260 | /**
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| 261 | * HM VM-exit auxiliary info.
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| 262 | */
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| 263 | typedef union
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| 264 | {
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| 265 | /** VMX VM-exit auxiliary info. */
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| 266 | VMXEXITAUX Vmx;
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| 267 | /** SVM \#VMEXIT auxiliary info. */
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| 268 | SVMEXITAUX Svm;
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| 269 | } HMEXITAUX;
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| 270 | /** Pointer to HM-exit auxiliary info union. */
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| 271 | typedef HMEXITAUX *PHMEXITAUX;
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| 272 | /** Pointer to a const HM-exit auxiliary info union. */
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| 273 | typedef const HMEXITAUX *PCHMEXITAUX;
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| 274 |
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| [44373] | 275 | VMMR0_INT_DECL(int) HMR0Init(void);
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| 276 | VMMR0_INT_DECL(int) HMR0Term(void);
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| [80281] | 277 | VMMR0_INT_DECL(int) HMR0InitVM(PVMCC pVM);
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| 278 | VMMR0_INT_DECL(int) HMR0TermVM(PVMCC pVM);
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| 279 | VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVMCC pVM);
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| [56381] | 280 | # ifdef VBOX_WITH_RAW_MODE
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| [80281] | 281 | VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVMCC pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
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| 282 | VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVMCC pVM, bool fVTxDisabled);
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| [56381] | 283 | # endif
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| [35361] | 284 |
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| [80281] | 285 | VMMR0_INT_DECL(int) HMR0SetupVM(PVMCC pVM);
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| 286 | VMMR0_INT_DECL(int) HMR0RunGuestCode(PVMCC pVM, PVMCPUCC pVCpu);
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| 287 | VMMR0_INT_DECL(int) HMR0Enter(PVMCPUCC pVCpu);
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| 288 | VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPUCC pVCpu);
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| [53615] | 289 | VMMR0_INT_DECL(void) HMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser);
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| [80281] | 290 | VMMR0_INT_DECL(void) HMR0NotifyCpumUnloadedGuestFpuState(PVMCPUCC VCpu);
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| 291 | VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPUCC VCpu);
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| [53615] | 292 | VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
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| [80281] | 293 | VMMR0_INT_DECL(int) HMR0InvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt);
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| 294 | VMMR0_INT_DECL(int) HMR0ImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat);
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| [93963] | 295 | VMMR0_INT_DECL(int) HMR0GetExitAuxInfo(PVMCPUCC pVCpu, PHMEXITAUX pHmExitAux, uint32_t fWhat);
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| [35361] | 296 | /** @} */
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| 297 | #endif /* IN_RING0 */
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| 298 |
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| 299 |
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| 300 | #ifdef IN_RING3
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| [58110] | 301 | /** @defgroup grp_hm_r3 The HM ring-3 Context API
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| [35361] | 302 | * @{
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| 303 | */
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| [44373] | 304 | VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
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| 305 | VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
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| [87519] | 306 | VMMR3DECL(bool) HMR3AreVirtApicRegsEnabled(PUVM pUVM);
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| [60307] | 307 | VMMR3DECL(bool) HMR3IsPostedIntrsEnabled(PUVM pUVM);
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| [52419] | 308 | VMMR3DECL(bool) HMR3IsVpidActive(PUVM pUVM);
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| 309 | VMMR3DECL(bool) HMR3IsUXActive(PUVM pUVM);
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| [47737] | 310 | VMMR3DECL(bool) HMR3IsSvmEnabled(PUVM pUVM);
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| 311 | VMMR3DECL(bool) HMR3IsVmxEnabled(PUVM pUVM);
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| [35361] | 312 |
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| [44373] | 313 | VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
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| 314 | VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
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| 315 | VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
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| 316 | VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
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| 317 | VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
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| 318 | VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
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| 319 | VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
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| [58938] | 320 | VMMR3_INT_DECL(void) HMR3NotifyDebugEventChanged(PVM pVM);
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| 321 | VMMR3_INT_DECL(void) HMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu);
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| [100140] | 322 | # if 0 /* evil */
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| [78254] | 323 | VMMR3_INT_DECL(bool) HMR3IsActive(PCVMCPU pVCpu);
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| [100140] | 324 | # endif
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| [44373] | 325 | VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
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| 326 | VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
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| [72983] | 327 | VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu);
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| [78254] | 328 | VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCCPUMCTX pCtx);
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| [44373] | 329 | VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
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| [35361] | 330 | /** @} */
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| 331 | #endif /* IN_RING3 */
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| 332 |
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| 333 | /** @} */
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| 334 | RT_C_DECLS_END
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| 335 |
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| 336 |
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| [76585] | 337 | #endif /* !VBOX_INCLUDED_vmm_hm_h */
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| [35361] | 338 |
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