VirtualBox

source: vbox/trunk/include/VBox/vm.h@ 21217

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1/** @file
2 * VM - The Virtual Machine, data. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_vm_h
31#define ___VBox_vm_h
32
33#include <VBox/cdefs.h>
34#include <VBox/types.h>
35#include <VBox/cpum.h>
36#include <VBox/stam.h>
37#include <VBox/vmapi.h>
38#include <VBox/sup.h>
39#include <VBox/vmm.h>
40
41
42/** @defgroup grp_vm The Virtual Machine
43 * @{
44 */
45
46/**
47 * The state of a Virtual CPU.
48 *
49 * The basic state indicated here is whether the CPU has been started or not. In
50 * addition, there are sub-states when started for assisting scheduling (GVMM
51 * mostly).
52 *
53 * The transision out of the STOPPED state is done by a vmR3PowerOn.
54 * The transision back to the STOPPED state is done by vmR3PowerOff.
55 *
56 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
57 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
58 */
59typedef enum VMCPUSTATE
60{
61 /** The customary invalid zero. */
62 VMCPUSTATE_INVALID = 0,
63
64 /** Virtual CPU has not yet been started. */
65 VMCPUSTATE_STOPPED,
66
67 /** CPU started. */
68 VMCPUSTATE_STARTED,
69 /** Executing guest code and can be poked. */
70 VMCPUSTATE_STARTED_EXEC,
71 /** Executing guest code in the recompiler. */
72 VMCPUSTATE_STARTED_EXEC_REM,
73 /** Halted. */
74 VMCPUSTATE_STARTED_HALTED,
75
76 /** The end of valid virtual CPU states. */
77 VMCPUSTATE_END,
78
79 /** Ensure 32-bit type. */
80 VMCPUSTATE_32BIT_HACK = 0x7fffffff
81} VMCPUSTATE;
82
83
84/**
85 * Per virtual CPU data.
86 */
87typedef struct VMCPU
88{
89 /** Per CPU forced action.
90 * See the VMCPU_FF_* \#defines. Updated atomically. */
91 uint32_t volatile fLocalForcedActions;
92 /** The CPU state. */
93 VMCPUSTATE volatile enmState;
94
95 /** Pointer to the ring-3 UVMCPU structure. */
96 PUVMCPU pUVCpu;
97 /** Ring-3 Host Context VM Pointer. */
98 PVMR3 pVMR3;
99 /** Ring-0 Host Context VM Pointer. */
100 PVMR0 pVMR0;
101 /** Raw-mode Context VM Pointer. */
102 PVMRC pVMRC;
103 /** The CPU ID.
104 * This is the index into the VM::aCpu array. */
105 VMCPUID idCpu;
106 /** The native thread handle. */
107 RTNATIVETHREAD hNativeThread;
108 /** Which host CPU ID is this EMT running on.
109 * Only valid when in RC or HWACCMR0 with scheduling disabled. */
110 RTCPUID volatile idHostCpu;
111
112 /** Align the next bit on a 64-byte boundary.
113 *
114 * @remarks The aligments of the members that are larger than 48 bytes should be
115 * 64-byte for cache line reasons. structs containing small amounts of
116 * data could be lumped together at the end with a < 64 byte padding
117 * following it (to grow into and align the struct size).
118 * */
119 uint32_t au32Alignment[HC_ARCH_BITS == 32 ? 7 : 3];
120
121 /** CPUM part. */
122 union
123 {
124#ifdef ___CPUMInternal_h
125 struct CPUMCPU s;
126#endif
127 char padding[4096]; /* multiple of 64 */
128 } cpum;
129
130 /** PGM part. */
131 union
132 {
133#ifdef ___PGMInternal_h
134 struct PGMCPU s;
135#endif
136 char padding[32*1024]; /* multiple of 64 */
137 } pgm;
138
139 /** HWACCM part. */
140 union
141 {
142#ifdef ___HWACCMInternal_h
143 struct HWACCMCPU s;
144#endif
145 char padding[5120]; /* multiple of 64 */
146 } hwaccm;
147
148 /** EM part. */
149 union
150 {
151#ifdef ___EMInternal_h
152 struct EMCPU s;
153#endif
154 char padding[2048]; /* multiple of 64 */
155 } em;
156
157 /** TRPM part. */
158 union
159 {
160#ifdef ___TRPMInternal_h
161 struct TRPMCPU s;
162#endif
163 char padding[128]; /* multiple of 64 */
164 } trpm;
165
166 /** TM part. */
167 union
168 {
169#ifdef ___TMInternal_h
170 struct TMCPU s;
171#endif
172 char padding[64]; /* multiple of 64 */
173 } tm;
174
175 /** VMM part. */
176 union
177 {
178#ifdef ___VMMInternal_h
179 struct VMMCPU s;
180#endif
181 char padding[384]; /* multiple of 64 */
182 } vmm;
183
184 /** PDM part. */
185 union
186 {
187#ifdef ___PDMInternal_h
188 struct PDMCPU s;
189#endif
190 char padding[128]; /* multiple of 64 */
191 } pdm;
192
193 /** IOM part. */
194 union
195 {
196#ifdef ___IOMInternal_h
197 struct IOMCPU s;
198#endif
199 char padding[512]; /* multiple of 64 */
200 } iom;
201
202 /** DBGF part.
203 * @todo Combine this with other tiny structures. */
204 union
205 {
206#ifdef ___DBGFInternal_h
207 struct DBGFCPU s;
208#endif
209 uint8_t padding[64]; /* multiple of 64 */
210 } dbgf;
211
212} VMCPU;
213
214
215/** @name Operations on VMCPU::enmState
216 * @{ */
217/** Gets the VMCPU state. */
218#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
219/** Sets the VMCPU state. */
220#define VMCPU_SET_STATE(pVCpu, enmNewState) \
221 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
222/** Cmpares and sets the VMCPU state. */
223#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
224 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
225/** Checks the VMCPU state. */
226#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
227 do { \
228 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
229 AssertMsg(enmState == (enmExpectedState), \
230 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
231 enmState, enmExpectedState, (pVCpu)->idCpu)); \
232 } while (0)
233/** Tests if the state means that the CPU is started. */
234#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
235/** Tests if the state means that the CPU is stopped. */
236#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
237/** @} */
238
239
240/** The name of the Guest Context VMM Core module. */
241#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
242/** The name of the Ring 0 Context VMM Core module. */
243#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
244
245/** VM Forced Action Flags.
246 *
247 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
248 * action mask of a VM.
249 *
250 * @{
251 */
252/** The virtual sync clock has been stopped, go to TM until it has been
253 * restarted... */
254#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
255/** PDM Queues are pending. */
256#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
257/** The bit number for VM_FF_PDM_QUEUES. */
258#define VM_FF_PDM_QUEUES_BIT 3
259/** PDM DMA transfers are pending. */
260#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
261/** The bit number for VM_FF_PDM_DMA. */
262#define VM_FF_PDM_DMA_BIT 4
263/** This action forces the VM to call DBGF so DBGF can service debugger
264 * requests in the emulation thread.
265 * This action flag stays asserted till DBGF clears it.*/
266#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
267/** The bit number for VM_FF_DBGF. */
268#define VM_FF_DBGF_BIT 8
269/** This action forces the VM to service pending requests from other
270 * thread or requests which must be executed in another context. */
271#define VM_FF_REQUEST RT_BIT_32(9)
272/** Terminate the VM immediately. */
273#define VM_FF_TERMINATE RT_BIT_32(10)
274/** Reset the VM. (postponed) */
275#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
276/** The bit number for VM_FF_RESET. */
277#define VM_FF_RESET_BIT 11
278/** EMT rendezvous in VMM. */
279#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
280#define VM_FF_EMT_RENDEZVOUS_BIT 12
281
282/** PGM needs to allocate handy pages. */
283#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
284/** PGM is out of memory.
285 * Abandon all loops and code paths which can be resumed and get up to the EM
286 * loops. */
287#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
288/** REM needs to be informed about handler changes. */
289#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
290/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
291#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
292/** Suspend the VM - debug only. */
293#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
294
295
296/** This action forces the VM to check any pending interrups on the APIC. */
297#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
298/** This action forces the VM to check any pending interrups on the PIC. */
299#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
300/** This action forces the VM to schedule and run pending timer (TM).
301 * @remarks Don't move - PATM compatability. */
302#define VMCPU_FF_TIMER RT_BIT_32(2)
303/** This action forces the VM to check any pending NMIs. */
304#define VMCPU_FF_INTERRUPT_NMI_BIT 3
305#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
306/** This action forces the VM to check any pending SMIs. */
307#define VMCPU_FF_INTERRUPT_SMI_BIT 4
308#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
309/** PDM critical section unlocking is pending, process promptly upon return to R3. */
310#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
311/** This action forces the VM to service pending requests from other
312 * thread or requests which must be executed in another context. */
313#define VMCPU_FF_REQUEST RT_BIT_32(9)
314/** This action forces the VM to resync the page tables before going
315 * back to execute guest code. (GLOBAL FLUSH) */
316#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
317/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
318 * (NON-GLOBAL FLUSH) */
319#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
320/** Check for pending TLB shootdown actions. */
321#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
322/** Check for pending TLB flush action. */
323#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
324/** The bit number for VMCPU_FF_TLB_FLUSH. */
325#define VMCPU_FF_TLB_FLUSH_BIT 19
326/** Check the interupt and trap gates */
327#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
328/** Check Guest's TSS ring 0 stack */
329#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
330/** Check Guest's GDT table */
331#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
332/** Check Guest's LDT table */
333#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
334/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
335#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
336/** CSAM needs to scan the page that's being executed */
337#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
338/** CSAM needs to do some homework. */
339#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
340/** Force return to Ring-3. */
341#define VMCPU_FF_TO_R3 RT_BIT_32(28)
342
343/** Externally VM forced actions. Used to quit the idle/wait loop. */
344#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS)
345/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
346#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
347
348/** Externally forced VM actions. Used to quit the idle/wait loop. */
349#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS)
350/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
351#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST | VMCPU_FF_TIMER)
352
353/** High priority VM pre-execution actions. */
354#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC | VM_FF_DEBUG_SUSPEND \
355 | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
356/** High priority VMCPU pre-execution actions. */
357#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 \
358 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
359 | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
360
361/** High priority VM pre raw-mode execution mask. */
362#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
363/** High priority VMCPU pre raw-mode execution mask. */
364#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
365 | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
366
367/** High priority post-execution actions. */
368#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
369/** High priority post-execution actions. */
370#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT|VMCPU_FF_CSAM_PENDING_ACTION)
371
372/** Normal priority VM post-execution actions. */
373#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_RESET | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
374/** Normal priority VMCPU post-execution actions. */
375#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
376
377/** Normal priority VM actions. */
378#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY | VM_FF_EMT_RENDEZVOUS)
379/** Normal priority VMCPU actions. */
380#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
381
382/** Flags to clear before resuming guest execution. */
383#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
384
385/** VM Flags that cause the HWACCM loops to go back to ring-3. */
386#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_PDM_QUEUES)
387/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
388#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER)
389
390/** All the forced VM flags. */
391#define VM_FF_ALL_MASK (~0U)
392/** All the forced VMCPU flags. */
393#define VMCPU_FF_ALL_MASK (~0U)
394
395/** All the forced VM flags. */
396#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NO_MEMORY)
397/** All the forced VMCPU flags. */
398#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_PDM_CRITSECT))
399
400/** @} */
401
402/** @def VM_FF_SET
403 * Sets a force action flag.
404 *
405 * @param pVM VM Handle.
406 * @param fFlag The flag to set.
407 */
408#if 1
409# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
410#else
411# define VM_FF_SET(pVM, fFlag) \
412 do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
413 RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
414 } while (0)
415#endif
416
417/** @def VMCPU_FF_SET
418 * Sets a force action flag for the given VCPU.
419 *
420 * @param pVCpu VMCPU Handle.
421 * @param fFlag The flag to set.
422 */
423#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
424
425/** @def VM_FF_CLEAR
426 * Clears a force action flag.
427 *
428 * @param pVM VM Handle.
429 * @param fFlag The flag to clear.
430 */
431#if 1
432# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
433#else
434# define VM_FF_CLEAR(pVM, fFlag) \
435 do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
436 RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
437 } while (0)
438#endif
439
440/** @def VMCPU_FF_CLEAR
441 * Clears a force action flag for the given VCPU.
442 *
443 * @param pVCpu VMCPU Handle.
444 * @param fFlag The flag to clear.
445 */
446#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
447
448/** @def VM_FF_ISSET
449 * Checks if a force action flag is set.
450 *
451 * @param pVM VM Handle.
452 * @param fFlag The flag to check.
453 */
454#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
455
456/** @def VMCPU_FF_ISSET
457 * Checks if a force action flag is set for the given VCPU.
458 *
459 * @param pVCpu VMCPU Handle.
460 * @param fFlag The flag to check.
461 */
462#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
463
464/** @def VM_FF_ISPENDING
465 * Checks if one or more force action in the specified set is pending.
466 *
467 * @param pVM VM Handle.
468 * @param fFlags The flags to check for.
469 */
470#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
471
472/** @def VM_FF_TESTANDCLEAR
473 * Checks if one (!) force action in the specified set is pending and clears it atomically
474 *
475 * @returns true if the bit was set.
476 * @returns false if the bit was clear.
477 * @param pVM VM Handle.
478 * @param iBit Bit position to check and clear
479 */
480#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
481
482/** @def VMCPU_FF_TESTANDCLEAR
483 * Checks if one (!) force action in the specified set is pending and clears it atomically
484 *
485 * @returns true if the bit was set.
486 * @returns false if the bit was clear.
487 * @param pVCpu VMCPU Handle.
488 * @param iBit Bit position to check and clear
489 */
490#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
491
492/** @def VMCPU_FF_ISPENDING
493 * Checks if one or more force action in the specified set is pending for the given VCPU.
494 *
495 * @param pVCpu VMCPU Handle.
496 * @param fFlags The flags to check for.
497 */
498#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
499
500/** @def VM_FF_ISPENDING
501 * Checks if one or more force action in the specified set is pending while one
502 * or more other ones are not.
503 *
504 * @param pVM VM Handle.
505 * @param fFlags The flags to check for.
506 * @param fExcpt The flags that should not be set.
507 */
508#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
509
510/** @def VMCPU_FF_IS_PENDING_EXCEPT
511 * Checks if one or more force action in the specified set is pending for the given
512 * VCPU while one or more other ones are not.
513 *
514 * @param pVCpu VMCPU Handle.
515 * @param fFlags The flags to check for.
516 * @param fExcpt The flags that should not be set.
517 */
518#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
519
520/** @def VM_IS_EMT
521 * Checks if the current thread is the emulation thread (EMT).
522 *
523 * @remark The ring-0 variation will need attention if we expand the ring-0
524 * code to let threads other than EMT mess around with the VM.
525 */
526#ifdef IN_RC
527# define VM_IS_EMT(pVM) true
528#else
529# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
530#endif
531
532/** @def VMCPU_IS_EMT
533 * Checks if the current thread is the emulation thread (EMT) for the specified
534 * virtual CPU.
535 */
536#ifdef IN_RC
537# define VMCPU_IS_EMT(pVCpu) true
538#else
539# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
540#endif
541
542/** @def VM_ASSERT_EMT
543 * Asserts that the current thread IS the emulation thread (EMT).
544 */
545#ifdef IN_RC
546# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
547#elif defined(IN_RING0)
548# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
549#else
550# define VM_ASSERT_EMT(pVM) \
551 AssertMsg(VM_IS_EMT(pVM), \
552 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
553#endif
554
555/** @def VMCPU_ASSERT_EMT
556 * Asserts that the current thread IS the emulation thread (EMT) of the
557 * specified virtual CPU.
558 */
559#ifdef IN_RC
560# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
561#elif defined(IN_RING0)
562# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
563#else
564# define VMCPU_ASSERT_EMT(pVCpu) \
565 AssertMsg(VMCPU_IS_EMT(pVCpu), \
566 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
567 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
568#endif
569
570/** @def VM_ASSERT_EMT_RETURN
571 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
572 */
573#ifdef IN_RC
574# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
575#elif defined(IN_RING0)
576# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
577#else
578# define VM_ASSERT_EMT_RETURN(pVM, rc) \
579 AssertMsgReturn(VM_IS_EMT(pVM), \
580 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
581 (rc))
582#endif
583
584/** @def VMCPU_ASSERT_EMT_RETURN
585 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
586 */
587#ifdef IN_RC
588# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
589#elif defined(IN_RING0)
590# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
591#else
592# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
593 AssertMsg(VMCPU_IS_EMT(pVCpu), \
594 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
595 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
596 (rc))
597#endif
598
599
600/**
601 * Asserts that the current thread is NOT the emulation thread.
602 */
603#define VM_ASSERT_OTHER_THREAD(pVM) \
604 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
605
606
607/** @def VM_ASSERT_STATE_RETURN
608 * Asserts a certain VM state.
609 */
610#define VM_ASSERT_STATE(pVM, _enmState) \
611 AssertMsg((pVM)->enmVMState == (_enmState), \
612 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
613
614/** @def VM_ASSERT_STATE_RETURN
615 * Asserts a certain VM state and returns if it doesn't match.
616 */
617#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
618 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
619 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
620 (rc))
621
622/** @def VM_ASSERT_VALID_EXT_RETURN
623 * Asserts a the VM handle is valid for external access, i.e. not being
624 * destroy or terminated.
625 */
626#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
627 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
628 && (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
629 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
630 ? VMGetStateName(pVM->enmVMState) : ""), \
631 (rc))
632
633/** @def VMCPU_ASSERT_VALID_EXT_RETURN
634 * Asserts a the VMCPU handle is valid for external access, i.e. not being
635 * destroy or terminated.
636 */
637#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
638 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
639 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
640 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
641 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
642 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
643 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
644 (rc))
645
646
647/** This is the VM structure.
648 *
649 * It contains (nearly?) all the VM data which have to be available in all
650 * contexts. Even if it contains all the data the idea is to use APIs not
651 * to modify all the members all around the place. Therefore we make use of
652 * unions to hide everything which isn't local to the current source module.
653 * This means we'll have to pay a little bit of attention when adding new
654 * members to structures in the unions and make sure to keep the padding sizes
655 * up to date.
656 *
657 * Run tstVMStructSize after update!
658 */
659typedef struct VM
660{
661 /** The state of the VM.
662 * This field is read only to everyone except the VM and EM. */
663 VMSTATE enmVMState;
664 /** Forced action flags.
665 * See the VM_FF_* \#defines. Updated atomically.
666 */
667 volatile uint32_t fGlobalForcedActions;
668 /** Pointer to the array of page descriptors for the VM structure allocation. */
669 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
670 /** Session handle. For use when calling SUPR0 APIs. */
671 PSUPDRVSESSION pSession;
672 /** Pointer to the ring-3 VM structure. */
673 PUVM pUVM;
674 /** Ring-3 Host Context VM Pointer. */
675 R3PTRTYPE(struct VM *) pVMR3;
676 /** Ring-0 Host Context VM Pointer. */
677 R0PTRTYPE(struct VM *) pVMR0;
678 /** Raw-mode Context VM Pointer. */
679 RCPTRTYPE(struct VM *) pVMRC;
680
681 /** The GVM VM handle. Only the GVM should modify this field. */
682 uint32_t hSelf;
683 /** Number of virtual CPUs. */
684 uint32_t cCPUs;
685
686 /** Size of the VM structure including the VMCPU array. */
687 uint32_t cbSelf;
688
689 /** Offset to the VMCPU array starting from beginning of this structure. */
690 uint32_t offVMCPU;
691
692 /** Reserved; alignment. */
693 uint32_t u32Reserved[6];
694
695 /** @name Public VMM Switcher APIs
696 * @{ */
697 /**
698 * Assembly switch entry point for returning to host context.
699 * This function will clean up the stack frame.
700 *
701 * @param eax The return code, register.
702 * @param Ctx The guest core context.
703 * @remark Assume interrupts disabled.
704 */
705 RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/*(int32_t eax, CPUMCTXCORE Ctx)*/;
706
707 /**
708 * Assembly switch entry point for returning to host context.
709 *
710 * This is an alternative entry point which we'll be using when the we have the
711 * hypervisor context and need to save that before going to the host.
712 *
713 * This is typically useful when abandoning the hypervisor because of a trap
714 * and want the trap state to be saved.
715 *
716 * @param eax The return code, register.
717 * @param ecx Pointer to the hypervisor core context, register.
718 * @remark Assume interrupts disabled.
719 */
720 RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/*(int32_t eax, PCPUMCTXCORE ecx)*/;
721
722 /**
723 * Assembly switch entry point for returning to host context.
724 *
725 * This is an alternative to the two *Ctx APIs and implies that the context has already
726 * been saved, or that it's just a brief return to HC and that the caller intends to resume
727 * whatever it is doing upon 'return' from this call.
728 *
729 * @param eax The return code, register.
730 * @remark Assume interrupts disabled.
731 */
732 RTRCPTR pfnVMMGCGuestToHostAsm/*(int32_t eax)*/;
733 /** @} */
734
735
736 /** @name Various VM data owned by VM.
737 * @{ */
738 RTTHREAD uPadding1;
739 /** The native handle of ThreadEMT. Getting the native handle
740 * is generally faster than getting the IPRT one (except on OS/2 :-). */
741 RTNATIVETHREAD uPadding2;
742 /** @} */
743
744
745 /** @name Various items that are frequently accessed.
746 * @{ */
747 /** Raw ring-3 indicator. */
748 bool fRawR3Enabled;
749 /** Raw ring-0 indicator. */
750 bool fRawR0Enabled;
751 /** PATM enabled flag.
752 * This is placed here for performance reasons. */
753 bool fPATMEnabled;
754 /** CSAM enabled flag.
755 * This is placed here for performance reasons. */
756 bool fCSAMEnabled;
757 /** Hardware VM support is available and enabled.
758 * This is placed here for performance reasons. */
759 bool fHWACCMEnabled;
760 /** Hardware VM support is required and non-optional.
761 * This is initialized together with the rest of the VM structure. */
762 bool fHwVirtExtForced;
763 /** PARAV enabled flag. */
764 bool fPARAVEnabled;
765 /** @} */
766
767
768 /* padding to make gnuc put the StatQemuToGC where msc does. */
769#if HC_ARCH_BITS == 32
770 uint32_t padding0;
771#endif
772
773 /** Profiling the total time from Qemu to GC. */
774 STAMPROFILEADV StatTotalQemuToGC;
775 /** Profiling the total time from GC to Qemu. */
776 STAMPROFILEADV StatTotalGCToQemu;
777 /** Profiling the total time spent in GC. */
778 STAMPROFILEADV StatTotalInGC;
779 /** Profiling the total time spent not in Qemu. */
780 STAMPROFILEADV StatTotalInQemu;
781 /** Profiling the VMMSwitcher code for going to GC. */
782 STAMPROFILEADV StatSwitcherToGC;
783 /** Profiling the VMMSwitcher code for going to HC. */
784 STAMPROFILEADV StatSwitcherToHC;
785 STAMPROFILEADV StatSwitcherSaveRegs;
786 STAMPROFILEADV StatSwitcherSysEnter;
787 STAMPROFILEADV StatSwitcherDebug;
788 STAMPROFILEADV StatSwitcherCR0;
789 STAMPROFILEADV StatSwitcherCR4;
790 STAMPROFILEADV StatSwitcherJmpCR3;
791 STAMPROFILEADV StatSwitcherRstrRegs;
792 STAMPROFILEADV StatSwitcherLgdt;
793 STAMPROFILEADV StatSwitcherLidt;
794 STAMPROFILEADV StatSwitcherLldt;
795 STAMPROFILEADV StatSwitcherTSS;
796
797/** @todo Realign everything on 64 byte boundaries to better match the
798 * cache-line size. */
799 /* padding - the unions must be aligned on 32 bytes boundraries. */
800 uint32_t padding[HC_ARCH_BITS == 32 ? 4+8 : 6];
801
802 /** CPUM part. */
803 union
804 {
805#ifdef ___CPUMInternal_h
806 struct CPUM s;
807#endif
808 char padding[2048]; /* multiple of 32 */
809 } cpum;
810
811 /** VMM part. */
812 union
813 {
814#ifdef ___VMMInternal_h
815 struct VMM s;
816#endif
817 char padding[1600]; /* multiple of 32 */
818 } vmm;
819
820 /** PGM part. */
821 union
822 {
823#ifdef ___PGMInternal_h
824 struct PGM s;
825#endif
826 char padding[16*1024]; /* multiple of 32 */
827 } pgm;
828
829 /** HWACCM part. */
830 union
831 {
832#ifdef ___HWACCMInternal_h
833 struct HWACCM s;
834#endif
835 char padding[512]; /* multiple of 32 */
836 } hwaccm;
837
838 /** TRPM part. */
839 union
840 {
841#ifdef ___TRPMInternal_h
842 struct TRPM s;
843#endif
844 char padding[5344]; /* multiple of 32 */
845 } trpm;
846
847 /** SELM part. */
848 union
849 {
850#ifdef ___SELMInternal_h
851 struct SELM s;
852#endif
853 char padding[544]; /* multiple of 32 */
854 } selm;
855
856 /** MM part. */
857 union
858 {
859#ifdef ___MMInternal_h
860 struct MM s;
861#endif
862 char padding[192]; /* multiple of 32 */
863 } mm;
864
865 /** CFGM part. */
866 union
867 {
868#ifdef ___CFGMInternal_h
869 struct CFGM s;
870#endif
871 char padding[32]; /* multiple of 32 */
872 } cfgm;
873
874 /** PDM part. */
875 union
876 {
877#ifdef ___PDMInternal_h
878 struct PDM s;
879#endif
880 char padding[1824]; /* multiple of 32 */
881 } pdm;
882
883 /** IOM part. */
884 union
885 {
886#ifdef ___IOMInternal_h
887 struct IOM s;
888#endif
889 char padding[4544]; /* multiple of 32 */
890 } iom;
891
892 /** PATM part. */
893 union
894 {
895#ifdef ___PATMInternal_h
896 struct PATM s;
897#endif
898 char padding[768]; /* multiple of 32 */
899 } patm;
900
901 /** CSAM part. */
902 union
903 {
904#ifdef ___CSAMInternal_h
905 struct CSAM s;
906#endif
907 char padding[3328]; /* multiple of 32 */
908 } csam;
909
910 /** PARAV part. */
911 union
912 {
913#ifdef ___PARAVInternal_h
914 struct PARAV s;
915#endif
916 char padding[128];
917 } parav;
918
919 /** EM part. */
920 union
921 {
922#ifdef ___EMInternal_h
923 struct EM s;
924#endif
925 char padding[256]; /* multiple of 32 */
926 } em;
927
928 /** TM part. */
929 union
930 {
931#ifdef ___TMInternal_h
932 struct TM s;
933#endif
934 char padding[2112]; /* multiple of 32 */
935 } tm;
936
937 /** DBGF part. */
938 union
939 {
940#ifdef ___DBGFInternal_h
941 struct DBGF s;
942#endif
943 char padding[2368]; /* multiple of 32 */
944 } dbgf;
945
946 /** SSM part. */
947 union
948 {
949#ifdef ___SSMInternal_h
950 struct SSM s;
951#endif
952 char padding[32]; /* multiple of 32 */
953 } ssm;
954
955 /** VM part. */
956 union
957 {
958#ifdef ___VMInternal_h
959 struct VMINT s;
960#endif
961 char padding[768]; /* multiple of 32 */
962 } vm;
963
964 /** REM part. */
965 union
966 {
967#ifdef ___REMInternal_h
968 struct REM s;
969#endif
970
971/** @def VM_REM_SIZE
972 * Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
973# define VM_REM_SIZE 0x10A00
974 char padding[VM_REM_SIZE]; /* multiple of 32 */
975 } rem;
976
977 /** Padding for aligning the cpu array on a 64 byte boundrary. */
978 uint32_t u32Reserved2[8];
979
980 /** VMCPU array for the configured number of virtual CPUs.
981 * Must be aligned on a 64-byte boundrary. */
982 VMCPU aCpus[1];
983} VM;
984
985
986#ifdef IN_RC
987RT_C_DECLS_BEGIN
988
989/** The VM structure.
990 * This is imported from the VMMGCBuiltin module, i.e. it's a one
991 * of those magic globals which we should avoid using.
992 */
993extern DECLIMPORT(VM) g_VM;
994
995RT_C_DECLS_END
996#endif
997
998/** @} */
999
1000#endif
1001
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