VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 21217

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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/err.h>
44#include <VBox/pci.h>
45#include <iprt/stdarg.h>
46
47RT_C_DECLS_BEGIN
48
49/** @defgroup grp_pdm_device The PDM Devices API
50 * @ingroup grp_pdm
51 * @{
52 */
53
54/**
55 * Construct a device instance for a VM.
56 *
57 * @returns VBox status.
58 * @param pDevIns The device instance data.
59 * If the registration structure is needed, pDevIns->pDevReg points to it.
60 * @param iInstance Instance number. Use this to figure out which registers and such to use.
61 * The instance number is also found in pDevIns->iInstance, but since it's
62 * likely to be freqently used PDM passes it as parameter.
63 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
64 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
65 * primary usage will in this function it's passed as a parameter.
66 */
67typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
68/** Pointer to a FNPDMDEVCONSTRUCT() function. */
69typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
70
71/**
72 * Destruct a device instance.
73 *
74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
75 * resources can be freed correctly.
76 *
77 * @returns VBox status.
78 * @param pDevIns The device instance data.
79 */
80typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
81/** Pointer to a FNPDMDEVDESTRUCT() function. */
82typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
83
84/**
85 * Device relocation callback.
86 *
87 * When this callback is called the device instance data, and if the
88 * device have a GC component, is being relocated, or/and the selectors
89 * have been changed. The device must use the chance to perform the
90 * necessary pointer relocations and data updates.
91 *
92 * Before the GC code is executed the first time, this function will be
93 * called with a 0 delta so GC pointer calculations can be one in one place.
94 *
95 * @param pDevIns Pointer to the device instance.
96 * @param offDelta The relocation delta relative to the old location.
97 *
98 * @remark A relocation CANNOT fail.
99 */
100typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
101/** Pointer to a FNPDMDEVRELOCATE() function. */
102typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
103
104
105/**
106 * Device I/O Control interface.
107 *
108 * This is used by external components, such as the COM interface, to
109 * communicate with devices using a class wide interface or a device
110 * specific interface.
111 *
112 * @returns VBox status code.
113 * @param pDevIns Pointer to the device instance.
114 * @param uFunction Function to perform.
115 * @param pvIn Pointer to input data.
116 * @param cbIn Size of input data.
117 * @param pvOut Pointer to output data.
118 * @param cbOut Size of output data.
119 * @param pcbOut Where to store the actual size of the output data.
120 */
121typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
122 void *pvIn, RTUINT cbIn,
123 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
124/** Pointer to a FNPDMDEVIOCTL() function. */
125typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
126
127/**
128 * Power On notification.
129 *
130 * @returns VBox status.
131 * @param pDevIns The device instance data.
132 */
133typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
134/** Pointer to a FNPDMDEVPOWERON() function. */
135typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
136
137/**
138 * Reset notification.
139 *
140 * @returns VBox status.
141 * @param pDevIns The device instance data.
142 */
143typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
144/** Pointer to a FNPDMDEVRESET() function. */
145typedef FNPDMDEVRESET *PFNPDMDEVRESET;
146
147/**
148 * Suspend notification.
149 *
150 * @returns VBox status.
151 * @param pDevIns The device instance data.
152 */
153typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
154/** Pointer to a FNPDMDEVSUSPEND() function. */
155typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
156
157/**
158 * Resume notification.
159 *
160 * @returns VBox status.
161 * @param pDevIns The device instance data.
162 */
163typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
164/** Pointer to a FNPDMDEVRESUME() function. */
165typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
166
167/**
168 * Power Off notification.
169 *
170 * @param pDevIns The device instance data.
171 */
172typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
173/** Pointer to a FNPDMDEVPOWEROFF() function. */
174typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
175
176/** PDM Device attach/detach callback Flags.
177 * @{ */
178/** The attach/detach command is not a hotplug event. */
179#define PDMDEVATT_FLAGS_NOT_HOT_PLUG RT_BIT_32(0)
180/* @} */
181
182/**
183 * Attach command.
184 *
185 * This is called to let the device attach to a driver for a specified LUN
186 * at runtime. This is not called during VM construction, the device
187 * constructor have to attach to all the available drivers.
188 *
189 * This is like plugging in the keyboard or mouse after turning on the PC.
190 *
191 * @returns VBox status code.
192 * @param pDevIns The device instance.
193 * @param iLUN The logical unit which is being detached.
194 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
195 */
196typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
197/** Pointer to a FNPDMDEVATTACH() function. */
198typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
199
200/**
201 * Detach notification.
202 *
203 * This is called when a driver is detaching itself from a LUN of the device.
204 * The device should adjust it's state to reflect this.
205 *
206 * This is like unplugging the network cable to use it for the laptop or
207 * something while the PC is still running.
208 *
209 * @param pDevIns The device instance.
210 * @param iLUN The logical unit which is being detached.
211 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
212 */
213typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
214/** Pointer to a FNPDMDEVDETACH() function. */
215typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
216
217/**
218 * Query the base interface of a logical unit.
219 *
220 * @returns VBOX status code.
221 * @param pDevIns The device instance.
222 * @param iLUN The logicial unit to query.
223 * @param ppBase Where to store the pointer to the base interface of the LUN.
224 */
225typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
226/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
227typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
228
229/**
230 * Init complete notification.
231 * This can be done to do communication with other devices and other
232 * initialization which requires everything to be in place.
233 *
234 * @returns VBOX status code.
235 * @param pDevIns The device instance.
236 */
237typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
238/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
239typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
240
241
242
243/** PDM Device Registration Structure,
244 * This structure is used when registering a device from
245 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
246 * the VM is terminated.
247 */
248typedef struct PDMDEVREG
249{
250 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
251 uint32_t u32Version;
252 /** Device name. */
253 char szDeviceName[32];
254 /** Name of the raw-mode context module (no path).
255 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
256 char szRCMod[32];
257 /** Name of the ring-0 module (no path).
258 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
259 char szR0Mod[32];
260 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
261 * remain unchanged from registration till VM destruction. */
262 const char *pszDescription;
263
264 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
265 RTUINT fFlags;
266 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
267 RTUINT fClass;
268 /** Maximum number of instances (per VM). */
269 RTUINT cMaxInstances;
270 /** Size of the instance data. */
271 RTUINT cbInstance;
272
273 /** Construct instance - required. */
274 PFNPDMDEVCONSTRUCT pfnConstruct;
275 /** Destruct instance - optional. */
276 PFNPDMDEVDESTRUCT pfnDestruct;
277 /** Relocation command - optional. */
278 PFNPDMDEVRELOCATE pfnRelocate;
279 /** I/O Control interface - optional. */
280 PFNPDMDEVIOCTL pfnIOCtl;
281 /** Power on notification - optional. */
282 PFNPDMDEVPOWERON pfnPowerOn;
283 /** Reset notification - optional. */
284 PFNPDMDEVRESET pfnReset;
285 /** Suspend notification - optional. */
286 PFNPDMDEVSUSPEND pfnSuspend;
287 /** Resume notification - optional. */
288 PFNPDMDEVRESUME pfnResume;
289 /** Attach command - optional. */
290 PFNPDMDEVATTACH pfnAttach;
291 /** Detach notification - optional. */
292 PFNPDMDEVDETACH pfnDetach;
293 /** Query a LUN base interface - optional. */
294 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
295 /** Init complete notification - optional. */
296 PFNPDMDEVINITCOMPLETE pfnInitComplete;
297 /** Power off notification - optional. */
298 PFNPDMDEVPOWEROFF pfnPowerOff;
299 /** @todo */
300 PFNRT pfnSoftReset;
301 /** Initialization safty marker. */
302 uint32_t u32VersionEnd;
303} PDMDEVREG;
304/** Pointer to a PDM Device Structure. */
305typedef PDMDEVREG *PPDMDEVREG;
306/** Const pointer to a PDM Device Structure. */
307typedef PDMDEVREG const *PCPDMDEVREG;
308
309/** Current DEVREG version number. */
310#define PDM_DEVREG_VERSION 0xc0020000
311
312/** PDM Device Flags.
313 * @{ */
314/** This flag is used to indicate that the device has a RC component. */
315#define PDM_DEVREG_FLAGS_RC 0x00000001
316/** This flag is used to indicate that the device has a R0 component. */
317#define PDM_DEVREG_FLAGS_R0 0x00000002
318
319/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
320 * The bit count for the current host. */
321#if HC_ARCH_BITS == 32
322# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
323#elif HC_ARCH_BITS == 64
324# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
325#else
326# error Unsupported HC_ARCH_BITS value.
327#endif
328/** The host bit count mask. */
329#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
330
331/** The device support only 32-bit guests. */
332#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
333/** The device support only 64-bit guests. */
334#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
335/** The device support both 32-bit & 64-bit guests. */
336#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
337/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
338 * The guest bit count for the current compilation. */
339#if GC_ARCH_BITS == 32
340# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
341#elif GC_ARCH_BITS == 64
342# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
343#else
344# error Unsupported GC_ARCH_BITS value.
345#endif
346/** The guest bit count mask. */
347#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
348
349/** A convenience. */
350#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
351
352/** Indicates that the devices support PAE36 on a 32-bit guest. */
353#define PDM_DEVREG_FLAGS_PAE36 0x00001000
354
355/** Indicates that the device needs to be notified before the drivers when suspending. */
356#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
357
358/** Indicates that the device needs to be notified before the drivers when powering off. */
359#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
360/** @} */
361
362
363/** PDM Device Classes.
364 * The order is important, lower bit earlier instantiation.
365 * @{ */
366/** Architecture device. */
367#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
368/** Architecture BIOS device. */
369#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
370/** PCI bus brigde. */
371#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
372/** ISA bus brigde. */
373#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
374/** Input device (mouse, keyboard, joystick, HID, ...). */
375#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
376/** Interrupt controller (PIC). */
377#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
378/** Interval controoler (PIT). */
379#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
380/** RTC/CMOS. */
381#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
382/** DMA controller. */
383#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
384/** VMM Device. */
385#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
386/** Graphics device, like VGA. */
387#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
388/** Storage controller device. */
389#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
390/** Network interface controller. */
391#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
392/** Audio. */
393#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
394/** USB HIC. */
395#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
396/** ACPI. */
397#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
398/** Serial controller device. */
399#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
400/** Parallel controller device */
401#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
402/** Misc devices (always last). */
403#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
404/** @} */
405
406
407/** @name IRQ Level for use with the *SetIrq APIs.
408 * @{
409 */
410/** Assert the IRQ (can assume value 1). */
411#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
412/** Deassert the IRQ (can assume value 0). */
413#define PDM_IRQ_LEVEL_LOW 0
414/** flip-flop - assert and then deassert it again immediately. */
415#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
416/** @} */
417
418
419/**
420 * PCI Bus registration structure.
421 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
422 */
423typedef struct PDMPCIBUSREG
424{
425 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
426 uint32_t u32Version;
427
428 /**
429 * Registers the device with the default PCI bus.
430 *
431 * @returns VBox status code.
432 * @param pDevIns Device instance of the PCI Bus.
433 * @param pPciDev The PCI device structure.
434 * Any PCI enabled device must keep this in it's instance data!
435 * Fill in the PCI data config before registration, please.
436 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
437 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
438 * If negative, the pci bus device will assign one.
439 */
440 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
441
442 /**
443 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
444 *
445 * @returns VBox status code.
446 * @param pDevIns Device instance of the PCI Bus.
447 * @param pPciDev The PCI device structure.
448 * @param iRegion The region number.
449 * @param cbRegion Size of the region.
450 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
451 * @param pfnCallback Callback for doing the mapping.
452 */
453 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
454
455 /**
456 * Register PCI configuration space read/write callbacks.
457 *
458 * @param pDevIns Device instance of the PCI Bus.
459 * @param pPciDev The PCI device structure.
460 * @param pfnRead Pointer to the user defined PCI config read function.
461 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
462 * PCI config read function. This way, user can decide when (and if)
463 * to call default PCI config read function. Can be NULL.
464 * @param pfnWrite Pointer to the user defined PCI config write function.
465 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
466 * PCI config write function. This way, user can decide when (and if)
467 * to call default PCI config write function. Can be NULL.
468 * @thread EMT
469 */
470 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
471 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
472
473 /**
474 * Set the IRQ for a PCI device.
475 *
476 * @param pDevIns Device instance of the PCI Bus.
477 * @param pPciDev The PCI device structure.
478 * @param iIrq IRQ number to set.
479 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
480 */
481 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
482
483 /**
484 * Saves a state of the PCI device.
485 *
486 * @returns VBox status code.
487 * @param pDevIns Device instance of the PCI Bus.
488 * @param pPciDev Pointer to PCI device.
489 * @param pSSMHandle The handle to save the state to.
490 */
491 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
492
493 /**
494 * Loads a saved PCI device state.
495 *
496 * @returns VBox status code.
497 * @param pDevIns Device instance of the PCI Bus.
498 * @param pPciDev Pointer to PCI device.
499 * @param pSSMHandle The handle to the saved state.
500 */
501 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
502
503 /**
504 * Called to perform the job of the bios.
505 * This is only called for the first PCI Bus - it is expected to
506 * service all the PCI buses.
507 *
508 * @returns VBox status.
509 * @param pDevIns Device instance of the first bus.
510 */
511 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
512
513 /** The name of the SetIrq RC entry point. */
514 const char *pszSetIrqRC;
515
516 /** The name of the SetIrq R0 entry point. */
517 const char *pszSetIrqR0;
518
519} PDMPCIBUSREG;
520/** Pointer to a PCI bus registration structure. */
521typedef PDMPCIBUSREG *PPDMPCIBUSREG;
522
523/** Current PDMPCIBUSREG version number. */
524#define PDM_PCIBUSREG_VERSION 0xd0020000
525
526/**
527 * PCI Bus RC helpers.
528 */
529typedef struct PDMPCIHLPRC
530{
531 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
532 uint32_t u32Version;
533
534 /**
535 * Set an ISA IRQ.
536 *
537 * @param pDevIns PCI device instance.
538 * @param iIrq IRQ number to set.
539 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
540 * @thread EMT only.
541 */
542 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
543
544 /**
545 * Set an I/O-APIC IRQ.
546 *
547 * @param pDevIns PCI device instance.
548 * @param iIrq IRQ number to set.
549 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
550 * @thread EMT only.
551 */
552 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
553
554 /**
555 * Acquires the PDM lock.
556 *
557 * @returns VINF_SUCCESS on success.
558 * @returns rc if we failed to acquire the lock.
559 * @param pDevIns The PCI device instance.
560 * @param rc What to return if we fail to acquire the lock.
561 */
562 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
563
564 /**
565 * Releases the PDM lock.
566 *
567 * @param pDevIns The PCI device instance.
568 */
569 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
570
571 /** Just a safety precaution. */
572 uint32_t u32TheEnd;
573} PDMPCIHLPRC;
574/** Pointer to PCI helpers. */
575typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
576/** Pointer to const PCI helpers. */
577typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
578
579/** Current PDMPCIHLPR3 version number. */
580#define PDM_PCIHLPRC_VERSION 0xe1010000
581
582
583/**
584 * PCI Bus R0 helpers.
585 */
586typedef struct PDMPCIHLPR0
587{
588 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
589 uint32_t u32Version;
590
591 /**
592 * Set an ISA IRQ.
593 *
594 * @param pDevIns PCI device instance.
595 * @param iIrq IRQ number to set.
596 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
597 * @thread EMT only.
598 */
599 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
600
601 /**
602 * Set an I/O-APIC IRQ.
603 *
604 * @param pDevIns PCI device instance.
605 * @param iIrq IRQ number to set.
606 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
607 * @thread EMT only.
608 */
609 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
610
611 /**
612 * Acquires the PDM lock.
613 *
614 * @returns VINF_SUCCESS on success.
615 * @returns rc if we failed to acquire the lock.
616 * @param pDevIns The PCI device instance.
617 * @param rc What to return if we fail to acquire the lock.
618 */
619 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
620
621 /**
622 * Releases the PDM lock.
623 *
624 * @param pDevIns The PCI device instance.
625 */
626 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
627
628 /** Just a safety precaution. */
629 uint32_t u32TheEnd;
630} PDMPCIHLPR0;
631/** Pointer to PCI helpers. */
632typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
633/** Pointer to const PCI helpers. */
634typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
635
636/** Current PDMPCIHLPR0 version number. */
637#define PDM_PCIHLPR0_VERSION 0xe1010000
638
639/**
640 * PCI device helpers.
641 */
642typedef struct PDMPCIHLPR3
643{
644 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
645 uint32_t u32Version;
646
647 /**
648 * Set an ISA IRQ.
649 *
650 * @param pDevIns The PCI device instance.
651 * @param iIrq IRQ number to set.
652 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
653 * @thread EMT only.
654 */
655 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
656
657 /**
658 * Set an I/O-APIC IRQ.
659 *
660 * @param pDevIns The PCI device instance.
661 * @param iIrq IRQ number to set.
662 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
663 * @thread EMT only.
664 */
665 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
666
667 /**
668 * Checks if the given address is an MMIO2 base address or not.
669 *
670 * @returns true/false accordingly.
671 * @param pDevIns The PCI device instance.
672 * @param pOwner The owner of the memory, optional.
673 * @param GCPhys The address to check.
674 */
675 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
676
677 /**
678 * Gets the address of the RC PCI Bus helpers.
679 *
680 * This should be called at both construction and relocation time
681 * to obtain the correct address of the RC helpers.
682 *
683 * @returns RC pointer to the PCI Bus helpers.
684 * @param pDevIns Device instance of the PCI Bus.
685 * @thread EMT only.
686 */
687 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
688
689 /**
690 * Gets the address of the R0 PCI Bus helpers.
691 *
692 * This should be called at both construction and relocation time
693 * to obtain the correct address of the R0 helpers.
694 *
695 * @returns R0 pointer to the PCI Bus helpers.
696 * @param pDevIns Device instance of the PCI Bus.
697 * @thread EMT only.
698 */
699 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
700
701 /**
702 * Acquires the PDM lock.
703 *
704 * @returns VINF_SUCCESS on success.
705 * @returns Fatal error on failure.
706 * @param pDevIns The PCI device instance.
707 * @param rc Dummy for making the interface identical to the RC and R0 versions.
708 */
709 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
710
711 /**
712 * Releases the PDM lock.
713 *
714 * @param pDevIns The PCI device instance.
715 */
716 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
717
718 /** Just a safety precaution. */
719 uint32_t u32TheEnd;
720} PDMPCIHLPR3;
721/** Pointer to PCI helpers. */
722typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
723/** Pointer to const PCI helpers. */
724typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
725
726/** Current PDMPCIHLPR3 version number. */
727#define PDM_PCIHLPR3_VERSION 0xf1020000
728
729
730/**
731 * Programmable Interrupt Controller registration structure.
732 */
733typedef struct PDMPICREG
734{
735 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
736 uint32_t u32Version;
737
738 /**
739 * Set the an IRQ.
740 *
741 * @param pDevIns Device instance of the PIC.
742 * @param iIrq IRQ number to set.
743 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
744 */
745 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
746
747 /**
748 * Get a pending interrupt.
749 *
750 * @returns Pending interrupt number.
751 * @param pDevIns Device instance of the PIC.
752 */
753 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
754
755 /** The name of the RC SetIrq entry point. */
756 const char *pszSetIrqRC;
757 /** The name of the RC GetInterrupt entry point. */
758 const char *pszGetInterruptRC;
759
760 /** The name of the R0 SetIrq entry point. */
761 const char *pszSetIrqR0;
762 /** The name of the R0 GetInterrupt entry point. */
763 const char *pszGetInterruptR0;
764} PDMPICREG;
765/** Pointer to a PIC registration structure. */
766typedef PDMPICREG *PPDMPICREG;
767
768/** Current PDMPICREG version number. */
769#define PDM_PICREG_VERSION 0xe0020000
770
771/**
772 * PIC RC helpers.
773 */
774typedef struct PDMPICHLPRC
775{
776 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
777 uint32_t u32Version;
778
779 /**
780 * Set the interrupt force action flag.
781 *
782 * @param pDevIns Device instance of the PIC.
783 */
784 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
785
786 /**
787 * Clear the interrupt force action flag.
788 *
789 * @param pDevIns Device instance of the PIC.
790 */
791 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
792
793 /**
794 * Acquires the PDM lock.
795 *
796 * @returns VINF_SUCCESS on success.
797 * @returns rc if we failed to acquire the lock.
798 * @param pDevIns The PIC device instance.
799 * @param rc What to return if we fail to acquire the lock.
800 */
801 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
802
803 /**
804 * Releases the PDM lock.
805 *
806 * @param pDevIns The PIC device instance.
807 */
808 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
809
810 /** Just a safety precaution. */
811 uint32_t u32TheEnd;
812} PDMPICHLPRC;
813
814/** Pointer to PIC RC helpers. */
815typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
816/** Pointer to const PIC RC helpers. */
817typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
818
819/** Current PDMPICHLPRC version number. */
820#define PDM_PICHLPRC_VERSION 0xfc010000
821
822
823/**
824 * PIC R0 helpers.
825 */
826typedef struct PDMPICHLPR0
827{
828 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
829 uint32_t u32Version;
830
831 /**
832 * Set the interrupt force action flag.
833 *
834 * @param pDevIns Device instance of the PIC.
835 */
836 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
837
838 /**
839 * Clear the interrupt force action flag.
840 *
841 * @param pDevIns Device instance of the PIC.
842 */
843 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
844
845 /**
846 * Acquires the PDM lock.
847 *
848 * @returns VINF_SUCCESS on success.
849 * @returns rc if we failed to acquire the lock.
850 * @param pDevIns The PIC device instance.
851 * @param rc What to return if we fail to acquire the lock.
852 */
853 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
854
855 /**
856 * Releases the PDM lock.
857 *
858 * @param pDevIns The PCI device instance.
859 */
860 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
861
862 /** Just a safety precaution. */
863 uint32_t u32TheEnd;
864} PDMPICHLPR0;
865
866/** Pointer to PIC R0 helpers. */
867typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
868/** Pointer to const PIC R0 helpers. */
869typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
870
871/** Current PDMPICHLPR0 version number. */
872#define PDM_PICHLPR0_VERSION 0xfc010000
873
874/**
875 * PIC R3 helpers.
876 */
877typedef struct PDMPICHLPR3
878{
879 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
880 uint32_t u32Version;
881
882 /**
883 * Set the interrupt force action flag.
884 *
885 * @param pDevIns Device instance of the PIC.
886 */
887 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
888
889 /**
890 * Clear the interrupt force action flag.
891 *
892 * @param pDevIns Device instance of the PIC.
893 */
894 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
895
896 /**
897 * Acquires the PDM lock.
898 *
899 * @returns VINF_SUCCESS on success.
900 * @returns Fatal error on failure.
901 * @param pDevIns The PIC device instance.
902 * @param rc Dummy for making the interface identical to the RC and R0 versions.
903 */
904 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
905
906 /**
907 * Releases the PDM lock.
908 *
909 * @param pDevIns The PIC device instance.
910 */
911 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
912
913 /**
914 * Gets the address of the RC PIC helpers.
915 *
916 * This should be called at both construction and relocation time
917 * to obtain the correct address of the RC helpers.
918 *
919 * @returns RC pointer to the PIC helpers.
920 * @param pDevIns Device instance of the PIC.
921 */
922 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
923
924 /**
925 * Gets the address of the R0 PIC helpers.
926 *
927 * This should be called at both construction and relocation time
928 * to obtain the correct address of the R0 helpers.
929 *
930 * @returns R0 pointer to the PIC helpers.
931 * @param pDevIns Device instance of the PIC.
932 */
933 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
934
935 /** Just a safety precaution. */
936 uint32_t u32TheEnd;
937} PDMPICHLPR3;
938
939/** Pointer to PIC R3 helpers. */
940typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
941/** Pointer to const PIC R3 helpers. */
942typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
943
944/** Current PDMPICHLPR3 version number. */
945#define PDM_PICHLPR3_VERSION 0xf0010000
946
947
948
949/**
950 * Advanced Programmable Interrupt Controller registration structure.
951 */
952typedef struct PDMAPICREG
953{
954 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
955 uint32_t u32Version;
956
957 /**
958 * Get a pending interrupt.
959 *
960 * @returns Pending interrupt number.
961 * @param pDevIns Device instance of the APIC.
962 */
963 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
964
965 /**
966 * Check if the APIC has a pending interrupt/if a TPR change would active one
967 *
968 * @returns Pending interrupt yes/no
969 * @param pDevIns Device instance of the APIC.
970 */
971 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
972
973 /**
974 * Set the APIC base.
975 *
976 * @param pDevIns Device instance of the APIC.
977 * @param u64Base The new base.
978 */
979 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
980
981 /**
982 * Get the APIC base.
983 *
984 * @returns Current base.
985 * @param pDevIns Device instance of the APIC.
986 */
987 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
988
989 /**
990 * Set the TPR (task priority register).
991 *
992 * @param pDevIns Device instance of the APIC.
993 * @param idCpu VCPU id
994 * @param u8TPR The new TPR.
995 */
996 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
997
998 /**
999 * Get the TPR (task priority register).
1000 *
1001 * @returns The current TPR.
1002 * @param pDevIns Device instance of the APIC.
1003 * @param idCpu VCPU id
1004 */
1005 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1006
1007 /**
1008 * Write MSR in APIC range.
1009 *
1010 * @returns VBox status code.
1011 * @param pDevIns Device instance of the APIC.
1012 * @param idCpu Target CPU.
1013 * @param u32Reg MSR to write.
1014 * @param u64Value Value to write.
1015 */
1016 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1017
1018 /**
1019 * Read MSR in APIC range.
1020 *
1021 * @returns VBox status code.
1022 * @param pDevIns Device instance of the APIC.
1023 * @param idCpu Target CPU.
1024 * @param u32Reg MSR to read.
1025 * @param pu64Value Value read.
1026 */
1027 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1028
1029 /**
1030 * Private interface between the IOAPIC and APIC.
1031 *
1032 * This is a low-level, APIC/IOAPIC implementation specific interface
1033 * which is registered with PDM only because it makes life so much
1034 * simpler right now (GC bits). This is a bad bad hack! The correct
1035 * way of doing this would involve some way of querying GC interfaces
1036 * and relocating them. Perhaps doing some kind of device init in GC...
1037 *
1038 * @returns status code.
1039 * @param pDevIns Device instance of the APIC.
1040 * @param u8Dest See APIC implementation.
1041 * @param u8DestMode See APIC implementation.
1042 * @param u8DeliveryMode See APIC implementation.
1043 * @param iVector See APIC implementation.
1044 * @param u8Polarity See APIC implementation.
1045 * @param u8TriggerMode See APIC implementation.
1046 */
1047 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1048 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1049
1050 /** The name of the RC GetInterrupt entry point. */
1051 const char *pszGetInterruptRC;
1052 /** The name of the RC HasPendingIrq entry point. */
1053 const char *pszHasPendingIrqRC;
1054 /** The name of the RC SetBase entry point. */
1055 const char *pszSetBaseRC;
1056 /** The name of the RC GetBase entry point. */
1057 const char *pszGetBaseRC;
1058 /** The name of the RC SetTPR entry point. */
1059 const char *pszSetTPRRC;
1060 /** The name of the RC GetTPR entry point. */
1061 const char *pszGetTPRRC;
1062 /** The name of the RC WriteMSR entry point. */
1063 const char *pszWriteMSRRC;
1064 /** The name of the RC ReadMSR entry point. */
1065 const char *pszReadMSRRC;
1066 /** The name of the RC BusDeliver entry point. */
1067 const char *pszBusDeliverRC;
1068
1069 /** The name of the R0 GetInterrupt entry point. */
1070 const char *pszGetInterruptR0;
1071 /** The name of the R0 HasPendingIrq entry point. */
1072 const char *pszHasPendingIrqR0;
1073 /** The name of the R0 SetBase entry point. */
1074 const char *pszSetBaseR0;
1075 /** The name of the R0 GetBase entry point. */
1076 const char *pszGetBaseR0;
1077 /** The name of the R0 SetTPR entry point. */
1078 const char *pszSetTPRR0;
1079 /** The name of the R0 GetTPR entry point. */
1080 const char *pszGetTPRR0;
1081 /** The name of the R0 WriteMSR entry point. */
1082 const char *pszWriteMSRR0;
1083 /** The name of the R0 ReadMSR entry point. */
1084 const char *pszReadMSRR0;
1085 /** The name of the R0 BusDeliver entry point. */
1086 const char *pszBusDeliverR0;
1087
1088} PDMAPICREG;
1089/** Pointer to an APIC registration structure. */
1090typedef PDMAPICREG *PPDMAPICREG;
1091
1092/** Current PDMAPICREG version number. */
1093#define PDM_APICREG_VERSION 0x70010000
1094
1095
1096/**
1097 * APIC version argument for pfnChangeFeature.
1098 */
1099typedef enum PDMAPICVERSION
1100{
1101 /** Invalid 0 entry. */
1102 PDMAPICVERSION_INVALID = 0,
1103 /** No APIC. */
1104 PDMAPICVERSION_NONE,
1105 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1106 PDMAPICVERSION_APIC,
1107 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1108 PDMAPICVERSION_X2APIC,
1109 /** The usual 32-bit paranoia. */
1110 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1111} PDMAPICVERSION;
1112
1113/**
1114 * APIC irq argument for SetInterruptFF.
1115 */
1116typedef enum PDMAPICIRQ
1117{
1118 /** Invalid 0 entry. */
1119 PDMAPICIRQ_INVALID = 0,
1120 /** Normal hardware interrupt. */
1121 PDMAPICIRQ_HARDWARE,
1122 /** NMI. */
1123 PDMAPICIRQ_NMI,
1124 /** SMI. */
1125 PDMAPICIRQ_SMI,
1126 /** The usual 32-bit paranoia. */
1127 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1128} PDMAPICIRQ;
1129
1130
1131/**
1132 * APIC RC helpers.
1133 */
1134typedef struct PDMAPICHLPRC
1135{
1136 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1137 uint32_t u32Version;
1138
1139 /**
1140 * Set the interrupt force action flag.
1141 *
1142 * @param pDevIns Device instance of the APIC.
1143 * @param enmType IRQ type.
1144 * @param idCpu Virtual CPU to set flag upon.
1145 */
1146 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1147
1148 /**
1149 * Clear the interrupt force action flag.
1150 *
1151 * @param pDevIns Device instance of the APIC.
1152 * @param idCpu Virtual CPU to clear flag upon.
1153 */
1154 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1155
1156 /**
1157 * Modifies APIC-related bits in the CPUID feature mask.
1158 *
1159 * @param pDevIns Device instance of the APIC.
1160 * @param enmVersion Supported APIC version.
1161 */
1162 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1163
1164 /**
1165 * Acquires the PDM lock.
1166 *
1167 * @returns VINF_SUCCESS on success.
1168 * @returns rc if we failed to acquire the lock.
1169 * @param pDevIns The APIC device instance.
1170 * @param rc What to return if we fail to acquire the lock.
1171 */
1172 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1173
1174 /**
1175 * Releases the PDM lock.
1176 *
1177 * @param pDevIns The APIC device instance.
1178 */
1179 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1180
1181 /**
1182 * Get the virtual CPU id corresponding to the current EMT.
1183 *
1184 * @param pDevIns The APIC device instance.
1185 */
1186 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1187
1188 /** Just a safety precaution. */
1189 uint32_t u32TheEnd;
1190} PDMAPICHLPRC;
1191/** Pointer to APIC GC helpers. */
1192typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1193/** Pointer to const APIC helpers. */
1194typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1195
1196/** Current PDMAPICHLPRC version number. */
1197#define PDM_APICHLPRC_VERSION 0x60020000
1198
1199
1200/**
1201 * APIC R0 helpers.
1202 */
1203typedef struct PDMAPICHLPR0
1204{
1205 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1206 uint32_t u32Version;
1207
1208 /**
1209 * Set the interrupt force action flag.
1210 *
1211 * @param pDevIns Device instance of the APIC.
1212 * @param enmType IRQ type.
1213 * @param idCpu Virtual CPU to set flag upon.
1214 */
1215 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1216
1217 /**
1218 * Clear the interrupt force action flag.
1219 *
1220 * @param pDevIns Device instance of the APIC.
1221 * @param idCpu Virtual CPU to clear flag upon.
1222 */
1223 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1224
1225 /**
1226 * Modifies APIC-related bits in the CPUID feature mask.
1227 *
1228 * @param pDevIns Device instance of the APIC.
1229 * @param enmVersion Supported APIC version.
1230 */
1231 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1232
1233 /**
1234 * Acquires the PDM lock.
1235 *
1236 * @returns VINF_SUCCESS on success.
1237 * @returns rc if we failed to acquire the lock.
1238 * @param pDevIns The APIC device instance.
1239 * @param rc What to return if we fail to acquire the lock.
1240 */
1241 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1242
1243 /**
1244 * Releases the PDM lock.
1245 *
1246 * @param pDevIns The APIC device instance.
1247 */
1248 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1249
1250 /**
1251 * Get the virtual CPU id corresponding to the current EMT.
1252 *
1253 * @param pDevIns The APIC device instance.
1254 */
1255 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1256
1257 /** Just a safety precaution. */
1258 uint32_t u32TheEnd;
1259} PDMAPICHLPR0;
1260/** Pointer to APIC GC helpers. */
1261typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1262/** Pointer to const APIC helpers. */
1263typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1264
1265/** Current PDMAPICHLPR0 version number. */
1266#define PDM_APICHLPR0_VERSION 0x60020000
1267
1268/**
1269 * APIC R3 helpers.
1270 */
1271typedef struct PDMAPICHLPR3
1272{
1273 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1274 uint32_t u32Version;
1275
1276 /**
1277 * Set the interrupt force action flag.
1278 *
1279 * @param pDevIns Device instance of the APIC.
1280 * @param enmType IRQ type.
1281 * @param idCpu Virtual CPU to set flag upon.
1282 */
1283 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1284
1285 /**
1286 * Clear the interrupt force action flag.
1287 *
1288 * @param pDevIns Device instance of the APIC.
1289 * @param idCpu Virtual CPU to clear flag upon.
1290 */
1291 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1292
1293 /**
1294 * Modifies APIC-related bits in the CPUID feature mask.
1295 *
1296 * @param pDevIns Device instance of the APIC.
1297 * @param enmVersion Supported APIC version.
1298 */
1299 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1300
1301 /**
1302 * Get the virtual CPU id corresponding to the current EMT.
1303 *
1304 * @param pDevIns The APIC device instance.
1305 */
1306 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1307
1308 /**
1309 * Sends SIPI to given virtual CPU.
1310 *
1311 * @param pDevIns The APIC device instance.
1312 * @param idCpu Virtual CPU to perform SIPI on
1313 * @param iVector SIPI vector
1314 */
1315 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1316
1317 /**
1318 * Sends init IPI to given virtual CPU, should result in reset and
1319 * halting till SIPI.
1320 *
1321 * @param pDevIns The APIC device instance.
1322 * @param idCpu Virtual CPU to perform SIPI on
1323 */
1324 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1325
1326 /**
1327 * Gets the address of the RC APIC helpers.
1328 *
1329 * This should be called at both construction and relocation time
1330 * to obtain the correct address of the RC helpers.
1331 *
1332 * @returns GC pointer to the APIC helpers.
1333 * @param pDevIns Device instance of the APIC.
1334 */
1335 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1336
1337 /**
1338 * Gets the address of the R0 APIC helpers.
1339 *
1340 * This should be called at both construction and relocation time
1341 * to obtain the correct address of the R0 helpers.
1342 *
1343 * @returns R0 pointer to the APIC helpers.
1344 * @param pDevIns Device instance of the APIC.
1345 */
1346 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1347
1348 /**
1349 * Get the critical section used to synchronize the PICs, PCI and stuff.
1350 *
1351 * @returns Ring-3 pointer to the critical section.
1352 * @param pDevIns The APIC device instance.
1353 */
1354 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1355
1356 /**
1357 * Get the critical section used to synchronize the PICs, PCI and stuff.
1358 *
1359 * @returns Raw-mode context pointer to the critical section.
1360 * @param pDevIns The APIC device instance.
1361 */
1362 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1363
1364 /**
1365 * Get the critical section used to synchronize the PICs, PCI and stuff.
1366 *
1367 * @returns Ring-0 pointer to the critical section.
1368 * @param pDevIns The APIC device instance.
1369 */
1370 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1371
1372 /** Just a safety precaution. */
1373 uint32_t u32TheEnd;
1374} PDMAPICHLPR3;
1375/** Pointer to APIC helpers. */
1376typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1377/** Pointer to const APIC helpers. */
1378typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1379
1380/** Current PDMAPICHLP version number. */
1381#define PDM_APICHLPR3_VERSION 0xfd030000
1382
1383
1384/**
1385 * I/O APIC registration structure.
1386 */
1387typedef struct PDMIOAPICREG
1388{
1389 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1390 uint32_t u32Version;
1391
1392 /**
1393 * Set the an IRQ.
1394 *
1395 * @param pDevIns Device instance of the I/O APIC.
1396 * @param iIrq IRQ number to set.
1397 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1398 */
1399 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1400
1401 /** The name of the GC SetIrq entry point. */
1402 const char *pszSetIrqRC;
1403
1404 /** The name of the R0 SetIrq entry point. */
1405 const char *pszSetIrqR0;
1406} PDMIOAPICREG;
1407/** Pointer to an APIC registration structure. */
1408typedef PDMIOAPICREG *PPDMIOAPICREG;
1409
1410/** Current PDMAPICREG version number. */
1411#define PDM_IOAPICREG_VERSION 0x50010000
1412
1413
1414/**
1415 * IOAPIC RC helpers.
1416 */
1417typedef struct PDMIOAPICHLPRC
1418{
1419 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1420 uint32_t u32Version;
1421
1422 /**
1423 * Private interface between the IOAPIC and APIC.
1424 *
1425 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1426 *
1427 * @returns status code.
1428 * @param pDevIns Device instance of the IOAPIC.
1429 * @param u8Dest See APIC implementation.
1430 * @param u8DestMode See APIC implementation.
1431 * @param u8DeliveryMode See APIC implementation.
1432 * @param iVector See APIC implementation.
1433 * @param u8Polarity See APIC implementation.
1434 * @param u8TriggerMode See APIC implementation.
1435 */
1436 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1437 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1438
1439 /**
1440 * Acquires the PDM lock.
1441 *
1442 * @returns VINF_SUCCESS on success.
1443 * @returns rc if we failed to acquire the lock.
1444 * @param pDevIns The IOAPIC device instance.
1445 * @param rc What to return if we fail to acquire the lock.
1446 */
1447 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1448
1449 /**
1450 * Releases the PDM lock.
1451 *
1452 * @param pDevIns The IOAPIC device instance.
1453 */
1454 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1455
1456 /** Just a safety precaution. */
1457 uint32_t u32TheEnd;
1458} PDMIOAPICHLPRC;
1459/** Pointer to IOAPIC RC helpers. */
1460typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1461/** Pointer to const IOAPIC helpers. */
1462typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1463
1464/** Current PDMIOAPICHLPRC version number. */
1465#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1466
1467
1468/**
1469 * IOAPIC R0 helpers.
1470 */
1471typedef struct PDMIOAPICHLPR0
1472{
1473 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1474 uint32_t u32Version;
1475
1476 /**
1477 * Private interface between the IOAPIC and APIC.
1478 *
1479 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1480 *
1481 * @returns status code.
1482 * @param pDevIns Device instance of the IOAPIC.
1483 * @param u8Dest See APIC implementation.
1484 * @param u8DestMode See APIC implementation.
1485 * @param u8DeliveryMode See APIC implementation.
1486 * @param iVector See APIC implementation.
1487 * @param u8Polarity See APIC implementation.
1488 * @param u8TriggerMode See APIC implementation.
1489 */
1490 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1491 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1492
1493 /**
1494 * Acquires the PDM lock.
1495 *
1496 * @returns VINF_SUCCESS on success.
1497 * @returns rc if we failed to acquire the lock.
1498 * @param pDevIns The IOAPIC device instance.
1499 * @param rc What to return if we fail to acquire the lock.
1500 */
1501 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1502
1503 /**
1504 * Releases the PDM lock.
1505 *
1506 * @param pDevIns The IOAPIC device instance.
1507 */
1508 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1509
1510 /** Just a safety precaution. */
1511 uint32_t u32TheEnd;
1512} PDMIOAPICHLPR0;
1513/** Pointer to IOAPIC R0 helpers. */
1514typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1515/** Pointer to const IOAPIC helpers. */
1516typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1517
1518/** Current PDMIOAPICHLPR0 version number. */
1519#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1520
1521/**
1522 * IOAPIC R3 helpers.
1523 */
1524typedef struct PDMIOAPICHLPR3
1525{
1526 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1527 uint32_t u32Version;
1528
1529 /**
1530 * Private interface between the IOAPIC and APIC.
1531 *
1532 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1533 *
1534 * @returns status code
1535 * @param pDevIns Device instance of the IOAPIC.
1536 * @param u8Dest See APIC implementation.
1537 * @param u8DestMode See APIC implementation.
1538 * @param u8DeliveryMode See APIC implementation.
1539 * @param iVector See APIC implementation.
1540 * @param u8Polarity See APIC implementation.
1541 * @param u8TriggerMode See APIC implementation.
1542 */
1543 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1544 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1545
1546 /**
1547 * Acquires the PDM lock.
1548 *
1549 * @returns VINF_SUCCESS on success.
1550 * @returns Fatal error on failure.
1551 * @param pDevIns The IOAPIC device instance.
1552 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1553 */
1554 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1555
1556 /**
1557 * Releases the PDM lock.
1558 *
1559 * @param pDevIns The IOAPIC device instance.
1560 */
1561 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1562
1563 /**
1564 * Gets the address of the RC IOAPIC helpers.
1565 *
1566 * This should be called at both construction and relocation time
1567 * to obtain the correct address of the RC helpers.
1568 *
1569 * @returns RC pointer to the IOAPIC helpers.
1570 * @param pDevIns Device instance of the IOAPIC.
1571 */
1572 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1573
1574 /**
1575 * Gets the address of the R0 IOAPIC helpers.
1576 *
1577 * This should be called at both construction and relocation time
1578 * to obtain the correct address of the R0 helpers.
1579 *
1580 * @returns R0 pointer to the IOAPIC helpers.
1581 * @param pDevIns Device instance of the IOAPIC.
1582 */
1583 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1584
1585 /** Just a safety precaution. */
1586 uint32_t u32TheEnd;
1587} PDMIOAPICHLPR3;
1588/** Pointer to IOAPIC R3 helpers. */
1589typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1590/** Pointer to const IOAPIC helpers. */
1591typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1592
1593/** Current PDMIOAPICHLPR3 version number. */
1594#define PDM_IOAPICHLPR3_VERSION 0xff010000
1595
1596
1597
1598#ifdef IN_RING3
1599
1600/**
1601 * DMA Transfer Handler.
1602 *
1603 * @returns Number of bytes transferred.
1604 * @param pDevIns Device instance of the DMA.
1605 * @param pvUser User pointer.
1606 * @param uChannel Channel number.
1607 * @param off DMA position.
1608 * @param cb Block size.
1609 */
1610typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1611/** Pointer to a FNDMATRANSFERHANDLER(). */
1612typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1613
1614/**
1615 * DMA Controller registration structure.
1616 */
1617typedef struct PDMDMAREG
1618{
1619 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1620 uint32_t u32Version;
1621
1622 /**
1623 * Execute pending transfers.
1624 *
1625 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1626 * @param pDevIns Device instance of the DMAC.
1627 */
1628 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1629
1630 /**
1631 * Register transfer function for DMA channel.
1632 *
1633 * @param pDevIns Device instance of the DMAC.
1634 * @param uChannel Channel number.
1635 * @param pfnTransferHandler Device specific transfer function.
1636 * @param pvUSer User pointer to be passed to the callback.
1637 */
1638 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1639
1640 /**
1641 * Read memory
1642 *
1643 * @returns Number of bytes read.
1644 * @param pDevIns Device instance of the DMAC.
1645 * @param pvBuffer Pointer to target buffer.
1646 * @param off DMA position.
1647 * @param cbBlock Block size.
1648 */
1649 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1650
1651 /**
1652 * Write memory
1653 *
1654 * @returns Number of bytes written.
1655 * @param pDevIns Device instance of the DMAC.
1656 * @param pvBuffer Memory to write.
1657 * @param off DMA position.
1658 * @param cbBlock Block size.
1659 */
1660 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1661
1662 /**
1663 * Set the DREQ line.
1664 *
1665 * @param pDevIns Device instance of the DMAC.
1666 * @param uChannel Channel number.
1667 * @param uLevel Level of the line.
1668 */
1669 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1670
1671 /**
1672 * Get channel mode
1673 *
1674 * @returns Channel mode.
1675 * @param pDevIns Device instance of the DMAC.
1676 * @param uChannel Channel number.
1677 */
1678 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1679
1680} PDMDMACREG;
1681/** Pointer to a DMAC registration structure. */
1682typedef PDMDMACREG *PPDMDMACREG;
1683
1684/** Current PDMDMACREG version number. */
1685#define PDM_DMACREG_VERSION 0xf5010000
1686
1687
1688/**
1689 * DMA Controller device helpers.
1690 */
1691typedef struct PDMDMACHLP
1692{
1693 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1694 uint32_t u32Version;
1695
1696 /* to-be-defined */
1697
1698} PDMDMACHLP;
1699/** Pointer to DMAC helpers. */
1700typedef PDMDMACHLP *PPDMDMACHLP;
1701/** Pointer to const DMAC helpers. */
1702typedef const PDMDMACHLP *PCPDMDMACHLP;
1703
1704/** Current PDMDMACHLP version number. */
1705#define PDM_DMACHLP_VERSION 0xf6010000
1706
1707#endif /* IN_RING3 */
1708
1709
1710
1711/**
1712 * RTC registration structure.
1713 */
1714typedef struct PDMRTCREG
1715{
1716 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1717 uint32_t u32Version;
1718 uint32_t u32Alignment; /**< structure size alignment. */
1719
1720 /**
1721 * Write to a CMOS register and update the checksum if necessary.
1722 *
1723 * @returns VBox status code.
1724 * @param pDevIns Device instance of the RTC.
1725 * @param iReg The CMOS register index.
1726 * @param u8Value The CMOS register value.
1727 */
1728 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1729
1730 /**
1731 * Read a CMOS register.
1732 *
1733 * @returns VBox status code.
1734 * @param pDevIns Device instance of the RTC.
1735 * @param iReg The CMOS register index.
1736 * @param pu8Value Where to store the CMOS register value.
1737 */
1738 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1739
1740} PDMRTCREG;
1741/** Pointer to a RTC registration structure. */
1742typedef PDMRTCREG *PPDMRTCREG;
1743/** Pointer to a const RTC registration structure. */
1744typedef const PDMRTCREG *PCPDMRTCREG;
1745
1746/** Current PDMRTCREG version number. */
1747#define PDM_RTCREG_VERSION 0xfa010000
1748
1749
1750/**
1751 * RTC device helpers.
1752 */
1753typedef struct PDMRTCHLP
1754{
1755 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1756 uint32_t u32Version;
1757
1758 /* to-be-defined */
1759
1760} PDMRTCHLP;
1761/** Pointer to RTC helpers. */
1762typedef PDMRTCHLP *PPDMRTCHLP;
1763/** Pointer to const RTC helpers. */
1764typedef const PDMRTCHLP *PCPDMRTCHLP;
1765
1766/** Current PDMRTCHLP version number. */
1767#define PDM_RTCHLP_VERSION 0xf6010000
1768
1769
1770
1771#ifdef IN_RING3
1772
1773/**
1774 * PDM Device API.
1775 */
1776typedef struct PDMDEVHLPR3
1777{
1778 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1779 uint32_t u32Version;
1780
1781 /**
1782 * Register a number of I/O ports with a device.
1783 *
1784 * These callbacks are of course for the host context (HC).
1785 * Register HC handlers before guest context (GC) handlers! There must be a
1786 * HC handler for every GC handler!
1787 *
1788 * @returns VBox status.
1789 * @param pDevIns The device instance to register the ports with.
1790 * @param Port First port number in the range.
1791 * @param cPorts Number of ports to register.
1792 * @param pvUser User argument.
1793 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1794 * @param pfnIn Pointer to function which is gonna handle IN operations.
1795 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1796 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1797 * @param pszDesc Pointer to description string. This must not be freed.
1798 */
1799 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1800 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1801 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1802
1803 /**
1804 * Register a number of I/O ports with a device for GC.
1805 *
1806 * These callbacks are for the host context (GC).
1807 * Register host context (HC) handlers before guest context handlers! There must be a
1808 * HC handler for every GC handler!
1809 *
1810 * @returns VBox status.
1811 * @param pDevIns The device instance to register the ports with and which GC module
1812 * to resolve the names against.
1813 * @param Port First port number in the range.
1814 * @param cPorts Number of ports to register.
1815 * @param pvUser User argument.
1816 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1817 * @param pszIn Name of the GC function which is gonna handle IN operations.
1818 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1819 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1820 * @param pszDesc Pointer to description string. This must not be freed.
1821 */
1822 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1823 const char *pszOut, const char *pszIn,
1824 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1825
1826 /**
1827 * Register a number of I/O ports with a device.
1828 *
1829 * These callbacks are of course for the ring-0 host context (R0).
1830 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1831 *
1832 * @returns VBox status.
1833 * @param pDevIns The device instance to register the ports with.
1834 * @param Port First port number in the range.
1835 * @param cPorts Number of ports to register.
1836 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1837 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1838 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1839 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1840 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1841 * @param pszDesc Pointer to description string. This must not be freed.
1842 */
1843 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1844 const char *pszOut, const char *pszIn,
1845 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1846
1847 /**
1848 * Deregister I/O ports.
1849 *
1850 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1851 *
1852 * @returns VBox status.
1853 * @param pDevIns The device instance owning the ports.
1854 * @param Port First port number in the range.
1855 * @param cPorts Number of ports to deregister.
1856 */
1857 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1858
1859 /**
1860 * Register a Memory Mapped I/O (MMIO) region.
1861 *
1862 * These callbacks are of course for the host context (HC).
1863 * Register HC handlers before guest context (GC) handlers! There must be a
1864 * HC handler for every GC handler!
1865 *
1866 * @returns VBox status.
1867 * @param pDevIns The device instance to register the MMIO with.
1868 * @param GCPhysStart First physical address in the range.
1869 * @param cbRange The size of the range (in bytes).
1870 * @param pvUser User argument.
1871 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1872 * @param pfnRead Pointer to function which is gonna handle Read operations.
1873 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1874 * @param pszDesc Pointer to description string. This must not be freed.
1875 */
1876 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1877 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1878 const char *pszDesc));
1879
1880 /**
1881 * Register a Memory Mapped I/O (MMIO) region for GC.
1882 *
1883 * These callbacks are for the guest context (GC).
1884 * Register host context (HC) handlers before guest context handlers! There must be a
1885 * HC handler for every GC handler!
1886 *
1887 * @returns VBox status.
1888 * @param pDevIns The device instance to register the MMIO with.
1889 * @param GCPhysStart First physical address in the range.
1890 * @param cbRange The size of the range (in bytes).
1891 * @param pvUser User argument.
1892 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1893 * @param pszRead Name of the GC function which is gonna handle Read operations.
1894 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1895 * @param pszDesc Obsolete. NULL is fine.
1896 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1897 */
1898 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1899 const char *pszWrite, const char *pszRead, const char *pszFill,
1900 const char *pszDesc));
1901
1902 /**
1903 * Register a Memory Mapped I/O (MMIO) region for R0.
1904 *
1905 * These callbacks are for the ring-0 host context (R0).
1906 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1907 *
1908 * @returns VBox status.
1909 * @param pDevIns The device instance to register the MMIO with.
1910 * @param GCPhysStart First physical address in the range.
1911 * @param cbRange The size of the range (in bytes).
1912 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1913 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1914 * @param pszRead Name of the GC function which is gonna handle Read operations.
1915 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1916 * @param pszDesc Obsolete. NULL is fine.
1917 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1918 */
1919 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1920 const char *pszWrite, const char *pszRead, const char *pszFill,
1921 const char *pszDesc));
1922
1923 /**
1924 * Deregister a Memory Mapped I/O (MMIO) region.
1925 *
1926 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1927 *
1928 * @returns VBox status.
1929 * @param pDevIns The device instance owning the MMIO region(s).
1930 * @param GCPhysStart First physical address in the range.
1931 * @param cbRange The size of the range (in bytes).
1932 */
1933 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1934
1935 /**
1936 * Register a ROM (BIOS) region.
1937 *
1938 * It goes without saying that this is read-only memory. The memory region must be
1939 * in unassigned memory. I.e. from the top of the address space or on the PC in
1940 * the 0xa0000-0xfffff range.
1941 *
1942 * @returns VBox status.
1943 * @param pDevIns The device instance owning the ROM region.
1944 * @param GCPhysStart First physical address in the range.
1945 * Must be page aligned!
1946 * @param cbRange The size of the range (in bytes).
1947 * Must be page aligned!
1948 * @param pvBinary Pointer to the binary data backing the ROM image.
1949 * This must be cbRange bytes big.
1950 * It will be copied and doesn't have to stick around if fShadow is clear.
1951 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
1952 * @param pszDesc Pointer to description string. This must not be freed.
1953 *
1954 * @remark There is no way to remove the rom, automatically on device cleanup or
1955 * manually from the device yet. At present I doubt we need such features...
1956 */
1957 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
1958
1959 /**
1960 * Register a save state data unit.
1961 *
1962 * @returns VBox status.
1963 * @param pDevIns Device instance.
1964 * @param pszName Data unit name.
1965 * @param u32Instance The instance identifier of the data unit.
1966 * This must together with the name be unique.
1967 * @param u32Version Data layout version number.
1968 * @param cbGuess The approximate amount of data in the unit.
1969 * Only for progress indicators.
1970 * @param pfnSavePrep Prepare save callback, optional.
1971 * @param pfnSaveExec Execute save callback, optional.
1972 * @param pfnSaveDone Done save callback, optional.
1973 * @param pfnLoadPrep Prepare load callback, optional.
1974 * @param pfnLoadExec Execute load callback, optional.
1975 * @param pfnLoadDone Done load callback, optional.
1976 */
1977 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1978 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1979 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1980
1981 /**
1982 * Creates a timer.
1983 *
1984 * @returns VBox status.
1985 * @param pDevIns Device instance.
1986 * @param enmClock The clock to use on this timer.
1987 * @param pfnCallback Callback function.
1988 * @param pvUser User argument for the callback.
1989 * @param fFlags Flags, see TMTIMER_FLAGS_*.
1990 * @param pszDesc Pointer to description string which must stay around
1991 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1992 * @param ppTimer Where to store the timer on success.
1993 */
1994 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
1995
1996 /**
1997 * Registers the device with the default PCI bus.
1998 *
1999 * @returns VBox status code.
2000 * @param pDevIns Device instance.
2001 * @param pPciDev The PCI device structure.
2002 * Any PCI enabled device must keep this in it's instance data!
2003 * Fill in the PCI data config before registration, please.
2004 * @remark This is the simple interface, a Ex interface will be created if
2005 * more features are needed later.
2006 */
2007 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2008
2009 /**
2010 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2011 *
2012 * @returns VBox status code.
2013 * @param pDevIns Device instance.
2014 * @param iRegion The region number.
2015 * @param cbRegion Size of the region.
2016 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2017 * @param pfnCallback Callback for doing the mapping.
2018 */
2019 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2020
2021 /**
2022 * Register PCI configuration space read/write callbacks.
2023 *
2024 * @param pDevIns Device instance.
2025 * @param pPciDev The PCI device structure.
2026 * If NULL the default PCI device for this device instance is used.
2027 * @param pfnRead Pointer to the user defined PCI config read function.
2028 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2029 * PCI config read function. This way, user can decide when (and if)
2030 * to call default PCI config read function. Can be NULL.
2031 * @param pfnWrite Pointer to the user defined PCI config write function.
2032 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2033 * PCI config write function. This way, user can decide when (and if)
2034 * to call default PCI config write function. Can be NULL.
2035 * @thread EMT
2036 */
2037 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2038 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2039
2040 /**
2041 * Set the IRQ for a PCI device.
2042 *
2043 * @param pDevIns Device instance.
2044 * @param iIrq IRQ number to set.
2045 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2046 * @thread Any thread, but will involve the emulation thread.
2047 */
2048 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2049
2050 /**
2051 * Set the IRQ for a PCI device, but don't wait for EMT to process
2052 * the request when not called from EMT.
2053 *
2054 * @param pDevIns Device instance.
2055 * @param iIrq IRQ number to set.
2056 * @param iLevel IRQ level.
2057 * @thread Any thread, but will involve the emulation thread.
2058 */
2059 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2060
2061 /**
2062 * Set ISA IRQ for a device.
2063 *
2064 * @param pDevIns Device instance.
2065 * @param iIrq IRQ number to set.
2066 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2067 * @thread Any thread, but will involve the emulation thread.
2068 */
2069 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2070
2071 /**
2072 * Set the ISA IRQ for a device, but don't wait for EMT to process
2073 * the request when not called from EMT.
2074 *
2075 * @param pDevIns Device instance.
2076 * @param iIrq IRQ number to set.
2077 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2078 * @thread Any thread, but will involve the emulation thread.
2079 */
2080 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2081
2082 /**
2083 * Attaches a driver (chain) to the device.
2084 *
2085 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2086 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2087 *
2088 * @returns VBox status code.
2089 * @param pDevIns Device instance.
2090 * @param iLun The logical unit to attach.
2091 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2092 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2093 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2094 * for the live of the device instance.
2095 */
2096 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2097
2098 /**
2099 * Allocate memory which is associated with current VM instance
2100 * and automatically freed on it's destruction.
2101 *
2102 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2103 * @param pDevIns Device instance.
2104 * @param cb Number of bytes to allocate.
2105 */
2106 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2107
2108 /**
2109 * Allocate memory which is associated with current VM instance
2110 * and automatically freed on it's destruction. The memory is ZEROed.
2111 *
2112 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2113 * @param pDevIns Device instance.
2114 * @param cb Number of bytes to allocate.
2115 */
2116 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2117
2118 /**
2119 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2120 *
2121 * @param pDevIns Device instance.
2122 * @param pv Pointer to the memory to free.
2123 */
2124 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2125
2126 /**
2127 * Set the VM error message
2128 *
2129 * @returns rc.
2130 * @param pDevIns Device instance.
2131 * @param rc VBox status code.
2132 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2133 * @param pszFormat Error message format string.
2134 * @param ... Error message arguments.
2135 */
2136 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2137
2138 /**
2139 * Set the VM error message
2140 *
2141 * @returns rc.
2142 * @param pDevIns Device instance.
2143 * @param rc VBox status code.
2144 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2145 * @param pszFormat Error message format string.
2146 * @param va Error message arguments.
2147 */
2148 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2149
2150 /**
2151 * Set the VM runtime error message
2152 *
2153 * @returns VBox status code.
2154 * @param pDevIns Device instance.
2155 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2156 * @param pszErrorId Error ID string.
2157 * @param pszFormat Error message format string.
2158 * @param ... Error message arguments.
2159 */
2160 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2161
2162 /**
2163 * Set the VM runtime error message
2164 *
2165 * @returns VBox status code.
2166 * @param pDevIns Device instance.
2167 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2168 * @param pszErrorId Error ID string.
2169 * @param pszFormat Error message format string.
2170 * @param va Error message arguments.
2171 */
2172 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2173
2174 /**
2175 * Assert that the current thread is the emulation thread.
2176 *
2177 * @returns True if correct.
2178 * @returns False if wrong.
2179 * @param pDevIns Device instance.
2180 * @param pszFile Filename of the assertion location.
2181 * @param iLine The linenumber of the assertion location.
2182 * @param pszFunction Function of the assertion location.
2183 */
2184 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2185
2186 /**
2187 * Assert that the current thread is NOT the emulation thread.
2188 *
2189 * @returns True if correct.
2190 * @returns False if wrong.
2191 * @param pDevIns Device instance.
2192 * @param pszFile Filename of the assertion location.
2193 * @param iLine The linenumber of the assertion location.
2194 * @param pszFunction Function of the assertion location.
2195 */
2196 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2197
2198 /**
2199 * Stops the VM and enters the debugger to look at the guest state.
2200 *
2201 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2202 * invoking this function directly.
2203 *
2204 * @returns VBox status code which must be passed up to the VMM.
2205 * @param pDevIns Device instance.
2206 * @param pszFile Filename of the assertion location.
2207 * @param iLine The linenumber of the assertion location.
2208 * @param pszFunction Function of the assertion location.
2209 * @param pszFormat Message. (optional)
2210 * @param args Message parameters.
2211 */
2212 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2213
2214 /**
2215 * Register a info handler with DBGF,
2216 *
2217 * @returns VBox status code.
2218 * @param pDevIns Device instance.
2219 * @param pszName The identifier of the info.
2220 * @param pszDesc The description of the info and any arguments
2221 * the handler may take.
2222 * @param pfnHandler The handler function to be called to display the
2223 * info.
2224 */
2225 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2226
2227 /**
2228 * Registers a statistics sample if statistics are enabled.
2229 *
2230 * @param pDevIns Device instance of the DMA.
2231 * @param pvSample Pointer to the sample.
2232 * @param enmType Sample type. This indicates what pvSample is
2233 * pointing at.
2234 * @param pszName Sample name. The name is on this form
2235 * "/<component>/<sample>". Further nesting is
2236 * possible.
2237 * @param enmUnit Sample unit.
2238 * @param pszDesc Sample description.
2239 */
2240 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2241
2242 /**
2243 * Same as pfnSTAMRegister except that the name is specified in a
2244 * RTStrPrintf like fashion.
2245 *
2246 * @returns VBox status.
2247 * @param pDevIns Device instance of the DMA.
2248 * @param pvSample Pointer to the sample.
2249 * @param enmType Sample type. This indicates what pvSample is
2250 * pointing at.
2251 * @param enmVisibility Visibility type specifying whether unused
2252 * statistics should be visible or not.
2253 * @param enmUnit Sample unit.
2254 * @param pszDesc Sample description.
2255 * @param pszName The sample name format string.
2256 * @param ... Arguments to the format string.
2257 */
2258 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2259 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2260
2261 /**
2262 * Same as pfnSTAMRegister except that the name is specified in a
2263 * RTStrPrintfV like fashion.
2264 *
2265 * @returns VBox status.
2266 * @param pDevIns Device instance of the DMA.
2267 * @param pvSample Pointer to the sample.
2268 * @param enmType Sample type. This indicates what pvSample is
2269 * pointing at.
2270 * @param enmVisibility Visibility type specifying whether unused
2271 * statistics should be visible or not.
2272 * @param enmUnit Sample unit.
2273 * @param pszDesc Sample description.
2274 * @param pszName The sample name format string.
2275 * @param args Arguments to the format string.
2276 */
2277 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2278 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2279
2280 /**
2281 * Register the RTC device.
2282 *
2283 * @returns VBox status code.
2284 * @param pDevIns Device instance.
2285 * @param pRtcReg Pointer to a RTC registration structure.
2286 * @param ppRtcHlp Where to store the pointer to the helper
2287 * functions.
2288 */
2289 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2290
2291 /**
2292 * Create a queue.
2293 *
2294 * @returns VBox status code.
2295 * @param pDevIns The device instance.
2296 * @param cbItem The size of a queue item.
2297 * @param cItems The number of items in the queue.
2298 * @param cMilliesInterval The number of milliseconds between polling the queue.
2299 * If 0 then the emulation thread will be notified whenever an item arrives.
2300 * @param pfnCallback The consumer function.
2301 * @param fGCEnabled Set if the queue should work in GC too.
2302 * @param ppQueue Where to store the queue handle on success.
2303 * @thread The emulation thread.
2304 */
2305 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2306 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2307
2308 /**
2309 * Initializes a PDM critical section.
2310 *
2311 * The PDM critical sections are derived from the IPRT critical sections, but
2312 * works in GC as well.
2313 *
2314 * @returns VBox status code.
2315 * @param pDevIns Device instance.
2316 * @param pCritSect Pointer to the critical section.
2317 * @param pszName The name of the critical section (for
2318 * statistics).
2319 */
2320 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2321
2322 /**
2323 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2324 *
2325 * @returns pTime.
2326 * @param pDevIns Device instance.
2327 * @param pTime Where to store the time.
2328 */
2329 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2330
2331 /**
2332 * Creates a PDM thread.
2333 *
2334 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2335 * resuming, and destroying the thread as the VM state changes.
2336 *
2337 * @returns VBox status code.
2338 * @param pDevIns The device instance.
2339 * @param ppThread Where to store the thread 'handle'.
2340 * @param pvUser The user argument to the thread function.
2341 * @param pfnThread The thread function.
2342 * @param pfnWakeup The wakup callback. This is called on the EMT
2343 * thread when a state change is pending.
2344 * @param cbStack See RTThreadCreate.
2345 * @param enmType See RTThreadCreate.
2346 * @param pszName See RTThreadCreate.
2347 */
2348 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2349 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2350
2351 /**
2352 * Convert a guest virtual address to a guest physical address.
2353 *
2354 * @returns VBox status code.
2355 * @param pDevIns Device instance.
2356 * @param GCPtr Guest virtual address.
2357 * @param pGCPhys Where to store the GC physical address
2358 * corresponding to GCPtr.
2359 * @thread The emulation thread.
2360 * @remark Careful with page boundraries.
2361 */
2362 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2363
2364 /**
2365 * Gets the VM state.
2366 *
2367 * @returns VM state.
2368 * @param pDevIns The device instance.
2369 * @thread Any thread (just keep in mind that it's volatile info).
2370 */
2371 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2372
2373 /** Space reserved for future members.
2374 * @{ */
2375 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2376 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2377 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2378 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2379 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2380 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2381 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2382 /** @} */
2383
2384
2385 /** API available to trusted devices only.
2386 *
2387 * These APIs are providing unrestricted access to the guest and the VM,
2388 * or they are interacting intimately with PDM.
2389 *
2390 * @{
2391 */
2392 /**
2393 * Gets the VM handle. Restricted API.
2394 *
2395 * @returns VM Handle.
2396 * @param pDevIns Device instance.
2397 */
2398 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2399
2400 /**
2401 * Register the PCI Bus.
2402 *
2403 * @returns VBox status code.
2404 * @param pDevIns Device instance.
2405 * @param pPciBusReg Pointer to PCI bus registration structure.
2406 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2407 * helpers.
2408 */
2409 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2410
2411 /**
2412 * Register the PIC device.
2413 *
2414 * @returns VBox status code.
2415 * @param pDevIns Device instance.
2416 * @param pPicReg Pointer to a PIC registration structure.
2417 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2418 * helpers.
2419 */
2420 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2421
2422 /**
2423 * Register the APIC device.
2424 *
2425 * @returns VBox status code.
2426 * @param pDevIns Device instance.
2427 * @param pApicReg Pointer to a APIC registration structure.
2428 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2429 */
2430 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2431
2432 /**
2433 * Register the I/O APIC device.
2434 *
2435 * @returns VBox status code.
2436 * @param pDevIns Device instance.
2437 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2438 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2439 * helpers.
2440 */
2441 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2442
2443 /**
2444 * Register the DMA device.
2445 *
2446 * @returns VBox status code.
2447 * @param pDevIns Device instance.
2448 * @param pDmacReg Pointer to a DMAC registration structure.
2449 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2450 */
2451 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2452
2453 /**
2454 * Read physical memory.
2455 *
2456 * @returns VINF_SUCCESS (for now).
2457 * @param pDevIns Device instance.
2458 * @param GCPhys Physical address start reading from.
2459 * @param pvBuf Where to put the read bits.
2460 * @param cbRead How many bytes to read.
2461 * @thread Any thread, but the call may involve the emulation thread.
2462 */
2463 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2464
2465 /**
2466 * Write to physical memory.
2467 *
2468 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2469 * @param pDevIns Device instance.
2470 * @param GCPhys Physical address to write to.
2471 * @param pvBuf What to write.
2472 * @param cbWrite How many bytes to write.
2473 * @thread Any thread, but the call may involve the emulation thread.
2474 */
2475 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2476
2477 /**
2478 * Requests the mapping of a guest page into ring-3.
2479 *
2480 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2481 * release it.
2482 *
2483 * This API will assume your intention is to write to the page, and will
2484 * therefore replace shared and zero pages. If you do not intend to modify the
2485 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2486 *
2487 * @returns VBox status code.
2488 * @retval VINF_SUCCESS on success.
2489 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2490 * backing or if the page has any active access handlers. The caller
2491 * must fall back on using PGMR3PhysWriteExternal.
2492 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2493 *
2494 * @param pVM The VM handle.
2495 * @param GCPhys The guest physical address of the page that
2496 * should be mapped.
2497 * @param fFlags Flags reserved for future use, MBZ.
2498 * @param ppv Where to store the address corresponding to
2499 * GCPhys.
2500 * @param pLock Where to store the lock information that
2501 * pfnPhysReleasePageMappingLock needs.
2502 *
2503 * @remark Avoid calling this API from within critical sections (other than the
2504 * PGM one) because of the deadlock risk when we have to delegating the
2505 * task to an EMT.
2506 * @thread Any.
2507 */
2508 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2509
2510 /**
2511 * Requests the mapping of a guest page into ring-3, external threads.
2512 *
2513 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2514 * release it.
2515 *
2516 * @returns VBox status code.
2517 * @retval VINF_SUCCESS on success.
2518 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2519 * backing or if the page as an active ALL access handler. The caller
2520 * must fall back on using PGMPhysRead.
2521 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2522 *
2523 * @param pDevIns Device instance.
2524 * @param GCPhys The guest physical address of the page that
2525 * should be mapped.
2526 * @param fFlags Flags reserved for future use, MBZ.
2527 * @param ppv Where to store the address corresponding to
2528 * GCPhys.
2529 * @param pLock Where to store the lock information that
2530 * pfnPhysReleasePageMappingLock needs.
2531 *
2532 * @remark Avoid calling this API from within critical sections.
2533 * @thread Any.
2534 */
2535 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2536
2537 /**
2538 * Release the mapping of a guest page.
2539 *
2540 * This is the counter part of pfnPhysGCPhys2CCPtr and
2541 * pfnPhysGCPhys2CCPtrReadOnly.
2542 *
2543 * @param pDevIns Device instance.
2544 * @param pLock The lock structure initialized by the mapping
2545 * function.
2546 */
2547 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2548
2549 /**
2550 * Read guest physical memory by virtual address.
2551 *
2552 * @param pDevIns Device instance.
2553 * @param pvDst Where to put the read bits.
2554 * @param GCVirtSrc Guest virtual address to start reading from.
2555 * @param cb How many bytes to read.
2556 * @thread The emulation thread.
2557 */
2558 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2559
2560 /**
2561 * Write to guest physical memory by virtual address.
2562 *
2563 * @param pDevIns Device instance.
2564 * @param GCVirtDst Guest virtual address to write to.
2565 * @param pvSrc What to write.
2566 * @param cb How many bytes to write.
2567 * @thread The emulation thread.
2568 */
2569 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2570
2571 /**
2572 * Checks if the Gate A20 is enabled or not.
2573 *
2574 * @returns true if A20 is enabled.
2575 * @returns false if A20 is disabled.
2576 * @param pDevIns Device instance.
2577 * @thread The emulation thread.
2578 */
2579 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2580
2581 /**
2582 * Enables or disables the Gate A20.
2583 *
2584 * @param pDevIns Device instance.
2585 * @param fEnable Set this flag to enable the Gate A20; clear it
2586 * to disable.
2587 * @thread The emulation thread.
2588 */
2589 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2590
2591 /**
2592 * Resets the VM.
2593 *
2594 * @returns The appropriate VBox status code to pass around on reset.
2595 * @param pDevIns Device instance.
2596 * @thread The emulation thread.
2597 */
2598 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2599
2600 /**
2601 * Suspends the VM.
2602 *
2603 * @returns The appropriate VBox status code to pass around on suspend.
2604 * @param pDevIns Device instance.
2605 * @thread The emulation thread.
2606 */
2607 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2608
2609 /**
2610 * Power off the VM.
2611 *
2612 * @returns The appropriate VBox status code to pass around on power off.
2613 * @param pDevIns Device instance.
2614 * @thread The emulation thread.
2615 */
2616 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2617
2618 /**
2619 * Register transfer function for DMA channel.
2620 *
2621 * @returns VBox status code.
2622 * @param pDevIns Device instance.
2623 * @param uChannel Channel number.
2624 * @param pfnTransferHandler Device specific transfer callback function.
2625 * @param pvUser User pointer to pass to the callback.
2626 * @thread EMT
2627 */
2628 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2629
2630 /**
2631 * Read memory.
2632 *
2633 * @returns VBox status code.
2634 * @param pDevIns Device instance.
2635 * @param uChannel Channel number.
2636 * @param pvBuffer Pointer to target buffer.
2637 * @param off DMA position.
2638 * @param cbBlock Block size.
2639 * @param pcbRead Where to store the number of bytes which was
2640 * read. optional.
2641 * @thread EMT
2642 */
2643 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2644
2645 /**
2646 * Write memory.
2647 *
2648 * @returns VBox status code.
2649 * @param pDevIns Device instance.
2650 * @param uChannel Channel number.
2651 * @param pvBuffer Memory to write.
2652 * @param off DMA position.
2653 * @param cbBlock Block size.
2654 * @param pcbWritten Where to store the number of bytes which was
2655 * written. optional.
2656 * @thread EMT
2657 */
2658 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2659
2660 /**
2661 * Set the DREQ line.
2662 *
2663 * @returns VBox status code.
2664 * @param pDevIns Device instance.
2665 * @param uChannel Channel number.
2666 * @param uLevel Level of the line.
2667 * @thread EMT
2668 */
2669 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2670
2671 /**
2672 * Get channel mode.
2673 *
2674 * @returns Channel mode. See specs.
2675 * @param pDevIns Device instance.
2676 * @param uChannel Channel number.
2677 * @thread EMT
2678 */
2679 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2680
2681 /**
2682 * Schedule DMA execution.
2683 *
2684 * @param pDevIns Device instance.
2685 * @thread Any thread.
2686 */
2687 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2688
2689 /**
2690 * Write CMOS value and update the checksum(s).
2691 *
2692 * @returns VBox status code.
2693 * @param pDevIns Device instance.
2694 * @param iReg The CMOS register index.
2695 * @param u8Value The CMOS register value.
2696 * @thread EMT
2697 */
2698 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2699
2700 /**
2701 * Read CMOS value.
2702 *
2703 * @returns VBox status code.
2704 * @param pDevIns Device instance.
2705 * @param iReg The CMOS register index.
2706 * @param pu8Value Where to store the CMOS register value.
2707 * @thread EMT
2708 */
2709 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2710
2711 /**
2712 * Get the specified CPUID leaf for the virtual CPU associated with the calling
2713 * thread.
2714 *
2715 * @param pDevIns Device instance.
2716 * @param iLeaf The CPUID leaf to get.
2717 * @param pEax Where to store the EAX value.
2718 * @param pEbx Where to store the EBX value.
2719 * @param pEcx Where to store the ECX value.
2720 * @param pEdx Where to store the EDX value.
2721 * @thread EMT.
2722 */
2723 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2724
2725 /**
2726 * Changes the protection of shadowed ROM mapping.
2727 *
2728 * This is intented for use by the system BIOS, chipset or device in question to
2729 * change the protection of shadowed ROM code after init and on reset.
2730 *
2731 * @param pDevIns Device instance.
2732 * @param GCPhysStart Where the mapping starts.
2733 * @param cbRange The size of the mapping.
2734 * @param enmProt The new protection type.
2735 */
2736 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2737
2738 /**
2739 * Allocate and register a MMIO2 region.
2740 *
2741 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2742 * RAM associated with a device. It is also non-shared memory with a
2743 * permanent ring-3 mapping and page backing (presently).
2744 *
2745 * @returns VBox status.
2746 * @param pDevIns The device instance.
2747 * @param iRegion The region number. Use the PCI region number as
2748 * this must be known to the PCI bus device too. If
2749 * it's not associated with the PCI device, then
2750 * any number up to UINT8_MAX is fine.
2751 * @param cb The size (in bytes) of the region.
2752 * @param fFlags Reserved for future use, must be zero.
2753 * @param ppv Where to store the address of the ring-3 mapping
2754 * of the memory.
2755 * @param pszDesc Pointer to description string. This must not be
2756 * freed.
2757 * @thread EMT.
2758 */
2759 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2760
2761 /**
2762 * Deregisters and frees a MMIO2 region.
2763 *
2764 * Any physical (and virtual) access handlers registered for the region must
2765 * be deregistered before calling this function.
2766 *
2767 * @returns VBox status code.
2768 * @param pDevIns The device instance.
2769 * @param iRegion The region number used during registration.
2770 * @thread EMT.
2771 */
2772 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2773
2774 /**
2775 * Maps a MMIO2 region into the physical memory space.
2776 *
2777 * A MMIO2 range may overlap with base memory if a lot of RAM
2778 * is configured for the VM, in which case we'll drop the base
2779 * memory pages. Presently we will make no attempt to preserve
2780 * anything that happens to be present in the base memory that
2781 * is replaced, this is of course incorrectly but it's too much
2782 * effort.
2783 *
2784 * @returns VBox status code.
2785 * @param pDevIns The device instance.
2786 * @param iRegion The region number used during registration.
2787 * @param GCPhys The physical address to map it at.
2788 * @thread EMT.
2789 */
2790 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2791
2792 /**
2793 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2794 *
2795 * @returns VBox status code.
2796 * @param pDevIns The device instance.
2797 * @param iRegion The region number used during registration.
2798 * @param GCPhys The physical address it's currently mapped at.
2799 * @thread EMT.
2800 */
2801 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2802
2803 /**
2804 * Maps a portion of an MMIO2 region into the hypervisor region.
2805 *
2806 * Callers of this API must never deregister the MMIO2 region before the
2807 * VM is powered off.
2808 *
2809 * @return VBox status code.
2810 * @param pDevIns The device owning the MMIO2 memory.
2811 * @param iRegion The region.
2812 * @param off The offset into the region. Will be rounded down
2813 * to closest page boundrary.
2814 * @param cb The number of bytes to map. Will be rounded up
2815 * to the closest page boundrary.
2816 * @param pszDesc Mapping description.
2817 * @param pRCPtr Where to store the RC address.
2818 */
2819 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2820 const char *pszDesc, PRTRCPTR pRCPtr));
2821
2822 /**
2823 * Maps a portion of an MMIO2 region into kernel space (host).
2824 *
2825 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2826 * or the VM is terminated.
2827 *
2828 * @return VBox status code.
2829 * @param pDevIns The device owning the MMIO2 memory.
2830 * @param iRegion The region.
2831 * @param off The offset into the region. Must be page
2832 * aligned.
2833 * @param cb The number of bytes to map. Must be page
2834 * aligned.
2835 * @param pszDesc Mapping description.
2836 * @param pR0Ptr Where to store the R0 address.
2837 */
2838 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2839 const char *pszDesc, PRTR0PTR pR0Ptr));
2840
2841 /**
2842 * Registers the VMM device heap
2843 *
2844 * @returns VBox status code.
2845 * @param pDevIns The device instance.
2846 * @param GCPhys The physical address.
2847 * @param pvHeap Ring 3 heap pointer.
2848 * @param cbSize Size of the heap.
2849 * @thread EMT.
2850 */
2851 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2852
2853 /**
2854 * Unregisters the VMM device heap
2855 *
2856 * @returns VBox status code.
2857 * @param pDevIns The device instance.
2858 * @param GCPhys The physical address.
2859 * @thread EMT.
2860 */
2861 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2862
2863 /**
2864 * Gets the VMCPU handle. Restricted API.
2865 *
2866 * @returns VMCPU Handle.
2867 * @param pDevIns Device instance.
2868 */
2869 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
2870
2871 /** @} */
2872
2873 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2874 uint32_t u32TheEnd;
2875} PDMDEVHLPR3;
2876#endif /* !IN_RING3 */
2877/** Pointer to the R3 PDM Device API. */
2878typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2879/** Pointer to the R3 PDM Device API, const variant. */
2880typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2881
2882/** Current PDMDEVHLP version number. */
2883#define PDM_DEVHLP_VERSION 0xf20a0000
2884
2885
2886/**
2887 * PDM Device API - RC Variant.
2888 */
2889typedef struct PDMDEVHLPRC
2890{
2891 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2892 uint32_t u32Version;
2893
2894 /**
2895 * Set the IRQ for a PCI device.
2896 *
2897 * @param pDevIns Device instance.
2898 * @param iIrq IRQ number to set.
2899 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2900 * @thread Any thread, but will involve the emulation thread.
2901 */
2902 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2903
2904 /**
2905 * Set ISA IRQ for a device.
2906 *
2907 * @param pDevIns Device instance.
2908 * @param iIrq IRQ number to set.
2909 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2910 * @thread Any thread, but will involve the emulation thread.
2911 */
2912 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2913
2914 /**
2915 * Read physical memory.
2916 *
2917 * @returns VINF_SUCCESS (for now).
2918 * @param pDevIns Device instance.
2919 * @param GCPhys Physical address start reading from.
2920 * @param pvBuf Where to put the read bits.
2921 * @param cbRead How many bytes to read.
2922 */
2923 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2924
2925 /**
2926 * Write to physical memory.
2927 *
2928 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2929 * @param pDevIns Device instance.
2930 * @param GCPhys Physical address to write to.
2931 * @param pvBuf What to write.
2932 * @param cbWrite How many bytes to write.
2933 */
2934 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2935
2936 /**
2937 * Checks if the Gate A20 is enabled or not.
2938 *
2939 * @returns true if A20 is enabled.
2940 * @returns false if A20 is disabled.
2941 * @param pDevIns Device instance.
2942 * @thread The emulation thread.
2943 */
2944 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2945
2946 /**
2947 * Set the VM error message
2948 *
2949 * @returns rc.
2950 * @param pDrvIns Driver instance.
2951 * @param rc VBox status code.
2952 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2953 * @param pszFormat Error message format string.
2954 * @param ... Error message arguments.
2955 */
2956 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2957
2958 /**
2959 * Set the VM error message
2960 *
2961 * @returns rc.
2962 * @param pDrvIns Driver instance.
2963 * @param rc VBox status code.
2964 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2965 * @param pszFormat Error message format string.
2966 * @param va Error message arguments.
2967 */
2968 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2969
2970 /**
2971 * Set the VM runtime error message
2972 *
2973 * @returns VBox status code.
2974 * @param pDevIns Device instance.
2975 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2976 * @param pszErrorId Error ID string.
2977 * @param pszFormat Error message format string.
2978 * @param ... Error message arguments.
2979 */
2980 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2981
2982 /**
2983 * Set the VM runtime error message
2984 *
2985 * @returns VBox status code.
2986 * @param pDevIns Device instance.
2987 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2988 * @param pszErrorId Error ID string.
2989 * @param pszFormat Error message format string.
2990 * @param va Error message arguments.
2991 */
2992 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2993
2994 /**
2995 * Set parameters for pending MMIO patch operation
2996 *
2997 * @returns VBox status code.
2998 * @param pDevIns Device instance.
2999 * @param GCPhys MMIO physical address
3000 * @param pCachedData GC pointer to cached data
3001 */
3002 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3003
3004 /**
3005 * Gets the VM handle. Restricted API.
3006 *
3007 * @returns VM Handle.
3008 * @param pDevIns Device instance.
3009 */
3010 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3011
3012 /**
3013 * Gets the VMCPU handle. Restricted API.
3014 *
3015 * @returns VMCPU Handle.
3016 * @param pDevIns Device instance.
3017 */
3018 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3019
3020 /** Just a safety precaution. */
3021 uint32_t u32TheEnd;
3022} PDMDEVHLPRC;
3023/** Pointer PDM Device RC API. */
3024typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3025/** Pointer PDM Device RC API. */
3026typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3027
3028/** Current PDMDEVHLP version number. */
3029#define PDM_DEVHLPRC_VERSION 0xfb020000
3030
3031
3032/**
3033 * PDM Device API - R0 Variant.
3034 */
3035typedef struct PDMDEVHLPR0
3036{
3037 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3038 uint32_t u32Version;
3039
3040 /**
3041 * Set the IRQ for a PCI device.
3042 *
3043 * @param pDevIns Device instance.
3044 * @param iIrq IRQ number to set.
3045 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3046 * @thread Any thread, but will involve the emulation thread.
3047 */
3048 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3049
3050 /**
3051 * Set ISA IRQ for a device.
3052 *
3053 * @param pDevIns Device instance.
3054 * @param iIrq IRQ number to set.
3055 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3056 * @thread Any thread, but will involve the emulation thread.
3057 */
3058 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3059
3060 /**
3061 * Read physical memory.
3062 *
3063 * @returns VINF_SUCCESS (for now).
3064 * @param pDevIns Device instance.
3065 * @param GCPhys Physical address start reading from.
3066 * @param pvBuf Where to put the read bits.
3067 * @param cbRead How many bytes to read.
3068 */
3069 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3070
3071 /**
3072 * Write to physical memory.
3073 *
3074 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3075 * @param pDevIns Device instance.
3076 * @param GCPhys Physical address to write to.
3077 * @param pvBuf What to write.
3078 * @param cbWrite How many bytes to write.
3079 */
3080 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3081
3082 /**
3083 * Checks if the Gate A20 is enabled or not.
3084 *
3085 * @returns true if A20 is enabled.
3086 * @returns false if A20 is disabled.
3087 * @param pDevIns Device instance.
3088 * @thread The emulation thread.
3089 */
3090 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3091
3092 /**
3093 * Set the VM error message
3094 *
3095 * @returns rc.
3096 * @param pDrvIns Driver instance.
3097 * @param rc VBox status code.
3098 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3099 * @param pszFormat Error message format string.
3100 * @param ... Error message arguments.
3101 */
3102 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3103
3104 /**
3105 * Set the VM error message
3106 *
3107 * @returns rc.
3108 * @param pDrvIns Driver instance.
3109 * @param rc VBox status code.
3110 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3111 * @param pszFormat Error message format string.
3112 * @param va Error message arguments.
3113 */
3114 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3115
3116 /**
3117 * Set the VM runtime error message
3118 *
3119 * @returns VBox status code.
3120 * @param pDevIns Device instance.
3121 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3122 * @param pszErrorId Error ID string.
3123 * @param pszFormat Error message format string.
3124 * @param ... Error message arguments.
3125 */
3126 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3127
3128 /**
3129 * Set the VM runtime error message
3130 *
3131 * @returns VBox status code.
3132 * @param pDevIns Device instance.
3133 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3134 * @param pszErrorId Error ID string.
3135 * @param pszFormat Error message format string.
3136 * @param va Error message arguments.
3137 */
3138 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3139
3140 /**
3141 * Set parameters for pending MMIO patch operation
3142 *
3143 * @returns rc.
3144 * @param pDevIns Device instance.
3145 * @param GCPhys MMIO physical address
3146 * @param pCachedData GC pointer to cached data
3147 */
3148 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3149
3150 /**
3151 * Gets the VM handle. Restricted API.
3152 *
3153 * @returns VM Handle.
3154 * @param pDevIns Device instance.
3155 */
3156 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3157
3158 /**
3159 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3160 *
3161 * @returns true = yes, false = no
3162 * @param pDevIns Device instance.
3163 */
3164 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3165
3166 /**
3167 * Gets the VMCPU handle. Restricted API.
3168 *
3169 * @returns VMCPU Handle.
3170 * @param pDevIns Device instance.
3171 */
3172 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3173
3174 /** Just a safety precaution. */
3175 uint32_t u32TheEnd;
3176} PDMDEVHLPR0;
3177/** Pointer PDM Device R0 API. */
3178typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3179/** Pointer PDM Device GC API. */
3180typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3181
3182/** Current PDMDEVHLP version number. */
3183#define PDM_DEVHLPR0_VERSION 0xfb030000
3184
3185
3186
3187/**
3188 * PDM Device Instance.
3189 */
3190typedef struct PDMDEVINS
3191{
3192 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3193 uint32_t u32Version;
3194 /** Device instance number. */
3195 RTUINT iInstance;
3196
3197 /** Pointer the GC PDM Device API. */
3198 PCPDMDEVHLPRC pDevHlpRC;
3199 /** Pointer to device instance data. */
3200 RTRCPTR pvInstanceDataRC;
3201
3202 /** Pointer the R0 PDM Device API. */
3203 PCPDMDEVHLPR0 pDevHlpR0;
3204 /** Pointer to device instance data (R0). */
3205 RTR0PTR pvInstanceDataR0;
3206
3207 /** Pointer the HC PDM Device API. */
3208 PCPDMDEVHLPR3 pDevHlpR3;
3209 /** Pointer to device instance data. */
3210 RTR3PTR pvInstanceDataR3;
3211
3212 /** Pointer to device registration structure. */
3213 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3214 /** Configuration handle. */
3215 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3216
3217 /** The base interface of the device.
3218 * The device constructor initializes this if it has any
3219 * device level interfaces to export. To obtain this interface
3220 * call PDMR3QueryDevice(). */
3221 PDMIBASE IBase;
3222 /** Align the internal data more naturally. */
3223 RTR3PTR R3PtrPadding;
3224
3225 /** Internal data. */
3226 union
3227 {
3228#ifdef PDMDEVINSINT_DECLARED
3229 PDMDEVINSINT s;
3230#endif
3231 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3232 } Internal;
3233
3234 /** Device instance data. The size of this area is defined
3235 * in the PDMDEVREG::cbInstanceData field. */
3236 char achInstanceData[8];
3237} PDMDEVINS;
3238
3239/** Current PDMDEVINS version number. */
3240#define PDM_DEVINS_VERSION 0xf3020000
3241
3242/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3243#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3244
3245
3246/** @def PDMDEV_ASSERT_EMT
3247 * Assert that the current thread is the emulation thread.
3248 */
3249#ifdef VBOX_STRICT
3250# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3251#else
3252# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3253#endif
3254
3255/** @def PDMDEV_ASSERT_OTHER
3256 * Assert that the current thread is NOT the emulation thread.
3257 */
3258#ifdef VBOX_STRICT
3259# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3260#else
3261# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3262#endif
3263
3264/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3265 * Assert that the current thread is owner of the VM lock.
3266 */
3267#ifdef VBOX_STRICT
3268# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3269#else
3270# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3271#endif
3272
3273/** @def PDMDEV_SET_ERROR
3274 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3275 */
3276#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3277 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3278
3279/** @def PDMDEV_SET_RUNTIME_ERROR
3280 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3281 */
3282#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3283 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3284
3285/** @def PDMDEVINS_2_RCPTR
3286 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3287 */
3288#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3289
3290/** @def PDMDEVINS_2_R3PTR
3291 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3292 */
3293#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3294
3295/** @def PDMDEVINS_2_R0PTR
3296 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3297 */
3298#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3299
3300
3301/**
3302 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3303 *
3304 * @returns VBox status code which must be passed up to the VMM.
3305 * @param pDevIns Device instance.
3306 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3307 * @param pszFormat Message. (optional)
3308 * @param ... Message parameters.
3309 */
3310DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3311{
3312#ifdef VBOX_STRICT
3313# ifdef IN_RING3
3314 int rc;
3315 va_list args;
3316 va_start(args, pszFormat);
3317 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3318 va_end(args);
3319 return rc;
3320# else
3321 return VINF_EM_DBG_STOP;
3322# endif
3323#else
3324 NOREF(pDevIns);
3325 NOREF(pszFile);
3326 NOREF(iLine);
3327 NOREF(pszFunction);
3328 NOREF(pszFormat);
3329 return VINF_SUCCESS;
3330#endif
3331}
3332
3333
3334#ifdef IN_RING3
3335/**
3336 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3337 */
3338DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3339 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3340 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3341{
3342 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3343}
3344
3345/**
3346 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3347 */
3348DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3349 const char *pszOut, const char *pszIn, const char *pszOutStr,
3350 const char *pszInStr, const char *pszDesc)
3351{
3352 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3353}
3354
3355/**
3356 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3357 */
3358DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3359 const char *pszOut, const char *pszIn, const char *pszOutStr,
3360 const char *pszInStr, const char *pszDesc)
3361{
3362 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3363}
3364
3365/**
3366 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3367 */
3368DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3369 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3370 const char *pszDesc)
3371{
3372 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3373}
3374
3375/**
3376 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3377 */
3378DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3379 const char *pszWrite, const char *pszRead, const char *pszFill)
3380{
3381 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3382}
3383
3384/**
3385 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3386 */
3387DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3388 const char *pszWrite, const char *pszRead, const char *pszFill)
3389{
3390 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3391}
3392
3393/**
3394 * @copydoc PDMDEVHLPR3::pfnROMRegister
3395 */
3396DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3397{
3398 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3399}
3400/**
3401 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3402 */
3403DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3404{
3405 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3406}
3407
3408/**
3409 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3410 */
3411DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3412{
3413 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3414}
3415
3416/**
3417 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3418 */
3419DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3420{
3421 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3422}
3423
3424/**
3425 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3426 */
3427DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3428{
3429 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3430}
3431
3432/**
3433 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3434 */
3435DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3436{
3437 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3438}
3439
3440/**
3441 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3442 */
3443DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3444 const char *pszDesc, PRTRCPTR pRCPtr)
3445{
3446 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3447}
3448
3449/**
3450 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3451 */
3452DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3453 const char *pszDesc, PRTR0PTR pR0Ptr)
3454{
3455 return pDevIns->pDevHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3456}
3457
3458/**
3459 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3460 */
3461DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3462{
3463 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3464}
3465
3466/**
3467 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3468 */
3469DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3470{
3471 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3472}
3473
3474/**
3475 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3476 */
3477DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3478 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3479 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3480{
3481 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3482 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3483 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3484}
3485
3486/**
3487 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3488 */
3489DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3490 const char *pszDesc, PPTMTIMERR3 ppTimer)
3491{
3492 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3493}
3494
3495/**
3496 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3497 */
3498DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3499{
3500 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3501}
3502
3503/**
3504 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3505 */
3506DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3507{
3508 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3509}
3510
3511/**
3512 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3513 */
3514DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3515 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3516{
3517 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3518}
3519
3520/**
3521 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3522 */
3523DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3524{
3525 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3526}
3527
3528/**
3529 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3530 */
3531DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3532{
3533 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3534}
3535
3536/**
3537 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3538 */
3539DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3540{
3541 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3542}
3543
3544/**
3545 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3546 */
3547DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3548{
3549 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3550}
3551
3552/**
3553 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3554 */
3555DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3556{
3557 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3558}
3559
3560/**
3561 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3562 */
3563DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3564{
3565 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3566}
3567
3568/**
3569 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3570 */
3571DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3572 const char *pszDesc, const char *pszName, ...)
3573{
3574 va_list va;
3575 va_start(va, pszName);
3576 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3577 va_end(va);
3578}
3579
3580/**
3581 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3582 */
3583DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3584 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3585{
3586 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3587}
3588
3589/**
3590 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3591 */
3592DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3593{
3594 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3595}
3596
3597/**
3598 * @copydoc PDMDEVHLPR3::pfnUTCNow
3599 */
3600DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3601{
3602 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3603}
3604
3605/**
3606 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3607 */
3608DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3609{
3610 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3611}
3612
3613/**
3614 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3615 */
3616DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3617{
3618 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3619}
3620
3621/**
3622 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3623 */
3624DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3625{
3626 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3627}
3628
3629/**
3630 * @copydoc PDMDEVHLPR3::pfnVMState
3631 */
3632DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3633{
3634 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3635}
3636
3637/**
3638 * @copydoc PDMDEVHLPR3::pfnA20Set
3639 */
3640DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3641{
3642 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3643}
3644
3645/**
3646 * @copydoc PDMDEVHLPR3::pfnVMReset
3647 */
3648DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3649{
3650 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3651}
3652
3653/**
3654 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3655 */
3656DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3657{
3658 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3659}
3660
3661/**
3662 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3663 */
3664DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3665{
3666 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3667}
3668
3669/**
3670 * @copydoc PDMDEVHLPR3::pfnDMARegister
3671 */
3672DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3673{
3674 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3675}
3676
3677/**
3678 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3679 */
3680DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3681{
3682 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3683}
3684
3685/**
3686 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3687 */
3688DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3689{
3690 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3691}
3692
3693/**
3694 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3695 */
3696DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3697{
3698 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3699}
3700
3701/**
3702 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3703 */
3704DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3705{
3706 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3707}
3708
3709/**
3710 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3711 */
3712DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3713{
3714 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3715}
3716
3717/**
3718 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3719 */
3720DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3721{
3722 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3723}
3724
3725/**
3726 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3727 */
3728DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3729{
3730 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3731}
3732
3733/**
3734 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3735 */
3736DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3737{
3738 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3739}
3740
3741/**
3742 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3743 */
3744DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3745 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3746{
3747 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3748}
3749#endif /* IN_RING3 */
3750
3751
3752/**
3753 * @copydoc PDMDEVHLPR3::pfnGetVM
3754 */
3755DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3756{
3757 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVM(pDevIns);
3758}
3759
3760/**
3761 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
3762 */
3763DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
3764{
3765 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVMCPU(pDevIns);
3766}
3767
3768#ifdef IN_RING0
3769/**
3770 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
3771 */
3772DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
3773{
3774 return pDevIns->CTX_SUFF(pDevHlp)->pfnCanEmulateIoBlock(pDevIns);
3775}
3776#endif
3777
3778/**
3779 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3780 */
3781DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3782{
3783 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3784}
3785
3786/**
3787 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3788 */
3789DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3790{
3791 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3792}
3793
3794/**
3795 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3796 */
3797DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3798{
3799 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3800}
3801
3802/**
3803 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3804 */
3805DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3806{
3807 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3808}
3809
3810/**
3811 * @copydoc PDMDEVHLPR3::pfnPhysRead
3812 */
3813DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3814{
3815 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3816}
3817
3818/**
3819 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3820 */
3821DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3822{
3823 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3824}
3825
3826#ifdef IN_RING3
3827
3828/**
3829 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3830 */
3831DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3832{
3833 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3834}
3835
3836/**
3837 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3838 */
3839DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3840{
3841 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3842}
3843
3844/**
3845 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3846 */
3847DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3848{
3849 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3850}
3851
3852#endif /* IN_RING3 */
3853
3854/**
3855 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3856 */
3857DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3858{
3859 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3860}
3861
3862/**
3863 * @copydoc PDMDEVHLPR3::pfnVMSetError
3864 */
3865DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3866{
3867 va_list va;
3868 va_start(va, pszFormat);
3869 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3870 va_end(va);
3871 return rc;
3872}
3873
3874/**
3875 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3876 */
3877DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
3878{
3879 va_list va;
3880 int rc;
3881 va_start(va, pszFormat);
3882 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
3883 va_end(va);
3884 return rc;
3885}
3886
3887
3888
3889/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3890typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3891
3892/**
3893 * Callbacks for VBoxDeviceRegister().
3894 */
3895typedef struct PDMDEVREGCB
3896{
3897 /** Interface version.
3898 * This is set to PDM_DEVREG_CB_VERSION. */
3899 uint32_t u32Version;
3900
3901 /**
3902 * Registers a device with the current VM instance.
3903 *
3904 * @returns VBox status code.
3905 * @param pCallbacks Pointer to the callback table.
3906 * @param pDevReg Pointer to the device registration record.
3907 * This data must be permanent and readonly.
3908 */
3909 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3910
3911 /**
3912 * Allocate memory which is associated with current VM instance
3913 * and automatically freed on it's destruction.
3914 *
3915 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3916 * @param pCallbacks Pointer to the callback table.
3917 * @param cb Number of bytes to allocate.
3918 */
3919 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3920} PDMDEVREGCB;
3921
3922/** Current version of the PDMDEVREGCB structure. */
3923#define PDM_DEVREG_CB_VERSION 0xf4010000
3924
3925
3926/**
3927 * The VBoxDevicesRegister callback function.
3928 *
3929 * PDM will invoke this function after loading a device module and letting
3930 * the module decide which devices to register and how to handle conflicts.
3931 *
3932 * @returns VBox status code.
3933 * @param pCallbacks Pointer to the callback table.
3934 * @param u32Version VBox version number.
3935 */
3936typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3937
3938/** @} */
3939
3940RT_C_DECLS_END
3941
3942#endif
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