VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 13368

Last change on this file since 13368 was 13368, checked in by vboxsync, 17 years ago

Started with IOMR3MMIORegisterR3 extension for MMIO ranges backed by RAM, so it will be possible to turn off protection temporarily.

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File size: 140.5 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/mm.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48__BEGIN_DECLS
49
50/** @defgroup grp_pdm_device The PDM Devices API
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data.
60 * If the registration structure is needed, pDevIns->pDevReg points to it.
61 * @param iInstance Instance number. Use this to figure out which registers and such to use.
62 * The instance number is also found in pDevIns->iInstance, but since it's
63 * likely to be freqently used PDM passes it as parameter.
64 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
65 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
66 * primary usage will in this function it's passed as a parameter.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 */
81typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
82/** Pointer to a FNPDMDEVDESTRUCT() function. */
83typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
84
85/**
86 * Device relocation callback.
87 *
88 * When this callback is called the device instance data, and if the
89 * device have a GC component, is being relocated, or/and the selectors
90 * have been changed. The device must use the chance to perform the
91 * necessary pointer relocations and data updates.
92 *
93 * Before the GC code is executed the first time, this function will be
94 * called with a 0 delta so GC pointer calculations can be one in one place.
95 *
96 * @param pDevIns Pointer to the device instance.
97 * @param offDelta The relocation delta relative to the old location.
98 *
99 * @remark A relocation CANNOT fail.
100 */
101typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
102/** Pointer to a FNPDMDEVRELOCATE() function. */
103typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
104
105
106/**
107 * Device I/O Control interface.
108 *
109 * This is used by external components, such as the COM interface, to
110 * communicate with devices using a class wide interface or a device
111 * specific interface.
112 *
113 * @returns VBox status code.
114 * @param pDevIns Pointer to the device instance.
115 * @param uFunction Function to perform.
116 * @param pvIn Pointer to input data.
117 * @param cbIn Size of input data.
118 * @param pvOut Pointer to output data.
119 * @param cbOut Size of output data.
120 * @param pcbOut Where to store the actual size of the output data.
121 */
122typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
123 void *pvIn, RTUINT cbIn,
124 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
125/** Pointer to a FNPDMDEVIOCTL() function. */
126typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
127
128/**
129 * Power On notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVPOWERON() function. */
136typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
137
138/**
139 * Reset notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVRESET() function. */
146typedef FNPDMDEVRESET *PFNPDMDEVRESET;
147
148/**
149 * Suspend notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVSUSPEND() function. */
156typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
157
158/**
159 * Resume notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVRESUME() function. */
166typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
167
168/**
169 * Power Off notification.
170 *
171 * @param pDevIns The device instance data.
172 */
173typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
174/** Pointer to a FNPDMDEVPOWEROFF() function. */
175typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
176
177/**
178 * Attach command.
179 *
180 * This is called to let the device attach to a driver for a specified LUN
181 * at runtime. This is not called during VM construction, the device
182 * constructor have to attach to all the available drivers.
183 *
184 * This is like plugging in the keyboard or mouse after turning on the PC.
185 *
186 * @returns VBox status code.
187 * @param pDevIns The device instance.
188 * @param iLUN The logical unit which is being detached.
189 */
190typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
191/** Pointer to a FNPDMDEVATTACH() function. */
192typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
193
194/**
195 * Detach notification.
196 *
197 * This is called when a driver is detaching itself from a LUN of the device.
198 * The device should adjust it's state to reflect this.
199 *
200 * This is like unplugging the network cable to use it for the laptop or
201 * something while the PC is still running.
202 *
203 * @param pDevIns The device instance.
204 * @param iLUN The logical unit which is being detached.
205 */
206typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
207/** Pointer to a FNPDMDEVDETACH() function. */
208typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
209
210/**
211 * Query the base interface of a logical unit.
212 *
213 * @returns VBOX status code.
214 * @param pDevIns The device instance.
215 * @param iLUN The logicial unit to query.
216 * @param ppBase Where to store the pointer to the base interface of the LUN.
217 */
218typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
219/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
220typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
221
222/**
223 * Init complete notification.
224 * This can be done to do communication with other devices and other
225 * initialization which requires everything to be in place.
226 *
227 * @returns VBOX status code.
228 * @param pDevIns The device instance.
229 */
230typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
231/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
232typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
233
234
235
236/** PDM Device Registration Structure,
237 * This structure is used when registering a device from
238 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
239 * the VM is terminated.
240 */
241typedef struct PDMDEVREG
242{
243 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
244 uint32_t u32Version;
245 /** Device name. */
246 char szDeviceName[32];
247 /** Name of the raw-mode context module (no path).
248 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
249 char szRCMod[32];
250 /** Name of the ring-0 module (no path).
251 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
252 char szR0Mod[32];
253 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
254 * remain unchanged from registration till VM destruction. */
255 const char *pszDescription;
256
257 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
258 RTUINT fFlags;
259 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
260 RTUINT fClass;
261 /** Maximum number of instances (per VM). */
262 RTUINT cMaxInstances;
263 /** Size of the instance data. */
264 RTUINT cbInstance;
265
266 /** Construct instance - required. */
267 PFNPDMDEVCONSTRUCT pfnConstruct;
268 /** Destruct instance - optional. */
269 PFNPDMDEVDESTRUCT pfnDestruct;
270 /** Relocation command - optional. */
271 PFNPDMDEVRELOCATE pfnRelocate;
272 /** I/O Control interface - optional. */
273 PFNPDMDEVIOCTL pfnIOCtl;
274 /** Power on notification - optional. */
275 PFNPDMDEVPOWERON pfnPowerOn;
276 /** Reset notification - optional. */
277 PFNPDMDEVRESET pfnReset;
278 /** Suspend notification - optional. */
279 PFNPDMDEVSUSPEND pfnSuspend;
280 /** Resume notification - optional. */
281 PFNPDMDEVRESUME pfnResume;
282 /** Attach command - optional. */
283 PFNPDMDEVATTACH pfnAttach;
284 /** Detach notification - optional. */
285 PFNPDMDEVDETACH pfnDetach;
286 /** Query a LUN base interface - optional. */
287 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
288 /** Init complete notification - optional. */
289 PFNPDMDEVINITCOMPLETE pfnInitComplete;
290 /** Power off notification - optional. */
291 PFNPDMDEVPOWEROFF pfnPowerOff;
292 /** @todo */
293 PFNRT pfnSoftReset;
294 /** Initialization safty marker. */
295 uint32_t u32VersionEnd;
296} PDMDEVREG;
297/** Pointer to a PDM Device Structure. */
298typedef PDMDEVREG *PPDMDEVREG;
299/** Const pointer to a PDM Device Structure. */
300typedef PDMDEVREG const *PCPDMDEVREG;
301
302/** Current DEVREG version number. */
303#define PDM_DEVREG_VERSION 0xc0020000
304
305/** PDM Device Flags.
306 * @{ */
307/** This flag is used to indicate that the device has a RC component. */
308#define PDM_DEVREG_FLAGS_RC 0x00000001
309/** This flag is used to indicate that the device has a R0 component. */
310#define PDM_DEVREG_FLAGS_R0 0x00000002
311
312/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
313 * The bit count for the current host. */
314#if HC_ARCH_BITS == 32
315# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
316#elif HC_ARCH_BITS == 64
317# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
318#else
319# error Unsupported HC_ARCH_BITS value.
320#endif
321/** The host bit count mask. */
322#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
323
324/** The device support only 32-bit guests. */
325#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
326/** The device support only 64-bit guests. */
327#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
328/** The device support both 32-bit & 64-bit guests. */
329#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
330/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
331 * The guest bit count for the current compilation. */
332#if GC_ARCH_BITS == 32
333# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
334#elif GC_ARCH_BITS == 64
335# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
336#else
337# error Unsupported GC_ARCH_BITS value.
338#endif
339/** The guest bit count mask. */
340#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
341
342/** A convenience. */
343#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
344
345/** Indicates that the devices support PAE36 on a 32-bit guest. */
346#define PDM_DEVREG_FLAGS_PAE36 0x00001000
347/** @} */
348
349
350/** PDM Device Classes.
351 * The order is important, lower bit earlier instantiation.
352 * @{ */
353/** Architecture device. */
354#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
355/** Architecture BIOS device. */
356#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
357/** PCI bus brigde. */
358#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
359/** ISA bus brigde. */
360#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
361/** Input device (mouse, keyboard, joystick, HID, ...). */
362#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
363/** Interrupt controller (PIC). */
364#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
365/** Interval controoler (PIT). */
366#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
367/** RTC/CMOS. */
368#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
369/** DMA controller. */
370#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
371/** VMM Device. */
372#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
373/** Graphics device, like VGA. */
374#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
375/** Storage controller device. */
376#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
377/** Network interface controller. */
378#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
379/** Audio. */
380#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
381/** USB HIC. */
382#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
383/** ACPI. */
384#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
385/** Serial controller device. */
386#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
387/** Parallel controller device */
388#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
389/** Misc devices (always last). */
390#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
391/** @} */
392
393
394/** @name IRQ Level for use with the *SetIrq APIs.
395 * @{
396 */
397/** Assert the IRQ (can assume value 1). */
398#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
399/** Deassert the IRQ (can assume value 0). */
400#define PDM_IRQ_LEVEL_LOW 0
401/** flip-flop - assert and then deassert it again immediately. */
402#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
403/** @} */
404
405
406/**
407 * PCI Bus registration structure.
408 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
409 */
410typedef struct PDMPCIBUSREG
411{
412 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
413 uint32_t u32Version;
414
415 /**
416 * Registers the device with the default PCI bus.
417 *
418 * @returns VBox status code.
419 * @param pDevIns Device instance of the PCI Bus.
420 * @param pPciDev The PCI device structure.
421 * Any PCI enabled device must keep this in it's instance data!
422 * Fill in the PCI data config before registration, please.
423 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
424 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
425 * If negative, the pci bus device will assign one.
426 */
427 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
428
429 /**
430 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
431 *
432 * @returns VBox status code.
433 * @param pDevIns Device instance of the PCI Bus.
434 * @param pPciDev The PCI device structure.
435 * @param iRegion The region number.
436 * @param cbRegion Size of the region.
437 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
438 * @param pfnCallback Callback for doing the mapping.
439 */
440 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
441
442 /**
443 * Register PCI configuration space read/write callbacks.
444 *
445 * @param pDevIns Device instance of the PCI Bus.
446 * @param pPciDev The PCI device structure.
447 * @param pfnRead Pointer to the user defined PCI config read function.
448 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
449 * PCI config read function. This way, user can decide when (and if)
450 * to call default PCI config read function. Can be NULL.
451 * @param pfnWrite Pointer to the user defined PCI config write function.
452 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
453 * PCI config write function. This way, user can decide when (and if)
454 * to call default PCI config write function. Can be NULL.
455 * @thread EMT
456 */
457 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
458 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
459
460 /**
461 * Set the IRQ for a PCI device.
462 *
463 * @param pDevIns Device instance of the PCI Bus.
464 * @param pPciDev The PCI device structure.
465 * @param iIrq IRQ number to set.
466 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
467 */
468 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
469
470 /**
471 * Saves a state of the PCI device.
472 *
473 * @returns VBox status code.
474 * @param pDevIns Device instance of the PCI Bus.
475 * @param pPciDev Pointer to PCI device.
476 * @param pSSMHandle The handle to save the state to.
477 */
478 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
479
480 /**
481 * Loads a saved PCI device state.
482 *
483 * @returns VBox status code.
484 * @param pDevIns Device instance of the PCI Bus.
485 * @param pPciDev Pointer to PCI device.
486 * @param pSSMHandle The handle to the saved state.
487 */
488 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
489
490 /**
491 * Called to perform the job of the bios.
492 * This is only called for the first PCI Bus - it is expected to
493 * service all the PCI buses.
494 *
495 * @returns VBox status.
496 * @param pDevIns Device instance of the first bus.
497 */
498 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
499
500 /** The name of the SetIrq RC entry point. */
501 const char *pszSetIrqRC;
502
503 /** The name of the SetIrq R0 entry point. */
504 const char *pszSetIrqR0;
505
506} PDMPCIBUSREG;
507/** Pointer to a PCI bus registration structure. */
508typedef PDMPCIBUSREG *PPDMPCIBUSREG;
509
510/** Current PDMPCIBUSREG version number. */
511#define PDM_PCIBUSREG_VERSION 0xd0020000
512
513/**
514 * PCI Bus RC helpers.
515 */
516typedef struct PDMPCIHLPRC
517{
518 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
519 uint32_t u32Version;
520
521 /**
522 * Set an ISA IRQ.
523 *
524 * @param pDevIns PCI device instance.
525 * @param iIrq IRQ number to set.
526 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
527 * @thread EMT only.
528 */
529 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
530
531 /**
532 * Set an I/O-APIC IRQ.
533 *
534 * @param pDevIns PCI device instance.
535 * @param iIrq IRQ number to set.
536 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
537 * @thread EMT only.
538 */
539 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
540
541 /**
542 * Acquires the PDM lock.
543 *
544 * @returns VINF_SUCCESS on success.
545 * @returns rc if we failed to acquire the lock.
546 * @param pDevIns The PCI device instance.
547 * @param rc What to return if we fail to acquire the lock.
548 */
549 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
550
551 /**
552 * Releases the PDM lock.
553 *
554 * @param pDevIns The PCI device instance.
555 */
556 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
557
558 /** Just a safety precaution. */
559 uint32_t u32TheEnd;
560} PDMPCIHLPRC;
561/** Pointer to PCI helpers. */
562typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
563/** Pointer to const PCI helpers. */
564typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
565
566/** Current PDMPCIHLPR3 version number. */
567#define PDM_PCIHLPRC_VERSION 0xe1010000
568
569
570/**
571 * PCI Bus R0 helpers.
572 */
573typedef struct PDMPCIHLPR0
574{
575 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
576 uint32_t u32Version;
577
578 /**
579 * Set an ISA IRQ.
580 *
581 * @param pDevIns PCI device instance.
582 * @param iIrq IRQ number to set.
583 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
584 * @thread EMT only.
585 */
586 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
587
588 /**
589 * Set an I/O-APIC IRQ.
590 *
591 * @param pDevIns PCI device instance.
592 * @param iIrq IRQ number to set.
593 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
594 * @thread EMT only.
595 */
596 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
597
598 /**
599 * Acquires the PDM lock.
600 *
601 * @returns VINF_SUCCESS on success.
602 * @returns rc if we failed to acquire the lock.
603 * @param pDevIns The PCI device instance.
604 * @param rc What to return if we fail to acquire the lock.
605 */
606 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
607
608 /**
609 * Releases the PDM lock.
610 *
611 * @param pDevIns The PCI device instance.
612 */
613 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
614
615 /** Just a safety precaution. */
616 uint32_t u32TheEnd;
617} PDMPCIHLPR0;
618/** Pointer to PCI helpers. */
619typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
620/** Pointer to const PCI helpers. */
621typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
622
623/** Current PDMPCIHLPR0 version number. */
624#define PDM_PCIHLPR0_VERSION 0xe1010000
625
626/**
627 * PCI device helpers.
628 */
629typedef struct PDMPCIHLPR3
630{
631 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
632 uint32_t u32Version;
633
634 /**
635 * Set an ISA IRQ.
636 *
637 * @param pDevIns The PCI device instance.
638 * @param iIrq IRQ number to set.
639 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
640 * @thread EMT only.
641 */
642 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
643
644 /**
645 * Set an I/O-APIC IRQ.
646 *
647 * @param pDevIns The PCI device instance.
648 * @param iIrq IRQ number to set.
649 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
650 * @thread EMT only.
651 */
652 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
653
654 /**
655 * Checks if the given address is an MMIO2 base address or not.
656 *
657 * @returns true/false accordingly.
658 * @param pDevIns The PCI device instance.
659 * @param pOwner The owner of the memory, optional.
660 * @param GCPhys The address to check.
661 */
662 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
663
664 /**
665 * Gets the address of the RC PCI Bus helpers.
666 *
667 * This should be called at both construction and relocation time
668 * to obtain the correct address of the RC helpers.
669 *
670 * @returns RC pointer to the PCI Bus helpers.
671 * @param pDevIns Device instance of the PCI Bus.
672 * @thread EMT only.
673 */
674 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
675
676 /**
677 * Gets the address of the R0 PCI Bus helpers.
678 *
679 * This should be called at both construction and relocation time
680 * to obtain the correct address of the R0 helpers.
681 *
682 * @returns R0 pointer to the PCI Bus helpers.
683 * @param pDevIns Device instance of the PCI Bus.
684 * @thread EMT only.
685 */
686 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
687
688 /**
689 * Acquires the PDM lock.
690 *
691 * @returns VINF_SUCCESS on success.
692 * @returns Fatal error on failure.
693 * @param pDevIns The PCI device instance.
694 * @param rc Dummy for making the interface identical to the RC and R0 versions.
695 */
696 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
697
698 /**
699 * Releases the PDM lock.
700 *
701 * @param pDevIns The PCI device instance.
702 */
703 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
704
705 /** Just a safety precaution. */
706 uint32_t u32TheEnd;
707} PDMPCIHLPR3;
708/** Pointer to PCI helpers. */
709typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
710/** Pointer to const PCI helpers. */
711typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
712
713/** Current PDMPCIHLPR3 version number. */
714#define PDM_PCIHLPR3_VERSION 0xf1020000
715
716
717/**
718 * Programmable Interrupt Controller registration structure.
719 */
720typedef struct PDMPICREG
721{
722 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
723 uint32_t u32Version;
724
725 /**
726 * Set the an IRQ.
727 *
728 * @param pDevIns Device instance of the PIC.
729 * @param iIrq IRQ number to set.
730 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
731 */
732 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
733
734 /**
735 * Get a pending interrupt.
736 *
737 * @returns Pending interrupt number.
738 * @param pDevIns Device instance of the PIC.
739 */
740 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
741
742 /** The name of the RC SetIrq entry point. */
743 const char *pszSetIrqRC;
744 /** The name of the RC GetInterrupt entry point. */
745 const char *pszGetInterruptRC;
746
747 /** The name of the R0 SetIrq entry point. */
748 const char *pszSetIrqR0;
749 /** The name of the R0 GetInterrupt entry point. */
750 const char *pszGetInterruptR0;
751} PDMPICREG;
752/** Pointer to a PIC registration structure. */
753typedef PDMPICREG *PPDMPICREG;
754
755/** Current PDMPICREG version number. */
756#define PDM_PICREG_VERSION 0xe0020000
757
758/**
759 * PIC RC helpers.
760 */
761typedef struct PDMPICHLPRC
762{
763 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
764 uint32_t u32Version;
765
766 /**
767 * Set the interrupt force action flag.
768 *
769 * @param pDevIns Device instance of the PIC.
770 */
771 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
772
773 /**
774 * Clear the interrupt force action flag.
775 *
776 * @param pDevIns Device instance of the PIC.
777 */
778 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
779
780 /**
781 * Acquires the PDM lock.
782 *
783 * @returns VINF_SUCCESS on success.
784 * @returns rc if we failed to acquire the lock.
785 * @param pDevIns The PIC device instance.
786 * @param rc What to return if we fail to acquire the lock.
787 */
788 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
789
790 /**
791 * Releases the PDM lock.
792 *
793 * @param pDevIns The PIC device instance.
794 */
795 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
796
797 /** Just a safety precaution. */
798 uint32_t u32TheEnd;
799} PDMPICHLPRC;
800
801/** Pointer to PIC RC helpers. */
802typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
803/** Pointer to const PIC RC helpers. */
804typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
805
806/** Current PDMPICHLPRC version number. */
807#define PDM_PICHLPRC_VERSION 0xfc010000
808
809
810/**
811 * PIC R0 helpers.
812 */
813typedef struct PDMPICHLPR0
814{
815 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
816 uint32_t u32Version;
817
818 /**
819 * Set the interrupt force action flag.
820 *
821 * @param pDevIns Device instance of the PIC.
822 */
823 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
824
825 /**
826 * Clear the interrupt force action flag.
827 *
828 * @param pDevIns Device instance of the PIC.
829 */
830 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
831
832 /**
833 * Acquires the PDM lock.
834 *
835 * @returns VINF_SUCCESS on success.
836 * @returns rc if we failed to acquire the lock.
837 * @param pDevIns The PIC device instance.
838 * @param rc What to return if we fail to acquire the lock.
839 */
840 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
841
842 /**
843 * Releases the PDM lock.
844 *
845 * @param pDevIns The PCI device instance.
846 */
847 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
848
849 /** Just a safety precaution. */
850 uint32_t u32TheEnd;
851} PDMPICHLPR0;
852
853/** Pointer to PIC R0 helpers. */
854typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
855/** Pointer to const PIC R0 helpers. */
856typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
857
858/** Current PDMPICHLPR0 version number. */
859#define PDM_PICHLPR0_VERSION 0xfc010000
860
861/**
862 * PIC R3 helpers.
863 */
864typedef struct PDMPICHLPR3
865{
866 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
867 uint32_t u32Version;
868
869 /**
870 * Set the interrupt force action flag.
871 *
872 * @param pDevIns Device instance of the PIC.
873 */
874 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
875
876 /**
877 * Clear the interrupt force action flag.
878 *
879 * @param pDevIns Device instance of the PIC.
880 */
881 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
882
883 /**
884 * Acquires the PDM lock.
885 *
886 * @returns VINF_SUCCESS on success.
887 * @returns Fatal error on failure.
888 * @param pDevIns The PIC device instance.
889 * @param rc Dummy for making the interface identical to the RC and R0 versions.
890 */
891 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
892
893 /**
894 * Releases the PDM lock.
895 *
896 * @param pDevIns The PIC device instance.
897 */
898 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
899
900 /**
901 * Gets the address of the RC PIC helpers.
902 *
903 * This should be called at both construction and relocation time
904 * to obtain the correct address of the RC helpers.
905 *
906 * @returns RC pointer to the PIC helpers.
907 * @param pDevIns Device instance of the PIC.
908 */
909 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
910
911 /**
912 * Gets the address of the R0 PIC helpers.
913 *
914 * This should be called at both construction and relocation time
915 * to obtain the correct address of the R0 helpers.
916 *
917 * @returns R0 pointer to the PIC helpers.
918 * @param pDevIns Device instance of the PIC.
919 */
920 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
921
922 /** Just a safety precaution. */
923 uint32_t u32TheEnd;
924} PDMPICHLPR3;
925
926/** Pointer to PIC R3 helpers. */
927typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
928/** Pointer to const PIC R3 helpers. */
929typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
930
931/** Current PDMPICHLPR3 version number. */
932#define PDM_PICHLPR3_VERSION 0xf0010000
933
934
935
936/**
937 * Advanced Programmable Interrupt Controller registration structure.
938 */
939typedef struct PDMAPICREG
940{
941 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
942 uint32_t u32Version;
943
944 /**
945 * Get a pending interrupt.
946 *
947 * @returns Pending interrupt number.
948 * @param pDevIns Device instance of the APIC.
949 */
950 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
951
952 /**
953 * Check if the APIC has a pending interrupt/if a TPR change would active one
954 *
955 * @returns Pending interrupt yes/no
956 * @param pDevIns Device instance of the APIC.
957 */
958 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
959
960 /**
961 * Set the APIC base.
962 *
963 * @param pDevIns Device instance of the APIC.
964 * @param u64Base The new base.
965 */
966 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
967
968 /**
969 * Get the APIC base.
970 *
971 * @returns Current base.
972 * @param pDevIns Device instance of the APIC.
973 */
974 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
975
976 /**
977 * Set the TPR (task priority register).
978 *
979 * @param pDevIns Device instance of the APIC.
980 * @param u8TPR The new TPR.
981 */
982 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
983
984 /**
985 * Get the TPR (task priority register).
986 *
987 * @returns The current TPR.
988 * @param pDevIns Device instance of the APIC.
989 * @param pfPending Pending interrupt state (out).
990 */
991 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
992
993 /**
994 * Write MSR in APIC range.
995 *
996 * @returns VBox status code.
997 * @param pDevIns Device instance of the APIC.
998 * @param idCpu Target CPU.
999 * @param u32Reg MSR to write.
1000 * @param u64Value Value to write.
1001 */
1002 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1003
1004 /**
1005 * Read MSR in APIC range.
1006 *
1007 * @returns VBox status code.
1008 * @param pDevIns Device instance of the APIC.
1009 * @param idCpu Target CPU.
1010 * @param u32Reg MSR to read.
1011 * @param pu64Value Value read.
1012 */
1013 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1014
1015 /**
1016 * Private interface between the IOAPIC and APIC.
1017 *
1018 * This is a low-level, APIC/IOAPIC implementation specific interface
1019 * which is registered with PDM only because it makes life so much
1020 * simpler right now (GC bits). This is a bad bad hack! The correct
1021 * way of doing this would involve some way of querying GC interfaces
1022 * and relocating them. Perhaps doing some kind of device init in GC...
1023 *
1024 * @returns The current TPR.
1025 * @param pDevIns Device instance of the APIC.
1026 * @param u8Dest See APIC implementation.
1027 * @param u8DestMode See APIC implementation.
1028 * @param u8DeliveryMode See APIC implementation.
1029 * @param iVector See APIC implementation.
1030 * @param u8Polarity See APIC implementation.
1031 * @param u8TriggerMode See APIC implementation.
1032 */
1033 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1034 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1035
1036 /** The name of the RC GetInterrupt entry point. */
1037 const char *pszGetInterruptRC;
1038 /** The name of the RC HasPendingIrq entry point. */
1039 const char *pszHasPendingIrqRC;
1040 /** The name of the RC SetBase entry point. */
1041 const char *pszSetBaseRC;
1042 /** The name of the RC GetBase entry point. */
1043 const char *pszGetBaseRC;
1044 /** The name of the RC SetTPR entry point. */
1045 const char *pszSetTPRRC;
1046 /** The name of the RC GetTPR entry point. */
1047 const char *pszGetTPRRC;
1048 /** The name of the RC WriteMSR entry point. */
1049 const char *pszWriteMSRRC;
1050 /** The name of the RC ReadMSR entry point. */
1051 const char *pszReadMSRRC;
1052 /** The name of the RC BusDeliver entry point. */
1053 const char *pszBusDeliverRC;
1054
1055 /** The name of the R0 GetInterrupt entry point. */
1056 const char *pszGetInterruptR0;
1057 /** The name of the R0 HasPendingIrq entry point. */
1058 const char *pszHasPendingIrqR0;
1059 /** The name of the R0 SetBase entry point. */
1060 const char *pszSetBaseR0;
1061 /** The name of the R0 GetBase entry point. */
1062 const char *pszGetBaseR0;
1063 /** The name of the R0 SetTPR entry point. */
1064 const char *pszSetTPRR0;
1065 /** The name of the R0 GetTPR entry point. */
1066 const char *pszGetTPRR0;
1067 /** The name of the R0 WriteMSR entry point. */
1068 const char *pszWriteMSRR0;
1069 /** The name of the R0 ReadMSR entry point. */
1070 const char *pszReadMSRR0;
1071 /** The name of the R0 BusDeliver entry point. */
1072 const char *pszBusDeliverR0;
1073
1074} PDMAPICREG;
1075/** Pointer to an APIC registration structure. */
1076typedef PDMAPICREG *PPDMAPICREG;
1077
1078/** Current PDMAPICREG version number. */
1079#define PDM_APICREG_VERSION 0x70010000
1080
1081
1082/**
1083 * APIC version argument for pfnChangeFeature.
1084 */
1085typedef enum PDMAPICVERSION
1086{
1087 /** Invalid 0 entry. */
1088 PDMAPICVERSION_INVALID = 0,
1089 /** No APIC. */
1090 PDMAPICVERSION_NONE,
1091 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1092 PDMAPICVERSION_APIC,
1093 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1094 PDMAPICVERSION_X2APIC,
1095 /** The usual 32-bit paranoia. */
1096 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1097} PDMAPICVERSION;
1098
1099
1100/**
1101 * APIC RC helpers.
1102 */
1103typedef struct PDMAPICHLPRC
1104{
1105 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1106 uint32_t u32Version;
1107
1108 /**
1109 * Set the interrupt force action flag.
1110 *
1111 * @param pDevIns Device instance of the APIC.
1112 * @param idCpu Virtual CPU to set flag upon.
1113 */
1114 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1115
1116 /**
1117 * Clear the interrupt force action flag.
1118 *
1119 * @param pDevIns Device instance of the APIC.
1120 * @param idCpu Virtual CPU to clear flag upon.
1121 */
1122 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1123
1124 /**
1125 * Modifies APIC-related bits in the CPUID feature mask.
1126 *
1127 * @param pDevIns Device instance of the APIC.
1128 * @param enmVersion Supported APIC version.
1129 */
1130 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1131
1132 /**
1133 * Acquires the PDM lock.
1134 *
1135 * @returns VINF_SUCCESS on success.
1136 * @returns rc if we failed to acquire the lock.
1137 * @param pDevIns The APIC device instance.
1138 * @param rc What to return if we fail to acquire the lock.
1139 */
1140 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1141
1142 /**
1143 * Releases the PDM lock.
1144 *
1145 * @param pDevIns The APIC device instance.
1146 */
1147 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1148
1149 /**
1150 * Get the virtual CPU id corresponding to the current EMT.
1151 *
1152 * @param pDevIns The APIC device instance.
1153 */
1154 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1155
1156 /** Just a safety precaution. */
1157 uint32_t u32TheEnd;
1158} PDMAPICHLPRC;
1159/** Pointer to APIC GC helpers. */
1160typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1161/** Pointer to const APIC helpers. */
1162typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1163
1164/** Current PDMAPICHLPRC version number. */
1165#define PDM_APICHLPRC_VERSION 0x60010000
1166
1167
1168/**
1169 * APIC R0 helpers.
1170 */
1171typedef struct PDMAPICHLPR0
1172{
1173 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1174 uint32_t u32Version;
1175
1176 /**
1177 * Set the interrupt force action flag.
1178 *
1179 * @param pDevIns Device instance of the APIC.
1180 * @param idCpu Virtual CPU to set flag upon.
1181 */
1182 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1183
1184 /**
1185 * Clear the interrupt force action flag.
1186 *
1187 * @param pDevIns Device instance of the APIC.
1188 * @param idCpu Virtual CPU to clear flag upon.
1189 */
1190 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1191
1192 /**
1193 * Modifies APIC-related bits in the CPUID feature mask.
1194 *
1195 * @param pDevIns Device instance of the APIC.
1196 * @param enmVersion Supported APIC version.
1197 */
1198 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1199
1200 /**
1201 * Acquires the PDM lock.
1202 *
1203 * @returns VINF_SUCCESS on success.
1204 * @returns rc if we failed to acquire the lock.
1205 * @param pDevIns The APIC device instance.
1206 * @param rc What to return if we fail to acquire the lock.
1207 */
1208 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1209
1210 /**
1211 * Releases the PDM lock.
1212 *
1213 * @param pDevIns The APIC device instance.
1214 */
1215 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1216
1217 /**
1218 * Get the virtual CPU id corresponding to the current EMT.
1219 *
1220 * @param pDevIns The APIC device instance.
1221 */
1222 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1223
1224 /** Just a safety precaution. */
1225 uint32_t u32TheEnd;
1226} PDMAPICHLPR0;
1227/** Pointer to APIC GC helpers. */
1228typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1229/** Pointer to const APIC helpers. */
1230typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1231
1232/** Current PDMAPICHLPR0 version number. */
1233#define PDM_APICHLPR0_VERSION 0x60010000
1234
1235/**
1236 * APIC R3 helpers.
1237 */
1238typedef struct PDMAPICHLPR3
1239{
1240 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1241 uint32_t u32Version;
1242
1243 /**
1244 * Set the interrupt force action flag.
1245 *
1246 * @param pDevIns Device instance of the APIC.
1247 * @param idCpu Virtual CPU to set flag upon.
1248 */
1249 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1250
1251 /**
1252 * Clear the interrupt force action flag.
1253 *
1254 * @param pDevIns Device instance of the APIC.
1255 * @param idCpu Virtual CPU to clear flag upon.
1256 */
1257 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1258
1259 /**
1260 * Modifies APIC-related bits in the CPUID feature mask.
1261 *
1262 * @param pDevIns Device instance of the APIC.
1263 * @param enmVersion Supported APIC version.
1264 */
1265 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1266
1267 /**
1268 * Acquires the PDM lock.
1269 *
1270 * @returns VINF_SUCCESS on success.
1271 * @returns Fatal error on failure.
1272 * @param pDevIns The APIC device instance.
1273 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1274 */
1275 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1276
1277 /**
1278 * Releases the PDM lock.
1279 *
1280 * @param pDevIns The APIC device instance.
1281 */
1282 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1283
1284 /**
1285 * Get the virtual CPU id corresponding to the current EMT.
1286 *
1287 * @param pDevIns The APIC device instance.
1288 */
1289 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1290
1291 /**
1292 * Gets the address of the RC APIC helpers.
1293 *
1294 * This should be called at both construction and relocation time
1295 * to obtain the correct address of the RC helpers.
1296 *
1297 * @returns GC pointer to the APIC helpers.
1298 * @param pDevIns Device instance of the APIC.
1299 */
1300 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1301
1302 /**
1303 * Gets the address of the R0 APIC helpers.
1304 *
1305 * This should be called at both construction and relocation time
1306 * to obtain the correct address of the R0 helpers.
1307 *
1308 * @returns R0 pointer to the APIC helpers.
1309 * @param pDevIns Device instance of the APIC.
1310 */
1311 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1312
1313 /** Just a safety precaution. */
1314 uint32_t u32TheEnd;
1315} PDMAPICHLPR3;
1316/** Pointer to APIC helpers. */
1317typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1318/** Pointer to const APIC helpers. */
1319typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1320
1321/** Current PDMAPICHLP version number. */
1322#define PDM_APICHLPR3_VERSION 0xfd010000
1323
1324
1325/**
1326 * I/O APIC registration structure.
1327 */
1328typedef struct PDMIOAPICREG
1329{
1330 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1331 uint32_t u32Version;
1332
1333 /**
1334 * Set the an IRQ.
1335 *
1336 * @param pDevIns Device instance of the I/O APIC.
1337 * @param iIrq IRQ number to set.
1338 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1339 */
1340 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1341
1342 /** The name of the GC SetIrq entry point. */
1343 const char *pszSetIrqRC;
1344
1345 /** The name of the R0 SetIrq entry point. */
1346 const char *pszSetIrqR0;
1347} PDMIOAPICREG;
1348/** Pointer to an APIC registration structure. */
1349typedef PDMIOAPICREG *PPDMIOAPICREG;
1350
1351/** Current PDMAPICREG version number. */
1352#define PDM_IOAPICREG_VERSION 0x50010000
1353
1354
1355/**
1356 * IOAPIC RC helpers.
1357 */
1358typedef struct PDMIOAPICHLPRC
1359{
1360 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1361 uint32_t u32Version;
1362
1363 /**
1364 * Private interface between the IOAPIC and APIC.
1365 *
1366 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1367 *
1368 * @returns The current TPR.
1369 * @param pDevIns Device instance of the IOAPIC.
1370 * @param u8Dest See APIC implementation.
1371 * @param u8DestMode See APIC implementation.
1372 * @param u8DeliveryMode See APIC implementation.
1373 * @param iVector See APIC implementation.
1374 * @param u8Polarity See APIC implementation.
1375 * @param u8TriggerMode See APIC implementation.
1376 */
1377 DECLRCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1378 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1379
1380 /**
1381 * Acquires the PDM lock.
1382 *
1383 * @returns VINF_SUCCESS on success.
1384 * @returns rc if we failed to acquire the lock.
1385 * @param pDevIns The IOAPIC device instance.
1386 * @param rc What to return if we fail to acquire the lock.
1387 */
1388 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1389
1390 /**
1391 * Releases the PDM lock.
1392 *
1393 * @param pDevIns The IOAPIC device instance.
1394 */
1395 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1396
1397 /** Just a safety precaution. */
1398 uint32_t u32TheEnd;
1399} PDMIOAPICHLPRC;
1400/** Pointer to IOAPIC RC helpers. */
1401typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1402/** Pointer to const IOAPIC helpers. */
1403typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1404
1405/** Current PDMIOAPICHLPRC version number. */
1406#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1407
1408
1409/**
1410 * IOAPIC R0 helpers.
1411 */
1412typedef struct PDMIOAPICHLPR0
1413{
1414 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1415 uint32_t u32Version;
1416
1417 /**
1418 * Private interface between the IOAPIC and APIC.
1419 *
1420 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1421 *
1422 * @returns The current TPR.
1423 * @param pDevIns Device instance of the IOAPIC.
1424 * @param u8Dest See APIC implementation.
1425 * @param u8DestMode See APIC implementation.
1426 * @param u8DeliveryMode See APIC implementation.
1427 * @param iVector See APIC implementation.
1428 * @param u8Polarity See APIC implementation.
1429 * @param u8TriggerMode See APIC implementation.
1430 */
1431 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1432 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1433
1434 /**
1435 * Acquires the PDM lock.
1436 *
1437 * @returns VINF_SUCCESS on success.
1438 * @returns rc if we failed to acquire the lock.
1439 * @param pDevIns The IOAPIC device instance.
1440 * @param rc What to return if we fail to acquire the lock.
1441 */
1442 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1443
1444 /**
1445 * Releases the PDM lock.
1446 *
1447 * @param pDevIns The IOAPIC device instance.
1448 */
1449 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1450
1451 /** Just a safety precaution. */
1452 uint32_t u32TheEnd;
1453} PDMIOAPICHLPR0;
1454/** Pointer to IOAPIC R0 helpers. */
1455typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1456/** Pointer to const IOAPIC helpers. */
1457typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1458
1459/** Current PDMIOAPICHLPR0 version number. */
1460#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1461
1462/**
1463 * IOAPIC R3 helpers.
1464 */
1465typedef struct PDMIOAPICHLPR3
1466{
1467 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1468 uint32_t u32Version;
1469
1470 /**
1471 * Private interface between the IOAPIC and APIC.
1472 *
1473 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1474 *
1475 * @returns The current TPR.
1476 * @param pDevIns Device instance of the IOAPIC.
1477 * @param u8Dest See APIC implementation.
1478 * @param u8DestMode See APIC implementation.
1479 * @param u8DeliveryMode See APIC implementation.
1480 * @param iVector See APIC implementation.
1481 * @param u8Polarity See APIC implementation.
1482 * @param u8TriggerMode See APIC implementation.
1483 */
1484 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1485 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1486
1487 /**
1488 * Acquires the PDM lock.
1489 *
1490 * @returns VINF_SUCCESS on success.
1491 * @returns Fatal error on failure.
1492 * @param pDevIns The IOAPIC device instance.
1493 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1494 */
1495 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1496
1497 /**
1498 * Releases the PDM lock.
1499 *
1500 * @param pDevIns The IOAPIC device instance.
1501 */
1502 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1503
1504 /**
1505 * Gets the address of the RC IOAPIC helpers.
1506 *
1507 * This should be called at both construction and relocation time
1508 * to obtain the correct address of the RC helpers.
1509 *
1510 * @returns RC pointer to the IOAPIC helpers.
1511 * @param pDevIns Device instance of the IOAPIC.
1512 */
1513 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1514
1515 /**
1516 * Gets the address of the R0 IOAPIC helpers.
1517 *
1518 * This should be called at both construction and relocation time
1519 * to obtain the correct address of the R0 helpers.
1520 *
1521 * @returns R0 pointer to the IOAPIC helpers.
1522 * @param pDevIns Device instance of the IOAPIC.
1523 */
1524 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1525
1526 /** Just a safety precaution. */
1527 uint32_t u32TheEnd;
1528} PDMIOAPICHLPR3;
1529/** Pointer to IOAPIC R3 helpers. */
1530typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1531/** Pointer to const IOAPIC helpers. */
1532typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1533
1534/** Current PDMIOAPICHLPR3 version number. */
1535#define PDM_IOAPICHLPR3_VERSION 0xff010000
1536
1537
1538
1539#ifdef IN_RING3
1540
1541/**
1542 * DMA Transfer Handler.
1543 *
1544 * @returns Number of bytes transferred.
1545 * @param pDevIns Device instance of the DMA.
1546 * @param pvUser User pointer.
1547 * @param uChannel Channel number.
1548 * @param off DMA position.
1549 * @param cb Block size.
1550 */
1551typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1552/** Pointer to a FNDMATRANSFERHANDLER(). */
1553typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1554
1555/**
1556 * DMA Controller registration structure.
1557 */
1558typedef struct PDMDMAREG
1559{
1560 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1561 uint32_t u32Version;
1562
1563 /**
1564 * Execute pending transfers.
1565 *
1566 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1567 * @param pDevIns Device instance of the DMAC.
1568 */
1569 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1570
1571 /**
1572 * Register transfer function for DMA channel.
1573 *
1574 * @param pDevIns Device instance of the DMAC.
1575 * @param uChannel Channel number.
1576 * @param pfnTransferHandler Device specific transfer function.
1577 * @param pvUSer User pointer to be passed to the callback.
1578 */
1579 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1580
1581 /**
1582 * Read memory
1583 *
1584 * @returns Number of bytes read.
1585 * @param pDevIns Device instance of the DMAC.
1586 * @param pvBuffer Pointer to target buffer.
1587 * @param off DMA position.
1588 * @param cbBlock Block size.
1589 */
1590 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1591
1592 /**
1593 * Write memory
1594 *
1595 * @returns Number of bytes written.
1596 * @param pDevIns Device instance of the DMAC.
1597 * @param pvBuffer Memory to write.
1598 * @param off DMA position.
1599 * @param cbBlock Block size.
1600 */
1601 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1602
1603 /**
1604 * Set the DREQ line.
1605 *
1606 * @param pDevIns Device instance of the DMAC.
1607 * @param uChannel Channel number.
1608 * @param uLevel Level of the line.
1609 */
1610 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1611
1612 /**
1613 * Get channel mode
1614 *
1615 * @returns Channel mode.
1616 * @param pDevIns Device instance of the DMAC.
1617 * @param uChannel Channel number.
1618 */
1619 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1620
1621} PDMDMACREG;
1622/** Pointer to a DMAC registration structure. */
1623typedef PDMDMACREG *PPDMDMACREG;
1624
1625/** Current PDMDMACREG version number. */
1626#define PDM_DMACREG_VERSION 0xf5010000
1627
1628
1629/**
1630 * DMA Controller device helpers.
1631 */
1632typedef struct PDMDMACHLP
1633{
1634 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1635 uint32_t u32Version;
1636
1637 /* to-be-defined */
1638
1639} PDMDMACHLP;
1640/** Pointer to DMAC helpers. */
1641typedef PDMDMACHLP *PPDMDMACHLP;
1642/** Pointer to const DMAC helpers. */
1643typedef const PDMDMACHLP *PCPDMDMACHLP;
1644
1645/** Current PDMDMACHLP version number. */
1646#define PDM_DMACHLP_VERSION 0xf6010000
1647
1648#endif /* IN_RING3 */
1649
1650
1651
1652/**
1653 * RTC registration structure.
1654 */
1655typedef struct PDMRTCREG
1656{
1657 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1658 uint32_t u32Version;
1659 uint32_t u32Alignment; /**< structure size alignment. */
1660
1661 /**
1662 * Write to a CMOS register and update the checksum if necessary.
1663 *
1664 * @returns VBox status code.
1665 * @param pDevIns Device instance of the RTC.
1666 * @param iReg The CMOS register index.
1667 * @param u8Value The CMOS register value.
1668 */
1669 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1670
1671 /**
1672 * Read a CMOS register.
1673 *
1674 * @returns VBox status code.
1675 * @param pDevIns Device instance of the RTC.
1676 * @param iReg The CMOS register index.
1677 * @param pu8Value Where to store the CMOS register value.
1678 */
1679 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1680
1681} PDMRTCREG;
1682/** Pointer to a RTC registration structure. */
1683typedef PDMRTCREG *PPDMRTCREG;
1684/** Pointer to a const RTC registration structure. */
1685typedef const PDMRTCREG *PCPDMRTCREG;
1686
1687/** Current PDMRTCREG version number. */
1688#define PDM_RTCREG_VERSION 0xfa010000
1689
1690
1691/**
1692 * RTC device helpers.
1693 */
1694typedef struct PDMRTCHLP
1695{
1696 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1697 uint32_t u32Version;
1698
1699 /* to-be-defined */
1700
1701} PDMRTCHLP;
1702/** Pointer to RTC helpers. */
1703typedef PDMRTCHLP *PPDMRTCHLP;
1704/** Pointer to const RTC helpers. */
1705typedef const PDMRTCHLP *PCPDMRTCHLP;
1706
1707/** Current PDMRTCHLP version number. */
1708#define PDM_RTCHLP_VERSION 0xf6010000
1709
1710
1711
1712#ifdef IN_RING3
1713
1714/**
1715 * PDM Device API.
1716 */
1717typedef struct PDMDEVHLPR3
1718{
1719 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1720 uint32_t u32Version;
1721
1722 /**
1723 * Register a number of I/O ports with a device.
1724 *
1725 * These callbacks are of course for the host context (HC).
1726 * Register HC handlers before guest context (GC) handlers! There must be a
1727 * HC handler for every GC handler!
1728 *
1729 * @returns VBox status.
1730 * @param pDevIns The device instance to register the ports with.
1731 * @param Port First port number in the range.
1732 * @param cPorts Number of ports to register.
1733 * @param pvUser User argument.
1734 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1735 * @param pfnIn Pointer to function which is gonna handle IN operations.
1736 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1737 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1738 * @param pszDesc Pointer to description string. This must not be freed.
1739 */
1740 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1741 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1742 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1743
1744 /**
1745 * Register a number of I/O ports with a device for GC.
1746 *
1747 * These callbacks are for the host context (GC).
1748 * Register host context (HC) handlers before guest context handlers! There must be a
1749 * HC handler for every GC handler!
1750 *
1751 * @returns VBox status.
1752 * @param pDevIns The device instance to register the ports with and which GC module
1753 * to resolve the names against.
1754 * @param Port First port number in the range.
1755 * @param cPorts Number of ports to register.
1756 * @param pvUser User argument.
1757 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1758 * @param pszIn Name of the GC function which is gonna handle IN operations.
1759 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1760 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1761 * @param pszDesc Pointer to description string. This must not be freed.
1762 */
1763 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1764 const char *pszOut, const char *pszIn,
1765 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1766
1767 /**
1768 * Register a number of I/O ports with a device.
1769 *
1770 * These callbacks are of course for the ring-0 host context (R0).
1771 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1772 *
1773 * @returns VBox status.
1774 * @param pDevIns The device instance to register the ports with.
1775 * @param Port First port number in the range.
1776 * @param cPorts Number of ports to register.
1777 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1778 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1779 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1780 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1781 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1782 * @param pszDesc Pointer to description string. This must not be freed.
1783 */
1784 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1785 const char *pszOut, const char *pszIn,
1786 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1787
1788 /**
1789 * Deregister I/O ports.
1790 *
1791 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1792 *
1793 * @returns VBox status.
1794 * @param pDevIns The device instance owning the ports.
1795 * @param Port First port number in the range.
1796 * @param cPorts Number of ports to deregister.
1797 */
1798 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1799
1800 /**
1801 * Register a Memory Mapped I/O (MMIO) region.
1802 *
1803 * These callbacks are of course for the host context (HC).
1804 * Register HC handlers before guest context (GC) handlers! There must be a
1805 * HC handler for every GC handler!
1806 *
1807 * @returns VBox status.
1808 * @param pDevIns The device instance to register the MMIO with.
1809 * @param GCPhysStart First physical address in the range.
1810 * @param cbRange The size of the range (in bytes).
1811 * @param pvUser User argument.
1812 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1813 * @param pfnRead Pointer to function which is gonna handle Read operations.
1814 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1815 * @param pszDesc Pointer to description string. This must not be freed.
1816 */
1817 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1818 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1819 const char *pszDesc));
1820
1821 /**
1822 * Register a Memory Mapped I/O (MMIO) region for GC.
1823 *
1824 * These callbacks are for the guest context (GC).
1825 * Register host context (HC) handlers before guest context handlers! There must be a
1826 * HC handler for every GC handler!
1827 *
1828 * @returns VBox status.
1829 * @param pDevIns The device instance to register the MMIO with.
1830 * @param GCPhysStart First physical address in the range.
1831 * @param cbRange The size of the range (in bytes).
1832 * @param pvUser User argument.
1833 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1834 * @param pszRead Name of the GC function which is gonna handle Read operations.
1835 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1836 * @param pszDesc Obsolete. NULL is fine.
1837 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1838 */
1839 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1840 const char *pszWrite, const char *pszRead, const char *pszFill,
1841 const char *pszDesc));
1842
1843 /**
1844 * Register a Memory Mapped I/O (MMIO) region for R0.
1845 *
1846 * These callbacks are for the ring-0 host context (R0).
1847 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1848 *
1849 * @returns VBox status.
1850 * @param pDevIns The device instance to register the MMIO with.
1851 * @param GCPhysStart First physical address in the range.
1852 * @param cbRange The size of the range (in bytes).
1853 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1854 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1855 * @param pszRead Name of the GC function which is gonna handle Read operations.
1856 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1857 * @param pszDesc Obsolete. NULL is fine.
1858 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1859 */
1860 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1861 const char *pszWrite, const char *pszRead, const char *pszFill,
1862 const char *pszDesc));
1863
1864 /**
1865 * Deregister a Memory Mapped I/O (MMIO) region.
1866 *
1867 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1868 *
1869 * @returns VBox status.
1870 * @param pDevIns The device instance owning the MMIO region(s).
1871 * @param GCPhysStart First physical address in the range.
1872 * @param cbRange The size of the range (in bytes).
1873 */
1874 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1875
1876 /**
1877 * Register a ROM (BIOS) region.
1878 *
1879 * It goes without saying that this is read-only memory. The memory region must be
1880 * in unassigned memory. I.e. from the top of the address space or on the PC in
1881 * the 0xa0000-0xfffff range.
1882 *
1883 * @returns VBox status.
1884 * @param pDevIns The device instance owning the ROM region.
1885 * @param GCPhysStart First physical address in the range.
1886 * Must be page aligned!
1887 * @param cbRange The size of the range (in bytes).
1888 * Must be page aligned!
1889 * @param pvBinary Pointer to the binary data backing the ROM image.
1890 * This must be cbRange bytes big.
1891 * It will be copied and doesn't have to stick around if fShadow is clear.
1892 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1893 * the ROM writable for a while during the POST and refreshing
1894 * it at reset. When this flag is set, the memory pointed to by
1895 * pvBinary has to stick around for the lifespan of the VM.
1896 * @param pszDesc Pointer to description string. This must not be freed.
1897 *
1898 * @remark There is no way to remove the rom, automatically on device cleanup or
1899 * manually from the device yet. At present I doubt we need such features...
1900 */
1901 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1902
1903 /**
1904 * Register a save state data unit.
1905 *
1906 * @returns VBox status.
1907 * @param pDevIns Device instance.
1908 * @param pszName Data unit name.
1909 * @param u32Instance The instance identifier of the data unit.
1910 * This must together with the name be unique.
1911 * @param u32Version Data layout version number.
1912 * @param cbGuess The approximate amount of data in the unit.
1913 * Only for progress indicators.
1914 * @param pfnSavePrep Prepare save callback, optional.
1915 * @param pfnSaveExec Execute save callback, optional.
1916 * @param pfnSaveDone Done save callback, optional.
1917 * @param pfnLoadPrep Prepare load callback, optional.
1918 * @param pfnLoadExec Execute load callback, optional.
1919 * @param pfnLoadDone Done load callback, optional.
1920 */
1921 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1922 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1923 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1924
1925 /**
1926 * Creates a timer.
1927 *
1928 * @returns VBox status.
1929 * @param pDevIns Device instance.
1930 * @param enmClock The clock to use on this timer.
1931 * @param pfnCallback Callback function.
1932 * @param pszDesc Pointer to description string which must stay around
1933 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1934 * @param ppTimer Where to store the timer on success.
1935 */
1936 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1937
1938 /**
1939 * Creates an external timer.
1940 *
1941 * @returns timer pointer
1942 * @param pDevIns Device instance.
1943 * @param enmClock The clock to use on this timer.
1944 * @param pfnCallback Callback function.
1945 * @param pvUser User pointer
1946 * @param pszDesc Pointer to description string which must stay around
1947 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1948 */
1949 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1950
1951 /**
1952 * Registers the device with the default PCI bus.
1953 *
1954 * @returns VBox status code.
1955 * @param pDevIns Device instance.
1956 * @param pPciDev The PCI device structure.
1957 * Any PCI enabled device must keep this in it's instance data!
1958 * Fill in the PCI data config before registration, please.
1959 * @remark This is the simple interface, a Ex interface will be created if
1960 * more features are needed later.
1961 */
1962 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1963
1964 /**
1965 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1966 *
1967 * @returns VBox status code.
1968 * @param pDevIns Device instance.
1969 * @param iRegion The region number.
1970 * @param cbRegion Size of the region.
1971 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1972 * @param pfnCallback Callback for doing the mapping.
1973 */
1974 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1975
1976 /**
1977 * Register PCI configuration space read/write callbacks.
1978 *
1979 * @param pDevIns Device instance.
1980 * @param pPciDev The PCI device structure.
1981 * If NULL the default PCI device for this device instance is used.
1982 * @param pfnRead Pointer to the user defined PCI config read function.
1983 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1984 * PCI config read function. This way, user can decide when (and if)
1985 * to call default PCI config read function. Can be NULL.
1986 * @param pfnWrite Pointer to the user defined PCI config write function.
1987 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1988 * PCI config write function. This way, user can decide when (and if)
1989 * to call default PCI config write function. Can be NULL.
1990 * @thread EMT
1991 */
1992 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1993 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1994
1995 /**
1996 * Set the IRQ for a PCI device.
1997 *
1998 * @param pDevIns Device instance.
1999 * @param iIrq IRQ number to set.
2000 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2001 * @thread Any thread, but will involve the emulation thread.
2002 */
2003 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2004
2005 /**
2006 * Set the IRQ for a PCI device, but don't wait for EMT to process
2007 * the request when not called from EMT.
2008 *
2009 * @param pDevIns Device instance.
2010 * @param iIrq IRQ number to set.
2011 * @param iLevel IRQ level.
2012 * @thread Any thread, but will involve the emulation thread.
2013 */
2014 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2015
2016 /**
2017 * Set ISA IRQ for a device.
2018 *
2019 * @param pDevIns Device instance.
2020 * @param iIrq IRQ number to set.
2021 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2022 * @thread Any thread, but will involve the emulation thread.
2023 */
2024 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2025
2026 /**
2027 * Set the ISA IRQ for a device, but don't wait for EMT to process
2028 * the request when not called from EMT.
2029 *
2030 * @param pDevIns Device instance.
2031 * @param iIrq IRQ number to set.
2032 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2033 * @thread Any thread, but will involve the emulation thread.
2034 */
2035 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2036
2037 /**
2038 * Attaches a driver (chain) to the device.
2039 *
2040 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2041 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2042 *
2043 * @returns VBox status code.
2044 * @param pDevIns Device instance.
2045 * @param iLun The logical unit to attach.
2046 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2047 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2048 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2049 * for the live of the device instance.
2050 */
2051 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2052
2053 /**
2054 * Allocate memory which is associated with current VM instance
2055 * and automatically freed on it's destruction.
2056 *
2057 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2058 * @param pDevIns Device instance.
2059 * @param cb Number of bytes to allocate.
2060 */
2061 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2062
2063 /**
2064 * Allocate memory which is associated with current VM instance
2065 * and automatically freed on it's destruction. The memory is ZEROed.
2066 *
2067 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2068 * @param pDevIns Device instance.
2069 * @param cb Number of bytes to allocate.
2070 */
2071 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2072
2073 /**
2074 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2075 *
2076 * @param pDevIns Device instance.
2077 * @param pv Pointer to the memory to free.
2078 */
2079 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2080
2081 /**
2082 * Set the VM error message
2083 *
2084 * @returns rc.
2085 * @param pDevIns Device instance.
2086 * @param rc VBox status code.
2087 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2088 * @param pszFormat Error message format string.
2089 * @param ... Error message arguments.
2090 */
2091 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2092
2093 /**
2094 * Set the VM error message
2095 *
2096 * @returns rc.
2097 * @param pDevIns Device instance.
2098 * @param rc VBox status code.
2099 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2100 * @param pszFormat Error message format string.
2101 * @param va Error message arguments.
2102 */
2103 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2104
2105 /**
2106 * Set the VM runtime error message
2107 *
2108 * @returns VBox status code.
2109 * @param pDevIns Device instance.
2110 * @param fFatal Whether it is a fatal error or not.
2111 * @param pszErrorID Error ID string.
2112 * @param pszFormat Error message format string.
2113 * @param ... Error message arguments.
2114 */
2115 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2116
2117 /**
2118 * Set the VM runtime error message
2119 *
2120 * @returns VBox status code.
2121 * @param pDevIns Device instance.
2122 * @param fFatal Whether it is a fatal error or not.
2123 * @param pszErrorID Error ID string.
2124 * @param pszFormat Error message format string.
2125 * @param va Error message arguments.
2126 */
2127 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2128
2129 /**
2130 * Assert that the current thread is the emulation thread.
2131 *
2132 * @returns True if correct.
2133 * @returns False if wrong.
2134 * @param pDevIns Device instance.
2135 * @param pszFile Filename of the assertion location.
2136 * @param iLine The linenumber of the assertion location.
2137 * @param pszFunction Function of the assertion location.
2138 */
2139 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2140
2141 /**
2142 * Assert that the current thread is NOT the emulation thread.
2143 *
2144 * @returns True if correct.
2145 * @returns False if wrong.
2146 * @param pDevIns Device instance.
2147 * @param pszFile Filename of the assertion location.
2148 * @param iLine The linenumber of the assertion location.
2149 * @param pszFunction Function of the assertion location.
2150 */
2151 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2152
2153 /**
2154 * Stops the VM and enters the debugger to look at the guest state.
2155 *
2156 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2157 * invoking this function directly.
2158 *
2159 * @returns VBox status code which must be passed up to the VMM.
2160 * @param pDevIns Device instance.
2161 * @param pszFile Filename of the assertion location.
2162 * @param iLine The linenumber of the assertion location.
2163 * @param pszFunction Function of the assertion location.
2164 * @param pszFormat Message. (optional)
2165 * @param args Message parameters.
2166 */
2167 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2168
2169 /**
2170 * Register a info handler with DBGF,
2171 *
2172 * @returns VBox status code.
2173 * @param pDevIns Device instance.
2174 * @param pszName The identifier of the info.
2175 * @param pszDesc The description of the info and any arguments the handler may take.
2176 * @param pfnHandler The handler function to be called to display the info.
2177 */
2178 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2179
2180 /**
2181 * Registers a statistics sample if statistics are enabled.
2182 *
2183 * @param pDevIns Device instance of the DMA.
2184 * @param pvSample Pointer to the sample.
2185 * @param enmType Sample type. This indicates what pvSample is pointing at.
2186 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2187 * Further nesting is possible.
2188 * @param enmUnit Sample unit.
2189 * @param pszDesc Sample description.
2190 */
2191 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2192
2193 /**
2194 * Same as pfnSTAMRegister except that the name is specified in a
2195 * RTStrPrintf like fashion.
2196 *
2197 * @returns VBox status.
2198 * @param pDevIns Device instance of the DMA.
2199 * @param pvSample Pointer to the sample.
2200 * @param enmType Sample type. This indicates what pvSample is pointing at.
2201 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2202 * @param enmUnit Sample unit.
2203 * @param pszDesc Sample description.
2204 * @param pszName The sample name format string.
2205 * @param ... Arguments to the format string.
2206 */
2207 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2208 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2209
2210 /**
2211 * Same as pfnSTAMRegister except that the name is specified in a
2212 * RTStrPrintfV like fashion.
2213 *
2214 * @returns VBox status.
2215 * @param pDevIns Device instance of the DMA.
2216 * @param pvSample Pointer to the sample.
2217 * @param enmType Sample type. This indicates what pvSample is pointing at.
2218 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2219 * @param enmUnit Sample unit.
2220 * @param pszDesc Sample description.
2221 * @param pszName The sample name format string.
2222 * @param args Arguments to the format string.
2223 */
2224 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2225 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2226
2227 /**
2228 * Register the RTC device.
2229 *
2230 * @returns VBox status code.
2231 * @param pDevIns Device instance.
2232 * @param pRtcReg Pointer to a RTC registration structure.
2233 * @param ppRtcHlp Where to store the pointer to the helper functions.
2234 */
2235 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2236
2237 /**
2238 * Create a queue.
2239 *
2240 * @returns VBox status code.
2241 * @param pDevIns The device instance.
2242 * @param cbItem The size of a queue item.
2243 * @param cItems The number of items in the queue.
2244 * @param cMilliesInterval The number of milliseconds between polling the queue.
2245 * If 0 then the emulation thread will be notified whenever an item arrives.
2246 * @param pfnCallback The consumer function.
2247 * @param fGCEnabled Set if the queue should work in GC too.
2248 * @param ppQueue Where to store the queue handle on success.
2249 * @thread The emulation thread.
2250 */
2251 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2252 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2253
2254 /**
2255 * Initializes a PDM critical section.
2256 *
2257 * The PDM critical sections are derived from the IPRT critical sections, but
2258 * works in GC as well.
2259 *
2260 * @returns VBox status code.
2261 * @param pDevIns Device instance.
2262 * @param pCritSect Pointer to the critical section.
2263 * @param pszName The name of the critical section (for statistics).
2264 */
2265 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2266
2267 /**
2268 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2269 *
2270 * @returns pTime.
2271 * @param pDevIns Device instance.
2272 * @param pTime Where to store the time.
2273 */
2274 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2275
2276 /**
2277 * Creates a PDM thread.
2278 *
2279 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2280 * resuming, and destroying the thread as the VM state changes.
2281 *
2282 * @returns VBox status code.
2283 * @param pDevIns The device instance.
2284 * @param ppThread Where to store the thread 'handle'.
2285 * @param pvUser The user argument to the thread function.
2286 * @param pfnThread The thread function.
2287 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2288 * a state change is pending.
2289 * @param cbStack See RTThreadCreate.
2290 * @param enmType See RTThreadCreate.
2291 * @param pszName See RTThreadCreate.
2292 */
2293 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2294 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2295
2296 /**
2297 * Convert a guest virtual address to a guest physical address.
2298 *
2299 * @returns VBox status code.
2300 * @param pDevIns Device instance.
2301 * @param GCPtr Guest virtual address.
2302 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2303 * @thread The emulation thread.
2304 * @remark Careful with page boundraries.
2305 */
2306 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2307
2308 /**
2309 * Gets the VM state.
2310 *
2311 * @returns VM state.
2312 * @param pDevIns The device instance.
2313 * @thread Any thread (just keep in mind that it's volatile info).
2314 */
2315 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2316
2317 /** Space reserved for future members.
2318 * @{ */
2319 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2320 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2321 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2322 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2323 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2324 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2325 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2326 /** @} */
2327
2328
2329 /** API available to trusted devices only.
2330 *
2331 * These APIs are providing unrestricted access to the guest and the VM,
2332 * or they are interacting intimately with PDM.
2333 *
2334 * @{
2335 */
2336 /**
2337 * Gets the VM handle. Restricted API.
2338 *
2339 * @returns VM Handle.
2340 * @param pDevIns Device instance.
2341 */
2342 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2343
2344 /**
2345 * Register the PCI Bus.
2346 *
2347 * @returns VBox status code.
2348 * @param pDevIns Device instance.
2349 * @param pPciBusReg Pointer to PCI bus registration structure.
2350 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2351 */
2352 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2353
2354 /**
2355 * Register the PIC device.
2356 *
2357 * @returns VBox status code.
2358 * @param pDevIns Device instance.
2359 * @param pPicReg Pointer to a PIC registration structure.
2360 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2361 */
2362 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2363
2364 /**
2365 * Register the APIC device.
2366 *
2367 * @returns VBox status code.
2368 * @param pDevIns Device instance.
2369 * @param pApicReg Pointer to a APIC registration structure.
2370 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2371 */
2372 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2373
2374 /**
2375 * Register the I/O APIC device.
2376 *
2377 * @returns VBox status code.
2378 * @param pDevIns Device instance.
2379 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2380 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2381 */
2382 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2383
2384 /**
2385 * Register the DMA device.
2386 *
2387 * @returns VBox status code.
2388 * @param pDevIns Device instance.
2389 * @param pDmacReg Pointer to a DMAC registration structure.
2390 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2391 */
2392 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2393
2394 /**
2395 * Read physical memory.
2396 *
2397 * @param pDevIns Device instance.
2398 * @param GCPhys Physical address start reading from.
2399 * @param pvBuf Where to put the read bits.
2400 * @param cbRead How many bytes to read.
2401 * @thread Any thread, but the call may involve the emulation thread.
2402 */
2403 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2404
2405 /**
2406 * Write to physical memory.
2407 *
2408 * @param pDevIns Device instance.
2409 * @param GCPhys Physical address to write to.
2410 * @param pvBuf What to write.
2411 * @param cbWrite How many bytes to write.
2412 * @thread Any thread, but the call may involve the emulation thread.
2413 */
2414 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2415
2416 /**
2417 * Read guest physical memory by virtual address.
2418 *
2419 * @param pDevIns Device instance.
2420 * @param pvDst Where to put the read bits.
2421 * @param GCVirtSrc Guest virtual address to start reading from.
2422 * @param cb How many bytes to read.
2423 * @thread The emulation thread.
2424 */
2425 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2426
2427 /**
2428 * Write to guest physical memory by virtual address.
2429 *
2430 * @param pDevIns Device instance.
2431 * @param GCVirtDst Guest virtual address to write to.
2432 * @param pvSrc What to write.
2433 * @param cb How many bytes to write.
2434 * @thread The emulation thread.
2435 */
2436 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2437
2438 /**
2439 * Reserve physical address space for ROM and MMIO ranges.
2440 *
2441 * @returns VBox status code.
2442 * @param pDevIns Device instance.
2443 * @param GCPhys Start physical address.
2444 * @param cbRange The size of the range.
2445 * @param pszDesc Description string.
2446 * @thread The emulation thread.
2447 */
2448 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2449
2450 /**
2451 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2452 *
2453 * @returns VBox status code.
2454 * @param pDevIns Device instance.
2455 * @param GCPhys Start physical address.
2456 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2457 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2458 * @thread The emulation thread.
2459 *
2460 * @remark Careful with page boundraries.
2461 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2462 */
2463 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2464
2465 /**
2466 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2467 *
2468 * @returns VBox status code.
2469 * @param pDevIns Device instance.
2470 * @param GCPtr Guest virtual address.
2471 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2472 * @thread The emulation thread.
2473 *
2474 * @remark Careful with page boundraries.
2475 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2476 */
2477 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2478
2479 /**
2480 * Checks if the Gate A20 is enabled or not.
2481 *
2482 * @returns true if A20 is enabled.
2483 * @returns false if A20 is disabled.
2484 * @param pDevIns Device instance.
2485 * @thread The emulation thread.
2486 */
2487 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2488
2489 /**
2490 * Enables or disables the Gate A20.
2491 *
2492 * @param pDevIns Device instance.
2493 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2494 * @thread The emulation thread.
2495 */
2496 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2497
2498 /**
2499 * Resets the VM.
2500 *
2501 * @returns The appropriate VBox status code to pass around on reset.
2502 * @param pDevIns Device instance.
2503 * @thread The emulation thread.
2504 */
2505 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2506
2507 /**
2508 * Suspends the VM.
2509 *
2510 * @returns The appropriate VBox status code to pass around on suspend.
2511 * @param pDevIns Device instance.
2512 * @thread The emulation thread.
2513 */
2514 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2515
2516 /**
2517 * Power off the VM.
2518 *
2519 * @returns The appropriate VBox status code to pass around on power off.
2520 * @param pDevIns Device instance.
2521 * @thread The emulation thread.
2522 */
2523 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2524
2525 /**
2526 * Acquire global VM lock
2527 *
2528 * @returns VBox status code
2529 * @param pDevIns Device instance.
2530 */
2531 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2532
2533 /**
2534 * Release global VM lock
2535 *
2536 * @returns VBox status code
2537 * @param pDevIns Device instance.
2538 */
2539 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2540
2541 /**
2542 * Check that the current thread owns the global VM lock.
2543 *
2544 * @returns boolean
2545 * @param pDevIns Device instance.
2546 * @param pszFile Filename of the assertion location.
2547 * @param iLine Linenumber of the assertion location.
2548 * @param pszFunction Function of the assertion location.
2549 */
2550 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2551
2552 /**
2553 * Register transfer function for DMA channel.
2554 *
2555 * @returns VBox status code.
2556 * @param pDevIns Device instance.
2557 * @param uChannel Channel number.
2558 * @param pfnTransferHandler Device specific transfer callback function.
2559 * @param pvUser User pointer to pass to the callback.
2560 * @thread EMT
2561 */
2562 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2563
2564 /**
2565 * Read memory.
2566 *
2567 * @returns VBox status code.
2568 * @param pDevIns Device instance.
2569 * @param uChannel Channel number.
2570 * @param pvBuffer Pointer to target buffer.
2571 * @param off DMA position.
2572 * @param cbBlock Block size.
2573 * @param pcbRead Where to store the number of bytes which was read. optional.
2574 * @thread EMT
2575 */
2576 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2577
2578 /**
2579 * Write memory.
2580 *
2581 * @returns VBox status code.
2582 * @param pDevIns Device instance.
2583 * @param uChannel Channel number.
2584 * @param pvBuffer Memory to write.
2585 * @param off DMA position.
2586 * @param cbBlock Block size.
2587 * @param pcbWritten Where to store the number of bytes which was written. optional.
2588 * @thread EMT
2589 */
2590 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2591
2592 /**
2593 * Set the DREQ line.
2594 *
2595 * @returns VBox status code.
2596 * @param pDevIns Device instance.
2597 * @param uChannel Channel number.
2598 * @param uLevel Level of the line.
2599 * @thread EMT
2600 */
2601 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2602
2603 /**
2604 * Get channel mode.
2605 *
2606 * @returns Channel mode. See specs.
2607 * @param pDevIns Device instance.
2608 * @param uChannel Channel number.
2609 * @thread EMT
2610 */
2611 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2612
2613 /**
2614 * Schedule DMA execution.
2615 *
2616 * @param pDevIns Device instance.
2617 * @thread Any thread.
2618 */
2619 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2620
2621 /**
2622 * Write CMOS value and update the checksum(s).
2623 *
2624 * @returns VBox status code.
2625 * @param pDevIns Device instance.
2626 * @param iReg The CMOS register index.
2627 * @param u8Value The CMOS register value.
2628 * @thread EMT
2629 */
2630 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2631
2632 /**
2633 * Read CMOS value.
2634 *
2635 * @returns VBox status code.
2636 * @param pDevIns Device instance.
2637 * @param iReg The CMOS register index.
2638 * @param pu8Value Where to store the CMOS register value.
2639 * @thread EMT
2640 */
2641 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2642
2643 /**
2644 * Get CPUID.
2645 *
2646 * @param pDevIns Device instance.
2647 * @param iLeaf The CPUID leaf to get.
2648 * @param pEax Where to store the EAX value.
2649 * @param pEbx Where to store the EBX value.
2650 * @param pEcx Where to store the ECX value.
2651 * @param pEdx Where to store the EDX value.
2652 */
2653 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2654
2655 /**
2656 * Write protects a shadow ROM mapping.
2657 *
2658 * This is intented for use by the system BIOS or by the device that
2659 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2660 * write protected once the POST is over.
2661 *
2662 * @param pDevIns Device instance.
2663 * @param GCPhysStart Where the shadow ROM mapping starts.
2664 * @param cbRange The size of the shadow ROM mapping.
2665 */
2666 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2667
2668 /**
2669 * Allocate and register a MMIO2 region.
2670 *
2671 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2672 * RAM associated with a device. It is also non-shared memory with a
2673 * permanent ring-3 mapping and page backing (presently).
2674 *
2675 * @returns VBox status.
2676 * @param pDevIns The device instance.
2677 * @param iRegion The region number. Use the PCI region number as
2678 * this must be known to the PCI bus device too. If it's not associated
2679 * with the PCI device, then any number up to UINT8_MAX is fine.
2680 * @param cb The size (in bytes) of the region.
2681 * @param fFlags Reserved for future use, must be zero.
2682 * @param ppv Where to store the address of the ring-3 mapping of the memory.
2683 * @param pszDesc Pointer to description string. This must not be freed.
2684 * @thread EMT.
2685 */
2686 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2687
2688 /**
2689 * Deregisters and frees a MMIO2 region.
2690 *
2691 * Any physical (and virtual) access handlers registered for the region must
2692 * be deregistered before calling this function.
2693 *
2694 * @returns VBox status code.
2695 * @param pDevIns The device instance.
2696 * @param iRegion The region number used during registration.
2697 * @thread EMT.
2698 */
2699 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2700
2701 /**
2702 * Maps a MMIO2 region into the physical memory space.
2703 *
2704 * A MMIO2 range may overlap with base memory if a lot of RAM
2705 * is configured for the VM, in which case we'll drop the base
2706 * memory pages. Presently we will make no attempt to preserve
2707 * anything that happens to be present in the base memory that
2708 * is replaced, this is of course incorrectly but it's too much
2709 * effort.
2710 *
2711 * @returns VBox status code.
2712 * @param pDevIns The device instance.
2713 * @param iRegion The region number used during registration.
2714 * @param GCPhys The physical address to map it at.
2715 * @thread EMT.
2716 */
2717 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2718
2719 /**
2720 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2721 *
2722 * @returns VBox status code.
2723 * @param pDevIns The device instance.
2724 * @param iRegion The region number used during registration.
2725 * @param GCPhys The physical address it's currently mapped at.
2726 * @thread EMT.
2727 */
2728 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2729
2730 /**
2731 * Maps a portion of an MMIO2 region into the hypervisor region.
2732 *
2733 * Callers of this API must never deregister the MMIO2 region before the
2734 * VM is powered off.
2735 *
2736 * @return VBox status code.
2737 * @param pDevIns The device owning the MMIO2 memory.
2738 * @param iRegion The region.
2739 * @param off The offset into the region. Will be rounded down to closest page boundrary.
2740 * @param cb The number of bytes to map. Will be rounded up to the closest page boundrary.
2741 * @param pszDesc Mapping description.
2742 * @param pRCPtr Where to store the RC address.
2743 */
2744 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2745 const char *pszDesc, PRTRCPTR pRCPtr));
2746
2747 /**
2748 * Registers the VMM device heap
2749 *
2750 * @returns VBox status code.
2751 * @param pDevIns The device instance.
2752 * @param GCPhys The physical address.
2753 * @param pvHeap Ring 3 heap pointer.
2754 * @param cbSize Size of the heap.
2755 * @thread EMT.
2756 */
2757 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2758
2759 /**
2760 * Unregisters the VMM device heap
2761 *
2762 * @returns VBox status code.
2763 * @param pDevIns The device instance.
2764 * @param GCPhys The physical address.
2765 * @thread EMT.
2766 */
2767 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2768
2769 /**
2770 * Register a Memory Mapped I/O (MMIO) region with backing memory.
2771 *
2772 * These callbacks are of course for the host context (HC).
2773 * Register HC handlers before guest context (GC) handlers! There must be a
2774 * HC handler for every GC handler!
2775 *
2776 * @returns VBox status.
2777 * @param pDevIns The device instance to register the MMIO with.
2778 * @param enmMMIOType MMIO Type
2779 * @param GCPhysStart First physical address in the range.
2780 * @param cbRange The size of the range (in bytes).
2781 * @param pvUser User argument.
2782 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2783 * @param pfnRead Pointer to function which is gonna handle Read operations.
2784 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2785 * @param pszDesc Pointer to description string. This must not be freed.
2786 */
2787 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterEx,(PPDMDEVINS pDevIns, IOMMMIOTYPE enmMMIOType, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2788 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2789 const char *pszDesc));
2790
2791 /** @} */
2792
2793 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2794 uint32_t u32TheEnd;
2795} PDMDEVHLPR3;
2796#endif /* !IN_RING3 */
2797/** Pointer to the R3 PDM Device API. */
2798typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2799/** Pointer to the R3 PDM Device API, const variant. */
2800typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2801
2802/** Current PDMDEVHLP version number. */
2803#define PDM_DEVHLP_VERSION 0xf2060001
2804
2805
2806/**
2807 * PDM Device API - RC Variant.
2808 */
2809typedef struct PDMDEVHLPRC
2810{
2811 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2812 uint32_t u32Version;
2813
2814 /**
2815 * Set the IRQ for a PCI device.
2816 *
2817 * @param pDevIns Device instance.
2818 * @param iIrq IRQ number to set.
2819 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2820 * @thread Any thread, but will involve the emulation thread.
2821 */
2822 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2823
2824 /**
2825 * Set ISA IRQ for a device.
2826 *
2827 * @param pDevIns Device instance.
2828 * @param iIrq IRQ number to set.
2829 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2830 * @thread Any thread, but will involve the emulation thread.
2831 */
2832 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2833
2834 /**
2835 * Read physical memory.
2836 *
2837 * @param pDevIns Device instance.
2838 * @param GCPhys Physical address start reading from.
2839 * @param pvBuf Where to put the read bits.
2840 * @param cbRead How many bytes to read.
2841 */
2842 DECLRCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2843
2844 /**
2845 * Write to physical memory.
2846 *
2847 * @param pDevIns Device instance.
2848 * @param GCPhys Physical address to write to.
2849 * @param pvBuf What to write.
2850 * @param cbWrite How many bytes to write.
2851 */
2852 DECLRCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2853
2854 /**
2855 * Checks if the Gate A20 is enabled or not.
2856 *
2857 * @returns true if A20 is enabled.
2858 * @returns false if A20 is disabled.
2859 * @param pDevIns Device instance.
2860 * @thread The emulation thread.
2861 */
2862 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2863
2864 /**
2865 * Set the VM error message
2866 *
2867 * @returns rc.
2868 * @param pDrvIns Driver instance.
2869 * @param rc VBox status code.
2870 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2871 * @param pszFormat Error message format string.
2872 * @param ... Error message arguments.
2873 */
2874 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2875
2876 /**
2877 * Set the VM error message
2878 *
2879 * @returns rc.
2880 * @param pDrvIns Driver instance.
2881 * @param rc VBox status code.
2882 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2883 * @param pszFormat Error message format string.
2884 * @param va Error message arguments.
2885 */
2886 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2887
2888 /**
2889 * Set the VM runtime error message
2890 *
2891 * @returns VBox status code.
2892 * @param pDevIns Device instance.
2893 * @param fFatal Whether it is a fatal error or not.
2894 * @param pszErrorID Error ID string.
2895 * @param pszFormat Error message format string.
2896 * @param ... Error message arguments.
2897 */
2898 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2899
2900 /**
2901 * Set the VM runtime error message
2902 *
2903 * @returns VBox status code.
2904 * @param pDevIns Device instance.
2905 * @param fFatal Whether it is a fatal error or not.
2906 * @param pszErrorID Error ID string.
2907 * @param pszFormat Error message format string.
2908 * @param va Error message arguments.
2909 */
2910 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2911
2912 /**
2913 * Set parameters for pending MMIO patch operation
2914 *
2915 * @returns VBox status code.
2916 * @param pDevIns Device instance.
2917 * @param GCPhys MMIO physical address
2918 * @param pCachedData GC pointer to cached data
2919 */
2920 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2921
2922 /**
2923 * Gets the VM handle. Restricted API.
2924 *
2925 * @returns VM Handle.
2926 * @param pDevIns Device instance.
2927 */
2928 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2929
2930 /** Just a safety precaution. */
2931 uint32_t u32TheEnd;
2932} PDMDEVHLPRC;
2933/** Pointer PDM Device RC API. */
2934typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
2935/** Pointer PDM Device RC API. */
2936typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
2937
2938/** Current PDMDEVHLP version number. */
2939#define PDM_DEVHLPRC_VERSION 0xfb010000
2940
2941
2942/**
2943 * PDM Device API - R0 Variant.
2944 */
2945typedef struct PDMDEVHLPR0
2946{
2947 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2948 uint32_t u32Version;
2949
2950 /**
2951 * Set the IRQ for a PCI device.
2952 *
2953 * @param pDevIns Device instance.
2954 * @param iIrq IRQ number to set.
2955 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2956 * @thread Any thread, but will involve the emulation thread.
2957 */
2958 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2959
2960 /**
2961 * Set ISA IRQ for a device.
2962 *
2963 * @param pDevIns Device instance.
2964 * @param iIrq IRQ number to set.
2965 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2966 * @thread Any thread, but will involve the emulation thread.
2967 */
2968 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2969
2970 /**
2971 * Read physical memory.
2972 *
2973 * @param pDevIns Device instance.
2974 * @param GCPhys Physical address start reading from.
2975 * @param pvBuf Where to put the read bits.
2976 * @param cbRead How many bytes to read.
2977 */
2978 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2979
2980 /**
2981 * Write to physical memory.
2982 *
2983 * @param pDevIns Device instance.
2984 * @param GCPhys Physical address to write to.
2985 * @param pvBuf What to write.
2986 * @param cbWrite How many bytes to write.
2987 */
2988 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2989
2990 /**
2991 * Checks if the Gate A20 is enabled or not.
2992 *
2993 * @returns true if A20 is enabled.
2994 * @returns false if A20 is disabled.
2995 * @param pDevIns Device instance.
2996 * @thread The emulation thread.
2997 */
2998 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2999
3000 /**
3001 * Set the VM error message
3002 *
3003 * @returns rc.
3004 * @param pDrvIns Driver instance.
3005 * @param rc VBox status code.
3006 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3007 * @param pszFormat Error message format string.
3008 * @param ... Error message arguments.
3009 */
3010 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3011
3012 /**
3013 * Set the VM error message
3014 *
3015 * @returns rc.
3016 * @param pDrvIns Driver instance.
3017 * @param rc VBox status code.
3018 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3019 * @param pszFormat Error message format string.
3020 * @param va Error message arguments.
3021 */
3022 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3023
3024 /**
3025 * Set the VM runtime error message
3026 *
3027 * @returns VBox status code.
3028 * @param pDevIns Device instance.
3029 * @param fFatal Whether it is a fatal error or not.
3030 * @param pszErrorID Error ID string.
3031 * @param pszFormat Error message format string.
3032 * @param ... Error message arguments.
3033 */
3034 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
3035
3036 /**
3037 * Set the VM runtime error message
3038 *
3039 * @returns VBox status code.
3040 * @param pDevIns Device instance.
3041 * @param fFatal Whether it is a fatal error or not.
3042 * @param pszErrorID Error ID string.
3043 * @param pszFormat Error message format string.
3044 * @param va Error message arguments.
3045 */
3046 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
3047
3048 /**
3049 * Set parameters for pending MMIO patch operation
3050 *
3051 * @returns rc.
3052 * @param pDevIns Device instance.
3053 * @param GCPhys MMIO physical address
3054 * @param pCachedData GC pointer to cached data
3055 */
3056 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3057
3058 /**
3059 * Gets the VM handle. Restricted API.
3060 *
3061 * @returns VM Handle.
3062 * @param pDevIns Device instance.
3063 */
3064 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3065
3066 /** Just a safety precaution. */
3067 uint32_t u32TheEnd;
3068} PDMDEVHLPR0;
3069/** Pointer PDM Device R0 API. */
3070typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3071/** Pointer PDM Device GC API. */
3072typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3073
3074/** Current PDMDEVHLP version number. */
3075#define PDM_DEVHLPR0_VERSION 0xfb010000
3076
3077
3078
3079/**
3080 * PDM Device Instance.
3081 */
3082typedef struct PDMDEVINS
3083{
3084 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3085 uint32_t u32Version;
3086 /** Device instance number. */
3087 RTUINT iInstance;
3088
3089 /** Pointer the GC PDM Device API. */
3090 PCPDMDEVHLPRC pDevHlpRC;
3091 /** Pointer to device instance data. */
3092 RTRCPTR pvInstanceDataRC;
3093
3094 /** Pointer the R0 PDM Device API. */
3095 PCPDMDEVHLPR0 pDevHlpR0;
3096 /** Pointer to device instance data (R0). */
3097 RTR0PTR pvInstanceDataR0;
3098
3099 /** Pointer the HC PDM Device API. */
3100 PCPDMDEVHLPR3 pDevHlpR3;
3101 /** Pointer to device instance data. */
3102 RTR3PTR pvInstanceDataR3;
3103
3104 /** Pointer to device registration structure. */
3105 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3106 /** Configuration handle. */
3107 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3108
3109 /** The base interface of the device.
3110 * The device constructor initializes this if it has any
3111 * device level interfaces to export. To obtain this interface
3112 * call PDMR3QueryDevice(). */
3113 PDMIBASE IBase;
3114 /** Align the internal data more naturally. */
3115 RTR3PTR R3PtrPadding;
3116
3117 /** Internal data. */
3118 union
3119 {
3120#ifdef PDMDEVINSINT_DECLARED
3121 PDMDEVINSINT s;
3122#endif
3123 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3124 } Internal;
3125
3126 /** Device instance data. The size of this area is defined
3127 * in the PDMDEVREG::cbInstanceData field. */
3128 char achInstanceData[8];
3129} PDMDEVINS;
3130
3131/** Current PDMDEVINS version number. */
3132#define PDM_DEVINS_VERSION 0xf3020000
3133
3134/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3135#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3136
3137
3138/** @def PDMDEV_ASSERT_EMT
3139 * Assert that the current thread is the emulation thread.
3140 */
3141#ifdef VBOX_STRICT
3142# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3143#else
3144# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3145#endif
3146
3147/** @def PDMDEV_ASSERT_OTHER
3148 * Assert that the current thread is NOT the emulation thread.
3149 */
3150#ifdef VBOX_STRICT
3151# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3152#else
3153# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3154#endif
3155
3156/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3157 * Assert that the current thread is owner of the VM lock.
3158 */
3159#ifdef VBOX_STRICT
3160# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3161#else
3162# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3163#endif
3164
3165/** @def PDMDEV_SET_ERROR
3166 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3167 */
3168#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3169 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3170
3171/** @def PDMDEV_SET_RUNTIME_ERROR
3172 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3173 */
3174#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3175 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3176
3177/** @def PDMDEVINS_2_RCPTR
3178 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3179 */
3180#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3181
3182/** @def PDMDEVINS_2_R3PTR
3183 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3184 */
3185#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3186
3187/** @def PDMDEVINS_2_R0PTR
3188 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3189 */
3190#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3191
3192
3193/**
3194 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3195 *
3196 * @returns VBox status code which must be passed up to the VMM.
3197 * @param pDevIns Device instance.
3198 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3199 * @param pszFormat Message. (optional)
3200 * @param ... Message parameters.
3201 */
3202DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3203{
3204#ifdef VBOX_STRICT
3205# ifdef IN_RING3
3206 int rc;
3207 va_list args;
3208 va_start(args, pszFormat);
3209 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3210 va_end(args);
3211 return rc;
3212# else
3213 return VINF_EM_DBG_STOP;
3214# endif
3215#else
3216 NOREF(pDevIns);
3217 NOREF(pszFile);
3218 NOREF(iLine);
3219 NOREF(pszFunction);
3220 NOREF(pszFormat);
3221 return VINF_SUCCESS;
3222#endif
3223}
3224
3225
3226#ifdef IN_RING3
3227/**
3228 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3229 */
3230DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3231 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3232 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3233{
3234 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3235}
3236
3237/**
3238 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3239 */
3240DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3241 const char *pszOut, const char *pszIn, const char *pszOutStr,
3242 const char *pszInStr, const char *pszDesc)
3243{
3244 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3245}
3246
3247/**
3248 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3249 */
3250DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3251 const char *pszOut, const char *pszIn, const char *pszOutStr,
3252 const char *pszInStr, const char *pszDesc)
3253{
3254 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3255}
3256
3257/**
3258 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3259 */
3260DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3261 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3262 const char *pszDesc)
3263{
3264 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3265}
3266
3267/**
3268 * @copydoc PDMDEVHLPR3::pfnMMIORegisterEx
3269 */
3270DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, IOMMMIOTYPE enmMMIOType, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3271 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3272 const char *pszDesc)
3273{
3274 return pDevIns->pDevHlpR3->pfnMMIORegisterEx(pDevIns, enmMMIOType, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3275}
3276
3277/**
3278 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3279 */
3280DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3281 const char *pszWrite, const char *pszRead, const char *pszFill)
3282{
3283 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3284}
3285
3286/**
3287 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3288 */
3289DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3290 const char *pszWrite, const char *pszRead, const char *pszFill)
3291{
3292 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3293}
3294
3295/**
3296 * @copydoc PDMDEVHLPR3::pfnROMRegister
3297 */
3298DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3299{
3300 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3301}
3302/**
3303 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3304 */
3305DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3306{
3307 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3308}
3309
3310/**
3311 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3312 */
3313DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3314{
3315 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3316}
3317
3318/**
3319 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3320 */
3321DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3322{
3323 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3324}
3325
3326/**
3327 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3328 */
3329DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3330{
3331 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3332}
3333
3334/**
3335 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3336 */
3337DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3338{
3339 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3340}
3341
3342/**
3343 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3344 */
3345DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3346 const char *pszDesc, PRTRCPTR pRCPtr)
3347{
3348 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3349}
3350
3351/**
3352 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3353 */
3354DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3355{
3356 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3357}
3358
3359/**
3360 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3361 */
3362DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3363{
3364 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3365}
3366
3367/**
3368 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3369 */
3370DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3371 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3372 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3373{
3374 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3375 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3376 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3377}
3378
3379/**
3380 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3381 */
3382DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3383{
3384 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3385}
3386
3387/**
3388 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3389 */
3390DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3391{
3392 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3393}
3394
3395/**
3396 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3397 */
3398DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3399{
3400 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3401}
3402
3403/**
3404 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3405 */
3406DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3407 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3408{
3409 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3410}
3411
3412/**
3413 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3414 */
3415DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3416{
3417 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3418}
3419
3420/**
3421 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3422 */
3423DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3424{
3425 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3426}
3427
3428/**
3429 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3430 */
3431DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3432{
3433 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3434}
3435
3436/**
3437 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3438 */
3439DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3440{
3441 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3442}
3443
3444/**
3445 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3446 */
3447DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3448{
3449 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3450}
3451
3452/**
3453 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3454 */
3455DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3456{
3457 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3458}
3459
3460/**
3461 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3462 */
3463DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3464 const char *pszDesc, const char *pszName, ...)
3465{
3466 va_list va;
3467 va_start(va, pszName);
3468 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3469 va_end(va);
3470}
3471
3472/**
3473 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3474 */
3475DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3476 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3477{
3478 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3479}
3480
3481/**
3482 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3483 */
3484DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3485{
3486 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3487}
3488
3489/**
3490 * @copydoc PDMDEVHLPR3::pfnUTCNow
3491 */
3492DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3493{
3494 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3495}
3496
3497/**
3498 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3499 */
3500DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3501{
3502 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3503}
3504
3505/**
3506 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3507 */
3508DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3509{
3510 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3511}
3512
3513/**
3514 * @copydoc PDMDEVHLPR3::pfnPhysReserve
3515 */
3516DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3517{
3518 return pDevIns->pDevHlpR3->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3519}
3520
3521/**
3522 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3523 */
3524DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3525{
3526 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3527}
3528
3529/**
3530 * @copydoc PDMDEVHLPR3::pfnVMState
3531 */
3532DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3533{
3534 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3535}
3536
3537/**
3538 * @copydoc PDMDEVHLPR3::pfnA20Set
3539 */
3540DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3541{
3542 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3543}
3544
3545/**
3546 * @copydoc PDMDEVHLPR3::pfnVMReset
3547 */
3548DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3549{
3550 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3551}
3552
3553/**
3554 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3555 */
3556DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3557{
3558 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3559}
3560
3561/**
3562 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3563 */
3564DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3565{
3566 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3567}
3568
3569/**
3570 * @copydoc PDMDEVHLPR3::pfnDMARegister
3571 */
3572DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3573{
3574 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3575}
3576
3577/**
3578 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3579 */
3580DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3581{
3582 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3583}
3584
3585/**
3586 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3587 */
3588DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3589{
3590 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3591}
3592
3593/**
3594 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3595 */
3596DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3597{
3598 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3599}
3600
3601/**
3602 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3603 */
3604DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3605{
3606 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3607}
3608
3609/**
3610 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3611 */
3612DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3613{
3614 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3615}
3616
3617/**
3618 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3619 */
3620DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3621{
3622 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3623}
3624
3625/**
3626 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3627 */
3628DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3629{
3630 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3631}
3632
3633/**
3634 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3635 */
3636DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3637{
3638 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3639}
3640
3641/**
3642 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3643 */
3644DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3645 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3646{
3647 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3648}
3649#endif /* IN_RING3 */
3650
3651
3652/**
3653 * @copydoc PDMDEVHLPR3::pfnGetVM
3654 */
3655DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3656{
3657 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVM(pDevIns);
3658}
3659
3660/**
3661 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3662 */
3663DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3664{
3665 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3666}
3667
3668/**
3669 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3670 */
3671DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3672{
3673 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3674}
3675
3676/**
3677 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3678 */
3679DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3680{
3681 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3682}
3683
3684/**
3685 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3686 */
3687DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3688{
3689 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3690}
3691
3692/**
3693 * @copydoc PDMDEVHLPR3::pfnPhysRead
3694 */
3695DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3696{
3697 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3698}
3699
3700/**
3701 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3702 */
3703DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3704{
3705 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3706}
3707
3708/**
3709 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3710 */
3711DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3712{
3713 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3714}
3715
3716/**
3717 * @copydoc PDMDEVHLPR3::pfnVMSetError
3718 */
3719DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3720{
3721 va_list va;
3722 va_start(va, pszFormat);
3723 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3724 va_end(va);
3725 return rc;
3726}
3727
3728/**
3729 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3730 */
3731DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3732{
3733 va_list va;
3734 int rc;
3735 va_start(va, pszFormat);
3736 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3737 va_end(va);
3738 return rc;
3739}
3740
3741
3742
3743/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3744typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3745
3746/**
3747 * Callbacks for VBoxDeviceRegister().
3748 */
3749typedef struct PDMDEVREGCB
3750{
3751 /** Interface version.
3752 * This is set to PDM_DEVREG_CB_VERSION. */
3753 uint32_t u32Version;
3754
3755 /**
3756 * Registers a device with the current VM instance.
3757 *
3758 * @returns VBox status code.
3759 * @param pCallbacks Pointer to the callback table.
3760 * @param pDevReg Pointer to the device registration record.
3761 * This data must be permanent and readonly.
3762 */
3763 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3764
3765 /**
3766 * Allocate memory which is associated with current VM instance
3767 * and automatically freed on it's destruction.
3768 *
3769 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3770 * @param pCallbacks Pointer to the callback table.
3771 * @param cb Number of bytes to allocate.
3772 */
3773 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3774} PDMDEVREGCB;
3775
3776/** Current version of the PDMDEVREGCB structure. */
3777#define PDM_DEVREG_CB_VERSION 0xf4010000
3778
3779
3780/**
3781 * The VBoxDevicesRegister callback function.
3782 *
3783 * PDM will invoke this function after loading a device module and letting
3784 * the module decide which devices to register and how to handle conflicts.
3785 *
3786 * @returns VBox status code.
3787 * @param pCallbacks Pointer to the callback table.
3788 * @param u32Version VBox version number.
3789 */
3790typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3791
3792/** @} */
3793
3794__END_DECLS
3795
3796#endif
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