[1] | 1 | /** @file
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| 2 | * EM - Execution Monitor.
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| 3 | */
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| 4 |
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| 5 | /*
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[8155] | 6 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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[1] | 7 | *
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| 8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 9 | * available from http://www.virtualbox.org. This file is free software;
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| 10 | * you can redistribute it and/or modify it under the terms of the GNU
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[5999] | 11 | * General Public License (GPL) as published by the Free Software
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| 12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 15 | *
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| 16 | * The contents of this file may alternatively be used under the terms
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| 17 | * of the Common Development and Distribution License Version 1.0
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| 18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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| 19 | * VirtualBox OSE distribution, in which case the provisions of the
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| 20 | * CDDL are applicable instead of those of the GPL.
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| 21 | *
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| 22 | * You may elect to license modified versions of this file under the
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| 23 | * terms and conditions of either the GPL or the CDDL or both.
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[8155] | 24 | *
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| 25 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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| 26 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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| 27 | * additional information or have any questions.
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[1] | 28 | */
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| 29 |
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[3632] | 30 | #ifndef ___VBox_em_h
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| 31 | #define ___VBox_em_h
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[1] | 32 |
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| 33 | #include <VBox/cdefs.h>
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| 34 | #include <VBox/types.h>
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| 35 | #include <VBox/trpm.h>
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| 36 | #include <VBox/dis.h>
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| 37 |
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| 38 | __BEGIN_DECLS
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| 39 |
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| 40 | /** @defgroup grp_em The Execution Monitor API
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| 41 | * @{
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| 42 | */
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| 43 |
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[1082] | 44 | /** Enable to allow V86 code to run in raw mode. */
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[1368] | 45 | #define VBOX_RAW_V86
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[1082] | 46 |
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[1] | 47 | /**
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| 48 | * The Execution Manager State.
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| 49 | */
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| 50 | typedef enum EMSTATE
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| 51 | {
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| 52 | /** Not yet started. */
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| 53 | EMSTATE_NONE = 1,
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| 54 | /** Raw-mode execution. */
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| 55 | EMSTATE_RAW,
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| 56 | /** Hardware accelerated raw-mode execution. */
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| 57 | EMSTATE_HWACC,
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| 58 | /** Recompiled mode execution. */
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| 59 | EMSTATE_REM,
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| 60 | /** Execution is halted. (waiting for interrupt) */
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| 61 | EMSTATE_HALTED,
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| 62 | /** Execution is suspended. */
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| 63 | EMSTATE_SUSPENDED,
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| 64 | /** The VM is terminating. */
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| 65 | EMSTATE_TERMINATING,
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| 66 | /** Guest debug event from raw-mode is being processed. */
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| 67 | EMSTATE_DEBUG_GUEST_RAW,
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[2159] | 68 | /** Guest debug event from hardware accelerated mode is being processed. */
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| 69 | EMSTATE_DEBUG_GUEST_HWACC,
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[1] | 70 | /** Guest debug event from recompiled-mode is being processed. */
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| 71 | EMSTATE_DEBUG_GUEST_REM,
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| 72 | /** Hypervisor debug event being processed. */
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| 73 | EMSTATE_DEBUG_HYPER,
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| 74 | /** The VM has encountered a fatal error. (And everyone is panicing....) */
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| 75 | EMSTATE_GURU_MEDITATION,
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| 76 | /** Just a hack to ensure that we get a 32-bit integer. */
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| 77 | EMSTATE_MAKE_32BIT_HACK = 0x7fffffff
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| 78 | } EMSTATE;
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| 79 |
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| 80 |
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| 81 | /**
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| 82 | * Get the current execution manager status.
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| 83 | *
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| 84 | * @returns Current status.
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| 85 | */
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| 86 | EMDECL(EMSTATE) EMGetState(PVM pVM);
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| 87 |
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| 88 | /**
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| 89 | * Checks if raw ring-3 execute mode is enabled.
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| 90 | *
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| 91 | * @returns true if enabled.
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| 92 | * @returns false if disabled.
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| 93 | * @param pVM The VM to operate on.
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| 94 | */
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| 95 | #define EMIsRawRing3Enabled(pVM) ((pVM)->fRawR3Enabled)
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| 96 |
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| 97 | /**
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| 98 | * Checks if raw ring-0 execute mode is enabled.
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| 99 | *
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| 100 | * @returns true if enabled.
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| 101 | * @returns false if disabled.
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| 102 | * @param pVM The VM to operate on.
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| 103 | */
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| 104 | #define EMIsRawRing0Enabled(pVM) ((pVM)->fRawR0Enabled)
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| 105 |
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| 106 | /**
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| 107 | * Sets the PC for which interrupts should be inhibited.
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| 108 | *
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| 109 | * @param pVM The VM handle.
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| 110 | * @param PC The PC.
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| 111 | */
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| 112 | EMDECL(void) EMSetInhibitInterruptsPC(PVM pVM, RTGCUINTPTR PC);
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| 113 |
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| 114 | /**
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| 115 | * Gets the PC for which interrupts should be inhibited.
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| 116 | *
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| 117 | * There are a few instructions which inhibits or delays interrupts
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| 118 | * for the instruction following them. These instructions are:
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| 119 | * - STI
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| 120 | * - MOV SS, r/m16
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| 121 | * - POP SS
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| 122 | *
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| 123 | * @returns The PC for which interrupts should be inhibited.
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| 124 | * @param pVM VM handle.
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| 125 | *
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| 126 | */
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| 127 | EMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVM pVM);
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| 128 |
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| 129 | /**
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| 130 | * Disassembles one instruction.
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| 131 | *
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| 132 | * @param pVM The VM handle.
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| 133 | * @param pCtxCore The context core (used for both the mode and instruction).
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| 134 | * @param pCpu Where to return the parsed instruction info.
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| 135 | * @param pcbInstr Where to return the instruction size. (optional)
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| 136 | */
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| 137 | EMDECL(int) EMInterpretDisasOne(PVM pVM, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr);
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| 138 |
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| 139 | /**
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| 140 | * Disassembles one instruction.
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| 141 | *
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| 142 | * This is used by internally by the interpreter and by trap/access handlers.
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| 143 | *
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| 144 | * @param pVM The VM handle.
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| 145 | * @param GCPtrInstr The flat address of the instruction.
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| 146 | * @param pCtxCore The context core (used to determin the cpu mode).
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| 147 | * @param pCpu Where to return the parsed instruction info.
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| 148 | * @param pcbInstr Where to return the instruction size. (optional)
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| 149 | */
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| 150 | EMDECL(int) EMInterpretDisasOneEx(PVM pVM, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
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| 151 | PDISCPUSTATE pCpu, unsigned *pcbInstr);
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| 152 |
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| 153 | /**
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| 154 | * Interprets the current instruction.
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| 155 | *
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| 156 | * @returns VBox status code.
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| 157 | * @retval VINF_* Scheduling instructions.
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| 158 | * @retval VERR_EM_INTERPRETER Something we can't cope with.
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| 159 | * @retval VERR_* Fatal errors.
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| 160 | *
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| 161 | * @param pVM The VM handle.
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| 162 | * @param pRegFrame The register frame.
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| 163 | * Updates the EIP if an instruction was executed successfully.
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| 164 | * @param pvFault The fault address (CR2).
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| 165 | * @param pcbSize Size of the write (if applicable).
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| 166 | *
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| 167 | * @remark Invalid opcode exceptions have a higher priority than GP (see Intel
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| 168 | * Architecture System Developers Manual, Vol 3, 5.5) so we don't need
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| 169 | * to worry about e.g. invalid modrm combinations (!)
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| 170 | */
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| 171 | EMDECL(int) EMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
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| 172 |
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| 173 | /**
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| 174 | * Interprets the current instruction using the supplied DISCPUSTATE structure.
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| 175 | *
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| 176 | * EIP is *NOT* updated!
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| 177 | *
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| 178 | * @returns VBox status code.
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| 179 | * @retval VINF_* Scheduling instructions. When these are returned, it
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| 180 | * starts to get a bit tricky to know whether code was
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| 181 | * executed or not... We'll address this when it becomes a problem.
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| 182 | * @retval VERR_EM_INTERPRETER Something we can't cope with.
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| 183 | * @retval VERR_* Fatal errors.
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| 184 | *
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| 185 | * @param pVM The VM handle.
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| 186 | * @param pCpu The disassembler cpu state for the instruction to be interpreted.
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| 187 | * @param pRegFrame The register frame. EIP is *NOT* changed!
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| 188 | * @param pvFault The fault address (CR2).
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| 189 | * @param pcbSize Size of the write (if applicable).
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| 190 | *
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| 191 | * @remark Invalid opcode exceptions have a higher priority than GP (see Intel
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| 192 | * Architecture System Developers Manual, Vol 3, 5.5) so we don't need
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| 193 | * to worry about e.g. invalid modrm combinations (!)
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| 194 | */
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| 195 | EMDECL(int) EMInterpretInstructionCPU(PVM pVM, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
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| 196 |
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| 197 | /**
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| 198 | * Interpret CPUID given the parameters in the CPU context
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| 199 | *
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| 200 | * @returns VBox status code.
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| 201 | * @param pVM The VM handle.
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| 202 | * @param pRegFrame The register frame.
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| 203 | *
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| 204 | */
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| 205 | EMDECL(int) EMInterpretCpuId(PVM pVM, PCPUMCTXCORE pRegFrame);
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| 206 |
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| 207 | /**
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[2553] | 208 | * Interpret RDTSC
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| 209 | *
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| 210 | * @returns VBox status code.
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| 211 | * @param pVM The VM handle.
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| 212 | * @param pRegFrame The register frame.
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| 213 | *
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| 214 | */
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| 215 | EMDECL(int) EMInterpretRdtsc(PVM pVM, PCPUMCTXCORE pRegFrame);
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| 216 |
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| 217 | /**
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[1] | 218 | * Interpret INVLPG
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| 219 | *
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| 220 | * @returns VBox status code.
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| 221 | * @param pVM The VM handle.
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| 222 | * @param pRegFrame The register frame.
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| 223 | * @param pAddrGC Operand address
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| 224 | *
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| 225 | */
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| 226 | EMDECL(int) EMInterpretInvlpg(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
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| 227 |
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[1124] | 228 | /**
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| 229 | * Interpret IRET (currently only to V86 code)
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| 230 | *
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| 231 | * @returns VBox status code.
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| 232 | * @param pVM The VM handle.
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| 233 | * @param pRegFrame The register frame.
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| 234 | *
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| 235 | */
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| 236 | EMDECL(int) EMInterpretIret(PVM pVM, PCPUMCTXCORE pRegFrame);
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[1] | 237 |
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| 238 | /**
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| 239 | * Interpret DRx write
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| 240 | *
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| 241 | * @returns VBox status code.
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| 242 | * @param pVM The VM handle.
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| 243 | * @param pRegFrame The register frame.
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| 244 | * @param DestRegDRx DRx register index (USE_REG_DR*)
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| 245 | * @param SrcRegGen General purpose register index (USE_REG_E**))
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| 246 | *
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| 247 | */
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| 248 | EMDECL(int) EMInterpretDRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
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| 249 |
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| 250 | /**
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| 251 | * Interpret DRx read
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| 252 | *
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| 253 | * @returns VBox status code.
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| 254 | * @param pVM The VM handle.
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| 255 | * @param pRegFrame The register frame.
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| 256 | * @param DestRegGen General purpose register index (USE_REG_E**))
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| 257 | * @param SrcRegDRx DRx register index (USE_REG_DR*)
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| 258 | *
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| 259 | */
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| 260 | EMDECL(int) EMInterpretDRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
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| 261 |
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| 262 | /**
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| 263 | * Interpret CRx write
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| 264 | *
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| 265 | * @returns VBox status code.
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| 266 | * @param pVM The VM handle.
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| 267 | * @param pRegFrame The register frame.
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| 268 | * @param DestRegCRx DRx register index (USE_REG_CR*)
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| 269 | * @param SrcRegGen General purpose register index (USE_REG_E**))
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| 270 | *
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| 271 | */
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| 272 | EMDECL(int) EMInterpretCRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegCrx, uint32_t SrcRegGen);
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| 273 |
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| 274 | /**
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| 275 | * Interpret CRx read
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| 276 | *
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| 277 | * @returns VBox status code.
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| 278 | * @param pVM The VM handle.
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| 279 | * @param pRegFrame The register frame.
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| 280 | * @param DestRegGen General purpose register index (USE_REG_E**))
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| 281 | * @param SrcRegCRx CRx register index (USE_REG_CR*)
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| 282 | *
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| 283 | */
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| 284 | EMDECL(int) EMInterpretCRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegCrx);
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| 285 |
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| 286 | /**
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| 287 | * Interpret LMSW
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| 288 | *
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| 289 | * @returns VBox status code.
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| 290 | * @param pVM The VM handle.
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| 291 | * @param u16Data LMSW source data.
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| 292 | */
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| 293 | EMDECL(int) EMInterpretLMSW(PVM pVM, uint16_t u16Data);
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| 294 |
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| 295 | /**
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| 296 | * Interpret CLTS
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| 297 | *
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| 298 | * @returns VBox status code.
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| 299 | * @param pVM The VM handle.
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| 300 | *
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| 301 | */
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| 302 | EMDECL(int) EMInterpretCLTS(PVM pVM);
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| 303 |
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| 304 | /**
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| 305 | * Interpret a port I/O instruction.
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| 306 | *
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| 307 | * @returns VBox status code suitable for scheduling.
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| 308 | * @param pVM The VM handle.
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| 309 | * @param pCtxCore The context core. This will be updated on successful return.
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| 310 | * @param pCpu The instruction to interpret.
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| 311 | * @param cbOp The size of the instruction.
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| 312 | * @remark This may raise exceptions.
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| 313 | */
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| 314 | EMDECL(int) EMInterpretPortIO(PVM pVM, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp);
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| 315 |
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| 316 | EMDECL(uint32_t) EMEmulateCmp(uint32_t u32Param1, uint32_t u32Param2, size_t cb);
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| 317 | EMDECL(uint32_t) EMEmulateAnd(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb);
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| 318 | EMDECL(uint32_t) EMEmulateInc(uint32_t *pu32Param1, size_t cb);
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| 319 | EMDECL(uint32_t) EMEmulateDec(uint32_t *pu32Param1, size_t cb);
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| 320 | EMDECL(uint32_t) EMEmulateOr(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb);
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[5384] | 321 | EMDECL(int) EMEmulateLockOr(RTGCPTR GCPtrParam1, RTGCUINTREG Param2, size_t cbSize, uint32_t *pf);
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[1] | 322 | EMDECL(uint32_t) EMEmulateXor(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb);
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| 323 | EMDECL(uint32_t) EMEmulateAdd(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb);
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| 324 | EMDECL(uint32_t) EMEmulateSub(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb);
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| 325 | EMDECL(uint32_t) EMEmulateAdcWithCarrySet(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb);
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[1984] | 326 | EMDECL(uint32_t) EMEmulateBtr(uint32_t *pu32Param1, uint32_t u32Param2);
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[5384] | 327 | EMDECL(int) EMEmulateLockBtr(RTGCPTR GCPtrParam1, RTGCUINTREG Param2, uint32_t *pf);
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[1990] | 328 | EMDECL(uint32_t) EMEmulateBts(uint32_t *pu32Param1, uint32_t u32Param2);
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| 329 | EMDECL(uint32_t) EMEmulateBtc(uint32_t *pu32Param1, uint32_t u32Param2);
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[1] | 330 |
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| 331 | #ifdef IN_RING3
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| 332 | /** @defgroup grp_em_r3 The EM Host Context Ring-3 API
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| 333 | * @ingroup grp_em
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| 334 | * @{
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| 335 | */
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| 336 |
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| 337 | /**
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| 338 | * Initializes the EM.
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| 339 | *
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| 340 | * @returns VBox status code.
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| 341 | * @param pVM The VM to operate on.
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| 342 | */
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| 343 | EMR3DECL(int) EMR3Init(PVM pVM);
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| 344 |
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| 345 | /**
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| 346 | * Applies relocations to data and code managed by this
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| 347 | * component. This function will be called at init and
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| 348 | * whenever the VMM need to relocate it self inside the GC.
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| 349 | *
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| 350 | * @param pVM The VM.
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| 351 | */
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| 352 | EMR3DECL(void) EMR3Relocate(PVM pVM);
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| 353 |
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| 354 | /**
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| 355 | * Reset notification.
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| 356 | *
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| 357 | * @param pVM
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| 358 | */
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| 359 | EMR3DECL(void) EMR3Reset(PVM pVM);
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| 360 |
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| 361 | /**
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| 362 | * Terminates the EM.
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| 363 | *
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| 364 | * Termination means cleaning up and freeing all resources,
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| 365 | * the VM it self is at this point powered off or suspended.
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| 366 | *
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| 367 | * @returns VBox status code.
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| 368 | * @param pVM The VM to operate on.
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| 369 | */
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| 370 | EMR3DECL(int) EMR3Term(PVM pVM);
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| 371 |
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| 372 |
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| 373 | /**
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| 374 | * Command argument for EMR3RawSetMode().
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| 375 | *
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| 376 | * It's possible to extend this interface to change several
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| 377 | * execution modes at once should the need arise.
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| 378 | */
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| 379 | typedef enum EMRAWMODE
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| 380 | {
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| 381 | /** No raw execution. */
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| 382 | EMRAW_NONE = 0,
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| 383 | /** Enable Only ring-3 raw execution. */
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| 384 | EMRAW_RING3_ENABLE,
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| 385 | /** Only ring-3 raw execution. */
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| 386 | EMRAW_RING3_DISABLE,
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| 387 | /** Enable raw ring-0 execution. */
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| 388 | EMRAW_RING0_ENABLE,
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| 389 | /** Disable raw ring-0 execution. */
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| 390 | EMRAW_RING0_DISABLE,
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| 391 | EMRAW_END
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| 392 | } EMRAWMODE;
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| 393 |
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| 394 | /**
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| 395 | * Enables or disables a set of raw-mode execution modes.
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| 396 | *
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| 397 | * @returns VINF_SUCCESS on success.
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| 398 | * @returns VINF_RESCHEDULE if a rescheduling might be required.
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| 399 | * @returns VERR_INVALID_PARAMETER on an invalid enmMode value.
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| 400 | *
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| 401 | * @param pVM The VM to operate on.
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| 402 | * @param enmMode The execution mode change.
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| 403 | * @thread The emulation thread.
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| 404 | */
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| 405 | EMR3DECL(int) EMR3RawSetMode(PVM pVM, EMRAWMODE enmMode);
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| 406 |
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| 407 | /**
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| 408 | * Raise a fatal error.
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| 409 | *
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| 410 | * Safely terminate the VM with full state report and stuff. This function
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| 411 | * will naturally never return.
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| 412 | *
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| 413 | * @param pVM VM handle.
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| 414 | * @param rc VBox status code.
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| 415 | */
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[6210] | 416 | EMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVM pVM, int rc);
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[1] | 417 |
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| 418 | /**
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| 419 | * Execute VM
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| 420 | *
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| 421 | * This function is the main loop of the VM. The emulation thread
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| 422 | * calls this function when the VM has been successfully constructed
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| 423 | * and we're ready for executing the VM.
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| 424 | *
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| 425 | * Returning from this function means that the VM is turned off or
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| 426 | * suspended (state already saved) and deconstruction in next in line.
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| 427 | *
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| 428 | * @returns VBox status code.
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| 429 | * @param pVM The VM to operate on.
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| 430 | */
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| 431 | EMR3DECL(int) EMR3ExecuteVM(PVM pVM);
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| 432 |
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| 433 | /**
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[1975] | 434 | * Check for pending raw actions
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| 435 | *
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| 436 | * @returns VBox status code.
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| 437 | * @param pVM The VM to operate on.
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| 438 | */
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| 439 | EMR3DECL(int) EMR3CheckRawForcedActions(PVM pVM);
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| 440 |
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| 441 | /**
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[1] | 442 | * Interpret instructions.
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| 443 | * This works directly on the Guest CPUM context.
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| 444 | * The interpretation will try execute at least one instruction. It will
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| 445 | * stop when a we're better off in a raw or recompiler mode.
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| 446 | *
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| 447 | * @returns Todo - status describing what to do next?
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| 448 | * @param pVM The VM to operate on.
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| 449 | */
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| 450 | EMR3DECL(int) EMR3Interpret(PVM pVM);
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| 451 |
|
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| 452 | /** @} */
|
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| 453 | #endif
|
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| 454 |
|
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| 455 |
|
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| 456 | #ifdef IN_GC
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| 457 | /** @defgroup grp_em_gc The EM Guest Context API
|
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| 458 | * @ingroup grp_em
|
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| 459 | * @{
|
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| 460 | */
|
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| 461 |
|
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| 462 | /**
|
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| 463 | * Decide what to do with a trap.
|
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| 464 | *
|
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| 465 | * @returns Next VMM state.
|
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| 466 | * @returns Might not return at all?
|
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| 467 | * @param pVM The VM to operate on.
|
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| 468 | * @param uTrap The trap number.
|
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| 469 | * @param pRegFrame Register frame to operate on.
|
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| 470 | */
|
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| 471 | EMGCDECL(int) EMGCTrap(PVM pVM, unsigned uTrap, PCPUMCTXCORE pRegFrame);
|
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| 472 |
|
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[5342] | 473 | EMGCDECL(uint32_t) EMGCEmulateLockCmpXchg(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);
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| 474 | EMGCDECL(uint32_t) EMGCEmulateCmpXchg(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);
|
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[8098] | 475 | EMGCDECL(uint32_t) EMGCEmulateLockCmpXchg8b(RTGCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags);
|
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| 476 | EMGCDECL(uint32_t) EMGCEmulateCmpXchg8b(RTGCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags);
|
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[7286] | 477 | EMGCDECL(uint32_t) EMGCEmulateLockXAdd(RTGCPTR pu32Param1, uint32_t *pu32Param2, size_t cbSize, uint32_t *pEflags);
|
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| 478 | EMGCDECL(uint32_t) EMGCEmulateXAdd(RTGCPTR pu32Param1, uint32_t *pu32Param2, size_t cbSize, uint32_t *pEflags);
|
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[2032] | 479 |
|
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[1] | 480 | /** @} */
|
---|
| 481 | #endif
|
---|
| 482 |
|
---|
| 483 | /** @} */
|
---|
| 484 |
|
---|
| 485 | __END_DECLS
|
---|
| 486 |
|
---|
| 487 | #endif
|
---|
| 488 |
|
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