VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp

Last change on this file was 103374, checked in by vboxsync, 2 months ago

VMM/PGM,DBGF,GIC: Parfait pointed out some potential NULL pointer use here and there. bugref:3409
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1/* $Id: VMM.cpp 103374 2024-02-14 22:10:00Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28//#define NO_SUPCALLR0VMM
29
30/** @page pg_vmm VMM - The Virtual Machine Monitor
31 *
32 * The VMM component is two things at the moment, it's a component doing a few
33 * management and routing tasks, and it's the whole virtual machine monitor
34 * thing. For hysterical reasons, it is not doing all the management that one
35 * would expect, this is instead done by @ref pg_vm. We'll address this
36 * misdesign eventually, maybe.
37 *
38 * VMM is made up of these components:
39 * - @subpage pg_cfgm
40 * - @subpage pg_cpum
41 * - @subpage pg_dbgf
42 * - @subpage pg_em
43 * - @subpage pg_gim
44 * - @subpage pg_gmm
45 * - @subpage pg_gvmm
46 * - @subpage pg_hm
47 * - @subpage pg_iem
48 * - @subpage pg_iom
49 * - @subpage pg_mm
50 * - @subpage pg_nem
51 * - @subpage pg_pdm
52 * - @subpage pg_pgm
53 * - @subpage pg_selm
54 * - @subpage pg_ssm
55 * - @subpage pg_stam
56 * - @subpage pg_tm
57 * - @subpage pg_trpm
58 * - @subpage pg_vm
59 *
60 *
61 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
62 *
63 *
64 * @section sec_vmmstate VMM State
65 *
66 * @image html VM_Statechart_Diagram.gif
67 *
68 * To be written.
69 *
70 *
71 * @subsection subsec_vmm_init VMM Initialization
72 *
73 * To be written.
74 *
75 *
76 * @subsection subsec_vmm_term VMM Termination
77 *
78 * To be written.
79 *
80 *
81 * @section sec_vmm_limits VMM Limits
82 *
83 * There are various resource limits imposed by the VMM and it's
84 * sub-components. We'll list some of them here.
85 *
86 * On 64-bit hosts:
87 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
88 * can be increased up to 64K - 1.
89 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
90 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
91 * - A VM can be assigned all the memory we can use (16TB), however, the
92 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
93 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
94 *
95 * On 32-bit hosts:
96 * - Max 127 VMs. Imposed by GMM's per page structure.
97 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
98 * ROM pages. The limit is imposed by the 28-bit page ID used
99 * internally in GMM. It is also limited by PAE.
100 * - A VM can be assigned all the memory GMM can allocate, however, the
101 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
102 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
103 *
104 */
105
106
107/*********************************************************************************************************************************
108* Header Files *
109*********************************************************************************************************************************/
110#define LOG_GROUP LOG_GROUP_VMM
111#include <VBox/vmm/vmm.h>
112#include <VBox/vmm/vmapi.h>
113#include <VBox/vmm/pgm.h>
114#include <VBox/vmm/cfgm.h>
115#include <VBox/vmm/pdmqueue.h>
116#include <VBox/vmm/pdmcritsect.h>
117#include <VBox/vmm/pdmcritsectrw.h>
118#include <VBox/vmm/pdmapi.h>
119#include <VBox/vmm/cpum.h>
120#include <VBox/vmm/gim.h>
121#include <VBox/vmm/mm.h>
122#include <VBox/vmm/nem.h>
123#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
124# include <VBox/vmm/iem.h>
125#endif
126#include <VBox/vmm/iom.h>
127#include <VBox/vmm/trpm.h>
128#include <VBox/vmm/selm.h>
129#include <VBox/vmm/em.h>
130#include <VBox/sup.h>
131#include <VBox/vmm/dbgf.h>
132#if defined(VBOX_VMM_TARGET_ARMV8)
133# include <VBox/vmm/gic.h>
134#else
135# include <VBox/vmm/apic.h>
136#endif
137#include <VBox/vmm/ssm.h>
138#include <VBox/vmm/tm.h>
139#include "VMMInternal.h"
140#include <VBox/vmm/vmcc.h>
141
142#include <VBox/err.h>
143#include <VBox/param.h>
144#include <VBox/version.h>
145#include <VBox/vmm/hm.h>
146#include <iprt/assert.h>
147#include <iprt/alloc.h>
148#if defined(VBOX_VMM_TARGET_ARMV8)
149# include <iprt/armv8.h>
150#endif
151#include <iprt/asm.h>
152#include <iprt/time.h>
153#include <iprt/semaphore.h>
154#include <iprt/stream.h>
155#include <iprt/string.h>
156#include <iprt/stdarg.h>
157#include <iprt/ctype.h>
158#include <iprt/x86.h>
159
160
161/*********************************************************************************************************************************
162* Defined Constants And Macros *
163*********************************************************************************************************************************/
164/** The saved state version. */
165#define VMM_SAVED_STATE_VERSION 4
166/** The saved state version used by v3.0 and earlier. (Teleportation) */
167#define VMM_SAVED_STATE_VERSION_3_0 3
168
169/** Macro for flushing the ring-0 logging. */
170#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
171 do { \
172 size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
173 if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
174 || (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
175 { /* likely? */ } \
176 else \
177 vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
178 } while (0)
179
180
181/*********************************************************************************************************************************
182* Internal Functions *
183*********************************************************************************************************************************/
184static void vmmR3InitRegisterStats(PVM pVM);
185static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
186static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
187#if 0 /* pointless when timers doesn't run on EMT */
188static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
189#endif
190static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
191 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
192static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu);
193static FNRTTHREAD vmmR3LogFlusher;
194static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
195 PRTLOGGER pDstLogger);
196static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
197
198
199
200/**
201 * Initializes the VMM.
202 *
203 * @returns VBox status code.
204 * @param pVM The cross context VM structure.
205 */
206VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
207{
208 LogFlow(("VMMR3Init\n"));
209
210 /*
211 * Assert alignment, sizes and order.
212 */
213 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
214 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
215
216 /*
217 * Init basic VM VMM members.
218 */
219 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
220 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
221 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
222 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
223 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
224 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
225 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
226 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
227 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
228 pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
229
230#if 0 /* pointless when timers doesn't run on EMT */
231 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
232 * The EMT yield interval. The EMT yielding is a hack we employ to play a
233 * bit nicer with the rest of the system (like for instance the GUI).
234 */
235 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
236 23 /* Value arrived at after experimenting with the grub boot prompt. */);
237 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
238#endif
239
240 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
241 * Controls whether we employ per-cpu preemption timers to limit the time
242 * spent executing guest code. This option is not available on all
243 * platforms and we will silently ignore this setting then. If we are
244 * running in VT-x mode, we will use the VMX-preemption timer instead of
245 * this one when possible.
246 */
247 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
248 int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
249 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
250
251 /*
252 * Initialize the VMM rendezvous semaphores.
253 */
254 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
255 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
256 return VERR_NO_MEMORY;
257 for (VMCPUID i = 0; i < pVM->cCpus; i++)
258 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
259 for (VMCPUID i = 0; i < pVM->cCpus; i++)
260 {
261 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
262 AssertRCReturn(rc, rc);
263 }
264 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
265 AssertRCReturn(rc, rc);
266 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
267 AssertRCReturn(rc, rc);
268 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
269 AssertRCReturn(rc, rc);
270 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
271 AssertRCReturn(rc, rc);
272 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
273 AssertRCReturn(rc, rc);
274 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
275 AssertRCReturn(rc, rc);
276 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
277 AssertRCReturn(rc, rc);
278 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
279 AssertRCReturn(rc, rc);
280
281 /*
282 * Register the saved state data unit.
283 */
284 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
285 NULL, NULL, NULL,
286 NULL, vmmR3Save, NULL,
287 NULL, vmmR3Load, NULL);
288 if (RT_FAILURE(rc))
289 return rc;
290
291 /*
292 * Register the Ring-0 VM handle with the session for fast ioctl calls.
293 */
294 bool const fDriverless = SUPR3IsDriverless();
295 if (!fDriverless)
296 {
297 rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
298 if (RT_FAILURE(rc))
299 return rc;
300 }
301
302#ifdef VBOX_WITH_NMI
303 /*
304 * Allocate mapping for the host APIC.
305 */
306 rc = MMR3HyperReserve(pVM, HOST_PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
307 AssertRC(rc);
308#endif
309 if (RT_SUCCESS(rc))
310 {
311 /*
312 * Start the log flusher thread.
313 */
314 if (!fDriverless)
315 rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /*cbStack*/,
316 RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
317 if (RT_SUCCESS(rc))
318 {
319
320 /*
321 * Debug info and statistics.
322 */
323 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
324 vmmR3InitRegisterStats(pVM);
325 vmmInitFormatTypes();
326
327 return VINF_SUCCESS;
328 }
329 }
330 /** @todo Need failure cleanup? */
331
332 return rc;
333}
334
335
336/**
337 * VMMR3Init worker that register the statistics with STAM.
338 *
339 * @param pVM The cross context VM structure.
340 */
341static void vmmR3InitRegisterStats(PVM pVM)
342{
343 RT_NOREF_PV(pVM);
344
345 /* Nothing to do here in driverless mode. */
346 if (SUPR3IsDriverless())
347 return;
348
349 /*
350 * Statistics.
351 */
352 STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
353 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
354 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
355 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
356 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
357 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
358 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
359 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
360 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
361 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
362 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
363 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
364 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
365 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
366 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
367 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
368 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
369 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
370 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
371 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
372 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
373 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
374 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
375 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
376 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
377 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
378 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
379 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
380 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
381 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
382 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
383 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
384 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
385 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
386 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
387 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
388 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
389 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
390 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
391 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
392 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
393 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
394 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
395 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
396 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
397 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
398 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
399 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
400 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
401 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
402 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
403 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
404
405 STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
406 STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
407
408 for (VMCPUID i = 0; i < pVM->cCpus; i++)
409 {
410 PVMCPU pVCpu = pVM->apCpusR3[i];
411 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
412 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
413 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
414 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
415 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
416 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
417 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
418 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
419 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
420 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
421 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
422 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
423 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
424 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
425 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
426 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
427 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
428
429 STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
430
431 PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
432 STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
433 STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
434 STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
435 STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
436 STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
437 STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
438 STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
439 STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
440
441 pShared = &pVCpu->vmm.s.u.s.RelLogger;
442 STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
443 STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
444 STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
445 STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
446 STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
447 STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
448 STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
449 STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
450 }
451}
452
453
454/**
455 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
456 *
457 * @returns VBox status code.
458 * @param pVM The cross context VM structure.
459 * @param pVCpu The cross context per CPU structure.
460 * @thread EMT(pVCpu)
461 */
462static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
463{
464 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
465}
466
467
468/**
469 * Initializes the R0 VMM.
470 *
471 * @returns VBox status code.
472 * @param pVM The cross context VM structure.
473 */
474VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
475{
476 int rc;
477 PVMCPU pVCpu = VMMGetCpu(pVM);
478 Assert(pVCpu && pVCpu->idCpu == 0);
479
480 /*
481 * Nothing to do here in driverless mode.
482 */
483 if (SUPR3IsDriverless())
484 return VINF_SUCCESS;
485
486 /*
487 * Make sure the ring-0 loggers are up to date.
488 */
489 rc = VMMR3UpdateLoggers(pVM);
490 if (RT_FAILURE(rc))
491 return rc;
492
493 /*
494 * Call Ring-0 entry with init code.
495 */
496#ifdef NO_SUPCALLR0VMM
497 //rc = VERR_GENERAL_FAILURE;
498 rc = VINF_SUCCESS;
499#else
500 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
501#endif
502
503 /*
504 * Flush the logs & deal with assertions.
505 */
506#ifdef LOG_ENABLED
507 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
508#endif
509 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
510 if (rc == VERR_VMM_RING0_ASSERTION)
511 rc = vmmR3HandleRing0Assert(pVM, pVCpu);
512 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
513 {
514 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
515 if (RT_SUCCESS(rc))
516 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
517 }
518
519 /*
520 * Log stuff we learned in ring-0.
521 */
522 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
523 if (pVM->vmm.s.fIsUsingContextHooks)
524 LogRel(("VMM: Enabled thread-context hooks\n"));
525 else
526 LogRel(("VMM: Thread-context hooks unavailable\n"));
527
528 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
529 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
530 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
531 else
532 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
533 if (pVM->vmm.s.fIsPreemptPossible)
534 LogRel(("VMM: Kernel preemption is possible\n"));
535 else
536 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
537
538 /*
539 * Send all EMTs to ring-0 to get their logger initialized.
540 */
541 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
542 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
543
544 return rc;
545}
546
547
548/**
549 * Called when an init phase completes.
550 *
551 * @returns VBox status code.
552 * @param pVM The cross context VM structure.
553 * @param enmWhat Which init phase.
554 */
555VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
556{
557 int rc = VINF_SUCCESS;
558
559 switch (enmWhat)
560 {
561 case VMINITCOMPLETED_RING3:
562 {
563#if 0 /* pointless when timers doesn't run on EMT */
564 /*
565 * Create the EMT yield timer.
566 */
567 rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
568 "EMT Yielder", &pVM->vmm.s.hYieldTimer);
569 AssertRCReturn(rc, rc);
570
571 rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
572 AssertRCReturn(rc, rc);
573#endif
574 break;
575 }
576
577 case VMINITCOMPLETED_HM:
578 {
579#if !defined(VBOX_VMM_TARGET_ARMV8)
580 /*
581 * Disable the periodic preemption timers if we can use the
582 * VMX-preemption timer instead.
583 */
584 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
585 && HMR3IsVmxPreemptionTimerUsed(pVM))
586 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
587 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
588#endif
589
590 /*
591 * Last chance for GIM to update its CPUID leaves if it requires
592 * knowledge/information from HM initialization.
593 */
594/** @todo r=bird: This shouldn't be done from here, but rather from VM.cpp. There is no dependency on VMM here. */
595 rc = GIMR3InitCompleted(pVM);
596 AssertRCReturn(rc, rc);
597
598 /*
599 * CPUM's post-initialization (print CPUIDs).
600 */
601 CPUMR3LogCpuIdAndMsrFeatures(pVM);
602 break;
603 }
604
605 default: /* shuts up gcc */
606 break;
607 }
608
609 return rc;
610}
611
612
613/**
614 * Terminate the VMM bits.
615 *
616 * @returns VBox status code.
617 * @param pVM The cross context VM structure.
618 */
619VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
620{
621 PVMCPU pVCpu = VMMGetCpu(pVM);
622 Assert(pVCpu && pVCpu->idCpu == 0);
623
624 /*
625 * Call Ring-0 entry with termination code.
626 */
627 int rc = VINF_SUCCESS;
628 if (!SUPR3IsDriverless())
629 {
630#ifndef NO_SUPCALLR0VMM
631 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
632#endif
633 }
634
635 /*
636 * Flush the logs & deal with assertions.
637 */
638#ifdef LOG_ENABLED
639 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
640#endif
641 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
642 if (rc == VERR_VMM_RING0_ASSERTION)
643 rc = vmmR3HandleRing0Assert(pVM, pVCpu);
644 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
645 {
646 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
647 if (RT_SUCCESS(rc))
648 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
649 }
650
651 /*
652 * Do clean ups.
653 */
654 for (VMCPUID i = 0; i < pVM->cCpus; i++)
655 {
656 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
657 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
658 }
659 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
660 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
661 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
662 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
663 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
664 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
665 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
666 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
667 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
668 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
669 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
670 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
671 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
672 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
673 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
674 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
675
676 vmmTermFormatTypes();
677
678 /*
679 * Wait for the log flusher thread to complete.
680 */
681 if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
682 {
683 int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
684 AssertLogRelRC(rc2);
685 if (RT_SUCCESS(rc2))
686 pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
687 }
688
689 return rc;
690}
691
692
693/**
694 * Applies relocations to data and code managed by this
695 * component. This function will be called at init and
696 * whenever the VMM need to relocate it self inside the GC.
697 *
698 * The VMM will need to apply relocations to the core code.
699 *
700 * @param pVM The cross context VM structure.
701 * @param offDelta The relocation delta.
702 */
703VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
704{
705 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
706 RT_NOREF(offDelta);
707
708 /*
709 * Update the logger.
710 */
711 VMMR3UpdateLoggers(pVM);
712}
713
714
715/**
716 * Worker for VMMR3UpdateLoggers.
717 */
718static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
719{
720 /*
721 * Get the group count.
722 */
723 uint32_t uGroupsCrc32 = 0;
724 uint32_t cGroups = 0;
725 uint64_t fFlags = 0;
726 int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
727 Assert(rc == VERR_BUFFER_OVERFLOW);
728
729 /*
730 * Allocate the request of the right size.
731 */
732 uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
733 PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
734 if (pReq)
735 {
736 pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
737 pReq->Hdr.cbReq = cbReq;
738 pReq->cGroups = cGroups;
739 rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
740 AssertRC(rc);
741 if (RT_SUCCESS(rc))
742 {
743 /*
744 * The 64-bit value argument.
745 */
746 uint64_t fExtraArg = fReleaseLogger;
747
748 /* Only outputting to the parent VMM's logs? Enable ring-0 to flush directly. */
749 uint32_t fDst = RTLogGetDestinations(pSrcLogger);
750 fDst &= ~(RTLOGDEST_DUMMY | RTLOGDEST_F_NO_DENY | RTLOGDEST_F_DELAY_FILE | RTLOGDEST_FIXED_FILE | RTLOGDEST_FIXED_DIR);
751 if ( (fDst & (RTLOGDEST_VMM | RTLOGDEST_VMM_REL))
752 && !(fDst & ~(RTLOGDEST_VMM | RTLOGDEST_VMM_REL)))
753 fExtraArg |= (fDst & RTLOGDEST_VMM ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_DBG : 0)
754 | (fDst & RTLOGDEST_VMM_REL ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_REL : 0);
755
756 rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fExtraArg, &pReq->Hdr);
757 }
758
759 RTMemFree(pReq);
760 }
761 else
762 rc = VERR_NO_MEMORY;
763 return rc;
764}
765
766
767/**
768 * Updates the settings for the RC and R0 loggers.
769 *
770 * @returns VBox status code.
771 * @param pVM The cross context VM structure.
772 * @thread EMT
773 */
774VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
775{
776 /* Nothing to do here if we're in driverless mode: */
777 if (SUPR3IsDriverless())
778 return VINF_SUCCESS;
779
780 PVMCPU pVCpu = VMMGetCpu(pVM);
781 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
782
783 /*
784 * Each EMT has each own logger instance.
785 */
786 /* Debug logging.*/
787 int rcDebug = VINF_SUCCESS;
788#ifdef LOG_ENABLED
789 PRTLOGGER const pDefault = RTLogDefaultInstance();
790 if (pDefault)
791 rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /*fReleaseLogger*/);
792#else
793 RT_NOREF(pVM);
794#endif
795
796 /* Release logging. */
797 int rcRelease = VINF_SUCCESS;
798 PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
799 if (pRelease)
800 rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /*fReleaseLogger*/);
801
802 return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
803}
804
805
806/**
807 * @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
808 */
809static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
810{
811 PVM const pVM = (PVM)pvUser;
812 RT_NOREF(hThreadSelf);
813
814 /* Reset the flusher state before we start: */
815 pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
816
817 /*
818 * The work loop.
819 */
820 for (;;)
821 {
822 /*
823 * Wait for work.
824 */
825 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
826 if (RT_SUCCESS(rc))
827 {
828 /* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
829 VMMLOGFLUSHERENTRY Item;
830 Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
831 if ( Item.s.idCpu < pVM->cCpus
832 && Item.s.idxLogger < VMMLOGGER_IDX_MAX
833 && Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
834 {
835 /*
836 * Verify the request.
837 */
838 PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
839 PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
840 uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
841 if (cbToFlush > 0)
842 {
843 if (cbToFlush <= pShared->cbBuf)
844 {
845 char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
846 if (pchBufR3)
847 {
848 /*
849 * Do the flushing.
850 */
851 PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
852 ? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
853 if (pLogger)
854 {
855 char szBefore[128];
856 RTStrPrintf(szBefore, sizeof(szBefore),
857 "*FLUSH* idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
858 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
859 pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
860 RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "*FLUSH DONE*\n");
861 }
862 }
863 else
864 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
865 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
866 }
867 else
868 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
869 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
870 }
871 else
872 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
873 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
874
875 /*
876 * Mark the descriptor as flushed and set the request flag for same.
877 */
878 pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
879 }
880 else
881 {
882 Assert(Item.s.idCpu == UINT16_MAX);
883 Assert(Item.s.idxLogger == UINT8_MAX);
884 Assert(Item.s.idxBuffer == UINT8_MAX);
885 }
886 }
887 /*
888 * Interrupted can happen, just ignore it.
889 */
890 else if (rc == VERR_INTERRUPTED)
891 { /* ignore*/ }
892 /*
893 * The ring-0 termination code will set the shutdown flag and wake us
894 * up, and we should return with object destroyed. In case there is
895 * some kind of race, we might also get sempahore destroyed.
896 */
897 else if ( rc == VERR_OBJECT_DESTROYED
898 || rc == VERR_SEM_DESTROYED
899 || rc == VERR_INVALID_HANDLE)
900 {
901 LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
902 return VINF_SUCCESS;
903 }
904 /*
905 * There shouldn't be any other errors...
906 */
907 else
908 {
909 LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
910 AssertRC(rc);
911 RTThreadSleep(1);
912 }
913 }
914}
915
916
917/**
918 * Helper for VMM_FLUSH_R0_LOG that does the flushing.
919 *
920 * @param pVM The cross context VM structure.
921 * @param pVCpu The cross context virtual CPU structure of the calling
922 * EMT.
923 * @param pShared The shared logger data.
924 * @param idxBuf The buffer to flush.
925 * @param pDstLogger The destination IPRT logger.
926 */
927static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
928{
929 uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
930 const char *pszBefore = cbToFlush < 256 ? NULL : "*FLUSH*\n";
931 const char *pszAfter = cbToFlush < 256 ? NULL : "*END*\n";
932
933#if VMMLOGGER_BUFFER_COUNT > 1
934 /*
935 * When we have more than one log buffer, the flusher thread may still be
936 * working on the previous buffer when we get here.
937 */
938 char szBefore[64];
939 if (pShared->cFlushing > 0)
940 {
941 STAM_REL_PROFILE_START(&pShared->StatRaces, a);
942 uint64_t const nsStart = RTTimeNanoTS();
943
944 /* A no-op, but it takes the lock and the hope is that we end up waiting
945 on the flusher to finish up. */
946 RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
947 if (pShared->cFlushing != 0)
948 {
949 RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
950
951 /* If no luck, go to ring-0 and to proper waiting. */
952 if (pShared->cFlushing != 0)
953 {
954 STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
955 SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
956 }
957 }
958
959 RTStrPrintf(szBefore, sizeof(szBefore), "*%sFLUSH* waited %'RU64 ns\n",
960 pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
961 pszBefore = szBefore;
962 STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
963 }
964#else
965 RT_NOREF(pVM, pVCpu);
966#endif
967
968 RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
969 pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
970}
971
972
973/**
974 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
975 *
976 * @returns Pointer to the buffer.
977 * @param pVM The cross context VM structure.
978 */
979VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
980{
981 return pVM->vmm.s.szRing0AssertMsg1;
982}
983
984
985/**
986 * Returns the VMCPU of the specified virtual CPU.
987 *
988 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
989 *
990 * @param pUVM The user mode VM handle.
991 * @param idCpu The ID of the virtual CPU.
992 */
993VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
994{
995 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
996 AssertReturn(idCpu < pUVM->cCpus, NULL);
997 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
998 return pUVM->pVM->apCpusR3[idCpu];
999}
1000
1001
1002/**
1003 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1004 *
1005 * @returns Pointer to the buffer.
1006 * @param pVM The cross context VM structure.
1007 */
1008VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1009{
1010 return pVM->vmm.s.szRing0AssertMsg2;
1011}
1012
1013
1014/**
1015 * Execute state save operation.
1016 *
1017 * @returns VBox status code.
1018 * @param pVM The cross context VM structure.
1019 * @param pSSM SSM operation handle.
1020 */
1021static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1022{
1023 LogFlow(("vmmR3Save:\n"));
1024
1025 /*
1026 * Save the started/stopped state of all CPUs except 0 as it will always
1027 * be running. This avoids breaking the saved state version. :-)
1028 */
1029 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1030 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1031
1032 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1033}
1034
1035
1036/**
1037 * Execute state load operation.
1038 *
1039 * @returns VBox status code.
1040 * @param pVM The cross context VM structure.
1041 * @param pSSM SSM operation handle.
1042 * @param uVersion Data layout version.
1043 * @param uPass The data pass.
1044 */
1045static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1046{
1047 LogFlow(("vmmR3Load:\n"));
1048 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1049
1050 /*
1051 * Validate version.
1052 */
1053 if ( uVersion != VMM_SAVED_STATE_VERSION
1054 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1055 {
1056 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1057 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1058 }
1059
1060 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1061 {
1062 /* Ignore the stack bottom, stack pointer and stack bits. */
1063 RTRCPTR RCPtrIgnored;
1064 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1065 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1066#ifdef RT_OS_DARWIN
1067 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1068 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1069 && SSMR3HandleRevision(pSSM) >= 48858
1070 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1071 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1072 )
1073 SSMR3Skip(pSSM, 16384);
1074 else
1075 SSMR3Skip(pSSM, 8192);
1076#else
1077 SSMR3Skip(pSSM, 8192);
1078#endif
1079 }
1080
1081 /*
1082 * Restore the VMCPU states. VCPU 0 is always started.
1083 */
1084 VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1085 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1086 {
1087 bool fStarted;
1088 int rc = SSMR3GetBool(pSSM, &fStarted);
1089 if (RT_FAILURE(rc))
1090 return rc;
1091 VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1092 }
1093
1094 /* terminator */
1095 uint32_t u32;
1096 int rc = SSMR3GetU32(pSSM, &u32);
1097 if (RT_FAILURE(rc))
1098 return rc;
1099 if (u32 != UINT32_MAX)
1100 {
1101 AssertMsgFailed(("u32=%#x\n", u32));
1102 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1103 }
1104 return VINF_SUCCESS;
1105}
1106
1107
1108/**
1109 * Suspends the CPU yielder.
1110 *
1111 * @param pVM The cross context VM structure.
1112 */
1113VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1114{
1115#if 0 /* pointless when timers doesn't run on EMT */
1116 VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1117 if (!pVM->vmm.s.cYieldResumeMillies)
1118 {
1119 uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1120 uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1121 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1122 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1123 else
1124 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1125 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1126 }
1127 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1128#else
1129 RT_NOREF(pVM);
1130#endif
1131}
1132
1133
1134/**
1135 * Stops the CPU yielder.
1136 *
1137 * @param pVM The cross context VM structure.
1138 */
1139VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1140{
1141#if 0 /* pointless when timers doesn't run on EMT */
1142 if (!pVM->vmm.s.cYieldResumeMillies)
1143 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1144 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1145 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1146#else
1147 RT_NOREF(pVM);
1148#endif
1149}
1150
1151
1152/**
1153 * Resumes the CPU yielder when it has been a suspended or stopped.
1154 *
1155 * @param pVM The cross context VM structure.
1156 */
1157VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1158{
1159#if 0 /* pointless when timers doesn't run on EMT */
1160 if (pVM->vmm.s.cYieldResumeMillies)
1161 {
1162 TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1163 pVM->vmm.s.cYieldResumeMillies = 0;
1164 }
1165#else
1166 RT_NOREF(pVM);
1167#endif
1168}
1169
1170
1171#if 0 /* pointless when timers doesn't run on EMT */
1172/**
1173 * @callback_method_impl{FNTMTIMERINT, EMT yielder}
1174 *
1175 * @todo This is a UNI core/thread thing, really... Should be reconsidered.
1176 */
1177static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1178{
1179 NOREF(pvUser);
1180
1181 /*
1182 * This really needs some careful tuning. While we shouldn't be too greedy since
1183 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1184 * because that'll cause us to stop up.
1185 *
1186 * The current logic is to use the default interval when there is no lag worth
1187 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1188 *
1189 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1190 * so the lag is up to date.)
1191 */
1192 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1193 if ( u64Lag < 50000000 /* 50ms */
1194 || ( u64Lag < 1000000000 /* 1s */
1195 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1196 )
1197 {
1198 uint64_t u64Elapsed = RTTimeNanoTS();
1199 pVM->vmm.s.u64LastYield = u64Elapsed;
1200
1201 RTThreadYield();
1202
1203#ifdef LOG_ENABLED
1204 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1205 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1206#endif
1207 }
1208 TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1209}
1210#endif
1211
1212
1213/**
1214 * Executes guest code (Intel VT-x and AMD-V).
1215 *
1216 * @param pVM The cross context VM structure.
1217 * @param pVCpu The cross context virtual CPU structure.
1218 */
1219VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1220{
1221#if defined(VBOX_VMM_TARGET_ARMV8)
1222 /* We should actually never get here as the only execution engine is NEM. */
1223 RT_NOREF(pVM, pVCpu);
1224 AssertReleaseFailed();
1225 return VERR_NOT_SUPPORTED;
1226#else
1227 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1228
1229 int rc;
1230 do
1231 {
1232# ifdef NO_SUPCALLR0VMM
1233 rc = VERR_GENERAL_FAILURE;
1234# else
1235 rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1236 if (RT_LIKELY(rc == VINF_SUCCESS))
1237 rc = pVCpu->vmm.s.iLastGZRc;
1238# endif
1239 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1240
1241# if 0 /** @todo triggers too often */
1242 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1243# endif
1244
1245 /*
1246 * Flush the logs
1247 */
1248# ifdef LOG_ENABLED
1249 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1250# endif
1251 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1252 if (rc != VERR_VMM_RING0_ASSERTION)
1253 {
1254 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1255 return rc;
1256 }
1257 return vmmR3HandleRing0Assert(pVM, pVCpu);
1258#endif
1259}
1260
1261
1262/**
1263 * Perform one of the fast I/O control VMMR0 operation.
1264 *
1265 * @returns VBox strict status code.
1266 * @param pVM The cross context VM structure.
1267 * @param pVCpu The cross context virtual CPU structure.
1268 * @param enmOperation The operation to perform.
1269 */
1270VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1271{
1272 VBOXSTRICTRC rcStrict;
1273 do
1274 {
1275#ifdef NO_SUPCALLR0VMM
1276 rcStrict = VERR_GENERAL_FAILURE;
1277#else
1278 rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1279 if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1280 rcStrict = pVCpu->vmm.s.iLastGZRc;
1281#endif
1282 } while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1283
1284 /*
1285 * Flush the logs
1286 */
1287#ifdef LOG_ENABLED
1288 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1289#endif
1290 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1291 if (rcStrict != VERR_VMM_RING0_ASSERTION)
1292 return rcStrict;
1293 return vmmR3HandleRing0Assert(pVM, pVCpu);
1294}
1295
1296
1297#if defined(VBOX_VMM_TARGET_ARMV8)
1298
1299/**
1300 * VCPU worker for VMMR3CpuOn.
1301 *
1302 * @param pVM The cross context VM structure.
1303 * @param idCpu Virtual CPU to perform SIPI on.
1304 * @param GCPhysExecAddr The guest physical address to start executing at.
1305 * @param u64CtxId The context ID passed in x0/w0.
1306 */
1307static DECLCALLBACK(int) vmmR3CpuOn(PVM pVM, VMCPUID idCpu, RTGCPHYS GCPhysExecAddr, uint64_t u64CtxId)
1308{
1309 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1310 VMCPU_ASSERT_EMT(pVCpu);
1311
1312 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1313 return VINF_SUCCESS;
1314
1315 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1316
1317 pCtx->aGRegs[ARMV8_AARCH64_REG_X0].x = u64CtxId;
1318 pCtx->Pc.u64 = GCPhysExecAddr;
1319
1320 Log(("vmmR3CpuOn for VCPU %d with GCPhysExecAddr=%RGp u64CtxId=%#RX64\n", idCpu, GCPhysExecAddr, u64CtxId));
1321
1322# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1323 EMSetState(pVCpu, EMSTATE_HALTED);
1324 return VINF_EM_RESCHEDULE;
1325# else /* And if we go the VMCPU::enmState way it can stay here. */
1326 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1327 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1328 return VINF_SUCCESS;
1329# endif
1330}
1331
1332
1333/**
1334 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1335 * vector-dependent state and unhalting processor.
1336 *
1337 * @param pVM The cross context VM structure.
1338 * @param idCpu Virtual CPU to perform SIPI on.
1339 * @param GCPhysExecAddr The guest physical address to start executing at.
1340 * @param u64CtxId The context ID passed in x0/w0.
1341 */
1342VMMR3_INT_DECL(void) VMMR3CpuOn(PVM pVM, VMCPUID idCpu, RTGCPHYS GCPhysExecAddr, uint64_t u64CtxId)
1343{
1344 AssertReturnVoid(idCpu < pVM->cCpus);
1345
1346 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3CpuOn, 4, pVM, idCpu, GCPhysExecAddr, u64CtxId);
1347 AssertRC(rc);
1348}
1349
1350#else /* !VBOX_VMM_TARGET_ARMV8 */
1351
1352/**
1353 * VCPU worker for VMMR3SendStartupIpi.
1354 *
1355 * @param pVM The cross context VM structure.
1356 * @param idCpu Virtual CPU to perform SIPI on.
1357 * @param uVector The SIPI vector.
1358 */
1359static DECLCALLBACK(int) vmmR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1360{
1361 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1362 VMCPU_ASSERT_EMT(pVCpu);
1363
1364 /*
1365 * In the INIT state, the target CPU is only responsive to an SIPI.
1366 * This is also true for when when the CPU is in VMX non-root mode.
1367 *
1368 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1369 * See Intel spec. 26.6.2 "Activity State".
1370 */
1371 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1372 return VINF_SUCCESS;
1373
1374 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1375# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1376 if (CPUMIsGuestInVmxRootMode(pCtx))
1377 {
1378 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1379 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1380 return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1381
1382 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1383 return VINF_SUCCESS;
1384 }
1385# endif
1386
1387 pCtx->cs.Sel = uVector << 8;
1388 pCtx->cs.ValidSel = uVector << 8;
1389 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1390 pCtx->cs.u64Base = uVector << 12;
1391 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1392 pCtx->rip = 0;
1393
1394 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1395
1396# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1397 EMSetState(pVCpu, EMSTATE_HALTED);
1398 return VINF_EM_RESCHEDULE;
1399# else /* And if we go the VMCPU::enmState way it can stay here. */
1400 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1401 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1402 return VINF_SUCCESS;
1403# endif
1404}
1405
1406
1407/**
1408 * VCPU worker for VMMR3SendInitIpi.
1409 *
1410 * @returns VBox status code.
1411 * @param pVM The cross context VM structure.
1412 * @param idCpu Virtual CPU to perform SIPI on.
1413 */
1414static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1415{
1416 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1417 VMCPU_ASSERT_EMT(pVCpu);
1418
1419 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1420
1421 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1422 * wait-for-SIPI state. Verify. */
1423
1424 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1425# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1426 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1427 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1428 return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1429# endif
1430
1431 /** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1432 * IPI (e.g. SVM_EXIT_INIT). */
1433
1434 PGMR3ResetCpu(pVM, pVCpu);
1435 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1436# if !defined(VBOX_VMM_TARGET_ARMV8)
1437 APICR3InitIpi(pVCpu);
1438# endif
1439 TRPMR3ResetCpu(pVCpu);
1440 CPUMR3ResetCpu(pVM, pVCpu);
1441 EMR3ResetCpu(pVCpu);
1442 HMR3ResetCpu(pVCpu);
1443 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1444
1445 /* This will trickle up on the target EMT. */
1446 return VINF_EM_WAIT_SIPI;
1447}
1448
1449
1450/**
1451 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1452 * vector-dependent state and unhalting processor.
1453 *
1454 * @param pVM The cross context VM structure.
1455 * @param idCpu Virtual CPU to perform SIPI on.
1456 * @param uVector SIPI vector.
1457 */
1458VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1459{
1460 AssertReturnVoid(idCpu < pVM->cCpus);
1461
1462 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStartupIpi, 3, pVM, idCpu, uVector);
1463 AssertRC(rc);
1464}
1465
1466
1467/**
1468 * Sends init IPI to the virtual CPU.
1469 *
1470 * @param pVM The cross context VM structure.
1471 * @param idCpu Virtual CPU to perform int IPI on.
1472 */
1473VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1474{
1475 AssertReturnVoid(idCpu < pVM->cCpus);
1476
1477 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1478 AssertRC(rc);
1479}
1480
1481#endif /* !VBOX_VMM_TARGET_ARMV8 */
1482
1483/**
1484 * Registers the guest memory range that can be used for patching.
1485 *
1486 * @returns VBox status code.
1487 * @param pVM The cross context VM structure.
1488 * @param pPatchMem Patch memory range.
1489 * @param cbPatchMem Size of the memory range.
1490 */
1491VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1492{
1493 VM_ASSERT_EMT(pVM);
1494 if (HMIsEnabled(pVM))
1495 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1496
1497 return VERR_NOT_SUPPORTED;
1498}
1499
1500
1501/**
1502 * Deregisters the guest memory range that can be used for patching.
1503 *
1504 * @returns VBox status code.
1505 * @param pVM The cross context VM structure.
1506 * @param pPatchMem Patch memory range.
1507 * @param cbPatchMem Size of the memory range.
1508 */
1509VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1510{
1511 if (HMIsEnabled(pVM))
1512 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1513
1514 return VINF_SUCCESS;
1515}
1516
1517
1518/**
1519 * Common recursion handler for the other EMTs.
1520 *
1521 * @returns Strict VBox status code.
1522 * @param pVM The cross context VM structure.
1523 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1524 * @param rcStrict Current status code to be combined with the one
1525 * from this recursion and returned.
1526 */
1527static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1528{
1529 int rc2;
1530
1531 /*
1532 * We wait here while the initiator of this recursion reconfigures
1533 * everything. The last EMT to get in signals the initiator.
1534 */
1535 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1536 {
1537 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1538 AssertLogRelRC(rc2);
1539 }
1540
1541 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1542 AssertLogRelRC(rc2);
1543
1544 /*
1545 * Do the normal rendezvous processing.
1546 */
1547 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1548 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1549
1550 /*
1551 * Wait for the initiator to restore everything.
1552 */
1553 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1554 AssertLogRelRC(rc2);
1555
1556 /*
1557 * Last thread out of here signals the initiator.
1558 */
1559 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1560 {
1561 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1562 AssertLogRelRC(rc2);
1563 }
1564
1565 /*
1566 * Merge status codes and return.
1567 */
1568 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1569 if ( rcStrict2 != VINF_SUCCESS
1570 && ( rcStrict == VINF_SUCCESS
1571 || rcStrict > rcStrict2))
1572 rcStrict = rcStrict2;
1573 return rcStrict;
1574}
1575
1576
1577/**
1578 * Count returns and have the last non-caller EMT wake up the caller.
1579 *
1580 * @returns VBox strict informational status code for EM scheduling. No failures
1581 * will be returned here, those are for the caller only.
1582 *
1583 * @param pVM The cross context VM structure.
1584 * @param rcStrict The current accumulated recursive status code,
1585 * to be merged with i32RendezvousStatus and
1586 * returned.
1587 */
1588DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1589{
1590 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1591
1592 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1593 if (cReturned == pVM->cCpus - 1U)
1594 {
1595 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1596 AssertLogRelRC(rc);
1597 }
1598
1599 /*
1600 * Merge the status codes, ignoring error statuses in this code path.
1601 */
1602 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1603 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1604 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1605 VERR_IPE_UNEXPECTED_INFO_STATUS);
1606
1607 if (RT_SUCCESS(rcStrict2))
1608 {
1609 if ( rcStrict2 != VINF_SUCCESS
1610 && ( rcStrict == VINF_SUCCESS
1611 || rcStrict > rcStrict2))
1612 rcStrict = rcStrict2;
1613 }
1614 return rcStrict;
1615}
1616
1617
1618/**
1619 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1620 *
1621 * @returns VBox strict informational status code for EM scheduling. No failures
1622 * will be returned here, those are for the caller only. When
1623 * fIsCaller is set, VINF_SUCCESS is always returned.
1624 *
1625 * @param pVM The cross context VM structure.
1626 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1627 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1628 * not.
1629 * @param fFlags The flags.
1630 * @param pfnRendezvous The callback.
1631 * @param pvUser The user argument for the callback.
1632 */
1633static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1634 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1635{
1636 int rc;
1637 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1638
1639 /*
1640 * Enter, the last EMT triggers the next callback phase.
1641 */
1642 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1643 if (cEntered != pVM->cCpus)
1644 {
1645 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1646 {
1647 /* Wait for our turn. */
1648 for (;;)
1649 {
1650 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1651 AssertLogRelRC(rc);
1652 if (!pVM->vmm.s.fRendezvousRecursion)
1653 break;
1654 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1655 }
1656 }
1657 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1658 {
1659 /* Wait for the last EMT to arrive and wake everyone up. */
1660 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1661 AssertLogRelRC(rc);
1662 Assert(!pVM->vmm.s.fRendezvousRecursion);
1663 }
1664 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1665 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1666 {
1667 /* Wait for our turn. */
1668 for (;;)
1669 {
1670 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1671 AssertLogRelRC(rc);
1672 if (!pVM->vmm.s.fRendezvousRecursion)
1673 break;
1674 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1675 }
1676 }
1677 else
1678 {
1679 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1680
1681 /*
1682 * The execute once is handled specially to optimize the code flow.
1683 *
1684 * The last EMT to arrive will perform the callback and the other
1685 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1686 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1687 * returns, that EMT will initiate the normal return sequence.
1688 */
1689 if (!fIsCaller)
1690 {
1691 for (;;)
1692 {
1693 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1694 AssertLogRelRC(rc);
1695 if (!pVM->vmm.s.fRendezvousRecursion)
1696 break;
1697 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1698 }
1699
1700 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1701 }
1702 return VINF_SUCCESS;
1703 }
1704 }
1705 else
1706 {
1707 /*
1708 * All EMTs are waiting, clear the FF and take action according to the
1709 * execution method.
1710 */
1711 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1712
1713 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1714 {
1715 /* Wake up everyone. */
1716 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1717 AssertLogRelRC(rc);
1718 }
1719 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1720 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1721 {
1722 /* Figure out who to wake up and wake it up. If it's ourself, then
1723 it's easy otherwise wait for our turn. */
1724 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1725 ? 0
1726 : pVM->cCpus - 1U;
1727 if (pVCpu->idCpu != iFirst)
1728 {
1729 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1730 AssertLogRelRC(rc);
1731 for (;;)
1732 {
1733 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1734 AssertLogRelRC(rc);
1735 if (!pVM->vmm.s.fRendezvousRecursion)
1736 break;
1737 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1738 }
1739 }
1740 }
1741 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1742 }
1743
1744
1745 /*
1746 * Do the callback and update the status if necessary.
1747 */
1748 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1749 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1750 {
1751 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1752 if (rcStrict2 != VINF_SUCCESS)
1753 {
1754 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1755 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1756 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1757 int32_t i32RendezvousStatus;
1758 do
1759 {
1760 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1761 if ( rcStrict2 == i32RendezvousStatus
1762 || RT_FAILURE(i32RendezvousStatus)
1763 || ( i32RendezvousStatus != VINF_SUCCESS
1764 && rcStrict2 > i32RendezvousStatus))
1765 break;
1766 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1767 }
1768 }
1769
1770 /*
1771 * Increment the done counter and take action depending on whether we're
1772 * the last to finish callback execution.
1773 */
1774 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1775 if ( cDone != pVM->cCpus
1776 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1777 {
1778 /* Signal the next EMT? */
1779 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1780 {
1781 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1782 AssertLogRelRC(rc);
1783 }
1784 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1785 {
1786 Assert(cDone == pVCpu->idCpu + 1U);
1787 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1788 AssertLogRelRC(rc);
1789 }
1790 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1791 {
1792 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1793 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1794 AssertLogRelRC(rc);
1795 }
1796
1797 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1798 if (!fIsCaller)
1799 {
1800 for (;;)
1801 {
1802 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1803 AssertLogRelRC(rc);
1804 if (!pVM->vmm.s.fRendezvousRecursion)
1805 break;
1806 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1807 }
1808 }
1809 }
1810 else
1811 {
1812 /* Callback execution is all done, tell the rest to return. */
1813 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1814 AssertLogRelRC(rc);
1815 }
1816
1817 if (!fIsCaller)
1818 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1819 return rcStrictRecursion;
1820}
1821
1822
1823/**
1824 * Called in response to VM_FF_EMT_RENDEZVOUS.
1825 *
1826 * @returns VBox strict status code - EM scheduling. No errors will be returned
1827 * here, nor will any non-EM scheduling status codes be returned.
1828 *
1829 * @param pVM The cross context VM structure.
1830 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1831 *
1832 * @thread EMT
1833 */
1834VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1835{
1836 Assert(!pVCpu->vmm.s.fInRendezvous);
1837 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1838 pVCpu->vmm.s.fInRendezvous = true;
1839 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1840 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1841 pVCpu->vmm.s.fInRendezvous = false;
1842 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1843 return VBOXSTRICTRC_TODO(rcStrict);
1844}
1845
1846
1847/**
1848 * Helper for resetting an single wakeup event sempahore.
1849 *
1850 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1851 * @param hEvt The event semaphore to reset.
1852 */
1853static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1854{
1855 for (uint32_t cLoops = 0; ; cLoops++)
1856 {
1857 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1858 if (rc != VINF_SUCCESS || cLoops > _4K)
1859 return rc;
1860 }
1861}
1862
1863
1864/**
1865 * Worker for VMMR3EmtRendezvous that handles recursion.
1866 *
1867 * @returns VBox strict status code. This will be the first error,
1868 * VINF_SUCCESS, or an EM scheduling status code.
1869 *
1870 * @param pVM The cross context VM structure.
1871 * @param pVCpu The cross context virtual CPU structure of the
1872 * calling EMT.
1873 * @param fFlags Flags indicating execution methods. See
1874 * grp_VMMR3EmtRendezvous_fFlags.
1875 * @param pfnRendezvous The callback.
1876 * @param pvUser User argument for the callback.
1877 *
1878 * @thread EMT(pVCpu)
1879 */
1880static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1881 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1882{
1883 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1884 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1885 Assert(pVCpu->vmm.s.fInRendezvous);
1886
1887 /*
1888 * Save the current state.
1889 */
1890 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1891 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1892 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1893 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1894 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1895
1896 /*
1897 * Check preconditions and save the current state.
1898 */
1899 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1900 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1901 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1902 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1903 VERR_INTERNAL_ERROR);
1904 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1905 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1906
1907 /*
1908 * Reset the recursion prep and pop semaphores.
1909 */
1910 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1911 AssertLogRelRCReturn(rc, rc);
1912 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1913 AssertLogRelRCReturn(rc, rc);
1914 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1915 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1916 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1917 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1918
1919 /*
1920 * Usher the other thread into the recursion routine.
1921 */
1922 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1923 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1924
1925 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1926 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1927 while (cLeft-- > 0)
1928 {
1929 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1930 AssertLogRelRC(rc);
1931 }
1932 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1933 {
1934 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1935 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1936 {
1937 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1938 AssertLogRelRC(rc);
1939 }
1940 }
1941 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1942 {
1943 Assert(cLeft == pVCpu->idCpu);
1944 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1945 {
1946 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1947 AssertLogRelRC(rc);
1948 }
1949 }
1950 else
1951 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1952 VERR_INTERNAL_ERROR_4);
1953
1954 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1955 AssertLogRelRC(rc);
1956 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1957 AssertLogRelRC(rc);
1958
1959
1960 /*
1961 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1962 */
1963 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1964 {
1965 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1966 AssertLogRelRC(rc);
1967 }
1968
1969 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1970
1971 /*
1972 * Clear the slate and setup the new rendezvous.
1973 */
1974 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1975 {
1976 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1977 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1978 }
1979 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1980 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1981 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1982 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1983
1984 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1985 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1986 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1987 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1988 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1989 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1990 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1991 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1992
1993 /*
1994 * We're ready to go now, do normal rendezvous processing.
1995 */
1996 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1997 AssertLogRelRC(rc);
1998
1999 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
2000
2001 /*
2002 * The caller waits for the other EMTs to be done, return and waiting on the
2003 * pop semaphore.
2004 */
2005 for (;;)
2006 {
2007 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2008 AssertLogRelRC(rc);
2009 if (!pVM->vmm.s.fRendezvousRecursion)
2010 break;
2011 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
2012 }
2013
2014 /*
2015 * Get the return code and merge it with the above recursion status.
2016 */
2017 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
2018 if ( rcStrict2 != VINF_SUCCESS
2019 && ( rcStrict == VINF_SUCCESS
2020 || rcStrict > rcStrict2))
2021 rcStrict = rcStrict2;
2022
2023 /*
2024 * Restore the parent rendezvous state.
2025 */
2026 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2027 {
2028 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2029 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2030 }
2031 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2032 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2033 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2034 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2035
2036 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2037 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2038 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2039 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2040 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2041 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2042 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
2043
2044 /*
2045 * Usher the other EMTs back to their parent recursion routine, waiting
2046 * for them to all get there before we return (makes sure they've been
2047 * scheduled and are past the pop event sem, see below).
2048 */
2049 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2050 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2051 AssertLogRelRC(rc);
2052
2053 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2054 {
2055 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2056 AssertLogRelRC(rc);
2057 }
2058
2059 /*
2060 * We must reset the pop semaphore on the way out (doing the pop caller too,
2061 * just in case). The parent may be another recursion.
2062 */
2063 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2064 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2065
2066 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2067
2068 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2069 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2070 return rcStrict;
2071}
2072
2073
2074/**
2075 * EMT rendezvous.
2076 *
2077 * Gathers all the EMTs and execute some code on each of them, either in a one
2078 * by one fashion or all at once.
2079 *
2080 * @returns VBox strict status code. This will be the first error,
2081 * VINF_SUCCESS, or an EM scheduling status code.
2082 *
2083 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2084 * doesn't support it or if the recursion is too deep.
2085 *
2086 * @param pVM The cross context VM structure.
2087 * @param fFlags Flags indicating execution methods. See
2088 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2089 * descending and ascending rendezvous types support
2090 * recursion from inside @a pfnRendezvous.
2091 * @param pfnRendezvous The callback.
2092 * @param pvUser User argument for the callback.
2093 *
2094 * @thread Any.
2095 */
2096VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2097{
2098 /*
2099 * Validate input.
2100 */
2101 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2102 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2103 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2104 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2105 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2106 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2107 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2108 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2109
2110 VBOXSTRICTRC rcStrict;
2111 PVMCPU pVCpu = VMMGetCpu(pVM);
2112 if (!pVCpu)
2113 {
2114 /*
2115 * Forward the request to an EMT thread.
2116 */
2117 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2118 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2119 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2120 else
2121 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2122 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2123 }
2124 else if ( pVM->cCpus == 1
2125 || ( pVM->enmVMState == VMSTATE_DESTROYING
2126 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2127 {
2128 /*
2129 * Shortcut for the single EMT case.
2130 *
2131 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2132 * during vmR3Destroy after other emulation threads have started terminating.
2133 */
2134 if (!pVCpu->vmm.s.fInRendezvous)
2135 {
2136 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2137 pVCpu->vmm.s.fInRendezvous = true;
2138 pVM->vmm.s.fRendezvousFlags = fFlags;
2139 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2140 pVCpu->vmm.s.fInRendezvous = false;
2141 }
2142 else
2143 {
2144 /* Recursion. Do the same checks as in the SMP case. */
2145 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2146 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2147 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2148 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2149 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2150 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2151 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2152 , VERR_DEADLOCK);
2153
2154 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2155 pVM->vmm.s.cRendezvousRecursions++;
2156 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2157 pVM->vmm.s.fRendezvousFlags = fFlags;
2158
2159 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2160
2161 pVM->vmm.s.fRendezvousFlags = fParentFlags;
2162 pVM->vmm.s.cRendezvousRecursions--;
2163 }
2164 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2165 }
2166 else
2167 {
2168 /*
2169 * Spin lock. If busy, check for recursion, if not recursing wait for
2170 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2171 */
2172 int rc;
2173 rcStrict = VINF_SUCCESS;
2174 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2175 {
2176 /* Allow recursion in some cases. */
2177 if ( pVCpu->vmm.s.fInRendezvous
2178 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2179 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2180 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2181 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2182 ))
2183 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2184
2185 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2186 VERR_DEADLOCK);
2187
2188 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2189 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2190 {
2191 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2192 {
2193 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2194 if ( rc != VINF_SUCCESS
2195 && ( rcStrict == VINF_SUCCESS
2196 || rcStrict > rc))
2197 rcStrict = rc;
2198 /** @todo Perhaps deal with termination here? */
2199 }
2200 ASMNopPause();
2201 }
2202 }
2203
2204 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2205 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2206 Assert(!pVCpu->vmm.s.fInRendezvous);
2207 pVCpu->vmm.s.fInRendezvous = true;
2208
2209 /*
2210 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2211 */
2212 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2213 {
2214 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2215 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2216 }
2217 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2218 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2219 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2220 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2221 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2222 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2223 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2224 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2225 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2226 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2227 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2228
2229 /*
2230 * Set the FF and poke the other EMTs.
2231 */
2232 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2233 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2234
2235 /*
2236 * Do the same ourselves.
2237 */
2238 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2239
2240 /*
2241 * The caller waits for the other EMTs to be done and return before doing
2242 * the cleanup. This makes away with wakeup / reset races we would otherwise
2243 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2244 */
2245 for (;;)
2246 {
2247 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2248 AssertLogRelRC(rc);
2249 if (!pVM->vmm.s.fRendezvousRecursion)
2250 break;
2251 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2252 }
2253
2254 /*
2255 * Get the return code and clean up a little bit.
2256 */
2257 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2258 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2259
2260 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2261 pVCpu->vmm.s.fInRendezvous = false;
2262
2263 /*
2264 * Merge rcStrict, rcStrict2 and rcStrict3.
2265 */
2266 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2267 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2268 if ( rcStrict2 != VINF_SUCCESS
2269 && ( rcStrict == VINF_SUCCESS
2270 || rcStrict > rcStrict2))
2271 rcStrict = rcStrict2;
2272 if ( rcStrict3 != VINF_SUCCESS
2273 && ( rcStrict == VINF_SUCCESS
2274 || rcStrict > rcStrict3))
2275 rcStrict = rcStrict3;
2276 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2277 }
2278
2279 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2280 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2281 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2282 VERR_IPE_UNEXPECTED_INFO_STATUS);
2283 return VBOXSTRICTRC_VAL(rcStrict);
2284}
2285
2286
2287/**
2288 * Interface for vmR3SetHaltMethodU.
2289 *
2290 * @param pVCpu The cross context virtual CPU structure of the
2291 * calling EMT.
2292 * @param fMayHaltInRing0 The new state.
2293 * @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2294 * @thread EMT(pVCpu)
2295 *
2296 * @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2297 * component.
2298 */
2299VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2300{
2301 LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2302 pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2303 pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2304}
2305
2306
2307/**
2308 * Read from the ring 0 jump buffer stack.
2309 *
2310 * @returns VBox status code.
2311 *
2312 * @param pVM The cross context VM structure.
2313 * @param idCpu The ID of the source CPU context (for the address).
2314 * @param R0Addr Where to start reading.
2315 * @param pvBuf Where to store the data we've read.
2316 * @param cbRead The number of bytes to read.
2317 */
2318VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2319{
2320 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2321 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2322 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2323
2324 /*
2325 * Hopefully we've got all the requested bits. If not supply what we
2326 * can and zero the remaining stuff.
2327 */
2328 RTHCUINTPTR off = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2329 if (off < pVCpu->vmm.s.AssertJmpBuf.cbStackValid)
2330 {
2331 size_t const cbValid = pVCpu->vmm.s.AssertJmpBuf.cbStackValid - off;
2332 if (cbRead <= cbValid)
2333 {
2334 memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbRead);
2335 return VINF_SUCCESS;
2336 }
2337
2338 memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbValid);
2339 RT_BZERO((uint8_t *)pvBuf + cbValid, cbRead - cbValid);
2340 }
2341 else
2342 RT_BZERO(pvBuf, cbRead);
2343
2344 /*
2345 * Supply the setjmp return RIP/EIP if requested.
2346 */
2347 if ( pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2348 && pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation < R0Addr + cbRead)
2349 {
2350 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue;
2351 size_t cbSrc = sizeof(pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue);
2352 size_t offDst = 0;
2353 if (R0Addr < pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2354 offDst = pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation - R0Addr;
2355 else if (R0Addr > pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2356 {
2357 size_t offSrc = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation;
2358 Assert(offSrc < cbSrc);
2359 pbSrc -= offSrc;
2360 cbSrc -= offSrc;
2361 }
2362 if (cbSrc > cbRead - offDst)
2363 cbSrc = cbRead - offDst;
2364 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2365
2366 //if (cbSrc == cbRead)
2367 // rc = VINF_SUCCESS;
2368 }
2369
2370 return VINF_SUCCESS;
2371}
2372
2373
2374/**
2375 * Used by the DBGF stack unwinder to initialize the register state.
2376 *
2377 * @param pUVM The user mode VM handle.
2378 * @param idCpu The ID of the CPU being unwound.
2379 * @param pState The unwind state to initialize.
2380 */
2381VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2382{
2383 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2384 AssertReturnVoid(pVCpu);
2385
2386 /*
2387 * This is all we really need here if we had proper unwind info (win64 only)...
2388 */
2389 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.AssertJmpBuf.UnwindBp;
2390 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2391 pState->uPc = pVCpu->vmm.s.AssertJmpBuf.UnwindPc;
2392
2393 /*
2394 * Locate the resume point on the stack.
2395 */
2396#ifdef RT_ARCH_AMD64
2397 /* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-amd64.asm exactly. */
2398 uintptr_t off = 0;
2399# ifdef RT_OS_WINDOWS
2400 off += 0xa0; /* XMM6 thru XMM15 */
2401# endif
2402 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2403 off += 8;
2404 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2405 off += 8;
2406# ifdef RT_OS_WINDOWS
2407 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2408 off += 8;
2409 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2410 off += 8;
2411# endif
2412 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2413 off += 8;
2414 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2415 off += 8;
2416 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2417 off += 8;
2418 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2419 off += 8;
2420 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2421 off += 8;
2422 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2423 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2424
2425#elif defined(RT_ARCH_X86)
2426 /* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-x86.asm exactly. */
2427 uintptr_t off = 0;
2428 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2429 off += 4;
2430 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2431 off += 4;
2432 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2433 off += 4;
2434 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2435 off += 4;
2436 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2437 off += 4;
2438 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2439 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2440
2441#elif defined(RT_ARCH_ARM64)
2442 /** @todo PORTME: arm ring-0 */
2443
2444#else
2445# error "Port me"
2446#endif
2447}
2448
2449
2450/**
2451 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2452 *
2453 * @returns VBox status code.
2454 * @param pVM The cross context VM structure.
2455 * @param uOperation Operation to execute.
2456 * @param u64Arg Constant argument.
2457 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2458 * details.
2459 */
2460VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2461{
2462 PVMCPU pVCpu = VMMGetCpu(pVM);
2463 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2464 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2465}
2466
2467
2468/**
2469 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2470 *
2471 * @returns VBox status code.
2472 * @param pVM The cross context VM structure.
2473 * @param pVCpu The cross context VM structure.
2474 * @param enmOperation Operation to execute.
2475 * @param u64Arg Constant argument.
2476 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2477 * details.
2478 */
2479VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2480{
2481 /*
2482 * Call ring-0.
2483 */
2484#ifdef NO_SUPCALLR0VMM
2485 int rc = VERR_GENERAL_FAILURE;
2486#else
2487 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2488#endif
2489
2490 /*
2491 * Flush the logs and deal with ring-0 assertions.
2492 */
2493#ifdef LOG_ENABLED
2494 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2495#endif
2496 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2497 if (rc != VERR_VMM_RING0_ASSERTION)
2498 {
2499 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2500 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2501 VERR_IPE_UNEXPECTED_INFO_STATUS);
2502 return rc;
2503 }
2504 return vmmR3HandleRing0Assert(pVM, pVCpu);
2505}
2506
2507
2508/**
2509 * Logs a ring-0 assertion ASAP after returning to ring-3.
2510 *
2511 * @returns VBox status code.
2512 * @param pVM The cross context VM structure.
2513 * @param pVCpu The cross context virtual CPU structure.
2514 */
2515static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu)
2516{
2517 RT_NOREF(pVCpu);
2518 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2519 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2520 return VERR_VMM_RING0_ASSERTION;
2521}
2522
2523
2524/**
2525 * Displays the Force action Flags.
2526 *
2527 * @param pVM The cross context VM structure.
2528 * @param pHlp The output helpers.
2529 * @param pszArgs The additional arguments (ignored).
2530 */
2531static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2532{
2533 int c;
2534 uint32_t f;
2535 NOREF(pszArgs);
2536
2537#define PRINT_FLAG(prf,flag) do { \
2538 if (f & (prf##flag)) \
2539 { \
2540 static const char *s_psz = #flag; \
2541 if (!(c % 6)) \
2542 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2543 else \
2544 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2545 c++; \
2546 f &= ~(prf##flag); \
2547 } \
2548 } while (0)
2549
2550#define PRINT_GROUP(prf,grp,sfx) do { \
2551 if (f & (prf##grp##sfx)) \
2552 { \
2553 static const char *s_psz = #grp; \
2554 if (!(c % 5)) \
2555 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2556 else \
2557 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2558 c++; \
2559 } \
2560 } while (0)
2561
2562 /*
2563 * The global flags.
2564 */
2565 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2566 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2567
2568 /* show the flag mnemonics */
2569 c = 0;
2570 f = fGlobalForcedActions;
2571 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2572 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2573 PRINT_FLAG(VM_FF_,PDM_DMA);
2574 PRINT_FLAG(VM_FF_,DBGF);
2575 PRINT_FLAG(VM_FF_,REQUEST);
2576 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2577 PRINT_FLAG(VM_FF_,RESET);
2578 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2579 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2580 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2581 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2582 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2583 if (f)
2584 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2585 else
2586 pHlp->pfnPrintf(pHlp, "\n");
2587
2588 /* the groups */
2589 c = 0;
2590 f = fGlobalForcedActions;
2591 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2592 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2593 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2594 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2595 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2596 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2597 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2598 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2599 if (c)
2600 pHlp->pfnPrintf(pHlp, "\n");
2601
2602 /*
2603 * Per CPU flags.
2604 */
2605 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2606 {
2607 PVMCPU pVCpu = pVM->apCpusR3[i];
2608 const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2609 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2610
2611 /* show the flag mnemonics */
2612 c = 0;
2613 f = fLocalForcedActions;
2614#if defined(VBOX_VMM_TARGET_ARMV8)
2615 PRINT_FLAG(VMCPU_FF_,INTERRUPT_IRQ);
2616 PRINT_FLAG(VMCPU_FF_,INTERRUPT_FIQ);
2617#else
2618 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2619 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2620#endif
2621 PRINT_FLAG(VMCPU_FF_,TIMER);
2622 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2623 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2624 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2625 PRINT_FLAG(VMCPU_FF_,UNHALT);
2626 PRINT_FLAG(VMCPU_FF_,IEM);
2627 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2628 PRINT_FLAG(VMCPU_FF_,DBGF);
2629 PRINT_FLAG(VMCPU_FF_,REQUEST);
2630 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2631 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2632 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2633 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2634 PRINT_FLAG(VMCPU_FF_,TO_R3);
2635 PRINT_FLAG(VMCPU_FF_,IOM);
2636 if (f)
2637 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2638 else
2639 pHlp->pfnPrintf(pHlp, "\n");
2640
2641 /* the groups */
2642 c = 0;
2643 f = fLocalForcedActions;
2644 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2645 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2646 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2647 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2648 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2649 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2650 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2651 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2652 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2653 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2654 if (c)
2655 pHlp->pfnPrintf(pHlp, "\n");
2656 }
2657
2658#undef PRINT_FLAG
2659#undef PRINT_GROUP
2660}
2661
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