Changeset 9021

Timestamp:

05/21/08 16:38:13 (8 months ago)

Author:

vboxsync

Message:

Nested paging updates. Extra paging mode added to prevent illegal changes to the shadow page table.

Files:

• trunk/include/VBox/hwaccm.h (modified) (1 diff)
• trunk/include/VBox/pgm.h (modified) (1 diff)
• trunk/src/VBox/VMM/HWACCM.cpp (modified) (1 diff)
• trunk/src/VBox/VMM/HWACCMInternal.h (modified) (2 diffs)
• trunk/src/VBox/VMM/PGM.cpp (modified) (7 diffs)
• trunk/src/VBox/VMM/PGMInternal.h (modified) (7 diffs)
• trunk/src/VBox/VMM/VMMAll/PGMAll.cpp (modified) (4 diffs)
• trunk/src/VBox/VMM/VMMAll/PGMAllBth.h (modified) (13 diffs)
• trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp (modified) (14 diffs)

trunk/include/VBox/hwaccm.h

@@ -83 +83 @@
- */
-HWACCMDECL(int) HWACCMFlushTLB(PVM pVM);
+
+/**
+ * Checks if nested paging is enabled
+ *
+ * @returns boolean
+ * @param   pVM         The VM to operate on.
+ */
+HWACCMDECL(bool) HWACCMIsNestedPagingActive(PVM pVM);
+
-#else
-/* Nop in GC */
-
+
+
-#endif
-

trunk/include/VBox/pgm.h

@@ -263 +263 @@
-    /** 64-bit AMD paging (long mode) with NX enabled. */
-    PGMMODE_AMD64_NX,
+    /** Nested paging mode (shadow only; guest physical to host physical). */
+    PGMMODE_NESTED,
-    /** The max number of modes */
-    PGMMODE_MAX,

trunk/src/VBox/VMM/HWACCM.cpp

@@ -102 +102 @@
-
-    pVM->hwaccm.s.fActive        = false;
+    pVM->hwaccm.s.fNestedPaging  = false;
-
-    /* On first entry we'll sync everything. */

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -138 +138 @@
-    /** Set when hardware acceleration is allowed. */
-    bool                        fAllowed;
+
+    /** Set if nested paging is enabled. */
+    bool                        fNestedPaging;
-
-    /** HWACCM_CHANGED_* flags. */
@@ -214 +217 @@
-        /** Set if we need to flush the TLB during the world switch. */
-        bool                        fForceTLBFlush;
-        /** Set if nested paging is enabled. */
-        bool                        fNestedPaging;
-
-        /* Id of the last cpu we were executing code on (NIL_RTCPUID for the first time) */

trunk/src/VBox/VMM/PGM.cpp

@@ -654 +654 @@
-
-
-#if 1/// @todo ndef RT_ARCH_AMD64
-/*
- * Shadow - 32-bit mode
@@ -730 +729 @@
-#undef PGM_SHW_NAME_GC_STR
-#undef PGM_SHW_NAME_R0_STR
-#endif /* !RT_ARCH_AMD64 */
-
-
@@ -850 +848 @@
-#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
-#include "PGMGst.h"
+#include "PGMBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_BIG
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_BTH_NAME_GC_STR
+#undef PGM_BTH_NAME_R0_STR
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+#undef PGM_GST_NAME_GC_STR
+#undef PGM_GST_NAME_R0_STR
+
+#undef PGM_SHW_TYPE
+#undef PGM_SHW_NAME
+#undef PGM_SHW_NAME_GC_STR
+#undef PGM_SHW_NAME_R0_STR
+
+/*
+ * Shadow - Nested paging mode
+ */
+#define PGM_SHW_TYPE                PGM_TYPE_NESTED
+#define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED(name)
+#define PGM_SHW_NAME_GC_STR(name)   PGM_SHW_NAME_GC_NESTED_STR(name)
+#define PGM_SHW_NAME_R0_STR(name)   PGM_SHW_NAME_R0_NESTED_STR(name)
+#include "PGMShw.h"
+
+/* Guest - real mode */
+#define PGM_GST_TYPE                PGM_TYPE_REAL
+#define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
+#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_REAL_STR(name)
+#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_REAL_STR(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_REAL(name)
+#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_NESTED_REAL_STR(name)
+#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_REAL_STR(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
+#include "PGMBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_BTH_NAME_GC_STR
+#undef PGM_BTH_NAME_R0_STR
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+#undef PGM_GST_NAME_GC_STR
+#undef PGM_GST_NAME_R0_STR
+
+/* Guest - protected mode */
+#define PGM_GST_TYPE                PGM_TYPE_PROT
+#define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
+#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_PROT_STR(name)
+#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PROT_STR(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PROT(name)
+#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_NESTED_PROT_STR(name)
+#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_PROT_STR(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
+#include "PGMBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_BTH_NAME_GC_STR
+#undef PGM_BTH_NAME_R0_STR
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+#undef PGM_GST_NAME_GC_STR
+#undef PGM_GST_NAME_R0_STR
+
+/* Guest - 32-bit mode */
+#define PGM_GST_TYPE                PGM_TYPE_32BIT
+#define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
+#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_32BIT_STR(name)
+#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_32BIT_STR(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT(name)
+#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_NESTED_32BIT_STR(name)
+#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_32BIT_STR(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
+#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
+#include "PGMBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_BIG
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_BTH_NAME_GC_STR
+#undef PGM_BTH_NAME_R0_STR
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+#undef PGM_GST_NAME_GC_STR
+#undef PGM_GST_NAME_R0_STR
+
+/* Guest - PAE mode */
+#define PGM_GST_TYPE                PGM_TYPE_PAE
+#define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
+#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_PAE_STR(name)
+#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PAE_STR(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE(name)
+#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_NESTED_PAE_STR(name)
+#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_PAE_STR(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
+#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
+#include "PGMBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_BIG
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_BTH_NAME_GC_STR
+#undef PGM_BTH_NAME_R0_STR
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+#undef PGM_GST_NAME_GC_STR
+#undef PGM_GST_NAME_R0_STR
+
+/* Guest - AMD64 mode */
+#define PGM_GST_TYPE                PGM_TYPE_AMD64
+#define PGM_GST_NAME(name)          PGM_GST_NAME_AMD64(name)
+#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_AMD64_STR(name)
+#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_AMD64_STR(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64(name)
+#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_NESTED_AMD64_STR(name)
+#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_AMD64_STR(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
+#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
-#include "PGMBth.h"
-#undef BTH_PGMPOOLKIND_PT_FOR_BIG
@@ -2336 +2449 @@
-        case PGMMODE_AMD64:
-        case PGMMODE_AMD64_NX:  return PGM_TYPE_AMD64;
+        case PGMMODE_NESTED:    return PGM_TYPE_NESTED;
-        default:
-            AssertFatalMsgFailed(("pgmMode=%d\n", pgmMode));
@@ -2351 +2465 @@
-DECLINLINE(unsigned) pgmModeDataIndex(unsigned uShwType, unsigned uGstType)
-{
-AMD64
+NESTED
-    Assert(uGstType >= PGM_TYPE_REAL  && uGstType <= PGM_TYPE_AMD64);
-32BIT
+REAL
-         + (uGstType - PGM_TYPE_REAL);
-}
@@ -2375 +2489 @@
-/**
- * Calculates the max data index.
-a
+
- */
-DECLINLINE(unsigned) pgmModeDataMaxIndex(void)
-{
-AMD64
+NESTED
-}
-
@@ -2460 +2574 @@
-    pModeData->uShwType = PGM_TYPE_AMD64;
-    pModeData->uGstType = PGM_TYPE_AMD64;
-
-
+
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+
-
-    return VINF_SUCCESS;

trunk/src/VBox/VMM/PGMInternal.h

@@ -191 +191 @@
-#define PGM_TYPE_PAE        4
-#define PGM_TYPE_AMD64      5
+#define PGM_TYPE_NESTED     6
-/** @} */
-
@@ -197 +198 @@
- * @remark  ASSUMES certain order of the PGM_TYPE_* values.
- */
-
+ && (uType) != PGM_TYPE_NESTED
-
-/** Macro for checking if the guest supports the NX bit.
@@ -203 +204 @@
- * @remark  ASSUMES certain order of the PGM_TYPE_* values.
- */
-
+ && (uType) != PGM_TYPE_NESTED
-
-
@@ -1710 +1711 @@
-#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
-#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
+#define PGM_SHW_NAME_NESTED(name)        PGM_CTX(pgm,ShwNested##name)
+#define PGM_SHW_NAME_GC_NESTED_STR(name) "pgmGCShwNested" #name
+#define PGM_SHW_NAME_R0_NESTED_STR(name) "pgmR0ShwNested" #name
-#define PGM_SHW_DECL(type, name)        PGM_CTX_DECL(type) PGM_SHW_NAME(name)
-#define PGM_SHW_PFN(name, pVM)          ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
@@ -1723 +1727 @@
-#define PGM_BTH_NAME_AMD64_PROT(name)   PGM_CTX(pgm,BthAMD64Prot##name)
-#define PGM_BTH_NAME_AMD64_AMD64(name)  PGM_CTX(pgm,BthAMD64AMD64##name)
+#define PGM_BTH_NAME_NESTED_REAL(name)  PGM_CTX(pgm,BthNestedReal##name)
+#define PGM_BTH_NAME_NESTED_PROT(name)  PGM_CTX(pgm,BthNestedProt##name)
+#define PGM_BTH_NAME_NESTED_32BIT(name) PGM_CTX(pgm,BthNested32Bit##name)
+#define PGM_BTH_NAME_NESTED_PAE(name)   PGM_CTX(pgm,BthNestedPAE##name)
+#define PGM_BTH_NAME_NESTED_AMD64(name) PGM_CTX(pgm,BthNestedAMD64##name)
+
-#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name)   "pgmGCBth32BitReal" #name
-#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name)   "pgmGCBth32BitProt" #name
@@ -1731 +1741 @@
-#define PGM_BTH_NAME_GC_PAE_PAE_STR(name)      "pgmGCBthPAEPAE" #name
-#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name)  "pgmGCBthAMD64AMD64" #name
+#define PGM_BTH_NAME_GC_NESTED_REAL_STR(name)  "pgmGCBthNestedReal" #name
+#define PGM_BTH_NAME_GC_NESTED_PROT_STR(name)  "pgmGCBthNestedProt" #name
+#define PGM_BTH_NAME_GC_NESTED_32BIT_STR(name) "pgmGCBthNested32Bit" #name
+#define PGM_BTH_NAME_GC_NESTED_PAE_STR(name)   "pgmGCBthNestedPAE" #name
+#define PGM_BTH_NAME_GC_NESTED_AMD64_STR(name) "pgmGCBthNestedAMD64" #name
-#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name)   "pgmR0Bth32BitReal" #name
-#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name)   "pgmR0Bth32BitProt" #name
@@ -1740 +1755 @@
-#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name)   "pgmR0BthAMD64Prot" #name
-#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name)  "pgmR0BthAMD64AMD64" #name
+#define PGM_BTH_NAME_R0_NESTED_REAL_STR(name)  "pgmR0BthNestedReal" #name
+#define PGM_BTH_NAME_R0_NESTED_PROT_STR(name)  "pgmR0BthNestedProt" #name
+#define PGM_BTH_NAME_R0_NESTED_32BIT_STR(name) "pgmR0BthNested32Bit" #name
+#define PGM_BTH_NAME_R0_NESTED_PAE_STR(name)   "pgmR0BthNestedPAE" #name
+#define PGM_BTH_NAME_R0_NESTED_AMD64_STR(name) "pgmR0BthNestedAMD64" #name
+
-#define PGM_BTH_DECL(type, name)        PGM_CTX_DECL(type) PGM_BTH_NAME(name)
-#define PGM_BTH_PFN(name, pVM)          ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))

trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

@@ -215 +215 @@
-#undef PGM_SHW_TYPE
-#undef PGM_SHW_NAME
+
+/*
+ * Shadow - Nested paging mode
+ */
+#define PGM_SHW_TYPE                PGM_TYPE_NESTED
+#define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED(name)
+#include "PGMAllShw.h"
+
+/* Guest - real mode */
+#define PGM_GST_TYPE                PGM_TYPE_REAL
+#define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_REAL(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
+#include "PGMAllBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+
+/* Guest - protected mode */
+#define PGM_GST_TYPE                PGM_TYPE_PROT
+#define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PROT(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
+#include "PGMAllBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+
+/* Guest - 32-bit mode */
+#define PGM_GST_TYPE                PGM_TYPE_32BIT
+#define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
+#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
+#include "PGMAllBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_BIG
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+
+/* Guest - PAE mode */
+#define PGM_GST_TYPE                PGM_TYPE_PAE
+#define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
+#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
+#include "PGMAllBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_BIG
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+
+/* Guest - AMD64 mode */
+#define PGM_GST_TYPE                PGM_TYPE_AMD64
+#define PGM_GST_NAME(name)          PGM_GST_NAME_AMD64(name)
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64(name)
+#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
+#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
+#include "PGMAllBth.h"
+#undef BTH_PGMPOOLKIND_PT_FOR_BIG
+#undef BTH_PGMPOOLKIND_PT_FOR_PT
+#undef PGM_BTH_NAME
+#undef PGM_GST_TYPE
+#undef PGM_GST_NAME
+
+#undef PGM_SHW_TYPE
+#undef PGM_SHW_NAME
+
-#endif
-
@@ -433 +505 @@
-    }
-
-
-
-
-
-
-
+
-    {
-        /*
-
-
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+
-
-#if 0 /* def VBOX_STRICT; triggers too often now */
@@ -667 +742 @@
-    int            rc;
-
+    Assert(!HWACCMIsNestedPagingActive(pVM));
+
-    pPml4e = &pPGM->pHCPaePML4->a[iPml4e];
-    if (    !pPml4e->n.u1Present
@@ -1351 +1428 @@
-    STAM_PROFILE_STOP(&pVM->pgm.s.CTXMID(Stat,SyncCR3), a);
-    return cErrors;
+    return 0;
-}
-

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -44 +44 @@
-
-/* Filter out some illegal combinations of guest and shadow paging, so we can remove redundant checks inside functions. */
-
+ && PGM_SHW_TYPE != PGM_TYPE_NESTED
-# error "Invalid combination; PAE guest implies PAE shadow"
-#endif
-
-#if     (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \
-
+ || PGM_SHW_TYPE == PGM_TYPE_NESTED
-# error "Invalid combination; real or protected mode without paging implies 32 bits or PAE shadow paging."
-#endif
-
-#if     (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE) \
-
+ || PGM_SHW_TYPE == PGM_TYPE_NESTED
-# error "Invalid combination; 32 bits guest paging or PAE implies 32 bits or PAE shadow paging."
-#endif
-
-)
-
+ && PGM_SHW_TYPE != PGM_TYPE_NESTED) \
+ && PGM_GST_TYPE != PGM_TYPE_PROT
-# error "Invalid combination; AMD64 guest implies AMD64 shadow and vice versa"
-#endif
@@ -78 +78 @@
-PGM_BTH_DECL(int, Trap0eHandler)(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
-{
-
+
+
-
-# if PGM_SHW_TYPE == PGM_TYPE_PAE && PGM_GST_TYPE != PGM_TYPE_PAE
@@ -846 +847 @@
-PGM_BTH_DECL(int, InvalidatePage)(PVM pVM, RTGCUINTPTR GCPtrPage)
-{
-
-
-
+
+
-    int rc;
-
@@ -1418 +1418 @@
-    LogFlow(("SyncPage: GCPtrPage=%VGv cPages=%d uErr=%#x\n", GCPtrPage, cPages, uErr));
-
-
-
+
+
+
-
-# if PGM_WITH_NX(PGM_GST_TYPE)
@@ -1660 +1661 @@
-    return VINF_PGM_SYNCPAGE_MODIFIED_PDE;
-
-
+
+
-
-# ifdef PGM_SYNC_N_PAGES
@@ -2091 +2093 @@
-    LogFlow(("SyncPT: GCPtrPage=%VGv\n", GCPtrPage));
-
-
-
+
+
+
-
-    /*
@@ -2444 +2447 @@
-    return rc;
-
-
+
+
-
-    int     rc     = VINF_SUCCESS;
@@ -2519 +2523 @@
-PGM_BTH_DECL(int, PrefetchPage)(PVM pVM, RTGCUINTPTR GCPtrPage)
-{
-
+
+
+
-    /*
-     * Check that all Guest levels thru the PDE are present, getting the
@@ -2596 +2602 @@
-    LogFlow(("VerifyAccessSyncPage: GCPtrPage=%VGv fPage=%#x uErr=%#x\n", GCPtrPage, fPage, uErr));
-
-
+
+
+
-
-# ifndef IN_RING0
@@ -2751 +2759 @@
-PGM_BTH_DECL(int, SyncCR3)(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)
-{
+#if PGM_SHW_TYPE == PGM_TYPE_NESTED
+    /* @todo check if this is really necessary */
+    HWACCMFlushTLB(pVM);
+    return VINF_SUCCESS;
+#else
-    if (VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3))
-        fGlobal = true; /* Change this CR3 reload to be a global one. */
@@ -3111 +3124 @@
-    return VINF_SUCCESS;
-
-
+ 
-//# error not implemented
-    return VERR_INTERNAL_ERROR;
-
+ 
-    return VINF_SUCCESS;
-
+
+
-}
-
@@ -3159 +3173 @@
-PGM_BTH_DECL(unsigned, AssertCR3)(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb)
-{
+#if PGM_SHW_TYPE == PGM_TYPE_NESTED
+    return 0;
+#else
-    unsigned    cErrors = 0;
-
@@ -3768 +3785 @@
-#endif
-    return cErrors;
+
+#endif /* PGM_SHW_TYPE != PGM_TYPE_NESTED */
-}
-#endif /* VBOX_STRICT */

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -255 +255 @@
-    /* Note: CR8 reads will refer to V_TPR, so no need to catch them. */
-    /** @note CR0 & CR4 can be safely read when guest and shadow copies are identical. */
-svm.
+
-        pVMCB->ctrl.u16InterceptRdCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4);
-    else    
@@ -263 +263 @@
-     * CR0/3/4 writes must be intercepted for obvious reasons.
-     */
-svm.
+
-        pVMCB->ctrl.u16InterceptWrCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4) | RT_BIT(8);
-    else
@@ -277 +277 @@
-
-    pVMCB->ctrl.u32InterceptException = HWACCM_SVM_TRAP_MASK;
-svm.
+
-        pVMCB->ctrl.u32InterceptException &= ~RT_BIT(14);   /* no longer need to intercept #PF. */
-
@@ -298 +298 @@
-                                    ;
-    /* With nested paging we don't care about invlpg anymore. */
-svm.
+
-        pVMCB->ctrl.u32InterceptCtrl1 &= ~SVM_CTRL1_INTERCEPT_INVLPG;
-
@@ -595 +595 @@
-        /* Note: WP is not relevant in nested paging mode as we catch accesses on the (host) physical level. */
-        /* Note: In nested paging mode the guest is allowed to run with paging disabled; the guest physical to host physical translation will remain active. */
-svm.
+
-        {
-            val |= X86_CR0_PG;          /* Paging is always enabled; even when the guest is running in real mode or PE without paging. */
@@ -608 +608 @@
-    {
-        /* Save our shadow CR3 register. */
-svm.
+
-        {
-            pVMCB->ctrl.u64NestedPagingCR3  = PGMGetHyperCR3(pVM);
@@ -620 +620 @@
-    {
-        val = pCtx->cr4;
-svm.
+
-        {
-            switch(pVM->hwaccm.s.enmShadowMode)
@@ -729 +729 @@
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatEntry, x);
-
-svm.
+
-    AssertReturn(pCpu->fSVMConfigured, VERR_EM_INTERNAL_ERROR);
-
@@ -814 +814 @@
-
-    /* Enable nested paging if necessary (disabled each time after #VMEXIT). */
-svm.
+
-
-    /* Force a TLB flush for the first world switch if the current cpu differs from the one we ran on last. */
@@ -1039 +1039 @@
-    /* Note: no reason to sync back the CRx and DRx registers. They can't be changed by the guest. */
-    /* Note: only in the nested paging case can CR3 & CR4 be changed by the guest. */ 
-svm.
+
-    {
-        CPUMSetGuestCR3(pVM, pVMCB->guest.u64CR3);
@@ -1145 +1145 @@
-            RTGCUINTPTR uFaultAddress  = pVMCB->ctrl.u64ExitInfo2;     /* EXITINFO2 = fault address */
-
-svm.
+
-
-            Log2(("Page fault at %VGv cr2=%VGv error code %x\n", pCtx->eip, uFaultAddress, errCode));
@@ -1283 +1283 @@
-        RTGCPHYS    uFaultAddress  = pVMCB->ctrl.u64ExitInfo2;     /* EXITINFO2 = fault address */
-
-svm.
+
-
-        Log2(("Page fault at %VGp cr2=%VGv error code %x\n", pCtx->eip, uFaultAddress, errCode));
@@ -1379 +1379 @@
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitInvpg);
-
-svm.
+
-
-        /* Truly a pita. Why can't SVM give the same information as VMX? */
@@ -1410 +1410 @@
-            break;
-        case 3:
-svm.
+
-            pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR3;
-            break;
-        case 4:
-svm.
+
-            pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR4;
-            break;