Changeset 8900
- Timestamp:
- 05/16/08 17:18:42 (4 months ago)
- Files:
-
- trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp (modified) (3 diffs)
Legend:
- Unmodified
- Added
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trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r8881 r8900 252 252 /* Program the control fields. Most of them never have to be changed again. */ 253 253 /* CR0/3/4 reads must be intercepted, our shadow values are not necessarily the same as the guest's. */ 254 /* Note: CR8 reads will refer to V_TPR, so no need to catch them. */ 254 255 /** @note CR0 & CR4 can be safely read when guest and shadow copies are identical. */ 255 pVMCB->ctrl.u16InterceptRdCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4) | RT_BIT(8);256 pVMCB->ctrl.u16InterceptRdCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4); 256 257 257 258 /* … … 276 277 | SVM_CTRL1_INTERCEPT_SMI 277 278 | SVM_CTRL1_INTERCEPT_INIT 278 | SVM_CTRL1_INTERCEPT_CR0 /** @todo redundant? */279 279 | SVM_CTRL1_INTERCEPT_RDPMC 280 280 | SVM_CTRL1_INTERCEPT_CPUID … … 303 303 Log(("pVMCB->ctrl.u32InterceptCtrl2 = %x\n", pVMCB->ctrl.u32InterceptCtrl2)); 304 304 305 /* Virtualize masking of INTR interrupts. */305 /* Virtualize masking of INTR interrupts. (reads/writes from/to CR8 go to the V_TPR register) */ 306 306 pVMCB->ctrl.IntCtrl.n.u1VIrqMasking = 1; 307 307

