Changeset 8876

Timestamp:

05/16/08 11:59:07 (4 months ago)

Author:

vboxsync

Message:

ASID based TLB flushing

Files:

• trunk/src/VBox/VMM/HWACCM.cpp (modified) (1 diff)
• trunk/src/VBox/VMM/HWACCMInternal.h (modified) (3 diffs)
• trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp (modified) (7 diffs)
• trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp (modified) (11 diffs)
• trunk/src/VBox/VMM/VMMR0/HWSVMR0.h (modified) (3 diffs)
• trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp (modified) (7 diffs)
• trunk/src/VBox/VMM/VMMR0/HWVMXR0.h (modified) (3 diffs)

trunk/src/VBox/VMM/HWACCM.cpp

@@ -156 +156 @@
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushTLBWorldSwitch,   STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/Switch",  STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatNoFlushTLBWorldSwitch, STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/Skipped", STAMUNIT_OCCURENCES,    "Nr of occurances");
+    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushASID,             STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/ASID",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-
-    pVM->hwaccm.s.pStatExitReason = 0;

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -31 +31 @@
-#include <VBox/pgm.h>
-#include <iprt/memobj.h>
+#include <iprt/cpuset.h>
+#include <iprt/mp.h>
-
-__BEGIN_DECLS
@@ -317 +319 @@
-    STAMCOUNTER             StatNoFlushTLBWorldSwitch;
-    STAMCOUNTER             StatFlushTLBCRxChange;
+    STAMCOUNTER             StatFlushASID;
-
-    STAMCOUNTER             StatSwitchGuestIrq;
@@ -327 +330 @@
-typedef HWACCM *PHWACCM;
-
+static struct
+{
+    struct
+    {
+        RTR0MEMOBJ  pMemObj;
+        bool        fVMXConfigured;
+        bool        fSVMConfigured;
+    } aCpuInfo[RTCPUSET_MAX_CPUS];
+
+    struct
+    {
+        /** Set by the ring-0 driver to indicate VMX is supported by the CPU. */
+        bool                        fSupported;
+
+        /** Host CR4 value (set by ring-0 VMX init) */
+        uint64_t                    hostCR4;
+
+        /** VMX MSR values */
+        struct
+        {
+            uint64_t                feature_ctrl;
+            uint64_t                vmx_basic_info;
+            uint64_t                vmx_pin_ctls;
+            uint64_t                vmx_proc_ctls;
+            uint64_t                vmx_exit;
+            uint64_t                vmx_entry;
+            uint64_t                vmx_misc;
+            uint64_t                vmx_cr0_fixed0;
+            uint64_t                vmx_cr0_fixed1;
+            uint64_t                vmx_cr4_fixed0;
+            uint64_t                vmx_cr4_fixed1;
+            uint64_t                vmx_vmcs_enum;
+        } msr;
+        /* Last instruction error */
+        uint32_t                    ulLastInstrError;
+    } vmx;
+    struct
+    {
+        /** Set by the ring-0 driver to indicate SVM is supported by the CPU. */
+        bool                        fSupported;
+
+        /** SVM revision. */
+        uint32_t                    u32Rev;
+
+        /** Maximum ASID allowed. */
+        uint32_t                    u32MaxASID;
+
+        /** SVM feature bits from cpuid 0x8000000a */
+        uint32_t                    u32Features;
+    } svm;
+    /** Saved error from detection */
+    int32_t         lLastError;
+
+    struct
+    {
+        uint32_t                    u32AMDFeatureECX;
+        uint32_t                    u32AMDFeatureEDX;
+    } cpuid;
+
+    HWACCMSTATE     enmHwAccmState;
+} HWACCMR0GLOBALS;
+
+typedef struct
+{
+    RTCPUID     idCpu;
+
+    RTR0MEMOBJ  pMemObj;
+    /* Current ASID (AMD-V only) */
+    uint32_t    uCurrentASID;
+
+    bool        fVMXConfigured;
+    bool        fSVMConfigured;
+} HWACCM_CPUINFO;
+typedef HWACCM_CPUINFO *PHWACCM_CPUINFO;
-
-#ifdef IN_RING0

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -57 +57 @@
-*   Local Variables                                                            *
-*******************************************************************************/
+
-static struct
-{
-
-
-
-
-
-
+
-
-    struct
@@ -536 +532 @@
-    if (pVM->hwaccm.s.vmx.fSupported)
-    {
-idCpu
+&HWACCMR0Globals.aCpuInfo[idCpu]
-        AssertRC(paRc[idCpu]);
-        if (VBOX_SUCCESS(paRc[idCpu]))
@@ -544 +540 @@
-    if (pVM->hwaccm.s.svm.fSupported)
-    {
-idCpu
+&HWACCMR0Globals.aCpuInfo[idCpu]
-        AssertRC(paRc[idCpu]);
-        if (VBOX_SUCCESS(paRc[idCpu]))
@@ -577 +573 @@
-    if (HWACCMR0Globals.aCpuInfo[idCpu].fVMXConfigured)
-    {
-idCpu
+&HWACCMR0Globals.aCpuInfo[idCpu]
-        AssertRC(paRc[idCpu]);
-        HWACCMR0Globals.aCpuInfo[idCpu].fVMXConfigured = false;
@@ -584 +580 @@
-    if (HWACCMR0Globals.aCpuInfo[idCpu].fSVMConfigured)
-    {
-idCpu
+&HWACCMR0Globals.aCpuInfo[idCpu]
-        AssertRC(paRc[idCpu]);
-        HWACCMR0Globals.aCpuInfo[idCpu].fSVMConfigured = false;
@@ -797 +793 @@
-    CPUMCTX *pCtx;
-    int      rc;
+    RTCPUID  idCpu = RTMpCpuId();
-
-    rc = CPUMQueryGuestCtxPtr(pVM, &pCtx);
@@ -804 +801 @@
-    if (pVM->hwaccm.s.vmx.fSupported)
-    {
-
+, &HWACCMR0Globals.aCpuInfo[idCpu]
-    }
-    else
-    {
-        Assert(pVM->hwaccm.s.svm.fSupported);
-
+, &HWACCMR0Globals.aCpuInfo[idCpu]
-    }
-}

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -42 +42 @@
-#include <iprt/assert.h>
-#include <iprt/asm.h>
+#include <iprt/cpuset.h>
+#include <iprt/mp.h>
-#include "HWSVMR0.h"
-
@@ -50 +52 @@
- *
- * @returns VBox status code.
-idCpu           The identifier for the CPU the function is called on.
+pCpu            CPU info struct
- * @param   pVM             The VM to operate on.
- * @param   pvPageCpu       Pointer to the global cpu page
- * @param   pPageCpuPhys    Physical address of the global cpu page
- */
-RTCPUID id
+PHWACCM_CPUINFO p
-{
-    AssertReturn(pPageCpuPhys, VERR_INVALID_PARAMETER);
@@ -63 +65 @@
-    /* We must turn on AMD-V and setup the host state physical address, as those MSRs are per-cpu/core. */
-
+#ifdef LOG_ENABLED
+    SUPR0Printf("SVMR0EnableCpu cpu %d page (%x) %x\n", pCpu->idCpu, pvPageCpu, (uint32_t)pPageCpuPhys);
+#endif
+
-    /* Turn on AMD-V in the EFER MSR. */
-    uint64_t val = ASMRdMsr(MSR_K6_EFER);
@@ -70 +76 @@
-    /* Write the physical page address where the CPU will store the host state while executing the VM. */
-    ASMWrMsr(MSR_K8_VM_HSAVE_PA, pPageCpuPhys);
+
+    pCpu->uCurrentASID = 0;   /* we'll aways increment this the first time (host uses ASID 0) */
-    return VINF_SUCCESS;
-}
@@ -77 +85 @@
- *
- * @returns VBox status code.
-idCpu           The identifier for the CPU the function is called on.
+pCpu            CPU info struct
- * @param   pvPageCpu       Pointer to the global cpu page
- * @param   pPageCpuPhys    Physical address of the global cpu page
- */
-RTCPUID id
+PHWACCM_CPUINFO p
-{
-    AssertReturn(pPageCpuPhys, VERR_INVALID_PARAMETER);
-    AssertReturn(pvPageCpu, VERR_INVALID_PARAMETER);
-
+#ifdef LOG_ENABLED
+    SUPR0Printf("SVMR0DisableCpu cpu %d\n", pCpu->idCpu);
+#endif
+
-    /* Turn off AMD-V in the EFER MSR. */
-    uint64_t val = ASMRdMsr(MSR_K6_EFER);
@@ -92 +104 @@
-    /* Invalidate host state physical address. */
-    ASMWrMsr(MSR_K8_VM_HSAVE_PA, 0);
+    pCpu->uCurrentASID = 0;
+
-    return VINF_SUCCESS;
-}
@@ -301 +315 @@
-    pVMCB->ctrl.u64LBRVirt      = 0;
-
+    /** The ASID must start at 1; the host uses 0. */
+    pVMCB->ctrl.TLBCtrl.n.u32ASID = 1;
+
-    return rc;
-}
@@ -638 +655 @@
-    pVMCB->guest.u64EFER   = MSR_K6_EFER_SVME;
-
-    /** @note We can do more complex things with tagged TLBs. */
-    pVMCB->ctrl.TLBCtrl.n.u32ASID = 1;
-
-    /** TSC offset. */
-    if (TMCpuTickCanUseRealTSC(pVM, &pVMCB->ctrl.u64TSCOffset))
@@ -678 +692 @@
- * @param   pVM         The VM to operate on.
- * @param   pCtx        Guest context
+ * @param   pCpu        CPU info struct
- */
-
+, PHWACCM_CPUINFO pCpu
-{
-    int         rc = VINF_SUCCESS;
@@ -688 +703 @@
-
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatEntry, x);
+
+    AssertReturn(pCpu->fSVMConfigured, VERR_EM_INTERNAL_ERROR);
-
-    pVMCB = (SVM_VMCB *)pVM->hwaccm.s.svm.pVMCB;
@@ -771 +788 @@
-
-    /* Make sure we flush the TLB when required. */
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-#ifdef VBOX_WITH_STATISTICS
-    if (pVMCB->ctrl.TLBCtrl.n.u1TLBFlush)

trunk/src/VBox/VMM/VMMR0/HWSVMR0.h

@@ -62 +62 @@
- *
- * @returns VBox status code.
-idCpu           The identifier for the CPU the function is called on.
+pCpu            CPU info struct
- * @param   pVM             The VM to operate on.
- * @param   pvPageCpu       Pointer to the global cpu page
- * @param   pPageCpuPhys    Physical address of the global cpu page
- */
-RTCPUID id
+PHWACCM_CPUINFO p
-
-/**
@@ -73 +73 @@
- *
- * @returns VBox status code.
-idCpu           The identifier for the CPU the function is called on.
+pCpu            CPU info struct
- * @param   pvPageCpu       Pointer to the global cpu page
- * @param   pPageCpuPhys    Physical address of the global cpu page
- */
-RTCPUID id
+PHWACCM_CPUINFO p
-
-/**
@@ -112 +112 @@
- * @param   pVM         The VM to operate on.
- * @param   pCtx        Guest context
+ * @param   pCpu        CPU info struct
- */
-
+, PHWACCM_CPUINFO pCpu
-
-

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -63 +63 @@
- *
- * @returns VBox status code.
-idCpu           The identifier for the CPU the function is called on.
+pCpu            CPU info struct
- * @param   pVM             The VM to operate on.
- * @param   pvPageCpu       Pointer to the global cpu page
- * @param   pPageCpuPhys    Physical address of the global cpu page
- */
-RTCPUID id
+PHWACCM_CPUINFO p
-{
-    AssertReturn(pPageCpuPhys, VERR_INVALID_PARAMETER);
@@ -78 +78 @@
-
-#ifdef LOG_ENABLED
-
+pCpu->
-#endif
-    /* Set revision dword at the beginning of the VMXON structure. */
@@ -105 +105 @@
- *
- * @returns VBox status code.
-idCpu           The identifier for the CPU the function is called on.
+pCpu            CPU info struct
- * @param   pvPageCpu       Pointer to the global cpu page
- * @param   pPageCpuPhys    Physical address of the global cpu page
- */
-RTCPUID id
+PHWACCM_CPUINFO p
-{
-    AssertReturn(pPageCpuPhys, VERR_INVALID_PARAMETER);
@@ -121 +121 @@
-
-#ifdef LOG_ENABLED
-
+pCpu->
-#endif
-    return VINF_SUCCESS;
@@ -963 +963 @@
-
-/**
-MX
+T-x
- *
- * @note NEVER EVER turn on interrupts here. Due to our illegal entry into the kernel, it might mess things up. (XP kernel traps have been frequently observed)
@@ -970 +970 @@
- * @param   pVM         The VM to operate on.
- * @param   pCtx        Guest context
+ * @param   pCpu        CPU info struct
- */
-
+, PHWACCM_CPUINFO pCpu
-{
-    int         rc = VINF_SUCCESS;
@@ -983 +984 @@
-
-    Log2(("\nE"));
+
+    AssertReturn(pCpu->fVMXConfigured, VERR_EM_INTERNAL_ERROR);
-
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatEntry, x);

trunk/src/VBox/VMM/VMMR0/HWVMXR0.h

@@ -63 +63 @@
- *
- * @returns VBox status code.
-idCpu           The identifier for the CPU the function is called on.
+pCpu            CPU info struct
- * @param   pVM             The VM to operate on.
- * @param   pvPageCpu       Pointer to the global cpu page
- * @param   pPageCpuPhys    Physical address of the global cpu page
- */
-RTCPUID id
+PHWACCM_CPUINFO p
-
-/**
@@ -74 +74 @@
- *
- * @returns VBox status code.
-idCpu           The identifier for the CPU the function is called on.
+pCpu            CPU info struct
- * @param   pvPageCpu       Pointer to the global cpu page
- * @param   pPageCpuPhys    Physical address of the global cpu page
- */
-RTCPUID id
+PHWACCM_CPUINFO p
-
-/**
@@ -131 +131 @@
- * @param   pVM         The VM to operate on.
- * @param   pCtx        Guest context
+ * @param   pCpu        CPU info struct
- */
-
+, PHWACCM_CPUINFO pCpu
-
-