Changeset 8564

Timestamp:

05/05/08 13:50:50 (8 months ago)

Author:

vboxsync

Message:

NoDmik? -> NOT_DMIK.

Files:

• trunk/include/VBox/cdefs.h (modified) (1 diff)
• trunk/src/VBox/VMM/CFGM.cpp (modified) (1 diff)
• trunk/src/VBox/VMM/PDMDevice.cpp (modified) (1 diff)
• trunk/src/VBox/VMM/VM.cpp (modified) (1 diff)
• trunk/src/recompiler/target-i386/helper.c (modified) (129 diffs)

trunk/include/VBox/cdefs.h

@@ -1384 +1384 @@
-
-/** @def NoDmik(expr)
- 
- 
+
+
- * @param expr  Expression to guard.
- * @todo r=bird: please rename to NO_DMIK or NOT_DMIK.
- */
-#if defined(DEBUG_dmik)
-oDmik(expr)
-
-oDmik(expr)
-
-
-
-
-
+OT_DMIK(expr)    
+
+OT_DMIK(expr)    
+
+
+
+
+

trunk/src/VBox/VMM/CFGM.cpp

@@ -143 +143 @@
-    }
-    else
-oDmik
+OT_DMIK
-
-    return rc;

trunk/src/VBox/VMM/PDMDevice.cpp

@@ -942 +942 @@
-        if (VBOX_FAILURE(rc))
-        {
-oDmik
+OT_DMIK
-            /* because we're damn lazy right now, we'll say that the destructor will be called even if the constructor fails. */
-            return rc;

trunk/src/VBox/VMM/VM.cpp

@@ -241 +241 @@
-                default:
-                    pszError = N_("Unknown error creating VM");
-oDmik
+OT_DMIK
-                    break;
-            }

trunk/src/recompiler/target-i386/helper.c

@@ -1 +1 @@
-/*
- *  i386 helpers
- 
+
- *  Copyright (c) 2003 Fabrice Bellard
- *
@@ -71 +71 @@
-/* modulo 17 table */
-const uint8_t rclw_table[32] = {
- 
+
-    8, 9,10,11,12,13,14,15,
-   16, 0, 1, 2, 3, 4, 5, 6,
@@ -79 +79 @@
-/* modulo 9 table */
-const uint8_t rclb_table[32] = {
- 
+
-    8, 0, 1, 2, 3, 4, 5, 6,
- 
+
-    6, 7, 8, 0, 1, 2, 3, 4,
-};
@@ -95 +95 @@
-    3.32192809488736234781L,  /*l2t*/
-};
-
+
-/* thread support */
-
@@ -138 +138 @@
-    return 0;
-}
-
+
-static inline unsigned int get_seg_limit(uint32_t e1, uint32_t e2)
-{
@@ -164 +164 @@
-{
-    selector &= 0xffff;
- 
+
-                           (selector << 4), 0xffff, 0);
-}
-
- 
+
-                                       uint32_t *esp_ptr, int dpl)
-{
-    int type, index, shift;
-
+
-#if 0
-    {
@@ -243 +243 @@
-        if (!(e2 & DESC_P_MASK))
-            raise_exception_err(EXCP0B_NOSEG, selector & 0xfffc);
- 
+
-                       get_seg_base(e1, e2),
-                       get_seg_limit(e1, e2),
-                       e2);
-    } else {
- 
+
-            raise_exception_err(EXCP0A_TSS, selector & 0xfffc);
-    }
@@ -258 +258 @@
-
-/* XXX: restore CPU state in registers (PowerPC case) */
- 
+
-                       uint32_t e1, uint32_t e2, int source,
-                       uint32_t next_eip)
@@ -306 +306 @@
-    tss_limit = get_seg_limit(e1, e2);
-    tss_base = get_seg_base(e1, e2);
- 
+
-        tss_limit < tss_limit_max)
-        raise_exception_err(EXCP0A_TSS, tss_selector & 0xfffc);
@@ -341 +341 @@
-        new_trap = 0;
-    }
-
+
-    /* NOTE: we must avoid memory exceptions during the task switch,
-       so we make dummy accesses before */
@@ -351 +351 @@
-    stb_kernel(env->tr.base, v1);
-    stb_kernel(env->tr.base + old_tss_limit_max, v2);
-
+
-    /* clear busy bit (it is restartable) */
-    if (source == SWITCH_TSS_JMP || source == SWITCH_TSS_IRET) {
@@ -364 +364 @@
-    if (source == SWITCH_TSS_IRET)
-        old_eflags &= ~NT_MASK;
-
+
-    /* save the current state in the old TSS */
-    if (type & 8) {
@@ -399 +399 @@
-            stw_kernel(env->tr.base + (0x22 + i * 4), env->segs[i].selector);
-    }
-
+
-    /* now if an exception occurs, it will occurs in the next task
-       context */
@@ -426 +426 @@
-    env->tr.limit = tss_limit;
-    env->tr.flags = e2 & ~DESC_TSS_BUSY_MASK;
-
+
-    if ((type & 8) && (env->cr[0] & CR0_PG_MASK)) {
-        cpu_x86_update_cr3(env, new_cr3);
-    }
-
+
-    /* load all registers without an exception, then reload them with
-       possible exception */
-    env->eip = new_eip;
- 
+
-        IF_MASK | IOPL_MASK | VM_MASK | RF_MASK | NT_MASK;
-    if (!(type & 8))
@@ -449 +449 @@
-    EDI = new_regs[7];
-    if (new_eflags & VM_MASK) {
- 
+
-            load_seg_vm(i, new_segs[i]);
-        /* in vm86, CPL is always 3 */
@@ -460 +460 @@
-            cpu_x86_load_seg_cache(env, i, new_segs[i], 0, 0, 0);
-    }
-
+
-    env->ldt.selector = new_ldt & ~4;
-    env->ldt.base = 0;
@@ -484 +484 @@
-        load_seg_cache_raw_dt(&env->ldt, e1, e2);
-    }
-
+
-    /* load the segments */
-    if (!(new_eflags & VM_MASK)) {
@@ -494 +494 @@
-        tss_load_seg(R_GS, new_segs[R_GS]);
-    }
-
+
-    /* check that EIP is in the CS segment limits */
-    if (new_eip > env->segs[R_CS].limit) {
@@ -506 +506 @@
-{
-    int io_offset, val, mask;
-
+
-    /* TSS must be a valid 32 bit one */
-    if (!(env->tr.flags & DESC_P_MASK) ||
@@ -792 +792 @@
-        }
-    }
-
+
-    if (new_stack) {
-        if (env->eflags & VM_MASK) {
@@ -801 +801 @@
-        }
-        ss = (ss & ~3) | dpl;
- 
+
-                               ssp, get_seg_limit(ss_e1, ss_e2), ss_e2);
-    }
@@ -807 +807 @@
-
-    selector = (selector & ~3) | dpl;
- 
+
-                   get_seg_base(e1, e2),
-                   get_seg_limit(e1, e2),
@@ -828 +828 @@
-    int io_offset, intredir_offset;
-    unsigned char val, mask;
-
+
-    /* TSS must be a valid 32 bit one */
-    if (!(env->tr.flags & DESC_P_MASK) ||
@@ -837 +837 @@
-    /* the virtual interrupt redirection bitmap is located below the io bitmap */
-    intredir_offset = io_offset - 0x20;
-
+
-    intredir_offset += (intno >> 3);
-    if ((intredir_offset) > env->tr.limit)
@@ -900 +900 @@
-    PUSHW(ssp, esp, 0xffff, old_cs);
-    PUSHW(ssp, esp, 0xffff, next_eip);
-
+
-    /* update processor state */
-    ESP = (ESP & ~0xffff) | (esp & 0xffff);
@@ -932 +932 @@
-{
-    int index;
-
+
-#if 0
- 
+
-           env->tr.base, env->tr.limit);
-#endif
@@ -1052 +1052 @@
-        PUSHQ(esp, error_code);
-    }
-
+
-    if (new_stack) {
-        ss = 0 | dpl;
@@ -1060 +1060 @@
-
-    selector = (selector & ~3) | dpl;
- 
+
-                   get_seg_base(e1, e2),
-                   get_seg_limit(e1, e2),
@@ -1089 +1089 @@
-        ECX = env->eip + next_eip_addend;
-        env->regs[11] = compute_eflags();
-
+
-        code64 = env->hflags & HF_CS64_MASK;
-
-        cpu_x86_set_cpl(env, 0);
- 
- 
+
+
-                               DESC_G_MASK | DESC_P_MASK |
-                               DESC_S_MASK |
-                               DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK | DESC_L_MASK);
- 
+
-                               0, 0xffffffff,
-                               DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
@@ -1108 +1108 @@
-        else
-            env->eip = env->cstar;
- 
+
-#endif
-    {
-        ECX = (uint32_t)(env->eip + next_eip_addend);
-
+
-        cpu_x86_set_cpl(env, 0);
- 
- 
+
+
-                               DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
-                               DESC_S_MASK |
-                               DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK);
- 
+
-                               0, 0xffffffff,
-                               DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
@@ -1144 +1144 @@
-    if (env->hflags & HF_LMA_MASK) {
-        if (dflag == 2) {
- 
- 
+
+
-                                   DESC_G_MASK | DESC_P_MASK |
-                                   DESC_S_MASK | (3 << DESC_DPL_SHIFT) |
- 
+
-                                   DESC_L_MASK);
-            env->eip = ECX;
-        } else {
- 
- 
+
+
-                                   DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
-                                   DESC_S_MASK | (3 << DESC_DPL_SHIFT) |
@@ -1159 +1159 @@
-            env->eip = (uint32_t)ECX;
-        }
- 
+
-                               0, 0xffffffff,
-                               DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
-                               DESC_S_MASK | (3 << DESC_DPL_SHIFT) |
-                               DESC_W_MASK | DESC_A_MASK);
- 
+
-                    IF_MASK | IOPL_MASK | VM_MASK | RF_MASK | NT_MASK);
-        cpu_x86_set_cpl(env, 3);
- 
+
-#endif
-    {
- 
- 
+
+
-                               DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
-                               DESC_S_MASK | (3 << DESC_DPL_SHIFT) |
-                               DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK);
-        env->eip = (uint32_t)ECX;
- 
+
-                               0, 0xffffffff,
-                               DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
@@ -1196 +1196 @@
-#ifdef VBOX
-/**
- 
+
- * Called by op_check_external_event() when any of the flags is set and can be serviced.
- */
@@ -1265 +1265 @@
-    PUSHW(ssp, esp, 0xffff, old_cs);
-    PUSHW(ssp, esp, 0xffff, old_eip);
-
+
-    /* update processor state */
-    ESP = (ESP & ~0xffff) | (esp & 0xffff);
@@ -1275 +1275 @@
-
-/* fake user mode interrupt */
- 
+
-                       target_ulong next_eip)
-{
@@ -1286 +1286 @@
-    ptr = dt->base + (intno * 8);
-    e2 = ldl_kernel(ptr + 4);
-
+
-    dpl = (e2 >> DESC_DPL_SHIFT) & 3;
-    cpl = env->hflags & HF_CPL_MASK;
@@ -1303 +1303 @@
- * Begin execution of an interruption. is_int is TRUE if coming from
- * the int instruction. next_eip is the EIP value AFTER the interrupt
-  
+
- */
- 
+
-                  target_ulong next_eip, int is_hw)
-{
@@ -1348 +1348 @@
-#ifdef VBOX
-            /* int xx *, v86 code and VME enabled? */
- 
+
-                &&  (env->cr[4] & CR4_VME_MASK)
-                &&  is_int
@@ -1368 +1368 @@
- * is_int is TRUE if coming from the int instruction. next_eip is the
- * EIP value AFTER the interrupt instruction. It is only relevant if
-  
+
- */
- 
+
-                     int next_eip_addend)
-{
-#if defined(VBOX) && defined(DEBUG)
-oDmik
+OT_DMIK
-#endif
-    env->exception_index = intno;
@@ -1407 +1407 @@
-/* SMM support */
-
- 
+
-
-void do_smm_enter(void)
@@ -1427 +1427 @@
-void do_smm_enter(void)
-{
- 
+
-    cpu_abort(env, "do_ssm_enter");
-#else /* !VBOX */
@@ -1443 +1443 @@
-
-    sm_state = env->smbase + 0x8000;
-
+
-#ifdef TARGET_X86_64
-    for(i = 0; i < 6; i++) {
@@ -1461 +1461 @@
-    stl_phys(sm_state + 0x7e74, env->ldt.limit);
-    stw_phys(sm_state + 0x7e72, (env->ldt.flags >> 8) & 0xf0ff);
-
+
-    stq_phys(sm_state + 0x7e88, env->idt.base);
-    stl_phys(sm_state + 0x7e84, env->idt.limit);
@@ -1469 +1469 @@
-    stl_phys(sm_state + 0x7e94, env->tr.limit);
-    stw_phys(sm_state + 0x7e92, (env->tr.flags >> 8) & 0xf0ff);
-
+
-    stq_phys(sm_state + 0x7ed0, env->efer);
-
@@ -1480 +1480 @@
-    stq_phys(sm_state + 0x7fc8, ESI);
-    stq_phys(sm_state + 0x7fc0, EDI);
- 
+
-        stq_phys(sm_state + 0x7ff8 - i * 8, env->regs[i]);
-    stq_phys(sm_state + 0x7f78, env->eip);
@@ -1508 +1508 @@
-    stl_phys(sm_state + 0x7fcc, env->dr[6]);
-    stl_phys(sm_state + 0x7fc8, env->dr[7]);
-
+
-    stl_phys(sm_state + 0x7fc4, env->tr.selector);
-    stl_phys(sm_state + 0x7f64, env->tr.base);
-    stl_phys(sm_state + 0x7f60, env->tr.limit);
-    stl_phys(sm_state + 0x7f5c, (env->tr.flags >> 8) & 0xf0ff);
-
+
-    stl_phys(sm_state + 0x7fc0, env->ldt.selector);
-    stl_phys(sm_state + 0x7f80, env->ldt.base);
-    stl_phys(sm_state + 0x7f7c, env->ldt.limit);
-    stl_phys(sm_state + 0x7f78, (env->ldt.flags >> 8) & 0xf0ff);
-
+
-    stl_phys(sm_state + 0x7f74, env->gdt.base);
-    stl_phys(sm_state + 0x7f70, env->gdt.limit);
@@ -1556 +1556 @@
-    cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffffffff, 0);
-    cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffffffff, 0);
-
- 
+
+
-                       env->cr[0] & ~(CR0_PE_MASK | CR0_EM_MASK | CR0_TS_MASK | CR0_PG_MASK));
-    cpu_x86_update_cr4(env, 0);
@@ -1584 +1584 @@
-    for(i = 0; i < 6; i++) {
-        offset = 0x7e00 + i * 16;
- 
+
-                               lduw_phys(sm_state + offset),
-                               ldq_phys(sm_state + offset + 8),
@@ -1598 +1598 @@
-    env->ldt.limit = ldl_phys(sm_state + 0x7e74);
-    env->ldt.flags = (lduw_phys(sm_state + 0x7e72) & 0xf0ff) << 8;
-
+
-    env->idt.base = ldq_phys(sm_state + 0x7e88);
-    env->idt.limit = ldl_phys(sm_state + 0x7e84);
@@ -1606 +1606 @@
-    env->tr.limit = ldl_phys(sm_state + 0x7e94);
-    env->tr.flags = (lduw_phys(sm_state + 0x7e92) & 0xf0ff) << 8;
-
+
-    EAX = ldq_phys(sm_state + 0x7ff8);
-    ECX = ldq_phys(sm_state + 0x7ff0);
@@ -1615 +1615 @@
-    ESI = ldq_phys(sm_state + 0x7fc8);
-    EDI = ldq_phys(sm_state + 0x7fc0);
- 
+
-        env->regs[i] = ldq_phys(sm_state + 0x7ff8 - i * 8);
-    env->eip = ldq_phys(sm_state + 0x7f78);
- 
+
-                ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
-    env->dr[6] = ldl_phys(sm_state + 0x7f68);
@@ -1634 +1634 @@
-    cpu_x86_update_cr0(env, ldl_phys(sm_state + 0x7ffc));
-    cpu_x86_update_cr3(env, ldl_phys(sm_state + 0x7ff8));
- 
+
-                ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
-    env->eip = ldl_phys(sm_state + 0x7ff0);
@@ -1647 +1647 @@
-    env->dr[6] = ldl_phys(sm_state + 0x7fcc);
-    env->dr[7] = ldl_phys(sm_state + 0x7fc8);
-
+
-    env->tr.selector = ldl_phys(sm_state + 0x7fc4) & 0xffff;
-    env->tr.base = ldl_phys(sm_state + 0x7f64);
-    env->tr.limit = ldl_phys(sm_state + 0x7f60);
-    env->tr.flags = (ldl_phys(sm_state + 0x7f5c) & 0xf0ff) << 8;
-
+
-    env->ldt.selector = ldl_phys(sm_state + 0x7fc0) & 0xffff;
-    env->ldt.base = ldl_phys(sm_state + 0x7f80);
-    env->ldt.limit = ldl_phys(sm_state + 0x7f7c);
-    env->ldt.flags = (ldl_phys(sm_state + 0x7f78) & 0xf0ff) << 8;
-
+
-    env->gdt.base = ldl_phys(sm_state + 0x7f74);
-    env->gdt.limit = ldl_phys(sm_state + 0x7f70);
@@ -1669 +1669 @@
-        else
-            offset = 0x7f2c + (i - 3) * 12;
- 
+
-                               ldl_phys(sm_state + 0x7fa8 + i * 4) & 0xffff,
-                               ldl_phys(sm_state + offset + 8),
@@ -1716 +1716 @@
-    unsigned int den, r;
-    uint64_t num, q;
-
+
-    num = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32);
-    den = T0;
@@ -1738 +1738 @@
-    int den, r;
-    int64_t num, q;
-
+
-    num = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32);
-    den = T0;
@@ -1785 +1785 @@
-    uint32_t index;
-    index = (uint32_t)EAX;
-
+
-    /* test if maximum index reached */
-    if (index & 0x80000000) {
- 
+
-            index = env->cpuid_level;
-    } else {
- 
+
-            index = env->cpuid_level;
-    }
-
+
-    switch(index) {
-    case 0:
@@ -1940 +1940 @@
-    target_ulong ptr;
-#ifdef VBOX
- 
+
-         (RTSEL)env->ldt.selector, (RTGCPTR)env->ldt.base, (RTGCPTR)env->ldt.limit, (RTSEL)(T0 & 0xffff)));
- 
-
+
+
-    selector = T0 & 0xffff;
-    if ((selector & 0xfffc) == 0) {
@@ -1958 +1958 @@
-            entry_limit = 15;
-        else
-            
+
-            entry_limit = 7;
-        if ((index + entry_limit) > dt->limit)
@@ -1983 +1983 @@
-    env->ldt.selector = selector;
-#ifdef VBOX
- 
+
-         (RTSEL)env->ldt.selector, (RTGCPTR)env->ldt.base, (RTGCPTR)env->ldt.limit));
- 
+
-}
-
@@ -1995 +1995 @@
-    int index, type, entry_limit;
-    target_ulong ptr;
-
+
-#ifdef VBOX
- 
- 
+
+
-         env->tr.flags, (RTSEL)(T0 & 0xffff)));
- 
+
-
-    selector = T0 & 0xffff;
@@ -2017 +2017 @@
-            entry_limit = 15;
-        else
-            
+
-            entry_limit = 7;
-        if ((index + entry_limit) > dt->limit)
@@ -2025 +2025 @@
-        e2 = ldl_kernel(ptr + 4);
-        type = (e2 >> DESC_TYPE_SHIFT) & 0xf;
- 
+
-            (type != 1 && type != 9))
-            raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
@@ -2036 +2036 @@
-            load_seg_cache_raw_dt(&env->tr, e1, e2);
-            env->tr.base |= (target_ulong)e3 << 32;
- 
+
-#endif
-        {
@@ -2046 +2046 @@
-    env->tr.selector = selector;
-#ifdef VBOX
- 
- 
+
+
-         env->tr.flags, (RTSEL)(T0 & 0xffff)));
- 
+
-}
-
@@ -2066 +2066 @@
-#ifdef VBOX
-    /* Trying to load a selector with CPL=1? */
- 
+
-    {
-        Log(("RPL 1 -> sel %04X -> %04X\n", selector, selector & 0xfffc));
@@ -2083 +2083 @@
-        cpu_x86_load_seg_cache(env, seg_reg, selector, 0, 0, 0);
-    } else {
-
+
-        if (selector & 0x4)
-            dt = &env->ldt;
@@ -2094 +2094 @@
-        e1 = ldl_kernel(ptr);
-        e2 = ldl_kernel(ptr + 4);
-
+
-        if (!(e2 & DESC_S_MASK))
-            raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
@@ -2109 +2109 @@
-            if ((e2 & (DESC_CS_MASK | DESC_R_MASK)) == DESC_CS_MASK)
-                raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
-
+
-            if (!(e2 & DESC_CS_MASK) || !(e2 & DESC_C_MASK)) {
-                /* if not conforming code, test rights */
- 
+
-                    raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
-            }
@@ -2130 +2130 @@
-        }
-
- 
+
-                       get_seg_base(e1, e2),
-                       get_seg_limit(e1, e2),
-                       e2);
-#if 0
- 
+
-                selector, (unsigned long)sc->base, sc->limit, sc->flags);
-#endif
@@ -2147 +2147 @@
-    uint32_t e1, e2, cpl, dpl, rpl, limit;
-    target_ulong new_eip, next_eip;
-
+
-    new_cs = T0;
-    new_eip = T1;
@@ -2174 +2174 @@
-            raise_exception_err(EXCP0B_NOSEG, new_cs & 0xfffc);
-        limit = get_seg_limit(e1, e2);
- 
+
-            !(env->hflags & HF_LMA_MASK) && !(e2 & DESC_L_MASK))
-            raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc);
@@ -2210 +2210 @@
-            dpl = (e2 >> DESC_DPL_SHIFT) & 3;
-            /* must be code segment */
- 
+
-                 (DESC_S_MASK | DESC_CS_MASK)))
-                raise_exception_err(EXCP0D_GPF, gate_cs & 0xfffc);
- 
+
-                (!(e2 & DESC_C_MASK) && (dpl != cpl)))
-                raise_exception_err(EXCP0D_GPF, gate_cs & 0xfffc);
@@ -2321 +2321 @@
-            ESP = rsp;
-            cpu_x86_load_seg_cache(env, R_CS, (new_cs & 0xfffc) | cpl,
- 
+
-                                   get_seg_limit(e1, e2), e2);
-            EIP = new_eip;
- 
+
-#endif
-        {
@@ -2337 +2337 @@
-                PUSHW(ssp, sp, sp_mask, next_eip);
-            }
-
+
-            limit = get_seg_limit(e1, e2);
-            if (new_eip > limit)
@@ -2396 +2396 @@
-#ifdef DEBUG_PCALL
-            if (loglevel & CPU_LOG_PCALL)
- 
+
-                        ss, sp, param_count, ESP);
-#endif
@@ -2418 +2418 @@
-                raise_exception_err(EXCP0A_TSS, ss & 0xfffc);
-#endif
-
+
-            //            push_size = ((param_count * 2) + 8) << shift;
-
-            old_sp_mask = get_sp_mask(env->segs[R_SS].flags);
-            old_ssp = env->segs[R_SS].base;
-
+
-            sp_mask = get_sp_mask(ss_e2);
-            ssp = get_seg_base(ss_e1, ss_e2);
@@ -2463 +2463 @@
-        if (new_stack) {
-            ss = (ss & ~3) | dpl;
- 
+
-                                   ssp,
-                                   get_seg_limit(ss_e1, ss_e2),
@@ -2470 +2470 @@
-
-        selector = (selector & ~3) | dpl;
- 
+
-                       get_seg_base(e1, e2),
-                       get_seg_limit(e1, e2),
@@ -2521 +2521 @@
-        /* if virtual interrupt pending and (virtual) interrupts will be enabled -> #GP */
-        /* if TF will be set -> #GP */
- 
- 
+
+
-            raise_exception(EXCP0D_GPF);
-    }
@@ -2562 +2562 @@
-       they may still contain a valid base. I would be interested to
-       know how a real x86_64 CPU behaves */
- 
+
-        (env->segs[seg_reg].selector & 0xfffc) == 0)
-        return;
@@ -2584 +2584 @@
-    int cpl, dpl, rpl, eflags_mask, iopl;
-    target_ulong ssp, sp, new_eip, new_esp, sp_mask;
-
+
-#ifdef TARGET_X86_64
-    if (shift == 2)
@@ -2622 +2622 @@
-        }
-#ifdef VBOX
- 
+
-        {
-#ifdef DEBUG
@@ -2667 +2667 @@
-    }
-    cpl = env->hflags & HF_CPL_MASK;
- 
+
-    if (rpl < cpl)
-    {
@@ -2701 +2701 @@
-    }
-    sp += addend;
- 
+
-                       ((env->hflags & HF_CS64_MASK) && !is_iret))) {
-        /* return to same priledge level */
- 
+
-                       get_seg_base(e1, e2),
-                       get_seg_limit(e1, e2),
@@ -2738 +2738 @@
-            /* XXX: test CS64 ? */
-            if ((env->hflags & HF_LMA_MASK) && rpl != 3) {
- 
+
-                                       0, 0xffffffff,
-                                       DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
@@ -2744 +2744 @@
-                                       DESC_W_MASK | DESC_A_MASK);
-                ss_e2 = DESC_B_MASK; /* XXX: should not be needed ? */
- 
+
-#endif
-            {
@@ -2763 +2763 @@
-            if (!(ss_e2 & DESC_P_MASK))
-                raise_exception_err(EXCP0B_NOSEG, new_ss & 0xfffc);
- 
+
-                                   get_seg_base(ss_e1, ss_e2),
-                                   get_seg_limit(ss_e1, ss_e2),
@@ -2769 +2769 @@
-        }
-
- 
+
-                       get_seg_base(e1, e2),
-                       get_seg_limit(e1, e2),
@@ -2825 +2825 @@
-    POPL(ssp, sp, sp_mask, new_fs);
-    POPL(ssp, sp, sp_mask, new_gs);
-
+
-    /* modify processor state */
- 
+
-                IF_MA