Changeset 5605 for trunk/include/VBox/hwacc_svm.h
- Timestamp:
- 11/01/07 17:09:26 (1 year ago)
- Files:
-
- trunk/include/VBox/hwacc_svm.h (modified) (4 diffs)
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trunk/include/VBox/hwacc_svm.h
r4071 r5605 230 230 */ 231 231 /* 0 Intercept INTR (physical maskable interrupt) */ 232 #define SVM_CTRL1_INTERCEPT_INTR BIT(0)232 #define SVM_CTRL1_INTERCEPT_INTR RT_BIT(0) 233 233 /* 1 Intercept NMI */ 234 #define SVM_CTRL1_INTERCEPT_NMI BIT(1)234 #define SVM_CTRL1_INTERCEPT_NMI RT_BIT(1) 235 235 /* 2 Intercept SMI */ 236 #define SVM_CTRL1_INTERCEPT_SMI BIT(2)236 #define SVM_CTRL1_INTERCEPT_SMI RT_BIT(2) 237 237 /* 3 Intercept INIT */ 238 #define SVM_CTRL1_INTERCEPT_INIT BIT(3)238 #define SVM_CTRL1_INTERCEPT_INIT RT_BIT(3) 239 239 /* 4 Intercept VINTR (virtual maskable interrupt) */ 240 #define SVM_CTRL1_INTERCEPT_VINTR BIT(4)240 #define SVM_CTRL1_INTERCEPT_VINTR RT_BIT(4) 241 241 /* 5 Intercept CR0 writes that change bits other than CR0.TS or CR0.MP */ 242 #define SVM_CTRL1_INTERCEPT_CR0 BIT(5)242 #define SVM_CTRL1_INTERCEPT_CR0 RT_BIT(5) 243 243 /* 6 Intercept reads of IDTR */ 244 #define SVM_CTRL1_INTERCEPT_IDTR_READS BIT(6)244 #define SVM_CTRL1_INTERCEPT_IDTR_READS RT_BIT(6) 245 245 /* 7 Intercept reads of GDTR */ 246 #define SVM_CTRL1_INTERCEPT_GDTR_READS BIT(7)246 #define SVM_CTRL1_INTERCEPT_GDTR_READS RT_BIT(7) 247 247 /* 8 Intercept reads of LDTR */ 248 #define SVM_CTRL1_INTERCEPT_LDTR_READS BIT(8)248 #define SVM_CTRL1_INTERCEPT_LDTR_READS RT_BIT(8) 249 249 /* 9 Intercept reads of TR */ 250 #define SVM_CTRL1_INTERCEPT_TR_READS BIT(9)250 #define SVM_CTRL1_INTERCEPT_TR_READS RT_BIT(9) 251 251 /* 10 Intercept writes of IDTR */ 252 #define SVM_CTRL1_INTERCEPT_IDTR_WRITES BIT(10)252 #define SVM_CTRL1_INTERCEPT_IDTR_WRITES RT_BIT(10) 253 253 /* 11 Intercept writes of GDTR */ 254 #define SVM_CTRL1_INTERCEPT_GDTR_WRITES BIT(11)254 #define SVM_CTRL1_INTERCEPT_GDTR_WRITES RT_BIT(11) 255 255 /* 12 Intercept writes of LDTR */ 256 #define SVM_CTRL1_INTERCEPT_LDTR_WRITES BIT(12)256 #define SVM_CTRL1_INTERCEPT_LDTR_WRITES RT_BIT(12) 257 257 /* 13 Intercept writes of TR */ 258 #define SVM_CTRL1_INTERCEPT_TR_WRITES BIT(13)258 #define SVM_CTRL1_INTERCEPT_TR_WRITES RT_BIT(13) 259 259 /* 14 Intercept RDTSC instruction */ 260 #define SVM_CTRL1_INTERCEPT_RDTSC BIT(14)260 #define SVM_CTRL1_INTERCEPT_RDTSC RT_BIT(14) 261 261 /* 15 Intercept RDPMC instruction */ 262 #define SVM_CTRL1_INTERCEPT_RDPMC BIT(15)262 #define SVM_CTRL1_INTERCEPT_RDPMC RT_BIT(15) 263 263 /* 16 Intercept PUSHF instruction */ 264 #define SVM_CTRL1_INTERCEPT_PUSHF BIT(16)264 #define SVM_CTRL1_INTERCEPT_PUSHF RT_BIT(16) 265 265 /* 17 Intercept POPF instruction */ 266 #define SVM_CTRL1_INTERCEPT_POPF BIT(17)266 #define SVM_CTRL1_INTERCEPT_POPF RT_BIT(17) 267 267 /* 18 Intercept CPUID instruction */ 268 #define SVM_CTRL1_INTERCEPT_CPUID BIT(18)268 #define SVM_CTRL1_INTERCEPT_CPUID RT_BIT(18) 269 269 /* 19 Intercept RSM instruction */ 270 #define SVM_CTRL1_INTERCEPT_RSM BIT(19)270 #define SVM_CTRL1_INTERCEPT_RSM RT_BIT(19) 271 271 /* 20 Intercept IRET instruction */ 272 #define SVM_CTRL1_INTERCEPT_IRET BIT(20)272 #define SVM_CTRL1_INTERCEPT_IRET RT_BIT(20) 273 273 /* 21 Intercept INTn instruction */ 274 #define SVM_CTRL1_INTERCEPT_INTN BIT(21)274 #define SVM_CTRL1_INTERCEPT_INTN RT_BIT(21) 275 275 /* 22 Intercept INVD instruction */ 276 #define SVM_CTRL1_INTERCEPT_INVD BIT(22)276 #define SVM_CTRL1_INTERCEPT_INVD RT_BIT(22) 277 277 /* 23 Intercept PAUSE instruction */ 278 #define SVM_CTRL1_INTERCEPT_PAUSE BIT(23)278 #define SVM_CTRL1_INTERCEPT_PAUSE RT_BIT(23) 279 279 /* 24 Intercept HLT instruction */ 280 #define SVM_CTRL1_INTERCEPT_HLT BIT(24)280 #define SVM_CTRL1_INTERCEPT_HLT RT_BIT(24) 281 281 /* 25 Intercept INVLPG instruction */ 282 #define SVM_CTRL1_INTERCEPT_INVLPG BIT(25)282 #define SVM_CTRL1_INTERCEPT_INVLPG RT_BIT(25) 283 283 /* 26 Intercept INVLPGA instruction */ 284 #define SVM_CTRL1_INTERCEPT_INVLPGA BIT(26)284 #define SVM_CTRL1_INTERCEPT_INVLPGA RT_BIT(26) 285 285 /* 27 IOIO_PROT Intercept IN/OUT accesses to selected ports. */ 286 #define SVM_CTRL1_INTERCEPT_INOUT_BITMAP BIT(27)286 #define SVM_CTRL1_INTERCEPT_INOUT_BITMAP RT_BIT(27) 287 287 /* 28 MSR_PROT Intercept RDMSR or WRMSR accesses to selected MSRs. */ 288 #define SVM_CTRL1_INTERCEPT_MSR_SHADOW BIT(28)288 #define SVM_CTRL1_INTERCEPT_MSR_SHADOW RT_BIT(28) 289 289 /* 29 Intercept task switches. */ 290 #define SVM_CTRL1_INTERCEPT_TASK_SWITCH BIT(29)290 #define SVM_CTRL1_INTERCEPT_TASK_SWITCH RT_BIT(29) 291 291 /* 30 FERR_FREEZE: intercept processor "freezing" during legacy FERR handling. */ 292 #define SVM_CTRL1_INTERCEPT_FERR_FREEZE BIT(30)292 #define SVM_CTRL1_INTERCEPT_FERR_FREEZE RT_BIT(30) 293 293 /* 31 Intercept shutdown events. */ 294 #define SVM_CTRL1_INTERCEPT_SHUTDOWN BIT(31)294 #define SVM_CTRL1_INTERCEPT_SHUTDOWN RT_BIT(31) 295 295 /** @} */ 296 296 … … 300 300 */ 301 301 /* 0 Intercept VMRUN instruction */ 302 #define SVM_CTRL2_INTERCEPT_VMRUN BIT(0)302 #define SVM_CTRL2_INTERCEPT_VMRUN RT_BIT(0) 303 303 /* 1 Intercept VMMCALL instruction */ 304 #define SVM_CTRL2_INTERCEPT_VMMCALL BIT(1)304 #define SVM_CTRL2_INTERCEPT_VMMCALL RT_BIT(1) 305 305 /* 2 Intercept VMLOAD instruction */ 306 #define SVM_CTRL2_INTERCEPT_VMLOAD BIT(2)306 #define SVM_CTRL2_INTERCEPT_VMLOAD RT_BIT(2) 307 307 /* 3 Intercept VMSAVE instruction */ 308 #define SVM_CTRL2_INTERCEPT_VMSAVE BIT(3)308 #define SVM_CTRL2_INTERCEPT_VMSAVE RT_BIT(3) 309 309 /* 4 Intercept STGI instruction */ 310 #define SVM_CTRL2_INTERCEPT_STGI BIT(4)310 #define SVM_CTRL2_INTERCEPT_STGI RT_BIT(4) 311 311 /* 5 Intercept CLGI instruction */ 312 #define SVM_CTRL2_INTERCEPT_CLGI BIT(5)312 #define SVM_CTRL2_INTERCEPT_CLGI RT_BIT(5) 313 313 /* 6 Intercept SKINIT instruction */ 314 #define SVM_CTRL2_INTERCEPT_SKINIT BIT(6)314 #define SVM_CTRL2_INTERCEPT_SKINIT RT_BIT(6) 315 315 /* 7 Intercept RDTSCP instruction */ 316 #define SVM_CTRL2_INTERCEPT_RDTSCP BIT(7)316 #define SVM_CTRL2_INTERCEPT_RDTSCP RT_BIT(7) 317 317 /* 8 Intercept ICEBP instruction */ 318 #define SVM_CTRL2_INTERCEPT_ICEBP BIT(8)318 #define SVM_CTRL2_INTERCEPT_ICEBP RT_BIT(8) 319 319 /* 9 Intercept WBINVD instruction */ 320 #define SVM_CTRL2_INTERCEPT_WBINVD BIT(9)320 #define SVM_CTRL2_INTERCEPT_WBINVD RT_BIT(9) 321 321 /** @} */ 322 322 … … 324 324 * @{ 325 325 */ 326 #define SVM_NESTED_PAGING_ENABLE BIT(0)326 #define SVM_NESTED_PAGING_ENABLE RT_BIT(0) 327 327 /** @} */ 328 328 … … 330 330 * @{ 331 331 */ 332 #define SVM_INTERRUPT_SHADOW_ACTIVE BIT(0)332 #define SVM_INTERRUPT_SHADOW_ACTIVE RT_BIT(0) 333 333 /** @} */ 334 334
