VirtualBox

Changeset 5605

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Timestamp:
11/01/07 17:09:26 (1 year ago)
Author:
vboxsync
Message:

BIT => RT_BIT, BIT64 => RT_BIT_64. BIT() is defined in Linux 2.6.24

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  • trunk/include/VBox/VBoxDev.h

    r4071 r5605  
    2525 * @{ */ 
    2626/** the guest requests absolute mouse coordinates (guest additions installed) */ 
    27 #define VMMDEV_MOUSEGUESTWANTSABS                           BIT(0) 
     27#define VMMDEV_MOUSEGUESTWANTSABS                           RT_BIT(0) 
    2828/** the host wants to send absolute mouse coordinates (input not captured) */ 
    29 #define VMMDEV_MOUSEHOSTWANTSABS                            BIT(1) 
     29#define VMMDEV_MOUSEHOSTWANTSABS                            RT_BIT(1) 
    3030/** the guest needs a hardware cursor on host. When guest additions are installed 
    3131 *  and the host has promised to display the cursor itself, the guest installs a 
    3232 *  hardware mouse driver. Don't ask the guest to switch to a software cursor then. */ 
    33 #define VMMDEV_MOUSEGUESTNEEDSHOSTCUR                       BIT(2) 
     33#define VMMDEV_MOUSEGUESTNEEDSHOSTCUR                       RT_BIT(2) 
    3434/** the host is NOT able to draw the cursor itself (e.g. L4 console) */ 
    35 #define VMMDEV_MOUSEHOSTCANNOTHWPOINTER                     BIT(3) 
     35#define VMMDEV_MOUSEHOSTCANNOTHWPOINTER                     RT_BIT(3) 
    3636/** @} */ 
    3737 
    …… 
    3939 * @{ */ 
    4040/** the guest should perform a logon with the credentials */ 
    41 #define VMMDEV_SETCREDENTIALS_GUESTLOGON                    BIT(0) 
     41#define VMMDEV_SETCREDENTIALS_GUESTLOGON                    RT_BIT(0) 
    4242/** the guest should prevent local logons */ 
    43 #define VMMDEV_SETCREDENTIALS_NOLOCALLOGON                  BIT(1) 
     43#define VMMDEV_SETCREDENTIALS_NOLOCALLOGON                  RT_BIT(1) 
    4444/** the guest should verify the credentials */ 
    45 #define VMMDEV_SETCREDENTIALS_JUDGE                         BIT(15) 
     45#define VMMDEV_SETCREDENTIALS_JUDGE                         RT_BIT(15) 
    4646/** @} */ 
    4747 
    …… 
    4949 * @{ */ 
    5050/** the guest supports seamless display rendering */ 
    51 #define VMMDEV_GUEST_SUPPORTS_SEAMLESS                      BIT(0) 
     51#define VMMDEV_GUEST_SUPPORTS_SEAMLESS                      RT_BIT(0) 
    5252/** the guest supports mapping guest to host windows */ 
    53 #define VMMDEV_GUEST_SUPPORTS_GUEST_HOST_WINDOW_MAPPING     BIT(1) 
     53#define VMMDEV_GUEST_SUPPORTS_GUEST_HOST_WINDOW_MAPPING     RT_BIT(1) 
    5454/** @} */ 
    5555 

  • trunk/include/VBox/VBoxGuest.h

    r5040 r5605  
    7878 
    7979/** guest can (== wants to) handle absolute coordinates */ 
    80 #define VBOXGUEST_MOUSE_GUEST_CAN_ABSOLUTE      BIT(0) 
     80#define VBOXGUEST_MOUSE_GUEST_CAN_ABSOLUTE      RT_BIT(0) 
    8181/** host can (== wants to) send absolute coordinates */ 
    82 #define VBOXGUEST_MOUSE_HOST_CAN_ABSOLUTE       BIT(1) 
     82#define VBOXGUEST_MOUSE_HOST_CAN_ABSOLUTE       RT_BIT(1) 
    8383/** guest can *NOT* switch to software cursor and therefore depends on the host cursor */ 
    84 #define VBOXGUEST_MOUSE_GUEST_NEEDS_HOST_CURSOR BIT(2) 
     84#define VBOXGUEST_MOUSE_GUEST_NEEDS_HOST_CURSOR RT_BIT(2) 
    8585/** host does NOT provide support for drawing the cursor itself (e.g. L4 console) */ 
    86 #define VBOXGUEST_MOUSE_HOST_CANNOT_HWPOINTER   BIT(3) 
     86#define VBOXGUEST_MOUSE_HOST_CANNOT_HWPOINTER   RT_BIT(3) 
    8787 
    8888/** fictive start address of the hypervisor physical memory for MmMapIoSpace */ 
    …… 
    360360 
    361361/** guest statistics values */ 
    362 #define VBOX_GUEST_STAT_CPU_LOAD_IDLE       BIT(0) 
    363 #define VBOX_GUEST_STAT_CPU_LOAD_KERNEL     BIT(1) 
    364 #define VBOX_GUEST_STAT_CPU_LOAD_USER       BIT(2) 
    365 #define VBOX_GUEST_STAT_THREADS             BIT(3) 
    366 #define VBOX_GUEST_STAT_PROCESSES           BIT(4) 
    367 #define VBOX_GUEST_STAT_HANDLES             BIT(5) 
    368 #define VBOX_GUEST_STAT_MEMORY_LOAD         BIT(6) 
    369 #define VBOX_GUEST_STAT_PHYS_MEM_TOTAL      BIT(7) 
    370 #define VBOX_GUEST_STAT_PHYS_MEM_AVAIL      BIT(8) 
    371 #define VBOX_GUEST_STAT_PHYS_MEM_BALLOON    BIT(9) 
    372 #define VBOX_GUEST_STAT_MEM_COMMIT_TOTAL    BIT(10) 
    373 #define VBOX_GUEST_STAT_MEM_KERNEL_TOTAL    BIT(11) 
    374 #define VBOX_GUEST_STAT_MEM_KERNEL_PAGED    BIT(12) 
    375 #define VBOX_GUEST_STAT_MEM_KERNEL_NONPAGED BIT(13) 
    376 #define VBOX_GUEST_STAT_MEM_SYSTEM_CACHE    BIT(14) 
    377 #define VBOX_GUEST_STAT_PAGE_FILE_SIZE      BIT(15) 
     362#define VBOX_GUEST_STAT_CPU_LOAD_IDLE       RT_BIT(0) 
     363#define VBOX_GUEST_STAT_CPU_LOAD_KERNEL     RT_BIT(1) 
     364#define VBOX_GUEST_STAT_CPU_LOAD_USER       RT_BIT(2) 
     365#define VBOX_GUEST_STAT_THREADS             RT_BIT(3) 
     366#define VBOX_GUEST_STAT_PROCESSES           RT_BIT(4) 
     367#define VBOX_GUEST_STAT_HANDLES             RT_BIT(5) 
     368#define VBOX_GUEST_STAT_MEMORY_LOAD         RT_BIT(6) 
     369#define VBOX_GUEST_STAT_PHYS_MEM_TOTAL      RT_BIT(7) 
     370#define VBOX_GUEST_STAT_PHYS_MEM_AVAIL      RT_BIT(8) 
     371#define VBOX_GUEST_STAT_PHYS_MEM_BALLOON    RT_BIT(9) 
     372#define VBOX_GUEST_STAT_MEM_COMMIT_TOTAL    RT_BIT(10) 
     373#define VBOX_GUEST_STAT_MEM_KERNEL_TOTAL    RT_BIT(11) 
     374#define VBOX_GUEST_STAT_MEM_KERNEL_PAGED    RT_BIT(12) 
     375#define VBOX_GUEST_STAT_MEM_KERNEL_NONPAGED RT_BIT(13) 
     376#define VBOX_GUEST_STAT_MEM_SYSTEM_CACHE    RT_BIT(14) 
     377#define VBOX_GUEST_STAT_PAGE_FILE_SIZE      RT_BIT(15) 
    378378 
    379379 
    …… 
    10471047 
    10481048/** Host mouse capabilities has been changed. */ 
    1049 #define VMMDEV_EVENT_MOUSE_CAPABILITIES_CHANGED             BIT(0) 
     1049#define VMMDEV_EVENT_MOUSE_CAPABILITIES_CHANGED             RT_BIT(0) 
    10501050/** HGCM event. */ 
    1051 #define VMMDEV_EVENT_HGCM                                   BIT(1) 
     1051#define VMMDEV_EVENT_HGCM                                   RT_BIT(1) 
    10521052/** A display change request has been issued. */ 
    1053 #define VMMDEV_EVENT_DISPLAY_CHANGE_REQUEST                 BIT(2) 
     1053#define VMMDEV_EVENT_DISPLAY_CHANGE_REQUEST                 RT_BIT(2) 
    10541054/** Credentials are available for judgement. */ 
    1055 #define VMMDEV_EVENT_JUDGE_CREDENTIALS                      BIT(3) 
     1055#define VMMDEV_EVENT_JUDGE_CREDENTIALS                      RT_BIT(3) 
    10561056/** The guest has been restored. */ 
    1057 #define VMMDEV_EVENT_RESTORED                               BIT(4) 
     1057#define VMMDEV_EVENT_RESTORED                               RT_BIT(4) 
    10581058/** Seamless mode state changed */ 
    1059 #define VMMDEV_EVENT_SEAMLESS_MODE_CHANGE_REQUEST           BIT(5) 
     1059#define VMMDEV_EVENT_SEAMLESS_MODE_CHANGE_REQUEST           RT_BIT(5) 
    10601060/** Memory balloon size changed */ 
    1061 #define VMMDEV_EVENT_BALLOON_CHANGE_REQUEST                 BIT(6) 
     1061#define VMMDEV_EVENT_BALLOON_CHANGE_REQUEST                 RT_BIT(6) 
    10621062/** Statistics interval changed */ 
    1063 #define VMMDEV_EVENT_STATISTICS_INTERVAL_CHANGE_REQUEST     BIT(7) 
     1063#define VMMDEV_EVENT_STATISTICS_INTERVAL_CHANGE_REQUEST     RT_BIT(7) 
    10641064/** VRDP status changed. */ 
    1065 #define VMMDEV_EVENT_VRDP                                   BIT(8) 
     1065#define VMMDEV_EVENT_VRDP                                   RT_BIT(8) 
    10661066 
    10671067 
    …… 
    12901290 
    12911291/** query from host whether credentials are present */ 
    1292 #define VMMDEV_CREDENTIALS_QUERYPRESENCE     BIT(1) 
     1292#define VMMDEV_CREDENTIALS_QUERYPRESENCE     RT_BIT(1) 
    12931293/** read credentials from host (can be combined with clear) */ 
    1294 #define VMMDEV_CREDENTIALS_READ              BIT(2) 
     1294#define VMMDEV_CREDENTIALS_READ              RT_BIT(2) 
    12951295/** clear credentials on host (can be combined with read) */ 
    1296 #define VMMDEV_CREDENTIALS_CLEAR             BIT(3) 
     1296#define VMMDEV_CREDENTIALS_CLEAR             RT_BIT(3) 
    12971297/** read credentials for judgement in the guest */ 
    1298 #define VMMDEV_CREDENTIALS_READJUDGE         BIT(8) 
     1298#define VMMDEV_CREDENTIALS_READJUDGE         RT_BIT(8) 
    12991299/** clear credentials for judegement on the host */ 
    1300 #define VMMDEV_CREDENTIALS_CLEARJUDGE        BIT(9) 
     1300#define VMMDEV_CREDENTIALS_CLEARJUDGE        RT_BIT(9) 
    13011301/** report credentials acceptance by guest */ 
    1302 #define VMMDEV_CREDENTIALS_JUDGE_OK          BIT(10) 
     1302#define VMMDEV_CREDENTIALS_JUDGE_OK          RT_BIT(10) 
    13031303/** report credentials denial by guest */ 
    1304 #define VMMDEV_CREDENTIALS_JUDGE_DENY        BIT(11) 
     1304#define VMMDEV_CREDENTIALS_JUDGE_DENY        RT_BIT(11) 
    13051305/** report that no judgement could be made by guest */ 
    1306 #define VMMDEV_CREDENTIALS_JUDGE_NOJUDGEMENT BIT(12) 
     1306#define VMMDEV_CREDENTIALS_JUDGE_NOJUDGEMENT RT_BIT(12) 
    13071307 
    13081308/** flag telling the guest that credentials are present */ 
    1309 #define VMMDEV_CREDENTIALS_PRESENT           BIT(16) 
     1309#define VMMDEV_CREDENTIALS_PRESENT           RT_BIT(16) 
    13101310/** flag telling guest that local logons should be prohibited */ 
    1311 #define VMMDEV_CREDENTIALS_NOLOCALLOGON      BIT(17) 
     1311#define VMMDEV_CREDENTIALS_NOLOCALLOGON      RT_BIT(17) 
    13121312 
    13131313/** credentials request structure */ 

  • trunk/include/VBox/VBoxGuest16.h

    r4478 r5605  
    1818#define ___VBox_VBoxGuest16_h 
    1919 
    20 #define BIT(bit)                                (1UL << (bit)) 
     20#define RT_BIT(bit)                                (1UL << (bit)) 
    2121 
    2222 
    …… 
    4242 
    4343 
    44 #define VMMDEV_EVENT_MOUSE_CAPABILITIES_CHANGED BIT(0) 
    45 #define VMMDEV_EVENT_HGCM                       BIT(1) 
    46 #define VMMDEV_EVENT_DISPLAY_CHANGE_REQUEST     BIT(2) 
    47 #define VMMDEV_EVENT_JUDGE_CREDENTIALS          BIT(3) 
    48 #define VMMDEV_EVENT_RESTORED                   BIT(4) 
     44#define VMMDEV_EVENT_MOUSE_CAPABILITIES_CHANGED RT_BIT(0) 
     45#define VMMDEV_EVENT_HGCM                       RT_BIT(1) 
     46#define VMMDEV_EVENT_DISPLAY_CHANGE_REQUEST     RT_BIT(2) 
     47#define VMMDEV_EVENT_JUDGE_CREDENTIALS          RT_BIT(3) 
     48#define VMMDEV_EVENT_RESTORED                   RT_BIT(4) 
    4949 
    5050 
    …… 
    7878#define VMMDevReq_CtlGuestFilterMask            42 
    7979 
    80 #define VBOXGUEST_MOUSE_GUEST_CAN_ABSOLUTE      BIT(0) 
    81 #define VBOXGUEST_MOUSE_HOST_CAN_ABSOLUTE       BIT(1) 
    82 #define VBOXGUEST_MOUSE_GUEST_NEEDS_HOST_CURSOR BIT(2) 
    83 #define VBOXGUEST_MOUSE_HOST_CANNOT_HWPOINTER   BIT(3) 
     80#define VBOXGUEST_MOUSE_GUEST_CAN_ABSOLUTE      RT_BIT(0) 
     81#define VBOXGUEST_MOUSE_HOST_CAN_ABSOLUTE       RT_BIT(1) 
     82#define VBOXGUEST_MOUSE_GUEST_NEEDS_HOST_CURSOR RT_BIT(2) 
     83#define VBOXGUEST_MOUSE_HOST_CANNOT_HWPOINTER   RT_BIT(3) 
    8484 
    8585typedef struct 

  • trunk/include/VBox/cpum.h

    r5285 r5605  
    595595 * @{ 
    596596 */ 
    597 #define CPUM_CHANGED_FPU_REM            BIT(0) 
    598 #define CPUM_CHANGED_CR0                BIT(1) 
    599 #define CPUM_CHANGED_CR4                BIT(2) 
    600 #define CPUM_CHANGED_GLOBAL_TLB_FLUSH   BIT(3) 
    601 #define CPUM_CHANGED_CR3                BIT(4) 
    602 #define CPUM_CHANGED_GDTR               BIT(5) 
    603 #define CPUM_CHANGED_IDTR               BIT(6) 
    604 #define CPUM_CHANGED_LDTR               BIT(7) 
    605 #define CPUM_CHANGED_TR                 BIT(8) 
    606 #define CPUM_CHANGED_SYSENTER_MSR       BIT(9) 
    607 #define CPUM_CHANGED_HIDDEN_SEL_REGS    BIT(10) 
     597#define CPUM_CHANGED_FPU_REM            RT_BIT(0) 
     598#define CPUM_CHANGED_CR0                RT_BIT(1) 
     599#define CPUM_CHANGED_CR4                RT_BIT(2) 
     600#define CPUM_CHANGED_GLOBAL_TLB_FLUSH   RT_BIT(3) 
     601#define CPUM_CHANGED_CR3                RT_BIT(4) 
     602#define CPUM_CHANGED_GDTR               RT_BIT(5) 
     603#define CPUM_CHANGED_IDTR               RT_BIT(6) 
     604#define CPUM_CHANGED_LDTR               RT_BIT(7) 
     605#define CPUM_CHANGED_TR                 RT_BIT(8) 
     606#define CPUM_CHANGED_SYSENTER_MSR       RT_BIT(9) 
     607#define CPUM_CHANGED_HIDDEN_SEL_REGS    RT_BIT(10) 
    608608/** @} */ 
    609609 

  • trunk/include/VBox/dbg.h

    r4329 r5605  
    153153 * @{ */ 
    154154/** Indicates that the variable depends on the previous being present. */ 
    155 #define DBGCVD_FLAGS_DEP_PREV       BIT(1) 
     155#define DBGCVD_FLAGS_DEP_PREV       RT_BIT(1) 
    156156/** @} */ 
    157157 

  • trunk/include/VBox/dbgf.h

    r4071 r5605  
    135135 
    136136/** Set if the address is valid. */ 
    137 #define DBGFADDRESS_FLAGS_VALID         BIT(2) 
     137#define DBGFADDRESS_FLAGS_VALID         RT_BIT(2) 
    138138 
    139139/** The address is within the hypervisor memoary area (HMA). 
    140140 * If not set, the address can be assumed to be a guest address. */ 
    141 #define DBGFADDRESS_FLAGS_HMA           BIT(3) 
     141#define DBGFADDRESS_FLAGS_HMA           RT_BIT(3) 
    142142 
    143143/** Checks if the mixed address is flat or not. */ 
    …… 
    833833 * @{ */ 
    834834/** The handler must run on the EMT. */ 
    835 #define DBGFINFO_FLAGS_RUN_ON_EMT       BIT(0) 
     835#define DBGFINFO_FLAGS_RUN_ON_EMT       RT_BIT(0) 
    836836/** @} */ 
    837837 
    …… 
    13211321/** Set if the content of the frame is filled in by DBGFR3StackWalk() and can be used 
    13221322 * to construct the next frame. */ 
    1323 #define DBGFSTACKFRAME_FLAGS_ALL_VALID  BIT(0) 
     1323#define DBGFSTACKFRAME_FLAGS_ALL_VALID  RT_BIT(0) 
    13241324/** This is the last stack frame we can read. 
    13251325 * This flag is not set if the walk stop because of max dept or recursion. */ 
    1326 #define DBGFSTACKFRAME_FLAGS_LAST       BIT(1) 
     1326#define DBGFSTACKFRAME_FLAGS_LAST       RT_BIT(1) 
    13271327/** This is the last record because we detected a loop. */ 
    1328 #define DBGFSTACKFRAME_FLAGS_LOOP       BIT(2) 
     1328#define DBGFSTACKFRAME_FLAGS_LOOP       RT_BIT(2) 
    13291329/** This is the last record because we reached the maximum depth. */ 
    1330 #define DBGFSTACKFRAME_FLAGS_MAX_DEPTH  BIT(3) 
     1330#define DBGFSTACKFRAME_FLAGS_MAX_DEPTH  RT_BIT(3) 
    13311331/** @} */ 
    13321332 
    …… 
    13921392 * @{ */ 
    13931393/** Disassemble the current guest instruction, with annotations. */ 
    1394 #define DBGF_DISAS_FLAGS_CURRENT_GUEST      BIT(0) 
     1394#define DBGF_DISAS_FLAGS_CURRENT_GUEST      RT_BIT(0) 
    13951395/** Disassemble the current hypervisor instruction, with annotations. */ 
    1396 #define DBGF_DISAS_FLAGS_CURRENT_HYPER      BIT(1) 
     1396#define DBGF_DISAS_FLAGS_CURRENT_HYPER      RT_BIT(1) 
    13971397/** No annotations for current context. */ 
    1398 #define DBGF_DISAS_FLAGS_NO_ANNOTATION      BIT(2) 
     1398#define DBGF_DISAS_FLAGS_NO_ANNOTATION      RT_BIT(2) 
    13991399/** No symbol lookup. */ 
    1400 #define DBGF_DISAS_FLAGS_NO_SYMBOLS         BIT(3) 
     1400#define DBGF_DISAS_FLAGS_NO_SYMBOLS         RT_BIT(3) 
    14011401/** No instruction bytes. */ 
    1402 #define DBGF_DISAS_FLAGS_NO_BYTES           BIT(4) 
     1402#define DBGF_DISAS_FLAGS_NO_BYTES           RT_BIT(4) 
    14031403/** No address in the output. */ 
    1404 #define DBGF_DISAS_FLAGS_NO_ADDRESS         BIT(5) 
     1404#define DBGF_DISAS_FLAGS_NO_ADDRESS         RT_BIT(5) 
    14051405/** @} */ 
    14061406 

  • trunk/include/VBox/dis.h

    r4953 r5605  
    6262 * Operand type. 
    6363 */ 
    64 #define OPTYPE_INVALID               BIT(0) 
    65 #define OPTYPE_HARMLESS              BIT(1) 
    66 #define OPTYPE_CONTROLFLOW           BIT(2) 
    67 #define OPTYPE_POTENTIALLY_DANGEROUS BIT(3) 
    68 #define OPTYPE_DANGEROUS             BIT(4) 
    69 #define OPTYPE_PORTIO                BIT(5) 
    70 #define OPTYPE_PRIVILEGED            BIT(6) 
    71 #define OPTYPE_PRIVILEGED_NOTRAP     BIT(7) 
    72 #define OPTYPE_UNCOND_CONTROLFLOW    BIT(8) 
    73 #define OPTYPE_RELATIVE_CONTROLFLOW  BIT(9) 
    74 #define OPTYPE_COND_CONTROLFLOW      BIT(10) 
    75 #define OPTYPE_INTERRUPT             BIT(11) 
    76 #define OPTYPE_ILLEGAL               BIT(12) 
    77 #define OPTYPE_RRM_DANGEROUS         BIT(14) /**< Some additional dangerouse ones when recompiling raw r0. */ 
    78 #define OPTYPE_RRM_DANGEROUS_16      BIT(15) /**< Some additional dangerouse ones when recompiling 16-bit raw r0. */ 
     64#define OPTYPE_INVALID               RT_BIT(0) 
     65#define OPTYPE_HARMLESS              RT_BIT(1) 
     66#define OPTYPE_CONTROLFLOW           RT_BIT(2) 
     67#define OPTYPE_POTENTIALLY_DANGEROUS RT_BIT(3) 
     68#define OPTYPE_DANGEROUS             RT_BIT(4) 
     69#define OPTYPE_PORTIO                RT_BIT(5) 
     70#define OPTYPE_PRIVILEGED            RT_BIT(6) 
     71#define OPTYPE_PRIVILEGED_NOTRAP     RT_BIT(7) 
     72#define OPTYPE_UNCOND_CONTROLFLOW    RT_BIT(8) 
     73#define OPTYPE_RELATIVE_CONTROLFLOW  RT_BIT(9) 
     74#define OPTYPE_COND_CONTROLFLOW      RT_BIT(10) 
     75#define OPTYPE_INTERRUPT             RT_BIT(11) 
     76#define OPTYPE_ILLEGAL               RT_BIT(12) 
     77#define OPTYPE_RRM_DANGEROUS         RT_BIT(14) /**< Some additional dangerouse ones when recompiling raw r0. */ 
     78#define OPTYPE_RRM_DANGEROUS_16      RT_BIT(15) /**< Some additional dangerouse ones when recompiling 16-bit raw r0. */ 
    7979#define OPTYPE_RRM_MASK              (OPTYPE_RRM_DANGEROUS | OPTYPE_RRM_DANGEROUS_16) 
    80 #define OPTYPE_INHIBIT_IRQS          BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */ 
    81 #define OPTYPE_PORTIO_READ           BIT(17) 
    82 #define OPTYPE_PORTIO_WRITE          BIT(18) 
     80#define OPTYPE_INHIBIT_IRQS          RT_BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */ 
     81#define OPTYPE_PORTIO_READ           RT_BIT(17) 
     82#define OPTYPE_PORTIO_WRITE          RT_BIT(18) 
    8383#define OPTYPE_ALL                   (0xffffffff) 
    8484 
    …… 
    8686 * @{ 
    8787 */ 
    88 #define USE_BASE                        BIT(0) 
    89 #define USE_INDEX                       BIT(1) 
    90 #define USE_SCALE                       BIT(2) 
    91 #define USE_REG_GEN8                    BIT(3) 
    92 #define USE_REG_GEN16                   BIT(4) 
    93 #define USE_REG_GEN32                   BIT(5) 
    94 #define USE_REG_FP                      BIT(6) 
    95 #define USE_REG_MMX                     BIT(7) 
    96 #define USE_REG_XMM                     BIT(8) 
    97 #define USE_REG_CR                      BIT(9) 
    98 #define USE_REG_DBG                     BIT(10) 
    99 #define USE_REG_SEG                     BIT(11) 
    100 #define USE_REG_TEST                    BIT(12) 
    101 #define USE_DISPLACEMENT8               BIT(13) 
    102 #define USE_DISPLACEMENT16              BIT(14) 
    103 #define USE_DISPLACEMENT32              BIT(15) 
    104 #define USE_IMMEDIATE8                  BIT(16) 
    105 #define USE_IMMEDIATE8_REL              BIT(17) 
    106 #define USE_IMMEDIATE16                 BIT(18) 
    107 #define USE_IMMEDIATE16_REL             BIT(19) 
    108 #define USE_IMMEDIATE32                 BIT(20) 
    109 #define USE_IMMEDIATE32_REL             BIT(21) 
    110 #define USE_IMMEDIATE64                 BIT(22) 
    111 #define USE_IMMEDIATE_ADDR_0_32         BIT(23) 
    112 #define USE_IMMEDIATE_ADDR_16_32        BIT(24) 
    113 #define USE_IMMEDIATE_ADDR_0_16         BIT(25) 
    114 #define USE_IMMEDIATE_ADDR_16_16        BIT(26) 
     88#define USE_BASE                        RT_BIT(0) 
     89#define USE_INDEX                       RT_BIT(1) 
     90#define USE_SCALE                       RT_BIT(2) 
     91#define USE_REG_GEN8                    RT_BIT(3) 
     92#define USE_REG_GEN16                   RT_BIT(4) 
     93#define USE_REG_GEN32                   RT_BIT(5) 
     94#define USE_REG_FP                      RT_BIT(6) 
     95#define USE_REG_MMX                     RT_BIT(7) 
     96#define USE_REG_XMM                     RT_BIT(8) 
     97#define USE_REG_CR                      RT_BIT(9) 
     98#define USE_REG_DBG                     RT_BIT(10) 
     99#define USE_REG_SEG                     RT_BIT(11) 
     100#define USE_REG_TEST                    RT_BIT(12) 
     101#define USE_DISPLACEMENT8               RT_BIT(13) 
     102#define USE_DISPLACEMENT16              RT_BIT(14) 
     103#define USE_DISPLACEMENT32              RT_BIT(15) 
     104#define USE_IMMEDIATE8                  RT_BIT(16) 
     105#define USE_IMMEDIATE8_REL              RT_BIT(17) 
     106#define USE_IMMEDIATE16                 RT_BIT(18) 
     107#define USE_IMMEDIATE16_REL             RT_BIT(19) 
     108#define USE_IMMEDIATE32                 RT_BIT(20) 
     109#define USE_IMMEDIATE32_REL             RT_BIT(21) 
     110#define USE_IMMEDIATE64                 RT_BIT(22) 
     111#define USE_IMMEDIATE_ADDR_0_32         RT_BIT(23) 
     112#define USE_IMMEDIATE_ADDR_16_32        RT_BIT(24) 
     113#define USE_IMMEDIATE_ADDR_0_16         RT_BIT(25) 
     114#define USE_IMMEDIATE_ADDR_16_16        RT_BIT(26) 
    115115/** DS:ESI */ 
    116 #define USE_POINTER_DS_BASED            BIT(27) 
     116#define USE_POINTER_DS_BASED            RT_BIT(27) 
    117117/** ES:EDI */ 
    118 #define USE_POINTER_ES_BASED            BIT(28) 
    119 #define USE_IMMEDIATE16_SX8             BIT(29) 
    120 #define USE_IMMEDIATE32_SX8             BIT(30) 
     118#define USE_POINTER_ES_BASED            RT_BIT(28) 
     119#define USE_IMMEDIATE16_SX8             RT_BIT(29) 
     120#define USE_IMMEDIATE32_SX8             RT_BIT(30) 
    121121 
    122122#define USE_IMMEDIATE                   (USE_IMMEDIATE8|USE_IMMEDIATE16|USE_IMMEDIATE32|USE_IMMEDIATE64|USE_IMMEDIATE8_REL|USE_IMMEDIATE16_REL|USE_IMMEDIATE32_REL|USE_IMMEDIATE_ADDR_0_32|USE_IMMEDIATE_ADDR_16_32|USE_IMMEDIATE_ADDR_0_16|USE_IMMEDIATE_ADDR_16_16|USE_IMMEDIATE16_SX8|USE_IMMEDIATE32_SX8) 
    …… 
    218218 * @{ 
    219219 */ 
    220 #define PARAM_VAL8             BIT(0) 
    221 #define PARAM_VAL16            BIT(1) 
    222 #define PARAM_VAL32            BIT(2) 
    223 #define PARAM_VAL64            BIT(3) 
    224 #define PARAM_VALFARPTR16      BIT(4) 
    225 #define PARAM_VALFARPTR32      BIT(5) 
     220#define PARAM_VAL8             RT_BIT(0) 
     221#define PARAM_VAL16            RT_BIT(1) 
     222#define PARAM_VAL32            RT_BIT(2) 
     223#define PARAM_VAL64            RT_BIT(3) 
     224#define PARAM_VALFARPTR16      RT_BIT(4) 
     225#define PARAM_VALFARPTR32      RT_BIT(5) 
    226226 
    227227#define PARMTYPE_REGISTER      1 

  • trunk/include/VBox/hwacc_svm.h

    r4071 r5605  
    230230 */ 
    231231/* 0 Intercept INTR (physical maskable interrupt) */ 
    232 #define SVM_CTRL1_INTERCEPT_INTR              BIT(0) 
     232#define SVM_CTRL1_INTERCEPT_INTR              RT_BIT(0) 
    233233/* 1 Intercept NMI */ 
    234 #define SVM_CTRL1_INTERCEPT_NMI               BIT(1) 
     234#define SVM_CTRL1_INTERCEPT_NMI               RT_BIT(1) 
    235235/* 2 Intercept SMI */ 
    236 #define SVM_CTRL1_INTERCEPT_SMI               BIT(2) 
     236#define SVM_CTRL1_INTERCEPT_SMI               RT_BIT(2) 
    237237/* 3 Intercept INIT */ 
    238 #define SVM_CTRL1_INTERCEPT_INIT              BIT(3) 
     238#define SVM_CTRL1_INTERCEPT_INIT              RT_BIT(3) 
    239239/* 4 Intercept VINTR (virtual maskable interrupt) */ 
    240 #define SVM_CTRL1_INTERCEPT_VINTR             BIT(4) 
     240#define SVM_CTRL1_INTERCEPT_VINTR             RT_BIT(4) 
    241241/* 5 Intercept CR0 writes that change bits other than CR0.TS or CR0.MP */ 
    242 #define SVM_CTRL1_INTERCEPT_CR0               BIT(5) 
     242#define SVM_CTRL1_INTERCEPT_CR0               RT_BIT(5) 
    243243/* 6 Intercept reads of IDTR */ 
    244 #define SVM_CTRL1_INTERCEPT_IDTR_READS        BIT(6) 
     244#define SVM_CTRL1_INTERCEPT_IDTR_READS        RT_BIT(6) 
    245245/* 7 Intercept reads of GDTR */ 
    246 #define SVM_CTRL1_INTERCEPT_GDTR_READS        BIT(7) 
     246#define SVM_CTRL1_INTERCEPT_GDTR_READS        RT_BIT(7) 
    247247/* 8 Intercept reads of LDTR */ 
    248 #define SVM_CTRL1_INTERCEPT_LDTR_READS        BIT(8) 
     248#define SVM_CTRL1_INTERCEPT_LDTR_READS        RT_BIT(8) 
    249249/* 9 Intercept reads of TR */ 
    250 #define SVM_CTRL1_INTERCEPT_TR_READS          BIT(9) 
     250#define SVM_CTRL1_INTERCEPT_TR_READS          RT_BIT(9) 
    251251/* 10 Intercept writes of IDTR */ 
    252 #define SVM_CTRL1_INTERCEPT_IDTR_WRITES       BIT(10) 
     252#define SVM_CTRL1_INTERCEPT_IDTR_WRITES       RT_BIT(10) 
    253253/* 11 Intercept writes of GDTR */ 
    254 #define SVM_CTRL1_INTERCEPT_GDTR_WRITES       BIT(11) 
     254#define SVM_CTRL1_INTERCEPT_GDTR_WRITES       RT_BIT(11) 
    255255/* 12 Intercept writes of LDTR */ 
    256 #define SVM_CTRL1_INTERCEPT_LDTR_WRITES       BIT(12) 
     256#define SVM_CTRL1_INTERCEPT_LDTR_WRITES       RT_BIT(12) 
    257257/* 13 Intercept writes of TR */ 
    258 #define SVM_CTRL1_INTERCEPT_TR_WRITES         BIT(13) 
     258#define SVM_CTRL1_INTERCEPT_TR_WRITES         RT_BIT(13) 
    259259/* 14 Intercept RDTSC instruction */ 
    260 #define SVM_CTRL1_INTERCEPT_RDTSC             BIT(14) 
     260#define SVM_CTRL1_INTERCEPT_RDTSC             RT_BIT(14) 
    261261/* 15 Intercept RDPMC instruction */ 
    262 #define SVM_CTRL1_INTERCEPT_RDPMC             BIT(15) 
     262#define SVM_CTRL1_INTERCEPT_RDPMC             RT_BIT(15) 
    263263/* 16 Intercept PUSHF instruction */ 
    264 #define SVM_CTRL1_INTERCEPT_PUSHF             BIT(16) 
     264#define SVM_CTRL1_INTERCEPT_PUSHF             RT_BIT(16) 
    265265/* 17 Intercept POPF instruction */ 
    266 #define SVM_CTRL1_INTERCEPT_POPF              BIT(17) 
     266#define SVM_CTRL1_INTERCEPT_POPF              RT_BIT(17) 
    267267/* 18 Intercept CPUID instruction */ 
    268 #define SVM_CTRL1_INTERCEPT_CPUID             BIT(18) 
     268#define SVM_CTRL1_INTERCEPT_CPUID             RT_BIT(18) 
    269269/* 19 Intercept RSM instruction */ 
    270 #define SVM_CTRL1_INTERCEPT_RSM               BIT(19) 
     270#define SVM_CTRL1_INTERCEPT_RSM               RT_BIT(19) 
    271271/* 20 Intercept IRET instruction */ 
    272 #define SVM_CTRL1_INTERCEPT_IRET              BIT(20) 
     272#define SVM_CTRL1_INTERCEPT_IRET              RT_BIT(20) 
    273273/* 21 Intercept INTn instruction */ 
    274 #define SVM_CTRL1_INTERCEPT_INTN              BIT(21) 
     274#define SVM_CTRL1_INTERCEPT_INTN              RT_BIT(21) 
    275275/* 22 Intercept INVD instruction */ 
    276 #define SVM_CTRL1_INTERCEPT_INVD              BIT(22) 
     276#define SVM_CTRL1_INTERCEPT_INVD              RT_BIT(22) 
    277277/* 23 Intercept PAUSE instruction */ 
    278 #define SVM_CTRL1_INTERCEPT_PAUSE             BIT(23) 
     278#define SVM_CTRL1_INTERCEPT_PAUSE             RT_BIT(23) 
    279279/* 24 Intercept HLT instruction */ 
    280 #define SVM_CTRL1_INTERCEPT_HLT               BIT(24) 
     280#define SVM_CTRL1_INTERCEPT_HLT               RT_BIT(24) 
    281281/* 25 Intercept INVLPG instruction */ 
    282 #define SVM_CTRL1_INTERCEPT_INVLPG            BIT(25) 
     282#define SVM_CTRL1_INTERCEPT_INVLPG            RT_BIT(25) 
    283283/* 26 Intercept INVLPGA instruction */ 
    284 #define SVM_CTRL1_INTERCEPT_INVLPGA           BIT(26) 
     284#define SVM_CTRL1_INTERCEPT_INVLPGA           RT_BIT(26) 
    285285/* 27 IOIO_PROT Intercept IN/OUT accesses to selected ports. */ 
    286 #define SVM_CTRL1_INTERCEPT_INOUT_BITMAP      BIT(27) 
     286#define SVM_CTRL1_INTERCEPT_INOUT_BITMAP      RT_BIT(27) 
    287287/* 28 MSR_PROT Intercept RDMSR or WRMSR accesses to selected MSRs. */ 
    288 #define SVM_CTRL1_INTERCEPT_MSR_SHADOW        BIT(28) 
     288#define SVM_CTRL1_INTERCEPT_MSR_SHADOW        RT_BIT(28) 
    289289/* 29 Intercept task switches. */ 
    290 #define SVM_CTRL1_INTERCEPT_TASK_SWITCH       BIT(29) 
     290#define SVM_CTRL1_INTERCEPT_TASK_SWITCH       RT_BIT(29) 
    291291/* 30 FERR_FREEZE: intercept processor "freezing" during legacy FERR handling. */ 
    292 #define SVM_CTRL1_INTERCEPT_FERR_FREEZE       BIT(30) 
     292#define SVM_CTRL1_INTERCEPT_FERR_FREEZE       RT_BIT(30) 
    293293/* 31 Intercept shutdown events. */ 
    294 #define SVM_CTRL1_INTERCEPT_SHUTDOWN          BIT(31) 
     294#define SVM_CTRL1_INTERCEPT_SHUTDOWN          RT_BIT(31) 
    295295/** @} */ 
    296296 
    …… 
    300300 */ 
    301301/* 0 Intercept VMRUN instruction */ 
    302 #define SVM_CTRL2_INTERCEPT_VMRUN             BIT(0) 
     302#define SVM_CTRL2_INTERCEPT_VMRUN             RT_BIT(0) 
    303303/* 1 Intercept VMMCALL instruction */ 
    304 #define SVM_CTRL2_INTERCEPT_VMMCALL           BIT(1) 
     304#define SVM_CTRL2_INTERCEPT_VMMCALL           RT_BIT(1) 
    305305/* 2 Intercept VMLOAD instruction */ 
    306 #define SVM_CTRL2_INTERCEPT_VMLOAD            BIT(2) 
     306#define SVM_CTRL2_INTERCEPT_VMLOAD            RT_BIT(2) 
    307307/* 3 Intercept VMSAVE instruction */ 
    308 #define SVM_CTRL2_INTERCEPT_VMSAVE            BIT(3) 
     308#define SVM_CTRL2_INTERCEPT_VMSAVE            RT_BIT(3) 
    309309/* 4 Intercept STGI instruction */ 
    310 #define SVM_CTRL2_INTERCEPT_STGI              BIT(4) 
     310#define SVM_CTRL2_INTERCEPT_STGI              RT_BIT(4) 
    311311/* 5 Intercept CLGI instruction */ 
    312 #define SVM_CTRL2_INTERCEPT_CLGI              BIT(5) 
     312#define SVM_CTRL2_INTERCEPT_CLGI              RT_BIT(5) 
    313313/* 6 Intercept SKINIT instruction */ 
    314 #define SVM_CTRL2_INTERCEPT_SKINIT            BIT(6) 
     314#define SVM_CTRL2_INTERCEPT_SKINIT            RT_BIT(6) 
    315315/* 7 Intercept RDTSCP instruction */ 
    316 #define SVM_CTRL2_INTERCEPT_RDTSCP            BIT(7) 
     316#define SVM_CTRL2_INTERCEPT_RDTSCP            RT_BIT(7) 
    317317/* 8 Intercept ICEBP instruction */ 
    318 #define SVM_CTRL2_INTERCEPT_ICEBP             BIT(8) 
     318#define SVM_CTRL2_INTERCEPT_ICEBP             RT_BIT(8) 
    319319/* 9 Intercept WBINVD instruction */ 
    320 #define SVM_CTRL2_INTERCEPT_WBINVD            BIT(9) 
     320#define SVM_CTRL2_INTERCEPT_WBINVD            RT_BIT(9) 
    321321/** @} */ 
    322322 
    …… 
    324324 * @{ 
    325325 */ 
    326 #define SVM_NESTED_PAGING_ENABLE                BIT(0) 
     326#define SVM_NESTED_PAGING_ENABLE                RT_BIT(0) 
    327327/** @} */ 
    328328 
    …… 
    330330 * @{ 
    331331 */ 
    332 #define SVM_INTERRUPT_SHADOW_ACTIVE             BIT(0) 
     332#define SVM_INTERRUPT_SHADOW_ACTIVE             RT_BIT(0) 
    333333/** @} */ 
    334334 

  • trunk/include/VBox/hwacc_vmx.h

    r4071 r5605  
    322322 */ 
    323323/* External interrupts cause VM exits if set; otherwise dispatched through the guest's IDT. */ 
    324 #define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_EXT_INT_EXIT            BIT(0) 
     324#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_EXT_INT_EXIT            RT_BIT(0) 
    325325/* Non-maskable interrupts cause VM exits if set; otherwise dispatched through the guest's IDT. */ 
    326 #define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_NMI_EXIT                BIT(3) 
     326#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_NMI_EXIT                RT_BIT(3) 
    327327/* All other bits are reserved and must be set according to MSR IA32_VMX_PROCBASED_CTLS. */ 
    328328/** @} */ 
    …… 
    333333 */ 
    334334/* VM Exit as soon as RFLAGS.IF=1 and no blocking is active. */ 
    335 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_IRQ_WINDOW_EXIT        BIT(2) 
     335#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_IRQ_WINDOW_EXIT        RT_BIT(2) 
    336336/* Use timestamp counter offset. */ 
    337 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_TSC_OFFSET             BIT(3) 
     337#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_TSC_OFFSET             RT_BIT(3) 
    338338/* VM Exit when executing the HLT instruction. */ 
    339 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_HLT_EXIT               BIT(7) 
     339#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_HLT_EXIT               RT_BIT(7) 
    340340/* VM Exit when executing the INVLPG instruction. */ 
    341 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_INVLPG_EXIT            BIT(9) 
     341#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_INVLPG_EXIT            RT_BIT(9) 
    342342/* VM Exit when executing the MWAIT instruction. */ 
    343 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MWAIT_EXIT             BIT(10) 
     343#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MWAIT_EXIT             RT_BIT(10) 
    344344/* VM Exit when executing the RDPMC instruction. */ 
    345 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDPMC_EXIT             BIT(11) 
     345#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDPMC_EXIT             RT_BIT(11) 
    346346/* VM Exit when executing the RDTSC instruction. */ 
    347 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT             BIT(12) 
     347#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT             RT_BIT(12) 
    348348/* VM Exit on CR8 loads. */ 
    349 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_LOAD_EXIT          BIT(19) 
     349#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_LOAD_EXIT          RT_BIT(19) 
    350350/* VM Exit on CR8 stores. */ 
    351 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_STORE_EXIT         BIT(20) 
     351#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_STORE_EXIT         RT_BIT(20) 
    352352/* Use TPR shadow. */ 
    353 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW         BIT(21) 
     353#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW         RT_BIT(21) 
    354354/* VM Exit when executing a MOV DRx instruction. */ 
    355 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MOV_DR_EXIT            BIT(23) 
     355#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MOV_DR_EXIT            RT_BIT(23) 
    356356/* VM Exit when executing IO instructions. */ 
    357 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_UNCOND_IO_EXIT         BIT(24) 
     357#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_UNCOND_IO_EXIT         RT_BIT(24) 
    358358/* Use IO bitmaps. */ 
    359 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_IO_BITMAPS         BIT(25) 
     359#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_IO_BITMAPS         RT_BIT(25) 
    360360/* Use MSR bitmaps. */ 
    361 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_MSR_BITMAPS        BIT(28) 
     361#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_MSR_BITMAPS        RT_BIT(28) 
    362362/* VM Exit when executing the MONITOR instruction. */ 
    363 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MONITOR_EXIT           BIT(29) 
     363#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MONITOR_EXIT           RT_BIT(29) 
    364364/* VM Exit when executing the PAUSE instruction. */ 
    365 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT             BIT(30) 
     365#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT             RT_BIT(30) 
    366366/** @} */ 
    367367 
    …… 
    371371 */ 
    372372/** 64 bits guest mode. Must be 0 for CPUs that don't support AMD64. */ 
    373 #define VMX_VMCS_CTRL_ENTRY_CONTROLS_IA64_MODE                  BIT(9) 
     373#define VMX_VMCS_CTRL_ENTRY_CONTROLS_IA64_MODE                  RT_BIT(9) 
    374374/** In SMM mode after VM-entry. */ 
    375 #define VMX_VMCS_CTRL_ENTRY_CONTROLS_ENTRY_SMM                  BIT(10) 
     375#define VMX_VMCS_CTRL_ENTRY_CONTROLS_ENTRY_SMM                  RT_BIT(10) 
    376376/** Disable dual treatment of SMI and SMM; must be zero for VM-entry outside of SMM. */ 
    377 #define VMX_VMCS_CTRL_ENTRY_CONTROLS_DEACTIVATE_DUALMON         BIT(11) 
     377#define VMX_VMCS_CTRL_ENTRY_CONTROLS_DEACTIVATE_DUALMON         RT_BIT(11) 
    378378/** @} */ 
    379379 
    …… 
    383383 */ 
    384384/** Return to long mode after a VM-exit. */ 
    385 #define VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_AMD64                  BIT(9) 
     385#define VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_AMD64                  RT_BIT(9) 
    386386/** Acknowledge external interrupts with the irq controller if one caused a VM-exit. */ 
    387 #define VMX_VMCS_CTRL_EXIT_CONTROLS_ACK_EXTERNAL_IRQ            BIT(15) 
     387#define VMX_VMCS_CTRL_EXIT_CONTROLS_ACK_EXTERNAL_IRQ            RT_BIT(15) 
    388388/** @} */ 
    389389 
    …… 
    407407#define VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT           8 
    408408#define VMX_EXIT_INTERRUPTION_INFO_TYPE(a)              ((a >> VMX_EXIT_INTERRU