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Changeset 14650

Timestamp:

11/26/08 16:25:13 (1 month ago)

Author:

vboxsync

Message:

Partial VT-x cleanup.

Files:

trunk/include/VBox/hwacc_vmx.h (modified) (4 diffs)
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp (modified) (9 diffs)

Legend:

: Unmodified
: Added
: Removed
: Modified
: Copied
: Moved

trunk/include/VBox/hwacc_vmx.h

r14649	r14650
1385	1385	* @returns VBox status code
1386	1386	* @param idxField VMCS index
1387		* @param u64Val 16, 32 or 64 bits value
1388		*/
1389		~~DECLASM(int) VMXWriteVMCS64(uint32_t idxField, uint64_t u64Val);~~
1390
1391		/**
1392		* Executes VMWRITE
1393		*
1394		* @returns VBox status code
1395		* @param idxField VMCS index
1396	1387	* @param u32Val 32 bits value
1397	1388	*/
…	…
1441	1432	#endif
1442	1433
	1434	/**
	1435	* Executes VMWRITE
	1436	*
	1437	* @returns VBox status code
	1438	* @param idxField VMCS index
	1439	* @param u64Val 16, 32 or 64 bits value
	1440	*/
	1441	#if HC_ARCH_BITS == 64
	1442	DECLASM(int) VMXWriteVMCS64(uint32_t idxField, uint64_t u64Val);
	1443	#else
	1444	DECLINLINE(int) VMXWriteVMCS64(uint32_t idxField, uint64_t u64Val)
	1445	{
	1446	int rc;
	1447
	1448	rc = VMXWriteVMCS32(idxField, u64Val);
	1449	rc \|= VMXWriteVMCS32(idxField + 1, (uint32_t)(u64Val >> 32ULL));
	1450	AssertRC(rc);
	1451	return rc;
	1452	}
	1453	#endif
	1454
1443	1455	#if HC_ARCH_BITS == 64
1444	1456	#define VMXWriteVMCS VMXWriteVMCS64
…	…
1447	1459	#endif /* HC_ARCH_BITS == 64 */
1448	1460
1449
1450		/**
1451		* Executes VMREAD
1452		*
1453		* @returns VBox status code
1454		* @param idxField VMCS index
1455		* @param pData Ptr to store VM field value
1456		*/
1457		~~DECLASM(int) VMXReadVMCS64(uint32_t idxField, uint64_t *pData);~~
1458	1461
1459	1462	/**
…	…
1528	1531	#endif
1529	1532
	1533	#if HC_ARCH_BITS == 64
	1534	/**
	1535	* Executes VMREAD
	1536	*
	1537	* @returns VBox status code
	1538	* @param idxField VMCS index
	1539	* @param pData Ptr to store VM field value
	1540	*/
	1541	DECLASM(int) VMXReadVMCS64(uint32_t idxField, uint64_t *pData);
	1542	#else
	1543	DECLINLINE(int) VMXReadVMCS64(uint32_t idxField, uint64_t *pData)
	1544	{
	1545	int rc;
	1546
	1547	uint32_t val_hi, val;
	1548	rc = VMXReadVMCS32(idxField, &val);
	1549	rc \|= VMXReadVMCS32(idxField + 1, &val_hi);
	1550	AssertRC(rc);
	1551	*pData = RT_MAKE_U64(val, val_hi);
	1552	return rc;
	1553	}
	1554	#endif
	1555
1530	1556	#if HC_ARCH_BITS == 64
1531	1557	# define VMXReadVMCS VMXReadVMCS64

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

r14649	r14650
413	413
414	414	/* Init TSC offset to zero. */
415		rc = VMXWriteVMCS(VMX_VMCS_CTRL_TSC_OFFSET_FULL, 0);
416		#if HC_ARCH_BITS == 32
417		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_TSC_OFFSET_HIGH, 0);
418		#endif
419		AssertRC(rc);
420
421		rc = VMXWriteVMCS(VMX_VMCS_CTRL_IO_BITMAP_A_FULL, 0);
422		#if HC_ARCH_BITS == 32
423		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_IO_BITMAP_A_HIGH, 0);
424		#endif
425		AssertRC(rc);
426
427		rc = VMXWriteVMCS(VMX_VMCS_CTRL_IO_BITMAP_B_FULL, 0);
428		#if HC_ARCH_BITS == 32
429		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_IO_BITMAP_B_HIGH, 0);
430		#endif
	415	rc = VMXWriteVMCS64(VMX_VMCS_CTRL_TSC_OFFSET_FULL, 0);
	416	AssertRC(rc);
	417
	418	rc = VMXWriteVMCS64(VMX_VMCS_CTRL_IO_BITMAP_A_FULL, 0);
	419	AssertRC(rc);
	420
	421	rc = VMXWriteVMCS64(VMX_VMCS_CTRL_IO_BITMAP_B_FULL, 0);
431	422	AssertRC(rc);
432	423
…	…
435	426	{
436	427	/* Optional */
437		rc = VMXWriteVMCS(VMX_VMCS_CTRL_MSR_BITMAP_FULL, pVM->hwaccm.s.vmx.pMSRBitmapPhys);
438		#if HC_ARCH_BITS == 32
439		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_MSR_BITMAP_HIGH, pVM->hwaccm.s.vmx.pMSRBitmapPhys >> 32ULL);
440		#endif
	428	rc = VMXWriteVMCS64(VMX_VMCS_CTRL_MSR_BITMAP_FULL, pVM->hwaccm.s.vmx.pMSRBitmapPhys);
441	429	AssertRC(rc);
442	430	}
443	431
444	432	/* Clear MSR controls. */
445		rc = VMXWriteVMCS(VMX_VMCS_CTRL_VMEXIT_MSR_STORE_FULL, 0);
446		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_FULL, 0);
447		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_FULL, 0);
448		#if HC_ARCH_BITS == 32
449		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_VMEXIT_MSR_STORE_HIGH, 0);
450		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_HIGH, 0);
451		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_HIGH, 0);
452		#endif
	433	rc = VMXWriteVMCS64(VMX_VMCS_CTRL_VMEXIT_MSR_STORE_FULL, 0);
	434	rc \|= VMXWriteVMCS64(VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_FULL, 0);
	435	rc \|= VMXWriteVMCS64(VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_FULL, 0);
453	436	rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_EXIT_MSR_STORE_COUNT, 0);
454	437	rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_EXIT_MSR_LOAD_COUNT, 0);
…	…
460	443	/* Optional */
461	444	rc = VMXWriteVMCS(VMX_VMCS_CTRL_TPR_THRESHOLD, 0);
462		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_VAPIC_PAGEADDR_FULL, pVM->hwaccm.s.vmx.pAPICPhys);
463		#if HC_ARCH_BITS == 32
464		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_VAPIC_PAGEADDR_HIGH, pVM->hwaccm.s.vmx.pAPICPhys >> 32ULL);
465		#endif
	445	rc \|= VMXWriteVMCS64(VMX_VMCS_CTRL_VAPIC_PAGEADDR_FULL, pVM->hwaccm.s.vmx.pAPICPhys);
466	446	AssertRC(rc);
467	447	}
468	448
469	449	/* Set link pointer to -1. Not currently used. */
470		#if HC_ARCH_BITS == 32
471		rc = VMXWriteVMCS(VMX_VMCS_GUEST_LINK_PTR_FULL, 0xFFFFFFFF);
472		rc \|= VMXWriteVMCS(VMX_VMCS_GUEST_LINK_PTR_HIGH, 0xFFFFFFFF);
473		#else
474		rc = VMXWriteVMCS(VMX_VMCS_GUEST_LINK_PTR_FULL, 0xFFFFFFFFFFFFFFFF);
475		#endif
	450	rc = VMXWriteVMCS64(VMX_VMCS_GUEST_LINK_PTR_FULL, 0xFFFFFFFFFFFFFFFF);
476	451	AssertRC(rc);
477	452
…	…
908	883	{
909	884	Pdpe = PGMGstGetPaePDPtr(pVM, i);
910		int rc = VMXWriteVMCS(VMX_VMCS_GUEST_PDPTR0_FULL + i*2, Pdpe.u);
911		#if HC_ARCH_BITS == 32
912		rc \|= VMXWriteVMCS(VMX_VMCS_GUEST_PDPTR0_FULL + i*2 + 1, Pdpe.u >> 32ULL);
913		#endif
	885	int rc = VMXWriteVMCS64(VMX_VMCS_GUEST_PDPTR0_FULL + i*2, Pdpe.u);
914	886	AssertRC(rc);
915	887	}
…	…
1289	1261	\| (VMX_EPT_PAGE_WALK_LENGTH_DEFAULT << VMX_EPT_PAGE_WALK_LENGTH_SHIFT);
1290	1262
1291		rc = VMXWriteVMCS(VMX_VMCS_CTRL_EPTP_FULL, pVCpu->hwaccm.s.vmx.GCPhysEPTP);
1292		#if HC_ARCH_BITS == 32
1293		rc = VMXWriteVMCS(VMX_VMCS_CTRL_EPTP_HIGH, (uint32_t)(pVCpu->hwaccm.s.vmx.GCPhysEPTP >> 32ULL));
1294		#endif
	1263	rc = VMXWriteVMCS64(VMX_VMCS_CTRL_EPTP_FULL, pVCpu->hwaccm.s.vmx.GCPhysEPTP);
1295	1264	AssertRC(rc);
1296	1265
…	…
1359	1328
1360	1329	/* IA32_DEBUGCTL MSR. */
1361		rc = VMXWriteVMCS(VMX_VMCS_GUEST_DEBUGCTL_FULL, 0);
1362		rc \|= VMXWriteVMCS(VMX_VMCS_GUEST_DEBUGCTL_HIGH, 0);
	1330	rc = VMXWriteVMCS64(VMX_VMCS_GUEST_DEBUGCTL_FULL, 0);
1363	1331	AssertRC(rc);
1364	1332
…	…
1397	1365	{
1398	1366	/* Note: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT takes precedence over TSC_OFFSET */
1399		rc = VMXWriteVMCS(VMX_VMCS_CTRL_TSC_OFFSET_FULL, u64TSCOffset);
1400		#if HC_ARCH_BITS == 32
1401		rc \|= VMXWriteVMCS(VMX_VMCS_CTRL_TSC_OFFSET_HIGH, (uint32_t)(u64TSCOffset >> 32ULL));
1402		#endif
	1367	rc = VMXWriteVMCS64(VMX_VMCS_CTRL_TSC_OFFSET_FULL, u64TSCOffset);
1403	1368	AssertRC(rc);
1404	1369
…	…
2373	2338	Assert(pVM->hwaccm.s.fNestedPaging);
2374	2339
2375		#if HC_ARCH_BITS == 64
2376		rc = VMXReadVMCS(VMX_VMCS_EXIT_PHYS_ADDR_FULL, &GCPhys);
2377		AssertRC(rc);
2378		#else
2379		uint32_t val_hi;
2380		rc = VMXReadVMCS(VMX_VMCS_EXIT_PHYS_ADDR_FULL, &val);
2381		AssertRC(rc);
2382		rc = VMXReadVMCS(VMX_VMCS_EXIT_PHYS_ADDR_HIGH, &val_hi);
2383		AssertRC(rc);
2384		GCPhys = RT_MAKE_U64(val, val_hi);
2385		#endif
2386
	2340	rc = VMXReadVMCS64(VMX_VMCS_EXIT_PHYS_ADDR_FULL, &GCPhys);
	2341	AssertRC(rc);
2387	2342	Assert(((exitQualification >> 7) & 3) != 2);
2388	2343
…	…
2435	2390	Assert(pVM->hwaccm.s.fNestedPaging);
2436	2391
2437		#if HC_ARCH_BITS == 64
2438		rc = VMXReadVMCS(VMX_VMCS_EXIT_PHYS_ADDR_FULL, &GCPhys);
2439		AssertRC(rc);
2440		#else
2441		uint32_t val_hi;
2442		rc = VMXReadVMCS(VMX_VMCS_EXIT_PHYS_ADDR_FULL, &val);
2443		AssertRC(rc);
2444		rc = VMXReadVMCS(VMX_VMCS_EXIT_PHYS_ADDR_HIGH, &val_hi);
2445		AssertRC(rc);
2446		GCPhys = RT_MAKE_U64(val, val_hi);
2447		#endif
	2392	rc = VMXReadVMCS64(VMX_VMCS_EXIT_PHYS_ADDR_FULL, &GCPhys);
	2393	AssertRC(rc);
2448	2394
2449	2395	Log(("VMX_EXIT_EPT_MISCONFIG for %VGp\n", GCPhys));

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Changeset 14650

Legend:

trunk/include/VBox/hwacc_vmx.h

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

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