Changeset 14649

Timestamp:

11/26/08 16:01:53 (1 month ago)

Author:

vboxsync

Message:

Backed out 39954

Files:

• trunk/include/VBox/hwacc_vmx.h (modified) (7 diffs)
• trunk/src/VBox/VMM/HWACCMInternal.h (modified) (1 diff)
• trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp (modified) (44 diffs)
• trunk/src/VBox/VMM/VMMR0/HWVMXR0.h (modified) (2 diffs)

trunk/include/VBox/hwacc_vmx.h

@@ -983 +983 @@
- * @{
- */
-64
-64
-64
-64
-64
-64
-64
-64
+
+
+
+
+
+
+
+
-/** @} */
-
@@ -997 +997 @@
- * @{
- */
-64
-64
-64
-64
-64
-64
+
+
+
+
+
+
-/** @} */
-
@@ -1124 +1124 @@
- * @{
- */
-64_GUEST_CR0
-64_GUEST_CR3
-64_GUEST_CR4
-64_GUEST_ES_BASE
-64_GUEST_CS_BASE
-64_GUEST_SS_BASE
-64_GUEST_DS_BASE
-64_GUEST_FS_BASE
-64_GUEST_GS_BASE
-64_GUEST_LDTR_BASE
-64_GUEST_TR_BASE
-64_GUEST_GDTR_BASE
-64_GUEST_IDTR_BASE
-64_GUEST_DR7
-64_GUEST_RSP
-64_GUEST_RIP
-64_GUEST_RFLAGS
-64_GUEST_DEBUG_EXCEPTIONS
-64_GUEST_SYSENTER_ESP
-64_GUEST_SYSENTER_EIP
+_GUEST_CR0  
+_GUEST_CR3  
+_GUEST_CR4  
+_GUEST_ES_BASE  
+_GUEST_CS_BASE  
+_GUEST_SS_BASE  
+_GUEST_DS_BASE  
+_GUEST_FS_BASE  
+_GUEST_GS_BASE  
+_GUEST_LDTR_BASE  
+_GUEST_TR_BASE  
+_GUEST_GDTR_BASE  
+_GUEST_IDTR_BASE  
+_GUEST_DR7  
+_GUEST_RSP  
+_GUEST_RIP  
+_GUEST_RFLAGS  
+_GUEST_DEBUG_EXCEPTIONS  
+_GUEST_SYSENTER_ESP  
+_GUEST_SYSENTER_EIP  
-/** @} */
-
@@ -1385 +1385 @@
- * @returns VBox status code
- * @param   idxField        VMCS index
+ * @param   u64Val          16, 32 or 64 bits value
+ */
+DECLASM(int) VMXWriteVMCS64(uint32_t idxField, uint64_t u64Val);
+
+/**
+ * Executes VMWRITE
+ *
+ * @returns VBox status code
+ * @param   idxField        VMCS index
- * @param   u32Val          32 bits value
- */
@@ -1432 +1441 @@
-#endif
-
-/**
- * Executes VMWRITE
- *
- * @returns VBox status code
- * @param   idxField        VMCS index
- * @param   u64Val          16, 32 or 64 bits value
- */
-#if HC_ARCH_BITS == 64
-DECLASM(int) VMXWriteVMCS64(uint32_t idxField, uint64_t u64Val);
-#else
-DECLINLINE(int) VMXWriteVMCS64(uint32_t idxField, uint64_t u64Val)
-{
-    int rc;
-
-    rc  = VMXWriteVMCS32(idxField, u64Val);
-    rc |= VMXWriteVMCS32(idxField + 1, (uint32_t)(u64Val >> 32ULL));
-    AssertRC(rc);
-    return rc;
-}
-#endif
-
-#if HC_ARCH_BITS == 64
-#define VMXWriteVMCS VMXWriteVMCS64
@@ -1459 +1447 @@
-#endif /* HC_ARCH_BITS == 64 */
-
+
+/**
+ * Executes VMREAD
+ *
+ * @returns VBox status code
+ * @param   idxField        VMCS index
+ * @param   pData           Ptr to store VM field value
+ */
+DECLASM(int) VMXReadVMCS64(uint32_t idxField, uint64_t *pData);
-
-/**
@@ -1532 +1529 @@
-
-#if HC_ARCH_BITS == 64
-/**
- * Executes VMREAD
- *
- * @returns VBox status code
- * @param   idxField        VMCS index
- * @param   pData           Ptr to store VM field value
- */
-DECLASM(int) VMXReadVMCS64(uint32_t idxField, uint64_t *pData);
-#else
-DECLINLINE(int) VMXReadVMCS64(uint32_t idxField, uint64_t *pData)
-{
-    int rc;
-
-    uint32_t val_hi, val;
-    rc  = VMXReadVMCS32(idxField, &val);
-    rc |= VMXReadVMCS32(idxField + 1, &val_hi);
-    AssertRC(rc);
-    *pData = RT_MAKE_U64(val, val_hi);
-    return rc;
-}
-#endif
-
-#if HC_ARCH_BITS == 64
-# define VMXReadVMCS VMXReadVMCS64
-#else

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -399 +399 @@
-        struct
-        {
-RFLAGS                   r
+EFLAGS                   e
-            uint32_t                    fValid;
-        } RealMode;

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -413 +413 @@
-
-        /* Init TSC offset to zero. */
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-        AssertRC(rc);
-
@@ -426 +435 @@
-        {
-            /* Optional */
-
+
+
+
+
-            AssertRC(rc);
-        }
-
-        /* Clear MSR controls. */
-
-
-
+
+
+
+
+
+
+
+
-        rc |= VMXWriteVMCS(VMX_VMCS_CTRL_EXIT_MSR_STORE_COUNT, 0);
-        rc |= VMXWriteVMCS(VMX_VMCS_CTRL_EXIT_MSR_LOAD_COUNT, 0);
@@ -443 +460 @@
-            /* Optional */
-            rc  = VMXWriteVMCS(VMX_VMCS_CTRL_TPR_THRESHOLD, 0);
-
+
+
+
+
-            AssertRC(rc);
-        }
-
-        /* Set link pointer to -1. Not currently used. */
-
+
+
+
+
+
+
-        AssertRC(rc);
-
@@ -883 +908 @@
-        {
-            Pdpe = PGMGstGetPaePDPtr(pVM, i);
-
+
+
+
+
-            AssertRC(rc);
-        }
@@ -949 +977 @@
-{
-    int         rc = VINF_SUCCESS;
-    uint64_t    val64;
-    X86RFLAGS   rflags;
-    RTGCUINTPTR val;
+    X86EFLAGS   eflags;
-
-    /* Guest CPU context: ES, CS, SS, DS, FS, GS. */
@@ -1032 +1059 @@
-            rc =  VMXWriteVMCS(VMX_VMCS16_GUEST_FIELD_LDTR,         0);
-            rc |= VMXWriteVMCS(VMX_VMCS32_GUEST_LDTR_LIMIT,         0);
-64(VMX_VMCS64_GUEST_LDTR_BASE,
+(VMX_VMCS_GUEST_LDTR_BASE,  
-            /* Note: vmlaunch will fail with 0 or just 0x02. No idea why. */
-            rc |= VMXWriteVMCS(VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS, 0x82 /* present, LDT */);
@@ -1040 +1067 @@
-            rc =  VMXWriteVMCS(VMX_VMCS16_GUEST_FIELD_LDTR,         pCtx->ldtr);
-            rc |= VMXWriteVMCS(VMX_VMCS32_GUEST_LDTR_LIMIT,         pCtx->ldtrHid.u32Limit);
-64(VMX_VMCS64_GUEST_LDTR_BASE,
+(VMX_VMCS_GUEST_LDTR_BASE,  
-            rc |= VMXWriteVMCS(VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS, pCtx->ldtrHid.Attr.u);
-        }
@@ -1058 +1085 @@
-            AssertRC(rc);
-
-  
-  
-64(VMX_VMCS64_GUEST_TR_BASE,
+
+
+(VMX_VMCS_GUEST_TR_BASE,  
-
-            X86DESCATTR attr;
@@ -1072 +1099 @@
-#endif /* HWACCM_VMX_EMULATE_REALMODE */
-        {
-  
-  
-64(VMX_VMCS64_GUEST_TR_BASE,
+
+
+(VMX_VMCS_GUEST_TR_BASE,  
-
-            val = pCtx->trHid.Attr.u;
@@ -1092 +1119 @@
-    if (pVCpu->hwaccm.s.fContextUseFlags & HWACCM_CHANGED_GUEST_GDTR)
-    {
-  
-64(VMX_VMCS64_GUEST_GDTR_BASE,
+
+(VMX_VMCS_GUEST_GDTR_BASE,  
-        AssertRC(rc);
-    }
@@ -1099 +1126 @@
-    if (pVCpu->hwaccm.s.fContextUseFlags & HWACCM_CHANGED_GUEST_IDTR)
-    {
-  
-64(VMX_VMCS64_GUEST_IDTR_BASE,
+
+(VMX_VMCS_GUEST_IDTR_BASE,  
-        AssertRC(rc);
-    }
@@ -1107 +1134 @@
-     * Sysenter MSRs (unconditional)
-     */
-    
-64(VMX_VMCS64
-64(VMX_VMCS64
+
+(VMX_VMCS
+(VMX_VMCS
-    AssertRC(rc);
-
@@ -1115 +1142 @@
-    if (pVCpu->hwaccm.s.fContextUseFlags & HWACCM_CHANGED_GUEST_CR0)
-    {
-64
-64(VMX_VMCS64_CTRL_CR0_READ_SHADOW,   val64
-RX64\n", val64
+
+(VMX_VMCS_CTRL_CR0_READ_SHADOW,   val
+08x\n", val
-        if (CPUMIsGuestFPUStateActive(pVCpu) == false)
-        {
-            /* Always use #NM exceptions to load the FPU/XMM state on demand. */
-64
+
-        }
-        else
-        {
-            /** @todo check if we support the old style mess correctly. */
-64
+
-                Log(("Forcing X86_CR0_NE!!!\n"));
-
-64
+
-        }
-        /* Note: protected mode & paging are always enabled; we use them for emulating real and protected mode without paging too. */
-64
+
-        if (pVM->hwaccm.s.fNestedPaging)
-        {
@@ -1153 +1180 @@
-        {
-            /* Note: We must also set this as we rely on protecting various pages for which supervisor writes must be caught. */
-64
+
-        }
-
-        /* Always enable caching. */
-64
-
-64(VMX_VMCS64_GUEST_CR0,              val64
-RX64\n", val64
+
+
+(VMX_VMCS_GUEST_CR0,              val
+08x\n", val
-        /* CR0 flags owned by the host; if the guests attempts to change them, then
-         * the VM will exit.
-         */
-64
-  
-  
-  
-  
-  
-  
-  
-  
-64
-
-64(VMX_VMCS64_CTRL_CR0_MASK, val64
-RX64\n", val64
+
+
+
+
+
+
+
+
+
+
+
+(VMX_VMCS_CTRL_CR0_MASK, val
+08x\n", val
-        AssertRC(rc);
-    }
@@ -1182 +1209 @@
-    {
-        /* CR4 */
-64(VMX_VMCS64
-RX64
+(VMX_VMCS
+08x
-        /* Set the required bits in cr4 too (currently X86_CR4_VMXE). */
-64
+
-
-        if (!pVM->hwaccm.s.fNestedPaging)
@@ -1199 +1226 @@
-            case PGMMODE_PAE_NX:        /* PAE paging with NX enabled. */
-                /** @todo use normal 32 bits paging */
-64
+
-                break;
-
@@ -1219 +1246 @@
-        {
-            /* We use 4 MB pages in our identity mapping page table for real and protected mode without paging. */
-64
+
-            /* Our identity mapping is a 32 bits page directory. */
-64
+
-        }
-
@@ -1227 +1254 @@
-        /* Real mode emulation using v86 mode with CR4.VME (interrupt redirection using the int bitmap in the TSS) */
-        if (CPUMIsGuestInRealModeEx(pCtx))
-64
+
-#endif /* HWACCM_VMX_EMULATE_REALMODE */
-
-64(VMX_VMCS64_GUEST_CR4,              val64
-64
+(VMX_VMCS_GUEST_CR4,              val
+
-        /* CR4 flags owned by the host; if the guests attempts to change them, then
-         * the VM will exit.
-         */
-64
+
-#ifdef HWACCM_VMX_EMULATE_REALMODE
-              | X86_CR4_VME
@@ -1243 +1270 @@
-              | X86_CR4_PSE
-              | X86_CR4_VMXE;
-64
-
-64(VMX_VMCS64_CTRL_CR4_MASK, val64
-RX64\n", val64
+
+
+(VMX_VMCS_CTRL_CR4_MASK, val
+08x\n", val
-        AssertRC(rc);
-    }
@@ -1262 +1289 @@
-                                             | (VMX_EPT_PAGE_WALK_LENGTH_DEFAULT << VMX_EPT_PAGE_WALK_LENGTH_SHIFT);
-
-
+
+
+
+
-            AssertRC(rc);
-
@@ -1276 +1306 @@
-                 * take care of the translation to host physical addresses.
-                 */
-64
+
-            }
-            else
-            {
-                /* Save the real guest CR3 in VMX_VMCS_GUEST_CR3 */
-64
+
-                /* Prefetch the four PDPT entries in PAE mode. */
-                vmxR0PrefetchPAEPdptrs(pVM, pCtx);
@@ -1288 +1318 @@
-        else
-        {
-64
-64
+
+
-        }
-
-        /* Save our shadow CR3 register. */
-64(VMX_VMCS64_GUEST_CR3, val64
+(VMX_VMCS_GUEST_CR3, val
-        AssertRC(rc);
-    }
@@ -1308 +1338 @@
-
-        /* Resync DR7 */
-64(VMX_VMCS64
+(VMX_VMCS
-        AssertRC(rc);
-
@@ -1329 +1359 @@
-
-        /* IA32_DEBUGCTL MSR. */
-
+
+
-        AssertRC(rc);
-
-        /** @todo do we really ever need this? */
-= VMXWriteVMCS64(VMX_VMCS64_GUEST_DEBUG_EXCEPTIONS,
+|= VMXWriteVMCS(VMX_VMCS_GUEST_DEBUG_EXCEPTIONS,        
-        AssertRC(rc);
-    }
-
-    /* EIP, ESP and EFLAGS */
-64(VMX_VMCS64
-64(VMX_VMCS64
+(VMX_VMCS
+(VMX_VMCS
-    AssertRC(rc);
-
-    /* Bits 22-31, 15, 5 & 3 must be zero. Bit 1 must be 1. */
-rflags      = pCtx->r
-rflags.u64
-rflags.u64
+eflags      = pCtx->e
+eflags.u32
+eflags.u32
-
-#ifdef HWACCM_VMX_EMULATE_REALMODE
@@ -1351 +1382 @@
-    if (CPUMIsGuestInRealModeEx(pCtx))
-    {
-rflags = r
-
-r
-r
+eflags = e
+
+e
+e
-    }
-#endif /* HWACCM_VMX_EMULATE_REALMODE */
-= VMXWriteVMCS64(VMX_VMCS64_GUEST_RFLAGS,           rflags.u64
+  = VMXWriteVMCS(VMX_VMCS_GUEST_RFLAGS,           eflags.u32
-    AssertRC(rc);
-
@@ -1366 +1397 @@
-    {
-        /* Note: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT takes precedence over TSC_OFFSET */
-
+
+
+
+
-        AssertRC(rc);
-
@@ -1408 +1442 @@
-#endif
-        /* Unconditionally update these as wrmsr might have changed them. */
-64(VMX_VMCS64
-
-64(VMX_VMCS64
+(VMX_VMCS
+
+(VMX_VMCS
-        AssertRC(rc);
-    }
@@ -1436 +1470 @@
-DECLINLINE(int) VMXR0SaveGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
-{
-
-
-
+
+
-    int         rc;
-
-    /* Let's first sync back eip, esp, and eflags. */
-64(VMX_VMCS64_GUEST_RIP,              &pCtx->rip
+(VMX_VMCS_GUEST_RIP,              &val
-    AssertRC(rc);
-
+
+
-    AssertRC(rc);
-
+
+
-    AssertRC(rc);
+    pCtx->eflags.u32        = val;
-
-    /* Take care of instruction fusing (sti, mov ss) */
-
+
+
-    if (uInterruptState != 0)
-    {
@@ -1461 +1498 @@
-
-    /* Control registers. */
-64(VMX_VMCS64_CTRL_CR0_READ_SHADOW,  &u64
-64(VMX_VMCS64_GUEST_CR0,             &val64
-64 = (u64Shadow & pVCpu->hwaccm.s.vmx.cr0_mask) | (val64
-64
-
-64(VMX_VMCS64_CTRL_CR4_READ_SHADOW,  &u64
-64(VMX_VMCS64_GUEST_CR4,             &val64
-64 = (u64Shadow & pVCpu->hwaccm.s.vmx.cr4_mask) | (val64
-64
+(VMX_VMCS_CTRL_CR0_READ_SHADOW,   &val
+(VMX_VMCS_GUEST_CR0,              &val
+ = (valShadow & pVCpu->hwaccm.s.vmx.cr0_mask) | (val
+
+
+(VMX_VMCS_CTRL_CR4_READ_SHADOW,   &val
+(VMX_VMCS_GUEST_CR4,              &val
+ = (valShadow & pVCpu->hwaccm.s.vmx.cr4_mask) | (val
+
-
-    /* Note: no reason to sync back the CRx registers. They can't be changed by the guest. */
@@ -1479 +1516 @@
-        CPUMSetGuestCR2(pVM, ASMGetCR2());
-
-64(VMX_VMCS64_GUEST_CR3, &val64
-
-64
-
-64
-64
+(VMX_VMCS_GUEST_CR3, &val
+
+
+
+
+
-        }
-        /* Prefetch the four PDPT entries in PAE mode. */
@@ -1491 +1528 @@
-
-    /* Sync back DR7 here. */
-
+
+
-
-    /* Guest CPU context: ES, CS, SS, DS, FS, GS. */
@@ -1504 +1542 @@
-     * System MSRs
-     */
-   
+
-    pCtx->SysEnter.cs       = val;
-
-
+
+
+
+
-
-    /* Misc. registers; must sync everything otherwise we can get out of sync when jumping to ring 3. */
-    VMX_READ_SELREG(LDTR, ldtr);
-
-   
+
-    pCtx->gdtr.cbGdt        = val;
-
-
-
+
+
+
+
-    pCtx->idtr.cbIdt        = val;
-
+
+
-
-#ifdef HWACCM_VMX_EMULATE_REALMODE
@@ -1526 +1568 @@
-        /* Hide our emulation flags */
-        pCtx->eflags.Bits.u1VM   = 0;
-r
+e
-
-        /* Force a TR resync every time in case we switch modes. */
@@ -1683 +1725 @@
-    int         rc = VINF_SUCCESS;
-    RTCCUINTREG val;
-    uint64_t    val64;
-    RTCCUINTREG exitReason, instrError, cbInstr;
-uint64_t   
+RTGCUINTPTR
-    RTGCUINTPTR intInfo = 0; /* shut up buggy gcc 4 */
-    RTGCUINTPTR errCode, instrInfo;
@@ -1964 +2005 @@
-    rc |= VMXReadVMCS(VMX_VMCS32_RO_EXIT_INSTR_INFO, &val);
-    instrInfo = val;
-
+
+
-    AssertRC(rc);
-
@@ -2214 +2256 @@
-
-                    /* Resync DR7 */
-64(VMX_VMCS64
+(VMX_VMCS
-                    AssertRC(rc);
-
@@ -2331 +2373 @@
-        Assert(pVM->hwaccm.s.fNestedPaging);
-
-
-
+
+
+
+
+
+
+
+
+
+
+
-
-        Assert(((exitQualification >> 7) & 3) != 2);
@@ -2384 +2435 @@
-        Assert(pVM->hwaccm.s.fNestedPaging);
-
-
-
+
+
+
+
+
+
+
+
+
+
+
-
-        Log(("VMX_EXIT_EPT_MISCONFIG for %VGp\n", GCPhys));
@@ -2743 +2803 @@
-
-                            /* Resync DR7 */
-64(VMX_VMCS64
+(VMX_VMCS
-                            AssertRC(rc);
-
@@ -2891 +2951 @@
-        Log(("VMX_EXIT_ERR_INVALID_GUEST_STATE\n"));
-
-64(VMX_VMCS64_GUEST_RIP, &val64
-64
-
-64(VMX_VMCS64_GUEST_CR0, &val64
-64_GUEST_CR0        %RX64\n", val64
-
-64(VMX_VMCS64_GUEST_CR3, &val64
-64_GUEST_CR3        %RGp\n", val64
-
-64(VMX_VMCS64_GUEST_CR4, &val64
-64_GUEST_CR4        %RX64\n", val64
-
-64(VMX_VMCS64_GUEST_RFLAGS, &val64
-64_GUEST_RFLAGS     %08x\n", val64
+(VMX_VMCS_GUEST_RIP, &val
+
+
+(VMX_VMCS_GUEST_CR0, &val
+_GUEST_CR0        %RX64\n", val
+
+(VMX_VMCS_GUEST_CR3, &val
+_GUEST_CR3        %RGp\n", val
+
+(VMX_VMCS_GUEST_CR4, &val
+_GUEST_CR4        %RX64\n", val
+
+(VMX_VMCS_GUEST_RFLAGS, &val
+_GUEST_RFLAGS     %08x\n", val
-
-        VMX_LOG_SELREG(CS, "CS");
@@ -2915 +2975 @@
-        VMX_LOG_SELREG(LDTR, "LDTR");
-
-64(VMX_VMCS64_GUEST_GDTR_BASE, &val64
-64_GUEST_GDTR_BASE    %RGv\n", (RTGCPTR)val64
-64(VMX_VMCS64_GUEST_IDTR_BASE, &val64
-64_GUEST_IDTR_BASE    %RGv\n", (RTGCPTR)val64
+(VMX_VMCS_GUEST_GDTR_BASE, &val
+_GUEST_GDTR_BASE    %RGv\n", val
+(VMX_VMCS_GUEST_IDTR_BASE, &val
+_GUEST_IDTR_BASE    %RGv\n", val
-#endif /* VBOX_STRICT */
-        rc = VERR_VMX_INVALID_GUEST_STATE;
@@ -3153 +3213 @@
-    {
-        int         rc;
-
+, val
-
-        rc  = VMXReadVMCS(VMX_VMCS32_RO_EXIT_REASON, &exitReason);
@@ -3167 +3227 @@
-
-#ifdef VBOX_STRICT
-
-
-
-
+
+
-
-            ASMGetGDTR(&gdtr);
-
-64(VMX_VMCS64_GUEST_RIP, &val64
-64
+(VMX_VMCS_GUEST_RIP, &val
+
-            VMXReadVMCS(VMX_VMCS_CTRL_PIN_EXEC_CONTROLS, &val);
-            Log(("VMX_VMCS_CTRL_PIN_EXEC_CONTROLS   %08x\n", val));
@@ -3197 +3255 @@
-            Log(("VMX_VMCS_HOST_FIELD_CS %08x\n", val));
-
-64(VMX_VMCS64_GUEST_RFLAGS, &val64
-RX64\n", val64
+(VMX_VMCS_GUEST_RFLAGS, &val
+08x\n", val
-
-