Changeset 13883

Timestamp:

11/05/08 18:04:48 (2 months ago)

Author:

vboxsync

Message:

Moved more data around.

Files:

• trunk/include/VBox/hwacc_svm.h (modified) (1 diff)
• trunk/include/VBox/hwacc_vmx.h (modified) (1 diff)
• trunk/src/VBox/VMM/HWACCM.cpp (modified) (6 diffs)
• trunk/src/VBox/VMM/HWACCMInternal.h (modified) (9 diffs)
• trunk/src/VBox/VMM/VMMAll/HWACCMAll.cpp (modified) (4 diffs)
• trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp (modified) (4 diffs)
• trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp (modified) (34 diffs)
• trunk/src/VBox/VMM/VMMR0/HWSVMR0.h (modified) (5 diffs)
• trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp (modified) (72 diffs)
• trunk/src/VBox/VMM/VMMR0/HWVMXR0.h (modified) (5 diffs)
• trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp (modified) (1 diff)

trunk/include/VBox/hwacc_svm.h

@@ -697 +697 @@
-
-#ifdef IN_RING0
-
-
+PVMCPU pVCpu, 
+PVMCPU pVCpu, 
-#endif /* IN_RING0 */
-

trunk/include/VBox/hwacc_vmx.h

@@ -1554 +1554 @@
-
-#ifdef IN_RING0
-
-
+PVMCPU pVCpu, 
+PVMCPU pVCpu, 
-#endif /* IN_RING0 */
-

trunk/src/VBox/VMM/HWACCM.cpp

@@ -103 +103 @@
-    pVM->hwaccm.s.fActive        = false;
-    pVM->hwaccm.s.fNestedPaging  = false;
-
-    /* On first entry we'll sync everything. */
-    pVM->hwaccm.s.fContextUseFlags = HWACCM_CHANGED_ALL;
-
-    /*
@@ -874 +871 @@
-        hwaccmR3DisableRawMode(pVM);
-
-    /* On first entry we'll sync everything. */
-    pVM->hwaccm.s.fContextUseFlags = HWACCM_CHANGED_ALL;
-
-    for (unsigned i=0;i<pVM->cCPUs;i++)
-    {
+        /* On first entry we'll sync everything. */
+        pVM->aCpus[i].hwaccm.s.fContextUseFlags = HWACCM_CHANGED_ALL;
+
-        pVM->aCpus[i].hwaccm.s.vmx.cr0_mask = 0;
-        pVM->aCpus[i].hwaccm.s.vmx.cr4_mask = 0;
-
-
-pVM->hwaccm.s.Event.fPending = false;
+
+
+}
-
-    /* Reset state information for real-mode emulation in VT-x. */
@@ -1050 +1047 @@
-VMMR3DECL(bool) HWACCMR3IsEventPending(PVM pVM)
-{
-
+
+
-}
-
@@ -1070 +1068 @@
-
-        case VERR_VMX_INVALID_VMCS_PTR:
-
-
+aCpus[i].
+aCpus[i].
-            break;
-
-        case VERR_VMX_UNABLE_TO_START_VM:
-
-
+aCpus[i].
+aCpus[i].
-            break;
-
-        case VERR_VMX_UNABLE_TO_RESUME_VM:
-
-
+aCpus[i].
+aCpus[i].
-            break;
-
@@ -1103 +1101 @@
-    Log(("hwaccmR3Save:\n"));
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
-
-    return VINF_SUCCESS;
@@ -1138 +1139 @@
-        return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
-    }
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
-    return VINF_SUCCESS;
-}

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -188 +188 @@
-    bool                        fAllowVPID;
-
-    /** Set if we need to flush the TLB during the world switch. */
-    bool                        fForceTLBFlush;
-
-    /** Old style FPU reporting trap mask override performed (optimization) */
-    bool                        fFPUOldStyleOverride;
-
-    /** Explicit alignment padding to make 32-bit gcc align u64RegisterMask
-     *  naturally. */
-    bool                        padding[1];
-
-    /** HWACCM_CHANGED_* flags. */
-    RTUINT                      fContextUseFlags;
-
-    /* Id of the last cpu we were executing code on (NIL_RTCPUID for the first time) */
-    RTCPUID                     idLastCpu;
-
-    /* TLB flush count */
-    RTUINT                      cTLBFlushes;
-
-    /* Current ASID in use by the VM */
-    RTUINT                      uCurrentASID;
-
-    /** Maximum ASID allowed. */
-    RTUINT                      uMaxASID;
@@ -222 +204 @@
-        /** Set when we've enabled VMX. */
-        bool                        fEnabled;
-
-        /** Set if we can use VMXResume to execute guest code. */
-        bool                        fResumeVM;
-
-        /** Set if VPID is supported. */
@@ -271 +250 @@
-
-        /** Ring 0 handlers for VT-x. */
-
+, PVMCPU pVCpu
-
-        /** Host CR4 value (set by ring-0 VMX init) */
@@ -304 +283 @@
-        VMX_FLUSH                   enmFlushPage;
-        VMX_FLUSH                   enmFlushContext;
-
-        /** Real-mode emulation state. */
-        struct
-        {
-            X86EFLAGS                   eflags;
-            uint32_t                    fValid;
-        } RealMode;
-
-        struct
-        {
-            uint64_t                u64VMCSPhys;
-            uint32_t                ulVMCSRevision;
-            uint32_t                ulLastInstrError;
-            uint32_t                ulLastExitReason;
-            uint32_t                padding;
-        } lasterror;
-    } vmx;
-
@@ -328 +291 @@
-        /** Set when we've enabled SVM. */
-        bool                        fEnabled;
-        /** Set if we don't have to flush the TLB on VM entry. */
-        bool                        fResumeVM;
-        /** Set if erratum 170 affects the AMD cpu. */
-        bool                        fAlwaysFlushTLB;
+        /** Explicit alignment padding to make 32-bit gcc align u64RegisterMask
+         *  naturally. */
+        bool                        padding[1];
-
-        /** R0 memory object for the host VM control block (VMCB). */
@@ -366 +330 @@
-        uint32_t                    u32AMDFeatureEDX;
-    } cpuid;
-
-#if HC_ARCH_BITS == 32
-    uint32_t                        Alignment1;
-#endif
-
-    /** Event injection state. */
-    struct
-    {
-        uint32_t                    fPending;
-        uint32_t                    errCode;
-        uint64_t                    intInfo;
-    } Event;
-
-    /** Saved error from detection */
@@ -469 +421 @@
-typedef struct HWACCMCPU
-{
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-    struct
@@ -495 +468 @@
-        /** Current EPTP. */
-        RTHCPHYS                    GCPhysEPTP;
+
+        /** Real-mode emulation state. */
+        struct
+        {
+            X86EFLAGS                   eflags;
+            uint32_t                    fValid;
+        } RealMode;
+
+        struct
+        {
+            uint64_t                u64VMCSPhys;
+            uint32_t                ulVMCSRevision;
+            uint32_t                ulLastInstrError;
+            uint32_t                ulLastExitReason;
+            uint32_t                padding;
+        } lasterror;
+
-    } vmx;
-
@@ -510 +500 @@
-
-    } svm;
+
+    /** Event injection state. */
+    struct
+    {
+        uint32_t                    fPending;
+        uint32_t                    errCode;
+        uint64_t                    intInfo;
+    } Event;
-
-} HWACCMCPU;

trunk/src/VBox/VMM/VMMAll/HWACCMAll.cpp

@@ -54 +54 @@
-{
-#ifdef IN_RING0
+    PVMCPU pVCpu = &pVM->aCpus[HWACCMGetVMCPUId(pVM)];
-    if (pVM->hwaccm.s.vmx.fSupported)
-
+pVCpu, 
-
-    Assert(pVM->hwaccm.s.svm.fSupported);
-
+pVCpu, 
-#endif
-
@@ -74 +75 @@
-    LogFlow(("HWACCMFlushTLB\n"));
-
-
+aCpus[HWACCMGetVMCPUId(pVM)].
-    STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBManual);
-    return VINF_SUCCESS;
@@ -120 +121 @@
-
-#ifdef IN_RING0
+    PVMCPU pVCpu = &pVM->aCpus[HWACCMGetVMCPUId(pVM)];
-    if (pVM->hwaccm.s.vmx.fSupported)
-
+pVCpu, 
-
-    Assert(pVM->hwaccm.s.svm.fSupported);
-
+pVCpu, 
-#else
-    HWACCMFlushTLB(pVM);
@@ -139 +141 @@
-VMMDECL(bool) HWACCMHasPendingIrq(PVM pVM)
-{
-
+
+
-}
-

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -780 +780 @@
-    pVM->hwaccm.s.uMaxASID                  = HWACCMR0Globals.uMaxASID;
-
-
-
-
-
-
+
+
+
+
+
+
+
+
-
-    ASMAtomicWriteBool(&pCpu->fInUse, true);
@@ -850 +853 @@
-
-    ASMAtomicWriteBool(&pCpu->fInUse, true);
+
+    for (unsigned i=0;i<pVM->cCPUs;i++)
+    {
+        /* On first entry we'll sync everything. */
+        pVM->aCpus[i].hwaccm.s.fContextUseFlags = HWACCM_CHANGED_ALL;
+    }
-
-    /* Setup VT-x or AMD-V. */
@@ -887 +896 @@
-
-    /* Always reload the host context and the guest's CR0 register. (!!!!) */
-M
+Cpu
-
-    /* Setup the register and mask according to the current execution mode. */
@@ -943 +952 @@
-        CPUMR0SaveGuestFPU(pVM, pCtx);
-
-M
+Cpu
-    }
-

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -391 +391 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
+ * @param   pVCpu       The VM CPU to operate on.
- * @param   pVMCB       SVM control block
- * @param   pCtx        CPU Context
- */
-
+PVMCPU pVCpu, 
-{
-    int rc;
-
-    /* Dispatch any pending interrupts. (injected before, but a VM exit occurred prematurely) */
-M
+Cpu
-    {
-        SVM_EVENT Event;
-
-M->hwaccm.s.Event.intInfo, pVM
+Cpu->hwaccm.s.Event.intInfo, pVCpu
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatIntReinject);
-M
+Cpu
-        SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
-
-M
+Cpu
-        return VINF_SUCCESS;
-    }
@@ -525 +526 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-MCPU
+Cpu 
- */
-VMMR0DECL(int) SVMR0SaveHostState(PVM pVM, PVMCPU pVCpu)
@@ -542 +543 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-MCPU
+Cpu 
- * @param   pCtx        Guest context
- */
@@ -560 +561 @@
-
-    /* Guest CPU context: ES, CS, SS, DS, FS, GS. */
-M
+Cpu
-    {
-        SVM_WRITE_SELREG(CS, cs);
@@ -571 +572 @@
-
-    /* Guest CPU context: LDTR. */
-M
+Cpu
-    {
-        SVM_WRITE_SELREG(LDTR, ldtr);
@@ -577 +578 @@
-
-    /* Guest CPU context: TR. */
-M
+Cpu
-    {
-        SVM_WRITE_SELREG(TR, tr);
@@ -583 +584 @@
-
-    /* Guest CPU context: GDTR. */
-M
+Cpu
-    {
-        pVMCB->guest.GDTR.u32Limit = pCtx->gdtr.cbGdt;
@@ -590 +591 @@
-
-    /* Guest CPU context: IDTR. */
-M
+Cpu
-    {
-        pVMCB->guest.IDTR.u32Limit = pCtx->idtr.cbIdt;
@@ -604 +605 @@
-
-    /* Control registers */
-M
+Cpu
-    {
-        val = pCtx->cr0;
@@ -620 +621 @@
-
-                /* Also catch floating point exceptions as we need to report them to the guest in a different way. */
-M
+Cpu
-                {
-                    pVMCB->ctrl.u32InterceptException |= RT_BIT(X86_XCPT_MF);
-M
+Cpu
-                }
-            }
@@ -643 +644 @@
-    pVMCB->guest.u64CR2 = pCtx->cr2;
-
-M
+Cpu
-    {
-        /* Save our shadow CR3 register. */
@@ -659 +660 @@
-    }
-
-M
+Cpu
-    {
-        val = pCtx->cr4;
@@ -698 +699 @@
-
-    /* Debug registers. */
-M
+Cpu
-    {
-        pCtx->dr[6] |= X86_DR6_INIT_VAL;                                          /* set all reserved bits to 1. */
@@ -789 +790 @@
-
-    /* Done. */
-M
+Cpu
-
-    return VINF_SUCCESS;
@@ -800 +801 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-MCPU
+Cpu 
- * @param   pCtx        Guest context
- */
@@ -882 +883 @@
-    /* When external interrupts are pending, we should exit the VM when IF is set. */
-    /* Note! *After* VM_FF_INHIBIT_INTERRUPTS check!!! */
-
+Cpu, pV
-    if (RT_FAILURE(rc))
-    {
@@ -923 +924 @@
-#ifdef LOG_ENABLED
-    pCpu = HWACCMR0GetCurrentCpu();
-M
-M
-
-M
-M
+Cpu
+Cpu
+
+Cpu
+Cpu
-        else
-M
+Cpu
-    }
-    if (pCpu->fFlushTLB)
@@ -955 +956 @@
-    /* Force a TLB flush for the first world switch if the current cpu differs from the one we ran on last. */
-    /* Note that this can happen both for start and resume due to long jumps back to ring 3. */
-M
+Cpu
-            /* if the tlb flush count has changed, another VM has flushed the TLB of this cpu, so we can't use our current ASID anymore. */
-M
+Cpu
-    {
-        /* Force a TLB flush on VM entry. */
-M
+Cpu
-    }
-    else
-        Assert(!pCpu->fFlushTLB || pVM->hwaccm.s.svm.fAlwaysFlushTLB);
-
-M
+Cpu
-
-    /* Make sure we flush the TLB when required. Switch ASID to achieve the same thing, but without actually flushing the whole TLB (which is expensive). */
-M
+Cpu
-        && !pVM->hwaccm.s.svm.fAlwaysFlushTLB)
-    {
@@ -982 +983 @@
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushASID);
-
-M
-M
+Cpu
+Cpu
-    }
-    else
@@ -990 +991 @@
-
-        /* We never increase uCurrentASID in the fAlwaysFlushTLB (erratum 170) case. */
-M
-M
-
-M
-M
-
-M->hwaccm.s.cTLBFlushes == pCpu->cTLBFlushes, ("Flush count mismatch for cpu %d (%x vs %x)\n", pCpu->idCpu, pVM
+Cpu
+Cpu
+
+Cpu
+Cpu
+
+Cpu->hwaccm.s.cTLBFlushes == pCpu->cTLBFlushes, ("Flush count mismatch for cpu %d (%x vs %x)\n", pCpu->idCpu, pVCpu
-    AssertMsg(pCpu->uCurrentASID >= 1 && pCpu->uCurrentASID < pVM->hwaccm.s.uMaxASID, ("cpu%d uCurrentASID = %x\n", pCpu->idCpu, pCpu->uCurrentASID));
-M->hwaccm.s.uCurrentASID >= 1 && pVM->hwaccm.s.uCurrentASID < pVM->hwaccm.s.uMaxASID, ("cpu%d VM uCurrentASID = %x\n", pCpu->idCpu, pVM
-M
+Cpu->hwaccm.s.uCurrentASID >= 1 && pVCpu->hwaccm.s.uCurrentASID < pVM->hwaccm.s.uMaxASID, ("cpu%d VM uCurrentASID = %x\n", pCpu->idCpu, pVCpu
+Cpu
-
-#ifdef VBOX_WITH_STATISTICS
@@ -1009 +1010 @@
-
-    /* In case we execute a goto ResumeExecution later on. */
-M->hwaccm.s.svm
-M
+Cpu->hwaccm.s
+Cpu
-
-    Assert(sizeof(pVCpu->hwaccm.s.svm.pVMCBPhys) == 8);
@@ -1237 +1238 @@
-
-    /* Check if an injected event was interrupted prematurely. */
-M
+Cpu
-    if (    pVMCB->ctrl.ExitIntInfo.n.u1Valid
-        &&  pVMCB->ctrl.ExitIntInfo.n.u3Type != SVM_EVENT_SOFTWARE_INT /* we don't care about 'int xx' as the instruction will be restarted. */)
-    {
-M
+Cpu
-
-#ifdef LOG_ENABLED
-        SVM_EVENT Event;
-M
+Cpu
-
-        if (    exitCode == SVM_EXIT_EXCEPTION_E
@@ -1254 +1255 @@
-#endif
-
-M
+Cpu
-        /* Error code present? (redundant) */
-        if (pVMCB->ctrl.ExitIntInfo.n.u1ErrorCodeValid)
-        {
-M
+Cpu
-        }
-        else
-M
+Cpu
-    }
-#ifdef VBOX_WITH_STATISTICS
@@ -1336 +1337 @@
-                /* Continue execution. */
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
-M
+Cpu
-
-                goto ResumeExecution;
@@ -1641 +1642 @@
-        {
-        case 0:
-M
+Cpu
-            break;
-        case 2:
@@ -1647 +1648 @@
-        case 3:
-            Assert(!pVM->hwaccm.s.fNestedPaging);
-M
+Cpu
-            break;
-        case 4:
-M
+Cpu
-            break;
-        case 8:
@@ -1667 +1668 @@
-
-            /* Must be set by PGMSyncCR3 */
-M
+Cpu
-        }
-        if (rc == VINF_SUCCESS)
@@ -1733 +1734 @@
-        {
-            /* EIP has been updated already. */
-M
+Cpu
-
-            /* Only resume if successful. */
@@ -2036 +2037 @@
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatPendingHostIrq);
-        /* On the next entry we'll only sync the host context. */
-M
+Cpu
-    }
-    else
@@ -2043 +2044 @@
-        /** @todo we can do better than this */
-        /* Not in the VINF_PGM_CHANGE_MODE though! */
-M
+Cpu
-    }
-
@@ -2066 +2067 @@
-    Assert(pVM->hwaccm.s.svm.fSupported);
-
-M->hwaccm.s.idLastCpu, pVM
-M->hwaccm.s.svm
+Cpu->hwaccm.s.idLastCpu, pVCpu
+Cpu->hwaccm.s
-
-    /* Force to reload LDTR, so we'll execute VMLoad to load additional guest state. */
-M
+Cpu
-
-    return VINF_SUCCESS;
@@ -2100 +2101 @@
-
-        /* Resync the debug registers the next time. */
-M
+Cpu
-    }
-    else
@@ -2199 +2200 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
+ * @param   pVCpu       The VM CPU to operate on.
- * @param   GCVirt      Page to invalidate
- */
-
+PVMCPU pVCpu, 
-{
-M
+Cpu
-
-    /* Skip it if a TLB flush is already pending. */
@@ -2230 +2232 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
+ * @param   pVCpu       The VM CPU to operate on.
- * @param   GCPhys      Page to invalidate
- */
-
+PVMCPU pVCpu, 
-{
-    Assert(pVM->hwaccm.s.fNestedPaging);
-    /* invlpga only invalidates TLB entries for guest virtual addresses; we have no choice but to force a TLB flush here. */
-M
+Cpu
-    STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBInvlpga);
-    return VINF_SUCCESS;

trunk/src/VBox/VMM/VMMR0/HWSVMR0.h

@@ -47 +47 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-VPCPU id
+ The VMCPU to operate on
- * @param   pCpu        CPU info struct
- */
@@ -57 +57 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-VPCPU id
+ The VMCPU to operate on
- * @param   pCtx        CPU context
- */
@@ -113 +113 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-VPCPU id
+ The VMCPU to operate on
- * @param   pCtx        Guest context
- */
@@ -124 +124 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-VPCPU id
+ The VMCPU to operate on
- */
-VMMR0DECL(int) SVMR0SaveHostState(PVM pVM, PVMCPU pVCpu);
@@ -133 +133 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-VPCPU id
+ The VMCPU to operate on
- * @param   pCtx        Guest context
- */

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -51 +51 @@
-*   Local Functions                                                            *
-*******************************************************************************/
-
-
-
-
-
-
-
+PVMCPU pVCpu, 
+, PVMCPU pVCpu
+, PVMCPU pVCpu
+, PVMCPU pVCpu
+PVMCPU pVCpu, 
+PVMCPU pVCpu, 
+VMCPU pVCpu, P
-
-
@@ -533 +533 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
+ * @param   pVCpu       The VMCPU to operate on.
- * @param   pCtx        CPU Context
- * @param   intInfo     VMX interrupt info
@@ -538 +539 @@
- * @param   errCode     Error code (optional)
- */
-CPUMCTX *
+PVMCPU pVCpu, PCPUMCTX 
-{
-    int         rc;
@@ -583 +584 @@
-                intInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HWEXCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
-
-
+VCpu, p
-            }
-            Log(("Triple fault -> reset the VM!\n"));
@@ -622 +623 @@
-        pCtx->eflags.u     &= ~(X86_EFL_IF|X86_EFL_TF|X86_EFL_RF|X86_EFL_AC);
-
-M
+Cpu
-        return VINF_SUCCESS;
-    }
@@ -643 +644 @@
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
-idVCpu      VMCPU id
+pVCpu       The VMCPU to operate on
- * @param   pCtx        CPU Context
- */
@@ -651 +652 @@
-
-    /* Dispatch any pending interrupts. (injected before, but a VM exit occurred prematurely) */
-M
-
-M->hwaccm.s.Event.intInfo, pVM
+Cpu
+
+Cpu->hwaccm.s.Event.intInfo, pVCpu
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatIntReinject);
-Ctx, pVM->hwaccm.s.Event.intInfo, 0, pVM
-
-
-M
+VCpu, pCtx, pVCpu->hwaccm.s.Event.intInfo, 0, pVCpu
+
+
+Cpu
-        return VINF_SUCCESS;