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Changeset 11169

Timestamp:

08/06/08 02:50:03 (4 months ago)

Author:

vboxsync

Message:

#1865: PCI.

Files:

trunk/include/VBox/pdmdev.h (modified) (3 diffs)
trunk/src/VBox/Devices/Bus/DevPCI.cpp (modified) (27 diffs, 1 prop)
trunk/src/VBox/Devices/testcase/tstDeviceStructSizeGC.cpp (modified) (1 diff)
trunk/src/VBox/VMM/PDMDevice.cpp (modified) (3 diffs)
trunk/src/VBox/VMM/VMMGC/PDMGCDevice.cpp (modified) (7 diffs)

Legend:

: Unmodified
: Added
: Removed
: Modified
: Copied
: Moved

trunk/include/VBox/pdmdev.h

r11164	r11169
505	505
506	506	/**
507		* PCI Bus GC helpers.
508		*/
509		typedef struct PDMPCIHLPGC
510		{
511		/** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
	507	* PCI Bus RC helpers.
	508	*/
	509	typedef struct PDMPCIHLPRC
	510	{
	511	/** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
512	512	uint32_t u32Version;
513	513
…	…
551	551	/** Just a safety precaution. */
552	552	uint32_t u32TheEnd;
553		} PDMPCIHLPGC;
	553	} PDMPCIHLPRC;
554	554	/** Pointer to PCI helpers. */
555		typedef RCPTRTYPE(PDMPCIHLP~~GC *) PPDMPCIHLPG~~C;
	555	typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
556	556	/** Pointer to const PCI helpers. */
557		typedef RCPTRTYPE(const PDMPCIHLP~~GC *) PCPDMPCIHLPG~~C;
	557	typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
558	558
559	559	/** Current PDMPCIHLPR3 version number. */
560		#define PDM_PCIHLPGC_VERSION 0xe1010000
	560	#define PDM_PCIHLPRC_VERSION 0xe1010000
561	561
562	562
…	…
656	656
657	657	/**
658		* Gets the address of the GC PCI Bus helpers.
	658	* Gets the address of the RC PCI Bus helpers.
659	659	*
660	660	* This should be called at both construction and relocation time
661		* to obtain the correct address of the GC helpers.
662		*
663		* @returns GC pointer to the PCI Bus helpers.
	661	* to obtain the correct address of the RC helpers.
	662	*
	663	* @returns RC pointer to the PCI Bus helpers.
664	664	* @param pDevIns Device instance of the PCI Bus.
665	665	* @thread EMT only.
666	666	*/
667		DECLR3CALLBACKMEMBER(PCPDMPCIHLP~~GC, pfnGetG~~CHelpers,(PPDMDEVINS pDevIns));
	667	DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
668	668
669	669	/**

trunk/src/VBox/Devices/Bus/DevPCI.cpp

Property svn:keywords set to Author Date Id Revision

r10202	r11169
1		/* $Id: $ */
	1	/* $Id$ */
2	2	/** @file
3		* PCI BUS Device.
	3	* DevPCI - PCI BUS Device.
4	4	*/
5	5
…	…
56	56	#include <iprt/string.h>
57	57
58		#include "Builtins.h"
	58	#include "../Builtins.h"
59	59
60	60
…	…
68	68	#define PCI_LOCK(pDevIns, rc) \
69	69	do { \
70		int rc2 = PDMINS~~2DATA(pDevIns, PCIBus *)->CTXALL~~SUFF(pPciHlp)->pfnLock((pDevIns), rc); \
	70	int rc2 = PDMINS_2_DATA(pDevIns, PCIBus *)->CTX_SUFF(pPciHlp)->pfnLock((pDevIns), rc); \
71	71	if (rc2 != VINF_SUCCESS) \
72	72	return rc2; \
73	73	} while (0)
74	74	#define PCI_UNLOCK(pDevIns) \
75		PDMINS~~2DATA(pDevIns, PCIBus *)->CTXALL~~SUFF(pPciHlp)->pfnUnlock(pDevIns)
	75	PDMINS_2_DATA(pDevIns, PCIBus *)->CTX_SUFF(pPciHlp)->pfnUnlock(pDevIns)
76	76
77	77
…	…
101	101	* These are currently put in the PCIBus structure since we've
102	102	* only got one PCI bus in the current VM configurations. This
103		* makes life somewhat simpler in GC.
	103	* makes life somewhat simpler in RC.
104	104	*/
105	105	typedef struct PCIGLOBALS
…	…
142	142	R3PTRTYPE(PPCIDEVICE) devices[256];
143	143
144		/** HC pointer to the device instance. */
145		~~R3R0PTRTYPE(PPDMDEVINS) pDevInsHC~~;
	144	/** R3 pointer to the device instance. */
	145	PPDMDEVINSR3 pDevInsR3;
146	146	/** Pointer to the PCI R3 helpers. */
147		PCPDMPCIHLPR3 pPciHlpR3;
148
149		/** GC pointer to the device instance. */
150		PPDMDEVINSGC pDevInsGC;
151		/** Pointer to the PCI GC helpers. */
152		PCPDMPCIHLPGC pPciHlpGC;
	147	PCPDMPCIHLPR3 pPciHlpR3;
	148
	149	/** R0 pointer to the device instance. */
	150	PPDMDEVINSR0 pDevInsR0;
153	151	/** Pointer to the PCI R0 helpers. */
154	152	PCPDMPCIHLPR0 pPciHlpR0;
	153
	154	/** RC pointer to the device instance. */
	155	PPDMDEVINSRC pDevInsRC;
	156	/** Pointer to the PCI RC helpers. */
	157	PCPDMPCIHLPRC pPciHlpRC;
155	158
156	159	/** The PCI device for the PCI bridge. */
…	…
168	171
169	172	/** Converts a bus instance pointer to a device instance pointer. */
170		#define PCIBUS~~2DEVINS(pPciBus) ((pPciBus)->CTX~~SUFF(pDevIns))
	173	#define PCIBUS_2_DEVINS(pPciBus) ((pPciBus)->CTX_SUFF(pDevIns))
171	174	/** Converts a device instance pointer to a PCIGLOBALS pointer. */
172		#define DEVINS~~2PCIGLOBALS(pDevIns) ((PPCIGLOBALS)(&PDMINS2~~DATA(pDevIns, PPCIBUS)->Globals))
	175	#define DEVINS_2_PCIGLOBALS(pDevIns) ((PPCIGLOBALS)(&PDMINS_2_DATA(pDevIns, PPCIBUS)->Globals))
173	176	/** Converts a bus instance pointer to a PCIGLOBALS pointer. */
174		#define PCIBUS~~2PCIGLOBALS(pPciBus)~~ ((PPCIGLOBALS)(&pPciBus->Globals))
	177	#define PCIBUS_2_PCIGLOBALS(pPciBus) ((PPCIGLOBALS)(&pPciBus->Globals))
175	178
176	179
…	…
279	282	}
280	283	} else {
281		RTGCPHYS GCPhysBase = r->addr + PCIBUS2PCIGLOBALS(pBus)->pci_mem_base;
	284	RTGCPHYS GCPhysBase = r->addr + PCIBUS_2_PCIGLOBALS(pBus)->pci_mem_base;
282	285	int rc;
283		if (pBus->pPciHlpR3->pfnIsMMIO2Base(pBus->pDevInsHC, d->pDevIns, GCPhysBase))
	286	if (pBus->pPciHlpR3->pfnIsMMIO2Base(pBus->pDevInsR3, d->pDevIns, GCPhysBase))
284	287	{
285	288	/* unmap it. */
…	…
296	299	if (r->addr != ~0U) {
297	300	int rc = r->map_func(d, i,
298		r->addr + (r->type & PCI_ADDRESS_SPACE_IO ? 0 : PCIBUS2PCIGLOBALS(pBus)->pci_mem_base),
	301	r->addr + (r->type & PCI_ADDRESS_SPACE_IO ? 0 : PCIBUS_2_PCIGLOBALS(pBus)->pci_mem_base),
299	302	r->size, (PCIADDRESSSPACE)(r->type));
300	303	AssertRC(rc);
…	…
526	529	int shift, apic_irq, apic_level;
527	530	uint32_t *p;
528		PPCIGLOBALS pGlobals = PCIBUS2PCIGLOBALS(pBus);
	531	PPCIGLOBALS pGlobals = PCIBUS_2_PCIGLOBALS(pBus);
529	532	int uIrqIndex = pci_dev->Int.s.iIrq;
530	533	int irq_num = pci_slot_get_apic_pirq(pci_dev, irq_num1);
…	…
537	540	Log3(("apic_set_irq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d\n",
538	541	HCSTRING(pci_dev->name), irq_num1, level, apic_irq, apic_level, irq_num));
539		pBus->CTX~~ALLSUFF(pPciHlp)->pfnIoApicSetIrq(CTXSUFF(pBus->~~pDevIns), apic_irq, apic_level);
	542	pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level);
540	543
541	544	if ((level & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP) {
…	…
544	547	Log3(("apic_set_irq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d (flop)\n",
545	548	HCSTRING(pci_dev->name), irq_num1, level, apic_irq, apic_level, irq_num));
546		pBus->CTX~~ALLSUFF(pPciHlp)->pfnIoApicSetIrq(CTXSUFF(pBus->~~pDevIns), apic_irq, apic_level);
	549	pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level);
547	550	}
548	551	} else {
549	552	Log3(("apic_set_irq: %s: irq_num1=%d level=%d acpi_irq=%d\n",
550	553	HCSTRING(pci_dev->name), irq_num1, level, acpi_irq));
551		pBus->CTX~~ALLSUFF(pPciHlp)->pfnIoApicSetIrq(CTXSUFF(pBus->~~pDevIns), acpi_irq, level);
	554	pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), acpi_irq, level);
552	555	}
553	556	}
…	…
584	587	PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)
585	588	{
586		PPCIBUS pBus = PDMINS2DATA(pDevIns, PPCIBUS);
587		PPCIGLOBALS pGlobals = PCIBUS2PCIGLOBALS(pBus);
	589	PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
	590	PPCIGLOBALS pGlobals = PCIBUS_2_PCIGLOBALS(pBus);
588	591	uint8_t *pbCfg = pBus->PIIX3State.dev.config;
589	592	const bool fIsAcpiDevice = pPciDev->config[2] == 0x13 && pPciDev->config[3] == 0x71;
…	…
650	653	Log3(("piix3_set_irq: %s: iLevel=%d iIrq=%d pic_irq=%d pic_level=%d\n",
651	654	HCSTRING(pPciDev->name), iLevel, iIrq, pic_irq, pic_level));
652		pBus->CTX~~ALLSUFF(pPciHlp)->pfnIsaSetIrq(CTXSUFF(pBus->~~pDevIns), pic_irq, pic_level);
	655	pBus->CTX_SUFF(pPciHlp)->pfnIsaSetIrq(pBus->CTX_SUFF(pDevIns), pic_irq, pic_level);
653	656
654	657	/** @todo optimize pci irq flip-flop some rainy day. */
…	…
823	826	if (r->size) {
824	827	if (r->type & PCI_ADDRESS_SPACE_IO)
825		paddr = &PCIBUS2PCIGLOBALS(d->Int.s.pBus)->pci_bios_io_addr;
	828	paddr = &PCIBUS_2_PCIGLOBALS(d->Int.s.pBus)->pci_bios_io_addr;
826	829	else
827		paddr = &PCIBUS2PCIGLOBALS(d->Int.s.pBus)->pci_bios_mem_addr;
	830	paddr = &PCIBUS_2_PCIGLOBALS(d->Int.s.pBus)->pci_bios_mem_addr;
828	831	paddr = (paddr + r->size - 1) & ~(r->size - 1);
829	832	pci_set_io_region_addr(d, i, *paddr);
…	…
863	866	{
864	867	PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
865		pci_addr_writel(PDMINS2DATA(pDevIns, PCIBus *), Port, u32);
	868	pci_addr_writel(PDMINS_2_DATA(pDevIns, PCIBus *), Port, u32);
866	869	PCI_UNLOCK(pDevIns);
867	870	}
…	…
888	891	{
889	892	PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_READ);
890		pu32 = pci_addr_readl(PDMINS2DATA(pDevIns, PCIBus ), Port);
	893	pu32 = pci_addr_readl(PDMINS_2_DATA(pDevIns, PCIBus ), Port);
891	894	PCI_UNLOCK(pDevIns);
892	895	Log(("pciIOPortAddressRead: Port=%#x cb=%d -> %#x\n", Port, cb, *pu32));
…	…
918	921	{
919	922	PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
920		pci_data_write(PDMINS2DATA(pDevIns, PCIBus *), Port, u32, cb);
	923	pci_data_write(PDMINS_2_DATA(pDevIns, PCIBus *), Port, u32, cb);
921	924	PCI_UNLOCK(pDevIns);
922	925	}
…	…
944	947	{
945	948	PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_READ);
946		pu32 = pci_data_read(PDMINS2DATA(pDevIns, PCIBus ), Port, cb);
	949	pu32 = pci_data_read(PDMINS_2_DATA(pDevIns, PCIBus ), Port, cb);
947	950	PCI_UNLOCK(pDevIns);
948	951	Log(("pciIOPortDataRead: Port=%#x cb=%#x -> %#x\n", Port, cb, *pu32));
…	…
993	996	{
994	997	uint32_t i;
995		PPCIBUS pData = PDMINS2DATA(pDevIns, PPCIBUS);
996		PPCIGLOBALS pGlobals = PCIBUS2PCIGLOBALS(pData);
	998	PPCIBUS pData = PDMINS_2_DATA(pDevIns, PPCIBUS);
	999	PPCIGLOBALS pGlobals = PCIBUS_2_PCIGLOBALS(pData);
997	1000
998	1001	/*
…	…
1032	1035	static DECLCALLBACK(int) pciLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, uint32_t u32Version)
1033	1036	{
1034		PPCIBUS pData = PDMINS2DATA(pDevIns, PPCIBUS);
1035		PPCIGLOBALS pGlobals = PCIBUS2PCIGLOBALS(pData);
	1037	PPCIBUS pData = PDMINS_2_DATA(pDevIns, PPCIBUS);
	1038	PPCIGLOBALS pGlobals = PCIBUS_2_PCIGLOBALS(pData);
1036	1039	uint32_t u32;
1037	1040	uint32_t i;
…	…
1177	1180	static DECLCALLBACK(int) pciRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev)
1178	1181	{
1179		PPCIBUS pBus = PDMINS2DATA(pDevIns, PPCIBUS);
	1182	PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
1180	1183
1181	1184	/*
…	…
1357	1360	unsigned i;
1358	1361	uint8_t elcr[2] = {0, 0};
1359		PPCIGLOBALS pGlobals = DEVINS2PCIGLOBALS(pDevIns);
1360		PPCIBUS pBus = PDMINS2DATA(pDevIns, PPCIBUS);
	1362	PPCIGLOBALS pGlobals = DEVINS_2_PCIGLOBALS(pDevIns);
	1363	PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
1361	1364	PVM pVM = PDMDevHlpGetVM(pDevIns);
1362	1365	Assert(pVM);
…	…
1410	1413	static DECLCALLBACK(void) pciRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
1411	1414	{
1412		PPCIBUS pBus = PDMINS2DATA(pDevIns, PPCIBUS);
1413		pBus->pDevIns~~GC = PDMDEVINS_2_G~~CPTR(pDevIns);
1414		pBus->pPciHlp~~GC = pBus->pPciHlpR3->pfnGetG~~CHelpers(pDevIns);
	1415	PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
	1416	pBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
	1417	pBus->pPciHlpRC = pBus->pPciHlpR3->pfnGetRCHelpers(pDevIns);
1415	1418	}
1416	1419
…	…
1431	1434	static DECLCALLBACK(int) pciConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle)
1432	1435	{
1433		PPCIGLOBALS pGlobals = DEVINS2PCIGLOBALS(pDevIns);
1434		PPCIBUS pBus = PDMINS2DATA(pDevIns, PPCIBUS);
	1436	PPCIGLOBALS pGlobals = DEVINS_2_PCIGLOBALS(pDevIns);
	1437	PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
1435	1438	PDMPCIBUSREG PciBusReg;
1436	1439	int rc;
…	…
1454	1457	N_("Configuration error: Failed to query boolean value \"IOAPIC\""));
1455	1458
1456		/* check if GC code is enabled. */
	1459	/* check if RC code is enabled. */
1457	1460	rc = CFGMR3QueryBool(pCfgHandle, "GCEnabled", &fGCEnabled);
1458	1461	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
…	…
1482	1485	memset(&pGlobals->pci_apic_irq_levels, 0, sizeof(pGlobals->pci_apic_irq_levels));
1483	1486
1484		pBus->pDevInsHC = pDevIns;
1485		pBus->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
	1487	pBus->pDevInsR3 = pDevIns;
	1488	pBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
	1489	pBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1486	1490
1487	1491	PciBusReg.u32Version = PDM_PCIBUSREG_VERSION;
…	…
1504	1508	pBus->pPciHlpR3->u32Version != PDM_PCIHLPR3_VERSION);
1505	1509
1506		pBus->pPciHlp~~GC = pBus->pPciHlpR3->pfnGetG~~CHelpers(pDevIns);
	1510	pBus->pPciHlpRC = pBus->pPciHlpR3->pfnGetRCHelpers(pDevIns);
1507	1511	pBus->pPciHlpR0 = pBus->pPciHlpR3->pfnGetR0Helpers(pDevIns);
1508	1512

trunk/src/VBox/Devices/testcase/tstDeviceStructSizeGC.cpp

r11165	r11169
131	131	GEN_CHECK_OFF(PCIBUS, devices);
132	132	GEN_CHECK_OFF(PCIBUS, devices[1]);
133		GEN_CHECK_OFF(PCIBUS, pDevInsHC);
	133	GEN_CHECK_OFF(PCIBUS, pDevInsR3);
134	134	GEN_CHECK_OFF(PCIBUS, pPciHlpR3);
135		GEN_CHECK_OFF(PCIBUS, pDevInsGC);
136		GEN_CHECK_OFF(PCIBUS, pPciHlpGC);
	135	GEN_CHECK_OFF(PCIBUS, pDevInsR0);
137	136	GEN_CHECK_OFF(PCIBUS, pPciHlpR0);
	137	GEN_CHECK_OFF(PCIBUS, pDevInsRC);
	138	GEN_CHECK_OFF(PCIBUS, pPciHlpRC);
138	139	GEN_CHECK_OFF(PCIBUS, PciDev);
139	140	GEN_CHECK_OFF(PCIBUS, PIIX3State);

trunk/src/VBox/VMM/PDMDevice.cpp

r11164	r11169
260	260	static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc);
261	261	static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns);
262		static DECLCALLBACK(PCPDMPCIHLP~~GC) pdmR3PciHlp_GetG~~CHelpers(PPDMDEVINS pDevIns);
	262	static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns);
263	263	static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns);
264	264	/** @} */
…	…
535	535	pdmR3PciHlp_IoApicSetIrq,
536	536	pdmR3PciHlp_IsMMIO2Base,
537		pdmR3PciHlp_GetGCHelpers,
	537	pdmR3PciHlp_GetRCHelpers,
538	538	pdmR3PciHlp_GetR0Helpers,
539	539	pdmR3PciHlp_Lock,
…	…
4254	4254
4255	4255
4256		/** @copydoc PDMPCIHLPR3::pfnGetGCHelpers */
4257		static DECLCALLBACK(PCPDMPCIHLP~~GC) pdmR3PciHlp_GetG~~CHelpers(PPDMDEVINS pDevIns)
	4256	/** @copydoc PDMPCIHLPR3::pfnGetRCHelpers */
	4257	static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns)
4258	4258	{
4259	4259	PDMDEV_ASSERT_DEVINS(pDevIns);
4260	4260	VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4261		RT~~GCPTR32 pG~~CHelpers = 0;
4262		int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdm~~GCPciHlp", &pG~~CHelpers);
	4261	RTRCPTR pRCHelpers = 0;
	4262	int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmRCPciHlp", &pRCHelpers);
4263	4263	AssertReleaseRC(rc);
4264		AssertRelease(pGCHelpers);
4265		LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4266		pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4267		return pGCHelpers;
	4264	AssertRelease(pRCHelpers);
	4265	LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
	4266	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
	4267	return pRCHelpers;
4268	4268	}
4269	4269

trunk/src/VBox/VMM/VMMGC/PDMGCDevice.cpp

r10202	r11169
63	63	extern DECLEXPORT(const PDMAPICHLPGC) g_pdmGCApicHlp;
64	64	extern DECLEXPORT(const PDMIOAPICHLPGC) g_pdmGCIoApicHlp;
65		extern DECLEXPORT(const PDMPCIHLP~~GC) g_pdmG~~CPciHlp;
	65	extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp;
66	66	__END_DECLS
67	67
…	…
117	117
118	118
119		/** @name PCI Bus GC Helpers
	119	/** @name PCI Bus RC Helpers
120	120	* @{
121	121	*/
122		static DECLCALLBACK(void) pdmGCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
123		static DECLCALLBACK(void) pdmGCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
124		static DECLCALLBACK(int) pdmGCPciHlp_Lock(PPDMDEVINS pDevIns, int rc);
125		static DECLCALLBACK(void) pdmGCPciHlp_Unlock(PPDMDEVINS pDevIns);
	122	static DECLCALLBACK(void) pdmRCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
	123	static DECLCALLBACK(void) pdmRCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
	124	static DECLCALLBACK(int) pdmRCPciHlp_Lock(PPDMDEVINS pDevIns, int rc);
	125	static DECLCALLBACK(void) pdmRCPciHlp_Unlock(PPDMDEVINS pDevIns);
126	126	/** @} */
127	127
…	…
194	194
195	195	/**
196		* The ~~Guest~~ Context PCI Bus Helper Callbacks.
197		*/
198		extern DECLEXPORT(const PDMPCIHLP~~GC) g_pdmG~~CPciHlp =
199		{
200		PDM_PCIHLPGC_VERSION,
201		pdmGCPciHlp_IsaSetIrq,
202		pdmGCPciHlp_IoApicSetIrq,
203		pdmGCPciHlp_Lock,
204		pdmGCPciHlp_Unlock,
205		PDM_PCIHLPGC_VERSION, /* the end */
	196	* The Raw-Mode Context PCI Bus Helper Callbacks.
	197	*/
	198	extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp =
	199	{
	200	PDM_PCIHLPRC_VERSION,
	201	pdmRCPciHlp_IsaSetIrq,
	202	pdmRCPciHlp_IoApicSetIrq,
	203	pdmRCPciHlp_Lock,
	204	pdmRCPciHlp_Unlock,
	205	PDM_PCIHLPRC_VERSION, /* the end */
206	206	};
207	207
…	…
472	472
473	473	/** @copydoc PDMPCIHLPGC::pfnIsaSetIrq */
474		static DECLCALLBACK(void) pdmGCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
475		{
476		PDMDEV_ASSERT_DEVINS(pDevIns);
477		Log4(("pdmGCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
	474	static DECLCALLBACK(void) pdmRCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
	475	{
	476	PDMDEV_ASSERT_DEVINS(pDevIns);
	477	Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
478	478	pdmGCIsaSetIrq(pDevIns->Internal.s.pVMGC, iIrq, iLevel);
479	479	}
…	…
481	481
482	482	/** @copydoc PDMPCIHLPGC::pfnIoApicSetIrq */
483		static DECLCALLBACK(void) pdmGCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
484		{
485		PDMDEV_ASSERT_DEVINS(pDevIns);
486		Log4(("pdmGCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
	483	static DECLCALLBACK(void) pdmRCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
	484	{
	485	PDMDEV_ASSERT_DEVINS(pDevIns);
	486	Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
487	487	pdmGCIoApicSetIrq(pDevIns->Internal.s.pVMGC, iIrq, iLevel);
488	488	}
…	…
490	490
491	491	/** @copydoc PDMPCIHLPGC::pfnLock */
492		static DECLCALLBACK(int) pdmGCPciHlp_Lock(PPDMDEVINS pDevIns, int rc)
	492	static DECLCALLBACK(int) pdmRCPciHlp_Lock(PPDMDEVINS pDevIns, int rc)
493	493	{
494	494	PDMDEV_ASSERT_DEVINS(pDevIns);
…	…
498	498
499	499	/** @copydoc PDMPCIHLPGC::pfnUnlock */
500		static DECLCALLBACK(void) pdmGCPciHlp_Unlock(PPDMDEVINS pDevIns)
	500	static DECLCALLBACK(void) pdmRCPciHlp_Unlock(PPDMDEVINS pDevIns)
501	501	{
502	502	PDMDEV_ASSERT_DEVINS(pDevIns);

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