VirtualBox

Changeset 10822

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Timestamp:
07/23/08 11:02:58 (3 months ago)
Author:
vboxsync
Message:

Prepare for EPT.

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  • trunk/include/VBox/hwacc_vmx.h

    r10820 r10822  
    127127/** Pointer to a const extended table entry. */ 
    128128typedef const VTXEPTE *PCVTXEPTE; 
     129 
     130/** 
     131 * Number of page table entries in the EPT. 
     132 */ 
     133#define VTX_PT_ENTRIES                  512 
     134 
     135/** 
     136 * Extended Page Directory Table. 
     137 */ 
     138#pragma pack(1) 
     139typedef union VTXEPT 
     140{ 
     141    VTXEPTE     a[VTX_PT_ENTRIES]; 
     142} VTXEPT; 
     143#pragma pack() 
     144/** Pointer to an extended page table. */ 
     145typedef VTXEPT *PVTXEPT; 
     146/** Pointer to a const extended table. */ 
     147typedef const VTXEPT *PCVTXEPT; 
    129148 
    130149/** VMX Basic Exit Reasons. 
  • trunk/include/VBox/hwaccm.h

    r10695 r10822  
    103103HWACCMDECL(bool) HWACCMIsNestedPagingActive(PVM pVM); 
    104104 
     105/** 
     106 * Return the shadow paging mode for nested paging/ept 
     107 * 
     108 * @returns shadow paging mode 
     109 * @param   pVM         The VM to operate on. 
     110 */ 
     111HWACCMDECL(PGMMODE) HWACCMGetPagingMode(PVM pVM); 
     112 
    105113#else 
    106114/* Nop in GC */ 
  • trunk/include/VBox/pgm.h

    r9965 r10822  
    265265    /** Nested paging mode (shadow only; guest physical to host physical). */ 
    266266    PGMMODE_NESTED, 
     267    /** Extended paging (Intel) mode. */ 
     268    PGMMODE_EPT, 
    267269    /** The max number of modes */ 
    268270    PGMMODE_MAX, 
  • trunk/src/VBox/VMM/PGM.cpp

    r10507 r10822  
    983983#undef PGM_SHW_NAME_R0_STR 
    984984 
     985 
     986#ifdef PGM_WITH_EPT 
     987/* 
     988 * Shadow - EPT 
     989 */ 
     990#define PGM_SHW_TYPE                PGM_TYPE_EPT 
     991#define PGM_SHW_NAME(name)          PGM_SHW_NAME_EPT(name) 
     992#define PGM_SHW_NAME_GC_STR(name)   PGM_SHW_NAME_GC_EPT_STR(name) 
     993#define PGM_SHW_NAME_R0_STR(name)   PGM_SHW_NAME_R0_EPT_STR(name) 
     994#include "PGMShw.h" 
     995 
     996/* Guest - real mode */ 
     997#define PGM_GST_TYPE                PGM_TYPE_REAL 
     998#define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name) 
     999#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_REAL_STR(name) 
     1000#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_REAL_STR(name) 
     1001#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_REAL(name) 
     1002#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_EPT_REAL_STR(name) 
     1003#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_EPT_REAL_STR(name) 
     1004#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS 
     1005#include "PGMBth.h" 
     1006#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     1007#undef PGM_BTH_NAME 
     1008#undef PGM_BTH_NAME_GC_STR 
     1009#undef PGM_BTH_NAME_R0_STR 
     1010#undef PGM_GST_TYPE 
     1011#undef PGM_GST_NAME 
     1012#undef PGM_GST_NAME_GC_STR 
     1013#undef PGM_GST_NAME_R0_STR 
     1014 
     1015/* Guest - protected mode */ 
     1016#define PGM_GST_TYPE                PGM_TYPE_PROT 
     1017#define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name) 
     1018#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_PROT_STR(name) 
     1019#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PROT_STR(name) 
     1020#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_PROT(name) 
     1021#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_EPT_PROT_STR(name) 
     1022#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_EPT_PROT_STR(name) 
     1023#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS 
     1024#include "PGMBth.h" 
     1025#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     1026#undef PGM_BTH_NAME 
     1027#undef PGM_BTH_NAME_GC_STR 
     1028#undef PGM_BTH_NAME_R0_STR 
     1029#undef PGM_GST_TYPE 
     1030#undef PGM_GST_NAME 
     1031#undef PGM_GST_NAME_GC_STR 
     1032#undef PGM_GST_NAME_R0_STR 
     1033 
     1034/* Guest - 32-bit mode */ 
     1035#define PGM_GST_TYPE                PGM_TYPE_32BIT 
     1036#define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name) 
     1037#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_32BIT_STR(name) 
     1038#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_32BIT_STR(name) 
     1039#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_32BIT(name) 
     1040#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_EPT_32BIT_STR(name) 
     1041#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_EPT_32BIT_STR(name) 
     1042#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT 
     1043#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB 
     1044#include "PGMBth.h" 
     1045#undef BTH_PGMPOOLKIND_PT_FOR_BIG 
     1046#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     1047#undef PGM_BTH_NAME 
     1048#undef PGM_BTH_NAME_GC_STR 
     1049#undef PGM_BTH_NAME_R0_STR 
     1050#undef PGM_GST_TYPE 
     1051#undef PGM_GST_NAME 
     1052#undef PGM_GST_NAME_GC_STR 
     1053#undef PGM_GST_NAME_R0_STR 
     1054 
     1055/* Guest - PAE mode */ 
     1056#define PGM_GST_TYPE                PGM_TYPE_PAE 
     1057#define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name) 
     1058#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_PAE_STR(name) 
     1059#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PAE_STR(name) 
     1060#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_PAE(name) 
     1061#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_EPT_PAE_STR(name) 
     1062#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_EPT_PAE_STR(name) 
     1063#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT 
     1064#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 
     1065#include "PGMBth.h" 
     1066#undef BTH_PGMPOOLKIND_PT_FOR_BIG 
     1067#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     1068#undef PGM_BTH_NAME 
     1069#undef PGM_BTH_NAME_GC_STR 
     1070#undef PGM_BTH_NAME_R0_STR 
     1071#undef PGM_GST_TYPE 
     1072#undef PGM_GST_NAME 
     1073#undef PGM_GST_NAME_GC_STR 
     1074#undef PGM_GST_NAME_R0_STR 
     1075 
     1076/* Guest - AMD64 mode */ 
     1077#define PGM_GST_TYPE                PGM_TYPE_AMD64 
     1078#define PGM_GST_NAME(name)          PGM_GST_NAME_AMD64(name) 
     1079#define PGM_GST_NAME_GC_STR(name)   PGM_GST_NAME_GC_AMD64_STR(name) 
     1080#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_AMD64_STR(name) 
     1081#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_AMD64(name) 
     1082#define PGM_BTH_NAME_GC_STR(name)   PGM_BTH_NAME_GC_EPT_AMD64_STR(name) 
     1083#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_EPT_AMD64_STR(name) 
     1084#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT 
     1085#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 
     1086#include "PGMBth.h" 
     1087#undef BTH_PGMPOOLKIND_PT_FOR_BIG 
     1088#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     1089#undef PGM_BTH_NAME 
     1090#undef PGM_BTH_NAME_GC_STR 
     1091#undef PGM_BTH_NAME_R0_STR 
     1092#undef PGM_GST_TYPE 
     1093#undef PGM_GST_NAME 
     1094#undef PGM_GST_NAME_GC_STR 
     1095#undef PGM_GST_NAME_R0_STR 
     1096 
     1097#undef PGM_SHW_TYPE 
     1098#undef PGM_SHW_NAME 
     1099#undef PGM_SHW_NAME_GC_STR 
     1100#undef PGM_SHW_NAME_R0_STR 
     1101#endif /* PGM_WITH_EPT */ 
    9851102 
    9861103/** 
     
    13461463        LogFlow(("pgmR3InitPaging: returns successfully\n")); 
    13471464#if HC_ARCH_BITS == 64 
    1348 LogRel(("Debug: HCPhys32BitPD=%VHp aHCPhysPaePDs={%VHp,%VHp,%VHp,%VHp} HCPhysPaePDPT=%VHp HCPhysPaePML4=%VHp\n", 
    1349         pVM->pgm.s.HCPhys32BitPD, pVM->pgm.s.aHCPhysPaePDs[0], pVM->pgm.s.aHCPhysPaePDs[1], pVM->pgm.s.aHCPhysPaePDs[2], pVM->pgm.s.aHCPhysPaePDs[3], 
    1350         pVM->pgm.s.HCPhysPaePDPT, pVM->pgm.s.HCPhysPaePML4)); 
    1351 LogRel(("Debug: HCPhysInterPD=%VHp HCPhysInterPaePDPT=%VHp HCPhysInterPaePML4=%VHp\n", 
    1352         pVM->pgm.s.HCPhysInterPD, pVM->pgm.s.HCPhysInterPaePDPT, pVM->pgm.s.HCPhysInterPaePML4)); 
    1353 LogRel(("Debug: apInterPTs={%VHp,%VHp} apInterPaePTs={%VHp,%VHp} apInterPaePDs={%VHp,%VHp,%VHp,%VHp} pInterPaePDPT64=%VHp\n", 
    1354         MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[1]), 
    1355         MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[1]), 
    1356         MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[1]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[2]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[3]), 
    1357         MMPage2Phys(pVM, pVM->pgm.s.pInterPaePDPT64))); 
     1465        LogRel(("Debug: HCPhys32BitPD=%VHp aHCPhysPaePDs={%VHp,%VHp,%VHp,%VHp} HCPhysPaePDPT=%VHp HCPhysPaePML4=%VHp\n", 
     1466                pVM->pgm.s.HCPhys32BitPD, pVM->pgm.s.aHCPhysPaePDs[0], pVM->pgm.s.aHCPhysPaePDs[1], pVM->pgm.s.aHCPhysPaePDs[2], pVM->pgm.s.aHCPhysPaePDs[3], 
     1467                pVM->pgm.s.HCPhysPaePDPT, pVM->pgm.s.HCPhysPaePML4)); 
     1468        LogRel(("Debug: HCPhysInterPD=%VHp HCPhysInterPaePDPT=%VHp HCPhysInterPaePML4=%VHp\n", 
     1469                pVM->pgm.s.HCPhysInterPD, pVM->pgm.s.HCPhysInterPaePDPT, pVM->pgm.s.HCPhysInterPaePML4)); 
     1470        LogRel(("Debug: apInterPTs={%VHp,%VHp} apInterPaePTs={%VHp,%VHp} apInterPaePDs={%VHp,%VHp,%VHp,%VHp} pInterPaePDPT64=%VHp\n", 
     1471                MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[1]), 
     1472                MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[1]), 
     1473                MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[1]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[2]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[3]), 
     1474                MMPage2Phys(pVM, pVM->pgm.s.pInterPaePDPT64))); 
    13581475#endif 
    13591476 
     
    24782595        case PGMMODE_AMD64_NX:  return PGM_TYPE_AMD64; 
    24792596        case PGMMODE_NESTED:    return PGM_TYPE_NESTED; 
     2597        case PGMMODE_EPT:       return PGM_TYPE_EPT; 
    24802598        default: 
    24812599            AssertFatalMsgFailed(("pgmMode=%d\n", pgmMode)); 
     
    26742792        break; 
    26752793    } 
     2794 
     2795#ifdef PGM_WITH_EPT 
     2796    /* Extended paging (EPT) / Intel VT-x */ 
     2797    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_REAL)]; 
     2798    pModeData->uShwType = PGM_TYPE_EPT; 
     2799    pModeData->uGstType = PGM_TYPE_REAL; 
     2800    rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2801    rc = PGM_GST_NAME_REAL(InitData)(       pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2802    rc = PGM_BTH_NAME_EPT_REAL(InitData)(   pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2803 
     2804    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_PROT)]; 
     2805    pModeData->uShwType = PGM_TYPE_EPT; 
     2806    pModeData->uGstType = PGM_TYPE_PROT; 
     2807    rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2808    rc = PGM_GST_NAME_PROT(InitData)(       pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2809    rc = PGM_BTH_NAME_EPT_PROT(InitData)(   pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2810 
     2811    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_32BIT)]; 
     2812    pModeData->uShwType = PGM_TYPE_EPT; 
     2813    pModeData->uGstType = PGM_TYPE_32BIT; 
     2814    rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2815    rc = PGM_GST_NAME_32BIT(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2816    rc = PGM_BTH_NAME_EPT_32BIT(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2817 
     2818    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_PAE)]; 
     2819    pModeData->uShwType = PGM_TYPE_EPT; 
     2820    pModeData->uGstType = PGM_TYPE_PAE; 
     2821    rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2822    rc = PGM_GST_NAME_PAE(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2823    rc = PGM_BTH_NAME_EPT_PAE(InitData)(    pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2824 
     2825    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_AMD64)]; 
     2826    pModeData->uShwType = PGM_TYPE_EPT; 
     2827    pModeData->uGstType = PGM_TYPE_AMD64; 
     2828    rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2829    rc = PGM_GST_NAME_AMD64(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2830    rc = PGM_BTH_NAME_EPT_AMD64(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 
     2831#endif /* PGM_WITH_EPT */ 
    26762832    return VINF_SUCCESS; 
    26772833} 
     
    29503106    /* Override the shadow mode is nested paging is active. */ 
    29513107    if (HWACCMIsNestedPagingActive(pVM)) 
    2952         enmShadowMode = PGMMODE_NESTED
     3108        enmShadowMode = HWACCMGetPagingMode(pVM)
    29533109 
    29543110    *penmSwitcher = enmSwitcher; 
     
    29903146        case PGMMODE_NESTED: 
    29913147            return "Nested"; 
     3148 
     3149        case PGMMODE_EPT: 
     3150            return "EPT"; 
    29923151 
    29933152        default: 
     
    30873246                rc = PGM_SHW_NAME_NESTED(Enter)(pVM); 
    30883247                break; 
     3248#ifdef PGM_WITH_EPT 
     3249            case PGMMODE_EPT: 
     3250                rc = PGM_SHW_NAME_EPT(Enter)(pVM); 
     3251                break; 
     3252#endif 
    30893253            case PGMMODE_REAL: 
    30903254            case PGMMODE_PROTECTED: 
     
    31243288                    rc2 = PGM_BTH_NAME_NESTED_REAL(Enter)(pVM, NIL_RTGCPHYS); 
    31253289                    break; 
     3290#ifdef PGM_WITH_EPT 
     3291                case PGMMODE_EPT: 
     3292                    rc2 = PGM_BTH_NAME_EPT_REAL(Enter)(pVM, NIL_RTGCPHYS); 
     3293                    break; 
     3294#endif 
    31263295                case PGMMODE_AMD64: 
    31273296                case PGMMODE_AMD64_NX: 
     
    31453314                    rc2 = PGM_BTH_NAME_NESTED_PROT(Enter)(pVM, NIL_RTGCPHYS); 
    31463315                    break; 
     3316#ifdef PGM_WITH_EPT 
     3317                case PGMMODE_EPT: 
     3318                    rc2 = PGM_BTH_NAME_EPT_PROT(Enter)(pVM, NIL_RTGCPHYS); 
     3319                    break; 
     3320#endif 
    31473321                case PGMMODE_AMD64: 
    31483322                case PGMMODE_AMD64_NX: 
     
    31673341                    rc2 = PGM_BTH_NAME_NESTED_32BIT(Enter)(pVM, GCPhysCR3); 
    31683342                    break; 
     3343#ifdef PGM_WITH_EPT 
     3344                case PGMMODE_EPT: 
     3345                    rc2 = PGM_BTH_NAME_EPT_32BIT(Enter)(pVM, GCPhysCR3); 
     3346                    break; 
     3347#endif 
    31693348                case PGMMODE_AMD64: 
    31703349                case PGMMODE_AMD64_NX: 
     
    32053384                    rc2 = PGM_BTH_NAME_NESTED_PAE(Enter)(pVM, GCPhysCR3); 
    32063385                    break; 
     3386#ifdef PGM_WITH_EPT 
     3387                case PGMMODE_EPT: 
     3388                    rc2 = PGM_BTH_NAME_EPT_PAE(Enter)(pVM, GCPhysCR3); 
     3389                    break; 
     3390#endif 
    32073391                case PGMMODE_32_BIT: 
    32083392                case PGMMODE_AMD64: 
     
    32273411                    rc2 = PGM_BTH_NAME_NESTED_AMD64(Enter)(pVM, GCPhysCR3); 
    32283412                    break; 
     3413#ifdef PGM_WITH_EPT 
     3414                case PGMMODE_EPT: 
     3415                    rc2 = PGM_BTH_NAME_EPT_AMD64(Enter)(pVM, GCPhysCR3); 
     3416                    break; 
     3417#endif 
    32293418                case PGMMODE_32_BIT: 
    32303419                case PGMMODE_PAE: 
  • trunk/src/VBox/VMM/PGMBth.h

    r10494 r10822  
    6868        int rc; 
    6969 
    70 #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */ 
     70#if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */ 
    7171        /* GC */ 
    7272        rc = PDMR3GetSymbolGC(pVM, NULL, PGM_BTH_NAME_GC_STR(Trap0eHandler),  &pModeData->pfnGCBthTrap0eHandler); 
  • trunk/src/VBox/VMM/PGMInternal.h

    r10320 r10822  
    192192#define PGM_TYPE_AMD64      5 
    193193#define PGM_TYPE_NESTED     6 
     194#define PGM_TYPE_EPT        7 
    194195/** @} */ 
    195196 
     
    198199 * @remark  ASSUMES certain order of the PGM_TYPE_* values. 
    199200 */ 
    200 #define PGM_WITH_PAGING(uType)  ((uType) >= PGM_TYPE_32BIT && (uType) != PGM_TYPE_NESTED
     201#define PGM_WITH_PAGING(uType)  ((uType) >= PGM_TYPE_32BIT && (uType) != PGM_TYPE_NESTED && (uType) != PGM_TYPE_EPT
    201202 
    202203/** Macro for checking if the guest supports the NX bit. 
     
    204205 * @remark  ASSUMES certain order of the PGM_TYPE_* values. 
    205206 */ 
    206 #define PGM_WITH_NX(uType)  ((uType) >= PGM_TYPE_PAE && (uType) != PGM_TYPE_NESTED
     207#define PGM_WITH_NX(uType)  ((uType) >= PGM_TYPE_PAE && (uType) != PGM_TYPE_NESTED && (uType) != PGM_TYPE_EPT
    207208 
    208209 
     
    17311732#define PGM_SHW_NAME_GC_NESTED_STR(name) "pgmGCShwNested" #name 
    17321733#define PGM_SHW_NAME_R0_NESTED_STR(name) "pgmR0ShwNested" #name 
     1734#define PGM_SHW_NAME_EPT(name)          PGM_CTX(pgm,ShwEPT##name) 
     1735#define PGM_SHW_NAME_GC_EPT_STR(name)   "pgmGCShwEPT" #name 
     1736#define PGM_SHW_NAME_R0_EPT_STR(name)   "pgmR0ShwEPT" #name 
    17331737#define PGM_SHW_DECL(type, name)        PGM_CTX_DECL(type) PGM_SHW_NAME(name) 
    17341738#define PGM_SHW_PFN(name, pVM)          ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name)) 
     
    17491753#define PGM_BTH_NAME_NESTED_PAE(name)   PGM_CTX(pgm,BthNestedPAE##name) 
    17501754#define PGM_BTH_NAME_NESTED_AMD64(name) PGM_CTX(pgm,BthNestedAMD64##name) 
    1751  
    1752 #define PGM_BTH_NAME_GC_32BIT_REAL_STR(name)   "pgmGCBth32BitReal" #name 
    1753 #define PGM_BTH_NAME_GC_32BIT_PROT_STR(name)   "pgmGCBth32BitProt" #name 
    1754 #define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name)  "pgmGCBth32Bit32Bit" #name 
    1755 #define PGM_BTH_NAME_GC_PAE_REAL_STR(name)     "pgmGCBthPAEReal" #name 
    1756 #define PGM_BTH_NAME_GC_PAE_PROT_STR(name)     "pgmGCBthPAEProt" #name 
    1757 #define PGM_BTH_NAME_GC_PAE_32BIT_STR(name)    "pgmGCBthPAE32Bit" #name 
    1758 #define PGM_BTH_NAME_GC_PAE_PAE_STR(name)      "pgmGCBthPAEPAE" #name 
    1759 #define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name)  "pgmGCBthAMD64AMD64" #name 
    1760 #define PGM_BTH_NAME_GC_NESTED_REAL_STR(name)  "pgmGCBthNestedReal" #name 
    1761 #define PGM_BTH_NAME_GC_NESTED_PROT_STR(name)  "pgmGCBthNestedProt" #name 
    1762 #define PGM_BTH_NAME_GC_NESTED_32BIT_STR(name) "pgmGCBthNested32Bit" #name 
    1763 #define PGM_BTH_NAME_GC_NESTED_PAE_STR(name)   "pgmGCBthNestedPAE" #name 
    1764 #define PGM_BTH_NAME_GC_NESTED_AMD64_STR(name) "pgmGCBthNestedAMD64" #name 
    1765 #define PGM_BTH_NAME_R0_32BIT_REAL_STR(name)   "pgmR0Bth32BitReal" #name 
    1766 #define PGM_BTH_NAME_R0_32BIT_PROT_STR(name)   "pgmR0Bth32BitProt" #name 
    1767 #define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name)  "pgmR0Bth32Bit32Bit" #name 
    1768 #define PGM_BTH_NAME_R0_PAE_REAL_STR(name)     "pgmR0BthPAEReal" #name 
    1769 #define PGM_BTH_NAME_R0_PAE_PROT_STR(name)     "pgmR0BthPAEProt" #name 
    1770 #define PGM_BTH_NAME_R0_PAE_32BIT_STR(name)    "pgmR0BthPAE32Bit" #name 
    1771 #define PGM_BTH_NAME_R0_PAE_PAE_STR(name)      "pgmR0BthPAEPAE" #name 
    1772 #define PGM_BTH_NAME_R0_AMD64_PROT_STR(name)   "pgmR0BthAMD64Prot" #name 
    1773 #define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name)  "pgmR0BthAMD64AMD64" #name 
    1774 #define PGM_BTH_NAME_R0_NESTED_REAL_STR(name)  "pgmR0BthNestedReal" #name 
    1775 #define PGM_BTH_NAME_R0_NESTED_PROT_STR(name)  "pgmR0BthNestedProt" #name 
    1776 #define PGM_BTH_NAME_R0_NESTED_32BIT_STR(name) "pgmR0BthNested32Bit" #name 
    1777 #define PGM_BTH_NAME_R0_NESTED_PAE_STR(name)   "pgmR0BthNestedPAE" #name 
    1778 #define PGM_BTH_NAME_R0_NESTED_AMD64_STR(name) "pgmR0BthNestedAMD64" #name 
     1755#define PGM_BTH_NAME_EPT_REAL(name)     PGM_CTX(pgm,BthEPTReal##name) 
     1756#define PGM_BTH_NAME_EPT_PROT(name)     PGM_CTX(pgm,BthEPTProt##name) 
     1757#define PGM_BTH_NAME_EPT_32BIT(name)    PGM_CTX(pgm,BthEPT32Bit##name) 
     1758#define PGM_BTH_NAME_EPT_PAE(name)      PGM_CTX(pgm,BthEPTPAE##name) 
     1759#define PGM_BTH_NAME_EPT_AMD64(name)    PGM_CTX(pgm,BthEPTAMD64##name) 
     1760 
     1761#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name)    "pgmGCBth32BitReal" #name 
     1762#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name)    "pgmGCBth32BitProt" #name 
     1763#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name)   "pgmGCBth32Bit32Bit" #name 
     1764#define PGM_BTH_NAME_GC_PAE_REAL_STR(name)      "pgmGCBthPAEReal" #name 
     1765#define PGM_BTH_NAME_GC_PAE_PROT_STR(name)      "pgmGCBthPAEProt" #name 
     1766#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name)     "pgmGCBthPAE32Bit" #name 
     1767#define PGM_BTH_NAME_GC_PAE_PAE_STR(name)       "pgmGCBthPAEPAE" #name 
     1768#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name)   "pgmGCBthAMD64AMD64" #name 
     1769#define PGM_BTH_NAME_GC_NESTED_REAL_STR(name)   "pgmGCBthNestedReal" #name 
     1770#define PGM_BTH_NAME_GC_NESTED_PROT_STR(name)   "pgmGCBthNestedProt" #name 
     1771#define PGM_BTH_NAME_GC_NESTED_32BIT_STR(name)  "pgmGCBthNested32Bit" #name 
     1772#define PGM_BTH_NAME_GC_NESTED_PAE_STR(name)    "pgmGCBthNestedPAE" #name 
     1773#define PGM_BTH_NAME_GC_NESTED_AMD64_STR(name)  "pgmGCBthNestedAMD64" #name 
     1774#define PGM_BTH_NAME_GC_EPT_REAL_STR(name)      "pgmGCBthEPTReal" #name 
     1775#define PGM_BTH_NAME_GC_EPT_PROT_STR(name)      "pgmGCBthEPTProt" #name 
     1776#define PGM_BTH_NAME_GC_EPT_32BIT_STR(name)     "pgmGCBthEPT32Bit" #name 
     1777#define PGM_BTH_NAME_GC_EPT_PAE_STR(name)       "pgmGCBthEPTPAE" #name 
     1778#define PGM_BTH_NAME_GC_EPT_AMD64_STR(name)     "pgmGCBthEPTAMD64" #name 
     1779#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name)    "pgmR0Bth32BitReal" #name 
     1780#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name)    "pgmR0Bth32BitProt" #name 
     1781#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name)   "pgmR0Bth32Bit32Bit" #name 
     1782#define PGM_BTH_NAME_R0_PAE_REAL_STR(name)      "pgmR0BthPAEReal" #name 
     1783#define PGM_BTH_NAME_R0_PAE_PROT_STR(name)      "pgmR0BthPAEProt" #name 
     1784#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name)     "pgmR0BthPAE32Bit" #name 
     1785#define PGM_BTH_NAME_R0_PAE_PAE_STR(name)       "pgmR0BthPAEPAE" #name 
     1786#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name)    "pgmR0BthAMD64Prot" #name 
     1787#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name)   "pgmR0BthAMD64AMD64" #name 
     1788#define PGM_BTH_NAME_R0_NESTED_REAL_STR(name)   "pgmR0BthNestedReal" #name 
     1789#define PGM_BTH_NAME_R0_NESTED_PROT_STR(name)   "pgmR0BthNestedProt" #name 
     1790#define PGM_BTH_NAME_R0_NESTED_32BIT_STR(name)  "pgmR0BthNested32Bit" #name 
     1791#define PGM_BTH_NAME_R0_NESTED_PAE_STR(name)    "pgmR0BthNestedPAE" #name 
     1792#define PGM_BTH_NAME_R0_NESTED_AMD64_STR(name)  "pgmR0BthNestedAMD64" #name 
     1793#define PGM_BTH_NAME_R0_EPT_REAL_STR(name)      "pgmR0BthEPTReal" #name 
     1794#define PGM_BTH_NAME_R0_EPT_PROT_STR(name)      "pgmR0BthEPTProt" #name 
     1795#define PGM_BTH_NAME_R0_EPT_32BIT_STR(name)     "pgmR0BthEPT32Bit" #name 
     1796#define PGM_BTH_NAME_R0_EPT_PAE_STR(name)       "pgmR0BthEPTPAE" #name 
     1797#define PGM_BTH_NAME_R0_EPT_AMD64_STR(name)     "pgmR0BthEPTAMD64" #name 
    17791798 
    17801799#define PGM_BTH_DECL(type, name)        PGM_CTX_DECL(type) PGM_BTH_NAME(name) 
  • trunk/src/VBox/VMM/PGMShw.h

    r10065 r10822  
    113113        int rc; 
    114114 
    115 #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */ 
     115#if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */ 
    116116        /* GC */ 
    117117        rc = PDMR3GetSymbolGC(pVM, NULL, PGM_SHW_NAME_GC_STR(GetPage),  &pModeData->pfnGCShwGetPage); 
  • trunk/src/VBox/VMM/VMMAll/HWACCMAll.cpp

    r9115 r10822  
    9090} 
    9191 
     92/** 
     93 * Return the shadow paging mode for nested paging/ept 
     94 * 
     95 * @returns shadow paging mode 
     96 * @param   pVM         The VM to operate on. 
     97 */ 
     98HWACCMDECL(PGMMODE) HWACCMGetPagingMode(PVM pVM) 
     99{ 
     100    Assert(HWACCMIsNestedPagingActive(pVM)); 
     101    if (pVM->hwaccm.s.svm.fSupported) 
     102        return PGMMODE_NESTED; 
     103    Assert(pVM->hwaccm.s.vmx.fSupported); 
     104    return PGMMODE_EPT; 
     105} 
    92106 
    93107/** 
  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r10705 r10822  
    286286#undef PGM_SHW_TYPE 
    287287#undef PGM_SHW_NAME 
     288 
     289 
     290#ifdef PGM_WITH_EPT 
     291/* 
     292 * Shadow - EPT 
     293 */ 
     294#define PGM_SHW_TYPE                PGM_TYPE_EPT 
     295#define PGM_SHW_NAME(name)          PGM_SHW_NAME_EPT(name) 
     296#include "PGMAllShw.h" 
     297 
     298/* Guest - real mode */ 
     299#define PGM_GST_TYPE                PGM_TYPE_REAL 
     300#define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name) 
     301#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_REAL(name) 
     302#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS 
     303#include "PGMAllBth.h" 
     304#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     305#undef PGM_BTH_NAME 
     306#undef PGM_GST_TYPE 
     307#undef PGM_GST_NAME 
     308 
     309/* Guest - protected mode */ 
     310#define PGM_GST_TYPE                PGM_TYPE_PROT 
     311#define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name) 
     312#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_PROT(name) 
     313#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS 
     314#include "PGMAllBth.h" 
     315#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     316#undef PGM_BTH_NAME 
     317#undef PGM_GST_TYPE 
     318#undef PGM_GST_NAME 
     319 
     320/* Guest - 32-bit mode */ 
     321#define PGM_GST_TYPE                PGM_TYPE_32BIT 
     322#define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name) 
     323#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_32BIT(name) 
     324#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT 
     325#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB 
     326#include "PGMAllBth.h" 
     327#undef BTH_PGMPOOLKIND_PT_FOR_BIG 
     328#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     329#undef PGM_BTH_NAME 
     330#undef PGM_GST_TYPE 
     331#undef PGM_GST_NAME 
     332 
     333/* Guest - PAE mode */ 
     334#define PGM_GST_TYPE                PGM_TYPE_PAE 
     335#define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name) 
     336#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_PAE(name) 
     337#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT 
     338#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 
     339#include "PGMAllBth.h" 
     340#undef BTH_PGMPOOLKIND_PT_FOR_BIG 
     341#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     342#undef PGM_BTH_NAME 
     343#undef PGM_GST_TYPE 
     344#undef PGM_GST_NAME 
     345 
     346/* Guest - AMD64 mode */ 
     347#define PGM_GST_TYPE                PGM_TYPE_AMD64 
     348#define PGM_GST_NAME(name)          PGM_GST_NAME_AMD64(name) 
     349#define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_AMD64(name) 
     350#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT 
     351#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 
     352#include "PGMAllBth.h" 
     353#undef BTH_PGMPOOLKIND_PT_FOR_BIG 
     354#undef BTH_PGMPOOLKIND_PT_FOR_PT 
     355#undef PGM_BTH_NAME 
     356#undef PGM_GST_TYPE 
     357#undef PGM_GST_NAME 
     358 
     359#undef PGM_SHW_TYPE 
     360#undef PGM_SHW_NAME 
     361#endif /* PGM_WITH_EPT */ 
     362 
    288363#endif 
    289364 
     
    10781153            return pVM->pgm.s.HCPhysPaePML4; 
    10791154 
     1155        case PGMMODE_EPT: 
     1156            return pVM->pgm.s.HCPhysNestedRoot; 
     1157 
    10801158        case PGMMODE_NESTED: 
    10811159            return PGMGetNestedCR3(pVM, PGMGetHostMode(pVM)); 
     
    11991277            return pVM->pgm.s.HCPhysInterPaePML4; 
    12001278 
     1279        case PGMMODE_EPT: 
    12011280        case PGMMODE_NESTED: 
    12021281            return 0; /* not relevant */ 
     
    13321411    Assert(pVM->pgm.s.fMappingsFixed); 
    13331412    Assert(!(pVM->pgm.s.fSyncFlags & PGM_SYNC_MONITOR_CR3)); 
    1334     Assert(pVM->pgm.s.enmShadowMode == PGMMODE_NESTED); 
     1413    Assert(pVM->pgm.s.enmShadowMode == PGMMODE_NESTED || pVM->pgm.s.enmShadowMode == PGMMODE_EPT); 
    13351414 
    13361415    /* 
     
    15671646        case PGMMODE_AMD64_NX:  return "AMD64+NX"; 
    15681647        case PGMMODE_NESTED:    return "Nested"; 
     1648        case PGMMODE_EPT:       return "EPT"; 
    15691649        default:                return "unknown mode value"; 
    15701650    } 
  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r10496 r10822  
    4949 
    5050#if     (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \ 
    51     && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED
     51    && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT
    5252# error "Invalid combination; real or protected mode without paging implies 32 bits or PAE shadow paging." 
    5353#endif 
    5454 
    5555#if     (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE) \ 
    56     && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED
     56    && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT
    5757# error "Invalid combination; 32 bits guest paging or PAE implies 32 bits or PAE shadow paging." 
    5858#endif 
    5959 
    60 #if    (PGM_GST_TYPE == PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED) \ 
     60#if    (PGM_GST_TYPE == PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT) \ 
    6161    || (PGM_SHW_TYPE == PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_PROT) 
    6262# error "Invalid combination; AMD64 guest implies AMD64 shadow and vice versa" 
     
    167167    } 
    168168    Assert(pPDDst); 
     169# elif PGM_SHW_TYPE == PGM_TYPE_EPT 
     170    const unsigned  iPDDst = (((RTGCUINTPTR)pvFault >> SHW_PD_SHIFT) & SHW_PD_MASK); 
     171    PX86PDPAE       pPDDst; 
     172 
     173    AssertFailed(); 
    169174# endif 
    170175 

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