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source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllN8veHlpA-arm64.S@ 104324

Last change on this file since 104324 was 104324, checked in by vboxsync, 7 weeks ago

VMM/IEM: Have a single TB prologue which serves as an entry point to the TB, bugref:10653 [fix, VBOX_WITH_IEM_NATIVE_RECOMPILER_LONGJMP was not defined because it is contained in IEMInternal.h]
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 6.8 KB
Line 
1/* $Id: IEMAllN8veHlpA-arm64.S 104324 2024-04-12 16:12:41Z vboxsync $ */
2/** @file
3 * IEM - Native Recompiler Assembly Helpers, ARM64 variant.
4 */
5
6/*
7 * Copyright (C) 2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#include <iprt/asmdefs-arm.h>
33
34#ifdef AssertCompile
35# undef AssertCompile
36#endif
37#define AssertCompile(a_Expr)
38#define INCLUDED_FROM_ARM64_ASSEMBLY
39#include "IEMN8veRecompiler.h"
40
41/** @todo r=aeichner This comes from IEMInternal.h */
42#define VBOX_WITH_IEM_NATIVE_RECOMPILER_LONGJMP
43
44#define IEM_HLP_FUNCTION_ALIGNMENT 0x20
45
46BEGINCODE
47
48.extern NAME(iemThreadedFunc_BltIn_LogCpuStateWorker)
49
50#ifdef IEMNATIVE_WITH_RECOMPILER_PROLOGUE_SINGLETON
51/**
52 * This is the common prologue of a TB, saving all volatile registers
53 * and creating the stack frame for saving temporary values.
54 *
55 * @param pVCpu (x0) The cross-context vCPU structure pointer.
56 * @param pCpumCtx (x1) The cross-context CPUM context structure pointer.
57 * @param pTbStart (x2) The TB instruction start pointer.
58 */
59ALIGNCODE(IEM_HLP_FUNCTION_ALIGNMENT)
60BEGINPROC_HIDDEN iemNativeTbEntry
61# ifdef RT_OS_DARWIN
62 pacibsp
63# endif
64 stp x19, x20, [sp, #-IEMNATIVE_FRAME_SAVE_REG_SIZE]! /* Allocate space for saving registers and place x19+x20 at the bottom. */
65 stp x21, x22, [sp, #0x10] /* Save x21 thru x28 (SP remains unchanged). */
66 stp x23, x24, [sp, #0x20]
67 stp x25, x26, [sp, #0x30]
68 stp x27, x28, [sp, #0x40]
69 stp x29, x30, [sp, #0x50] /* Save the BP and LR (ret address) registers at the top of the frame. */
70 add x29, sp, #(IEMNATIVE_FRAME_SAVE_REG_SIZE - 16) /* Set BP to point to the old BP stack address */
71 sub sp, sp, #IEMNATIVE_FRAME_VAR_SIZE /* Allocate the variable area from SP. */
72 mov IEMNATIVE_REG_FIXED_PVMCPU_ASM, x0
73 mov IEMNATIVE_REG_FIXED_PCPUMCTX_ASM, x1
74# ifdef VBOX_WITH_IEM_NATIVE_RECOMPILER_LONGJMP
75 str x29, [IEMNATIVE_REG_FIXED_PVMCPU_ASM, #0x7c8] /* Save the frame pointer to pvTbFramePointerR3 */ /** @todo Get rid of this hardcoded assumption */
76# endif
77 /*
78 * Everything is done, jump to the start of the TB.
79 */
80 br x2
81#endif
82
83
84/**
85 * This does the epilogue of a TB, given the RBP for the frame and eax value to return.
86 *
87 * @param pFrame (x0) The frame pointer.
88 * @param rc (w1) The return value.
89 *
90 * @note This doesn't really work for MSC since xmm6 thru xmm15 are non-volatile
91 * and since we don't save them in the TB prolog we'll potentially return
92 * with different values if any functions on the calling stack uses them
93 * as they're unlikely to restore them till they return.
94 *
95 * For the GCC calling convention all xmm registers are volatile and the
96 * only worry would be someone fiddling the control bits of MXCSR or FCW
97 * without restoring them. This is highly unlikely, unless we're doing
98 * it ourselves, I think.
99 */
100ALIGNCODE(IEM_HLP_FUNCTION_ALIGNMENT)
101BEGINPROC_HIDDEN iemNativeTbLongJmp
102 /*
103 * This must exactly match what iemNativeEmitEpilog does.
104 */
105 sub sp, x0, #0x50
106 ldp x19, x20, [sp, #0x00]
107 ldp x21, x22, [sp, #0x10]
108 ldp x23, x24, [sp, #0x20]
109 ldp x25, x26, [sp, #0x30]
110 ldp x27, x28, [sp, #0x40]
111 ldp x29, x30, [sp, #0x50] /* the pFrame address points to this entry */
112 add sp, sp, #0x60
113 mov w0, w1 /* The return value */
114#ifdef RT_OS_DARWIN
115 retab
116#else
117 ret
118#endif
119 brk #1
120
121
122
123#define IEMNATIVE_HLP_FRAME_SIZE (11 * 16)
124
125/**
126 * This is wrapper function that saves and restores all volatile registers
127 * so the impact of inserting LogCpuState is minimal to the other TB code.
128 */
129ALIGNCODE(IEM_HLP_FUNCTION_ALIGNMENT)
130BEGINPROC_HIDDEN iemNativeHlpAsmSafeWrapLogCpuState
131#ifdef RT_OS_DARWIN
132 pacibsp
133#endif
134
135 /*
136 * Save all volatile registers.
137 */
138 stp x29, x30, [sp, #-IEMNATIVE_HLP_FRAME_SIZE]!
139 stp x0, x1, [sp, #( 1 * 16)]
140 stp x2, x3, [sp, #( 2 * 16)]
141 stp x4, x5, [sp, #( 3 * 16)]
142 stp x5, x6, [sp, #( 4 * 16)]
143 stp x7, x8, [sp, #( 5 * 16)]
144 stp x9, x10, [sp, #( 6 * 16)]
145 stp x11, x12, [sp, #( 7 * 16)]
146 stp x13, x14, [sp, #( 8 * 16)]
147 stp x15, x16, [sp, #( 9 * 16)]
148 stp x17, x18, [sp, #(10 * 16)]
149
150 /*
151 * Move the pVCpu pointer from the fixed register to the first argument.
152 * @todo This needs syncing with what we use in IEMN8veRecompiler.h
153 * but we can't include that header right now, would need some #ifndef IN_ASM_CODE...
154 * in the header or splitting up the header into a asm safe one and a one included from C/C++.
155 */
156 mov x0, x28
157
158 /*
159 * Call C function to do the actual work.
160 */
161 bl NAME(iemThreadedFunc_BltIn_LogCpuStateWorker)
162
163 /*
164 * Restore volatile registers and return to the TB code.
165 */
166 ldp x29, x30, [sp, #( 0 * 16)]
167 ldp x0, x1, [sp, #( 1 * 16)]
168 ldp x2, x3, [sp, #( 2 * 16)]
169 ldp x4, x5, [sp, #( 3 * 16)]
170 ldp x5, x6, [sp, #( 4 * 16)]
171 ldp x7, x8, [sp, #( 5 * 16)]
172 ldp x9, x10, [sp, #( 6 * 16)]
173 ldp x11, x12, [sp, #( 7 * 16)]
174 ldp x13, x14, [sp, #( 8 * 16)]
175 ldp x15, x16, [sp, #( 9 * 16)]
176 ldp x17, x18, [sp, #(10 * 16)]
177 add sp, sp, #IEMNATIVE_HLP_FRAME_SIZE
178
179#ifdef RT_OS_DARWIN
180 retab
181#else
182 ret
183#endif
184 brk #1
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