VirtualBox

source: vbox/trunk/src/VBox/VMM/TRPM.cpp@ 13762

Last change on this file since 13762 was 13635, checked in by vboxsync, 16 years ago

#1865: TRPM.
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  • Property svn:keywords set to Id
File size: 72.6 KB
Line 
1/* $Id: TRPM.cpp 13635 2008-10-28 20:27:33Z vboxsync $ */
2/** @file
3 * TRPM - The Trap Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/** @page pg_trpm TRPM - The Trap Monitor
23 *
24 * The Trap Monitor (TRPM) is responsible for all trap and interrupt handling in
25 * the VMM. It plays a major role in raw-mode execution and a lesser one in the
26 * hardware assisted mode.
27 *
28 * Note first, the following will use trap as a collective term for faults,
29 * aborts and traps.
30 *
31 * @see grp_trpm
32 *
33 *
34 * @section sec_trpm_rc Raw-Mode Context
35 *
36 * When executing in the raw-mode context, TRPM will be managing the IDT and
37 * processing all traps and interrupts. It will also monitor the guest IDT
38 * because CSAM wishes to know about changes to it (trap/interrupt/syscall
39 * handler patching) and TRPM needs to keep the #\BP gate in sync (ring-3
40 * considerations). See TRPMR3SyncIDT and CSAMR3CheckGates.
41 *
42 * External interrupts will be forwarded to the host context by the quickest
43 * possible route where they will be reasserted. The other events will be
44 * categorized into virtualization traps, genuine guest traps and hypervisor
45 * traps. The latter group may be recoverable depending on when they happen and
46 * whether there is a handler for it, otherwise it will cause a guru meditation.
47 *
48 * TRPM disgishishes the between the first two (virt and guest traps) and the
49 * latter (hyper) by checking the CPL of the trapping code, if CPL == 0 then
50 * it's a hyper trap otherwise it's a virt/guest trap. There are three trap
51 * dispatcher tables, one ad-hoc for one time traps registered via
52 * TRPMGCSetTempHandler(), one for hyper traps and one for virt/guest traps.
53 * The latter two live in TRPMGCHandlersA.asm, the former in the VM structure.
54 *
55 * The raw-mode context trap handlers found in TRPMGCHandlers.cpp (for the most
56 * part), will call up the other VMM sub-systems depending on what it things
57 * happens. The two most busy traps are page faults (\#PF) and general
58 * protection fault/trap (\#GP).
59 *
60 * Before resuming guest code after having taken a virtualization trap or
61 * injected a guest trap, TRPM will check for pending forced action and
62 * every now and again let TM check for timed out timers. This allows code that
63 * is being executed as part of virtualization traps to signal ring-3 exits,
64 * page table resyncs and similar without necessarily using the status code. It
65 * also make sure we're more responsive to timers and requests from other
66 * threads (necessarily running on some different core/cpu in most cases).
67 *
68 *
69 * @section sec_trpm_all All Contexts
70 *
71 * TRPM will also dispatch / inject interrupts and traps to the guest, both when
72 * in raw-mode and when in hardware assisted mode. See TRPMInject().
73 *
74 */
75
76/*******************************************************************************
77* Header Files *
78*******************************************************************************/
79#define LOG_GROUP LOG_GROUP_TRPM
80#include <VBox/trpm.h>
81#include <VBox/cpum.h>
82#include <VBox/selm.h>
83#include <VBox/ssm.h>
84#include <VBox/pdmapi.h>
85#include <VBox/pgm.h>
86#include <VBox/dbgf.h>
87#include <VBox/mm.h>
88#include <VBox/stam.h>
89#include <VBox/csam.h>
90#include <VBox/patm.h>
91#include "TRPMInternal.h"
92#include <VBox/vm.h>
93#include <VBox/em.h>
94#include <VBox/rem.h>
95#include <VBox/hwaccm.h>
96
97#include <VBox/err.h>
98#include <VBox/param.h>
99#include <VBox/log.h>
100#include <iprt/assert.h>
101#include <iprt/asm.h>
102#include <iprt/string.h>
103#include <iprt/alloc.h>
104
105
106/*******************************************************************************
107* Structures and Typedefs *
108*******************************************************************************/
109/**
110 * Trap handler function.
111 * @todo need to specialize this as we go along.
112 */
113typedef enum TRPMHANDLER
114{
115 /** Generic Interrupt handler. */
116 TRPM_HANDLER_INT = 0,
117 /** Generic Trap handler. */
118 TRPM_HANDLER_TRAP,
119 /** Trap 8 (\#DF) handler. */
120 TRPM_HANDLER_TRAP_08,
121 /** Trap 12 (\#MC) handler. */
122 TRPM_HANDLER_TRAP_12,
123 /** Max. */
124 TRPM_HANDLER_MAX
125} TRPMHANDLER, *PTRPMHANDLER;
126
127
128/*******************************************************************************
129* Global Variables *
130*******************************************************************************/
131/** Preinitialized IDT.
132 * The u16OffsetLow is a value of the TRPMHANDLER enum which TRPMR3Relocate()
133 * will use to pick the right address. The u16SegSel is always VMM CS.
134 */
135static VBOXIDTE_GENERIC g_aIdt[256] =
136{
137/* special trap handler - still, this is an interrupt gate not a trap gate... */
138#define IDTE_TRAP(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
139/* generic trap handler. */
140#define IDTE_TRAP_GEN() IDTE_TRAP(TRPM_HANDLER_TRAP)
141/* special interrupt handler. */
142#define IDTE_INT(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
143/* generic interrupt handler. */
144#define IDTE_INT_GEN() IDTE_INT(TRPM_HANDLER_INT)
145/* special task gate IDT entry (for critical exceptions like #DF). */
146#define IDTE_TASK(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_TASK, 0, 1, 0 }
147/* draft, fixme later when the handler is written. */
148#define IDTE_RESERVED() { 0, 0, 0, 0, 0, 0, 0, 0 }
149
150 /* N - M M - T - C - D i */
151 /* o - n o - y - o - e p */
152 /* - e n - p - d - s t */
153 /* - i - e - e - c . */
154 /* - c - - - r */
155 /* ============================================================= */
156 IDTE_TRAP_GEN(), /* 0 - #DE - F - N - Divide error */
157 IDTE_TRAP_GEN(), /* 1 - #DB - F/T - N - Single step, INT 1 instruction */
158#ifdef VBOX_WITH_NMI
159 IDTE_TRAP_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
160#else
161 IDTE_INT_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
162#endif
163 IDTE_TRAP_GEN(), /* 3 - #BP - T - N - Breakpoint, INT 3 instruction. */
164 IDTE_TRAP_GEN(), /* 4 - #OF - T - N - Overflow, INTO instruction. */
165 IDTE_TRAP_GEN(), /* 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction. */
166 IDTE_TRAP_GEN(), /* 6 - #UD - F - N - Undefined(/Invalid) Opcode. */
167 IDTE_TRAP_GEN(), /* 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction. */
168 IDTE_TASK(TRPM_HANDLER_TRAP_08), /* 8 - #DF - A - 0 - Double fault. */
169 IDTE_TRAP_GEN(), /* 9 - - F - N - Coprocessor Segment Overrun (obsolete). */
170 IDTE_TRAP_GEN(), /* a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access. */
171 IDTE_TRAP_GEN(), /* b - #NP - F - Y - Segment not present. */
172 IDTE_TRAP_GEN(), /* c - #SS - F - Y - Stack-Segment fault. */
173 IDTE_TRAP_GEN(), /* d - #GP - F - Y - General protection fault. */
174 IDTE_TRAP_GEN(), /* e - #PF - F - Y - Page fault. - interrupt gate!!! */
175 IDTE_RESERVED(), /* f - - - - Intel Reserved. Do not use. */
176 IDTE_TRAP_GEN(), /* 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction. */
177 IDTE_TRAP_GEN(), /* 11 - #AC - F - 0 - Alignment Check. */
178 IDTE_TRAP(TRPM_HANDLER_TRAP_12), /* 12 - #MC - A - N - Machine Check. */
179 IDTE_TRAP_GEN(), /* 13 - #XF - F - N - SIMD Floating-Point Exception. */
180 IDTE_RESERVED(), /* 14 - - - - Intel Reserved. Do not use. */
181 IDTE_RESERVED(), /* 15 - - - - Intel Reserved. Do not use. */
182 IDTE_RESERVED(), /* 16 - - - - Intel Reserved. Do not use. */
183 IDTE_RESERVED(), /* 17 - - - - Intel Reserved. Do not use. */
184 IDTE_RESERVED(), /* 18 - - - - Intel Reserved. Do not use. */
185 IDTE_RESERVED(), /* 19 - - - - Intel Reserved. Do not use. */
186 IDTE_RESERVED(), /* 1a - - - - Intel Reserved. Do not use. */
187 IDTE_RESERVED(), /* 1b - - - - Intel Reserved. Do not use. */
188 IDTE_RESERVED(), /* 1c - - - - Intel Reserved. Do not use. */
189 IDTE_RESERVED(), /* 1d - - - - Intel Reserved. Do not use. */
190 IDTE_RESERVED(), /* 1e - - - - Intel Reserved. Do not use. */
191 IDTE_RESERVED(), /* 1f - - - - Intel Reserved. Do not use. */
192 IDTE_INT_GEN(), /* 20 - - I - - User defined Interrupts, external of INT n. */
193 IDTE_INT_GEN(), /* 21 - - I - - User defined Interrupts, external of INT n. */
194 IDTE_INT_GEN(), /* 22 - - I - - User defined Interrupts, external of INT n. */
195 IDTE_INT_GEN(), /* 23 - - I - - User defined Interrupts, external of INT n. */
196 IDTE_INT_GEN(), /* 24 - - I - - User defined Interrupts, external of INT n. */
197 IDTE_INT_GEN(), /* 25 - - I - - User defined Interrupts, external of INT n. */
198 IDTE_INT_GEN(), /* 26 - - I - - User defined Interrupts, external of INT n. */
199 IDTE_INT_GEN(), /* 27 - - I - - User defined Interrupts, external of INT n. */
200 IDTE_INT_GEN(), /* 28 - - I - - User defined Interrupts, external of INT n. */
201 IDTE_INT_GEN(), /* 29 - - I - - User defined Interrupts, external of INT n. */
202 IDTE_INT_GEN(), /* 2a - - I - - User defined Interrupts, external of INT n. */
203 IDTE_INT_GEN(), /* 2b - - I - - User defined Interrupts, external of INT n. */
204 IDTE_INT_GEN(), /* 2c - - I - - User defined Interrupts, external of INT n. */
205 IDTE_INT_GEN(), /* 2d - - I - - User defined Interrupts, external of INT n. */
206 IDTE_INT_GEN(), /* 2e - - I - - User defined Interrupts, external of INT n. */
207 IDTE_INT_GEN(), /* 2f - - I - - User defined Interrupts, external of INT n. */
208 IDTE_INT_GEN(), /* 30 - - I - - User defined Interrupts, external of INT n. */
209 IDTE_INT_GEN(), /* 31 - - I - - User defined Interrupts, external of INT n. */
210 IDTE_INT_GEN(), /* 32 - - I - - User defined Interrupts, external of INT n. */
211 IDTE_INT_GEN(), /* 33 - - I - - User defined Interrupts, external of INT n. */
212 IDTE_INT_GEN(), /* 34 - - I - - User defined Interrupts, external of INT n. */
213 IDTE_INT_GEN(), /* 35 - - I - - User defined Interrupts, external of INT n. */
214 IDTE_INT_GEN(), /* 36 - - I - - User defined Interrupts, external of INT n. */
215 IDTE_INT_GEN(), /* 37 - - I - - User defined Interrupts, external of INT n. */
216 IDTE_INT_GEN(), /* 38 - - I - - User defined Interrupts, external of INT n. */
217 IDTE_INT_GEN(), /* 39 - - I - - User defined Interrupts, external of INT n. */
218 IDTE_INT_GEN(), /* 3a - - I - - User defined Interrupts, external of INT n. */
219 IDTE_INT_GEN(), /* 3b - - I - - User defined Interrupts, external of INT n. */
220 IDTE_INT_GEN(), /* 3c - - I - - User defined Interrupts, external of INT n. */
221 IDTE_INT_GEN(), /* 3d - - I - - User defined Interrupts, external of INT n. */
222 IDTE_INT_GEN(), /* 3e - - I - - User defined Interrupts, external of INT n. */
223 IDTE_INT_GEN(), /* 3f - - I - - User defined Interrupts, external of INT n. */
224 IDTE_INT_GEN(), /* 40 - - I - - User defined Interrupts, external of INT n. */
225 IDTE_INT_GEN(), /* 41 - - I - - User defined Interrupts, external of INT n. */
226 IDTE_INT_GEN(), /* 42 - - I - - User defined Interrupts, external of INT n. */
227 IDTE_INT_GEN(), /* 43 - - I - - User defined Interrupts, external of INT n. */
228 IDTE_INT_GEN(), /* 44 - - I - - User defined Interrupts, external of INT n. */
229 IDTE_INT_GEN(), /* 45 - - I - - User defined Interrupts, external of INT n. */
230 IDTE_INT_GEN(), /* 46 - - I - - User defined Interrupts, external of INT n. */
231 IDTE_INT_GEN(), /* 47 - - I - - User defined Interrupts, external of INT n. */
232 IDTE_INT_GEN(), /* 48 - - I - - User defined Interrupts, external of INT n. */
233 IDTE_INT_GEN(), /* 49 - - I - - User defined Interrupts, external of INT n. */
234 IDTE_INT_GEN(), /* 4a - - I - - User defined Interrupts, external of INT n. */
235 IDTE_INT_GEN(), /* 4b - - I - - User defined Interrupts, external of INT n. */
236 IDTE_INT_GEN(), /* 4c - - I - - User defined Interrupts, external of INT n. */
237 IDTE_INT_GEN(), /* 4d - - I - - User defined Interrupts, external of INT n. */
238 IDTE_INT_GEN(), /* 4e - - I - - User defined Interrupts, external of INT n. */
239 IDTE_INT_GEN(), /* 4f - - I - - User defined Interrupts, external of INT n. */
240 IDTE_INT_GEN(), /* 50 - - I - - User defined Interrupts, external of INT n. */
241 IDTE_INT_GEN(), /* 51 - - I - - User defined Interrupts, external of INT n. */
242 IDTE_INT_GEN(), /* 52 - - I - - User defined Interrupts, external of INT n. */
243 IDTE_INT_GEN(), /* 53 - - I - - User defined Interrupts, external of INT n. */
244 IDTE_INT_GEN(), /* 54 - - I - - User defined Interrupts, external of INT n. */
245 IDTE_INT_GEN(), /* 55 - - I - - User defined Interrupts, external of INT n. */
246 IDTE_INT_GEN(), /* 56 - - I - - User defined Interrupts, external of INT n. */
247 IDTE_INT_GEN(), /* 57 - - I - - User defined Interrupts, external of INT n. */
248 IDTE_INT_GEN(), /* 58 - - I - - User defined Interrupts, external of INT n. */
249 IDTE_INT_GEN(), /* 59 - - I - - User defined Interrupts, external of INT n. */
250 IDTE_INT_GEN(), /* 5a - - I - - User defined Interrupts, external of INT n. */
251 IDTE_INT_GEN(), /* 5b - - I - - User defined Interrupts, external of INT n. */
252 IDTE_INT_GEN(), /* 5c - - I - - User defined Interrupts, external of INT n. */
253 IDTE_INT_GEN(), /* 5d - - I - - User defined Interrupts, external of INT n. */
254 IDTE_INT_GEN(), /* 5e - - I - - User defined Interrupts, external of INT n. */
255 IDTE_INT_GEN(), /* 5f - - I - - User defined Interrupts, external of INT n. */
256 IDTE_INT_GEN(), /* 60 - - I - - User defined Interrupts, external of INT n. */
257 IDTE_INT_GEN(), /* 61 - - I - - User defined Interrupts, external of INT n. */
258 IDTE_INT_GEN(), /* 62 - - I - - User defined Interrupts, external of INT n. */
259 IDTE_INT_GEN(), /* 63 - - I - - User defined Interrupts, external of INT n. */
260 IDTE_INT_GEN(), /* 64 - - I - - User defined Interrupts, external of INT n. */
261 IDTE_INT_GEN(), /* 65 - - I - - User defined Interrupts, external of INT n. */
262 IDTE_INT_GEN(), /* 66 - - I - - User defined Interrupts, external of INT n. */
263 IDTE_INT_GEN(), /* 67 - - I - - User defined Interrupts, external of INT n. */
264 IDTE_INT_GEN(), /* 68 - - I - - User defined Interrupts, external of INT n. */
265 IDTE_INT_GEN(), /* 69 - - I - - User defined Interrupts, external of INT n. */
266 IDTE_INT_GEN(), /* 6a - - I - - User defined Interrupts, external of INT n. */
267 IDTE_INT_GEN(), /* 6b - - I - - User defined Interrupts, external of INT n. */
268 IDTE_INT_GEN(), /* 6c - - I - - User defined Interrupts, external of INT n. */
269 IDTE_INT_GEN(), /* 6d - - I - - User defined Interrupts, external of INT n. */
270 IDTE_INT_GEN(), /* 6e - - I - - User defined Interrupts, external of INT n. */
271 IDTE_INT_GEN(), /* 6f - - I - - User defined Interrupts, external of INT n. */
272 IDTE_INT_GEN(), /* 70 - - I - - User defined Interrupts, external of INT n. */
273 IDTE_INT_GEN(), /* 71 - - I - - User defined Interrupts, external of INT n. */
274 IDTE_INT_GEN(), /* 72 - - I - - User defined Interrupts, external of INT n. */
275 IDTE_INT_GEN(), /* 73 - - I - - User defined Interrupts, external of INT n. */
276 IDTE_INT_GEN(), /* 74 - - I - - User defined Interrupts, external of INT n. */
277 IDTE_INT_GEN(), /* 75 - - I - - User defined Interrupts, external of INT n. */
278 IDTE_INT_GEN(), /* 76 - - I - - User defined Interrupts, external of INT n. */
279 IDTE_INT_GEN(), /* 77 - - I - - User defined Interrupts, external of INT n. */
280 IDTE_INT_GEN(), /* 78 - - I - - User defined Interrupts, external of INT n. */
281 IDTE_INT_GEN(), /* 79 - - I - - User defined Interrupts, external of INT n. */
282 IDTE_INT_GEN(), /* 7a - - I - - User defined Interrupts, external of INT n. */
283 IDTE_INT_GEN(), /* 7b - - I - - User defined Interrupts, external of INT n. */
284 IDTE_INT_GEN(), /* 7c - - I - - User defined Interrupts, external of INT n. */
285 IDTE_INT_GEN(), /* 7d - - I - - User defined Interrupts, external of INT n. */
286 IDTE_INT_GEN(), /* 7e - - I - - User defined Interrupts, external of INT n. */
287 IDTE_INT_GEN(), /* 7f - - I - - User defined Interrupts, external of INT n. */
288 IDTE_INT_GEN(), /* 80 - - I - - User defined Interrupts, external of INT n. */
289 IDTE_INT_GEN(), /* 81 - - I - - User defined Interrupts, external of INT n. */
290 IDTE_INT_GEN(), /* 82 - - I - - User defined Interrupts, external of INT n. */
291 IDTE_INT_GEN(), /* 83 - - I - - User defined Interrupts, external of INT n. */
292 IDTE_INT_GEN(), /* 84 - - I - - User defined Interrupts, external of INT n. */
293 IDTE_INT_GEN(), /* 85 - - I - - User defined Interrupts, external of INT n. */
294 IDTE_INT_GEN(), /* 86 - - I - - User defined Interrupts, external of INT n. */
295 IDTE_INT_GEN(), /* 87 - - I - - User defined Interrupts, external of INT n. */
296 IDTE_INT_GEN(), /* 88 - - I - - User defined Interrupts, external of INT n. */
297 IDTE_INT_GEN(), /* 89 - - I - - User defined Interrupts, external of INT n. */
298 IDTE_INT_GEN(), /* 8a - - I - - User defined Interrupts, external of INT n. */
299 IDTE_INT_GEN(), /* 8b - - I - - User defined Interrupts, external of INT n. */
300 IDTE_INT_GEN(), /* 8c - - I - - User defined Interrupts, external of INT n. */
301 IDTE_INT_GEN(), /* 8d - - I - - User defined Interrupts, external of INT n. */
302 IDTE_INT_GEN(), /* 8e - - I - - User defined Interrupts, external of INT n. */
303 IDTE_INT_GEN(), /* 8f - - I - - User defined Interrupts, external of INT n. */
304 IDTE_INT_GEN(), /* 90 - - I - - User defined Interrupts, external of INT n. */
305 IDTE_INT_GEN(), /* 91 - - I - - User defined Interrupts, external of INT n. */
306 IDTE_INT_GEN(), /* 92 - - I - - User defined Interrupts, external of INT n. */
307 IDTE_INT_GEN(), /* 93 - - I - - User defined Interrupts, external of INT n. */
308 IDTE_INT_GEN(), /* 94 - - I - - User defined Interrupts, external of INT n. */
309 IDTE_INT_GEN(), /* 95 - - I - - User defined Interrupts, external of INT n. */
310 IDTE_INT_GEN(), /* 96 - - I - - User defined Interrupts, external of INT n. */
311 IDTE_INT_GEN(), /* 97 - - I - - User defined Interrupts, external of INT n. */
312 IDTE_INT_GEN(), /* 98 - - I - - User defined Interrupts, external of INT n. */
313 IDTE_INT_GEN(), /* 99 - - I - - User defined Interrupts, external of INT n. */
314 IDTE_INT_GEN(), /* 9a - - I - - User defined Interrupts, external of INT n. */
315 IDTE_INT_GEN(), /* 9b - - I - - User defined Interrupts, external of INT n. */
316 IDTE_INT_GEN(), /* 9c - - I - - User defined Interrupts, external of INT n. */
317 IDTE_INT_GEN(), /* 9d - - I - - User defined Interrupts, external of INT n. */
318 IDTE_INT_GEN(), /* 9e - - I - - User defined Interrupts, external of INT n. */
319 IDTE_INT_GEN(), /* 9f - - I - - User defined Interrupts, external of INT n. */
320 IDTE_INT_GEN(), /* a0 - - I - - User defined Interrupts, external of INT n. */
321 IDTE_INT_GEN(), /* a1 - - I - - User defined Interrupts, external of INT n. */
322 IDTE_INT_GEN(), /* a2 - - I - - User defined Interrupts, external of INT n. */
323 IDTE_INT_GEN(), /* a3 - - I - - User defined Interrupts, external of INT n. */
324 IDTE_INT_GEN(), /* a4 - - I - - User defined Interrupts, external of INT n. */
325 IDTE_INT_GEN(), /* a5 - - I - - User defined Interrupts, external of INT n. */
326 IDTE_INT_GEN(), /* a6 - - I - - User defined Interrupts, external of INT n. */
327 IDTE_INT_GEN(), /* a7 - - I - - User defined Interrupts, external of INT n. */
328 IDTE_INT_GEN(), /* a8 - - I - - User defined Interrupts, external of INT n. */
329 IDTE_INT_GEN(), /* a9 - - I - - User defined Interrupts, external of INT n. */
330 IDTE_INT_GEN(), /* aa - - I - - User defined Interrupts, external of INT n. */
331 IDTE_INT_GEN(), /* ab - - I - - User defined Interrupts, external of INT n. */
332 IDTE_INT_GEN(), /* ac - - I - - User defined Interrupts, external of INT n. */
333 IDTE_INT_GEN(), /* ad - - I - - User defined Interrupts, external of INT n. */
334 IDTE_INT_GEN(), /* ae - - I - - User defined Interrupts, external of INT n. */
335 IDTE_INT_GEN(), /* af - - I - - User defined Interrupts, external of INT n. */
336 IDTE_INT_GEN(), /* b0 - - I - - User defined Interrupts, external of INT n. */
337 IDTE_INT_GEN(), /* b1 - - I - - User defined Interrupts, external of INT n. */
338 IDTE_INT_GEN(), /* b2 - - I - - User defined Interrupts, external of INT n. */
339 IDTE_INT_GEN(), /* b3 - - I - - User defined Interrupts, external of INT n. */
340 IDTE_INT_GEN(), /* b4 - - I - - User defined Interrupts, external of INT n. */
341 IDTE_INT_GEN(), /* b5 - - I - - User defined Interrupts, external of INT n. */
342 IDTE_INT_GEN(), /* b6 - - I - - User defined Interrupts, external of INT n. */
343 IDTE_INT_GEN(), /* b7 - - I - - User defined Interrupts, external of INT n. */
344 IDTE_INT_GEN(), /* b8 - - I - - User defined Interrupts, external of INT n. */
345 IDTE_INT_GEN(), /* b9 - - I - - User defined Interrupts, external of INT n. */
346 IDTE_INT_GEN(), /* ba - - I - - User defined Interrupts, external of INT n. */
347 IDTE_INT_GEN(), /* bb - - I - - User defined Interrupts, external of INT n. */
348 IDTE_INT_GEN(), /* bc - - I - - User defined Interrupts, external of INT n. */
349 IDTE_INT_GEN(), /* bd - - I - - User defined Interrupts, external of INT n. */
350 IDTE_INT_GEN(), /* be - - I - - User defined Interrupts, external of INT n. */
351 IDTE_INT_GEN(), /* bf - - I - - User defined Interrupts, external of INT n. */
352 IDTE_INT_GEN(), /* c0 - - I - - User defined Interrupts, external of INT n. */
353 IDTE_INT_GEN(), /* c1 - - I - - User defined Interrupts, external of INT n. */
354 IDTE_INT_GEN(), /* c2 - - I - - User defined Interrupts, external of INT n. */
355 IDTE_INT_GEN(), /* c3 - - I - - User defined Interrupts, external of INT n. */
356 IDTE_INT_GEN(), /* c4 - - I - - User defined Interrupts, external of INT n. */
357 IDTE_INT_GEN(), /* c5 - - I - - User defined Interrupts, external of INT n. */
358 IDTE_INT_GEN(), /* c6 - - I - - User defined Interrupts, external of INT n. */
359 IDTE_INT_GEN(), /* c7 - - I - - User defined Interrupts, external of INT n. */
360 IDTE_INT_GEN(), /* c8 - - I - - User defined Interrupts, external of INT n. */
361 IDTE_INT_GEN(), /* c9 - - I - - User defined Interrupts, external of INT n. */
362 IDTE_INT_GEN(), /* ca - - I - - User defined Interrupts, external of INT n. */
363 IDTE_INT_GEN(), /* cb - - I - - User defined Interrupts, external of INT n. */
364 IDTE_INT_GEN(), /* cc - - I - - User defined Interrupts, external of INT n. */
365 IDTE_INT_GEN(), /* cd - - I - - User defined Interrupts, external of INT n. */
366 IDTE_INT_GEN(), /* ce - - I - - User defined Interrupts, external of INT n. */
367 IDTE_INT_GEN(), /* cf - - I - - User defined Interrupts, external of INT n. */
368 IDTE_INT_GEN(), /* d0 - - I - - User defined Interrupts, external of INT n. */
369 IDTE_INT_GEN(), /* d1 - - I - - User defined Interrupts, external of INT n. */
370 IDTE_INT_GEN(), /* d2 - - I - - User defined Interrupts, external of INT n. */
371 IDTE_INT_GEN(), /* d3 - - I - - User defined Interrupts, external of INT n. */
372 IDTE_INT_GEN(), /* d4 - - I - - User defined Interrupts, external of INT n. */
373 IDTE_INT_GEN(), /* d5 - - I - - User defined Interrupts, external of INT n. */
374 IDTE_INT_GEN(), /* d6 - - I - - User defined Interrupts, external of INT n. */
375 IDTE_INT_GEN(), /* d7 - - I - - User defined Interrupts, external of INT n. */
376 IDTE_INT_GEN(), /* d8 - - I - - User defined Interrupts, external of INT n. */
377 IDTE_INT_GEN(), /* d9 - - I - - User defined Interrupts, external of INT n. */
378 IDTE_INT_GEN(), /* da - - I - - User defined Interrupts, external of INT n. */
379 IDTE_INT_GEN(), /* db - - I - - User defined Interrupts, external of INT n. */
380 IDTE_INT_GEN(), /* dc - - I - - User defined Interrupts, external of INT n. */
381 IDTE_INT_GEN(), /* dd - - I - - User defined Interrupts, external of INT n. */
382 IDTE_INT_GEN(), /* de - - I - - User defined Interrupts, external of INT n. */
383 IDTE_INT_GEN(), /* df - - I - - User defined Interrupts, external of INT n. */
384 IDTE_INT_GEN(), /* e0 - - I - - User defined Interrupts, external of INT n. */
385 IDTE_INT_GEN(), /* e1 - - I - - User defined Interrupts, external of INT n. */
386 IDTE_INT_GEN(), /* e2 - - I - - User defined Interrupts, external of INT n. */
387 IDTE_INT_GEN(), /* e3 - - I - - User defined Interrupts, external of INT n. */
388 IDTE_INT_GEN(), /* e4 - - I - - User defined Interrupts, external of INT n. */
389 IDTE_INT_GEN(), /* e5 - - I - - User defined Interrupts, external of INT n. */
390 IDTE_INT_GEN(), /* e6 - - I - - User defined Interrupts, external of INT n. */
391 IDTE_INT_GEN(), /* e7 - - I - - User defined Interrupts, external of INT n. */
392 IDTE_INT_GEN(), /* e8 - - I - - User defined Interrupts, external of INT n. */
393 IDTE_INT_GEN(), /* e9 - - I - - User defined Interrupts, external of INT n. */
394 IDTE_INT_GEN(), /* ea - - I - - User defined Interrupts, external of INT n. */
395 IDTE_INT_GEN(), /* eb - - I - - User defined Interrupts, external of INT n. */
396 IDTE_INT_GEN(), /* ec - - I - - User defined Interrupts, external of INT n. */
397 IDTE_INT_GEN(), /* ed - - I - - User defined Interrupts, external of INT n. */
398 IDTE_INT_GEN(), /* ee - - I - - User defined Interrupts, external of INT n. */
399 IDTE_INT_GEN(), /* ef - - I - - User defined Interrupts, external of INT n. */
400 IDTE_INT_GEN(), /* f0 - - I - - User defined Interrupts, external of INT n. */
401 IDTE_INT_GEN(), /* f1 - - I - - User defined Interrupts, external of INT n. */
402 IDTE_INT_GEN(), /* f2 - - I - - User defined Interrupts, external of INT n. */
403 IDTE_INT_GEN(), /* f3 - - I - - User defined Interrupts, external of INT n. */
404 IDTE_INT_GEN(), /* f4 - - I - - User defined Interrupts, external of INT n. */
405 IDTE_INT_GEN(), /* f5 - - I - - User defined Interrupts, external of INT n. */
406 IDTE_INT_GEN(), /* f6 - - I - - User defined Interrupts, external of INT n. */
407 IDTE_INT_GEN(), /* f7 - - I - - User defined Interrupts, external of INT n. */
408 IDTE_INT_GEN(), /* f8 - - I - - User defined Interrupts, external of INT n. */
409 IDTE_INT_GEN(), /* f9 - - I - - User defined Interrupts, external of INT n. */
410 IDTE_INT_GEN(), /* fa - - I - - User defined Interrupts, external of INT n. */
411 IDTE_INT_GEN(), /* fb - - I - - User defined Interrupts, external of INT n. */
412 IDTE_INT_GEN(), /* fc - - I - - User defined Interrupts, external of INT n. */
413 IDTE_INT_GEN(), /* fd - - I - - User defined Interrupts, external of INT n. */
414 IDTE_INT_GEN(), /* fe - - I - - User defined Interrupts, external of INT n. */
415 IDTE_INT_GEN(), /* ff - - I - - User defined Interrupts, external of INT n. */
416#undef IDTE_TRAP
417#undef IDTE_TRAP_GEN
418#undef IDTE_INT
419#undef IDTE_INT_GEN
420#undef IDTE_TASK
421#undef IDTE_UNUSED
422#undef IDTE_RESERVED
423};
424
425
426/** Enable or disable tracking of Guest's IDT. */
427#define TRPM_TRACK_GUEST_IDT_CHANGES
428
429/** Enable or disable tracking of Shadow IDT. */
430#define TRPM_TRACK_SHADOW_IDT_CHANGES
431
432/** TRPM saved state version. */
433#define TRPM_SAVED_STATE_VERSION 8
434
435
436/*******************************************************************************
437* Internal Functions *
438*******************************************************************************/
439static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
440static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version);
441static DECLCALLBACK(int) trpmR3GuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
442
443
444/**
445 * Initializes the Trap Manager
446 *
447 * @returns VBox status code.
448 * @param pVM The VM to operate on.
449 */
450VMMR3DECL(int) TRPMR3Init(PVM pVM)
451{
452 LogFlow(("TRPMR3Init\n"));
453
454 /*
455 * Assert sizes and alignments.
456 */
457 AssertRelease(!(RT_OFFSETOF(VM, trpm.s) & 31));
458 AssertRelease(!(RT_OFFSETOF(VM, trpm.s.aIdt) & 15));
459 AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
460 AssertRelease(RT_ELEMENTS(pVM->trpm.s.aGuestTrapHandler) == sizeof(pVM->trpm.s.au32IdtPatched)*8);
461
462 /*
463 * Initialize members.
464 */
465 pVM->trpm.s.offVM = RT_OFFSETOF(VM, trpm);
466 pVM->trpm.s.uActiveVector = ~0;
467 pVM->trpm.s.GuestIdtr.pIdt = RTRCPTR_MAX;
468 pVM->trpm.s.pvMonShwIdtRC = RTRCPTR_MAX;
469 pVM->trpm.s.fDisableMonitoring = false;
470 pVM->trpm.s.fSafeToDropGuestIDTMonitoring = false;
471
472 /*
473 * Read the configuration (if any).
474 */
475 PCFGMNODE pTRPMNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "TRPM");
476 if (pTRPMNode)
477 {
478 bool f;
479 int rc = CFGMR3QueryBool(pTRPMNode, "SafeToDropGuestIDTMonitoring", &f);
480 if (RT_SUCCESS(rc))
481 pVM->trpm.s.fSafeToDropGuestIDTMonitoring = f;
482 }
483
484 /* write config summary to log */
485 if (pVM->trpm.s.fSafeToDropGuestIDTMonitoring)
486 LogRel(("TRPM: Dropping Guest IDT Monitoring.\n"));
487
488 /*
489 * Initialize the IDT.
490 * The handler addresses will be set in the TRPMR3Relocate() function.
491 */
492 Assert(sizeof(pVM->trpm.s.aIdt) == sizeof(g_aIdt));
493 memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
494
495 /*
496 * Register the saved state data unit.
497 */
498 int rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
499 NULL, trpmR3Save, NULL,
500 NULL, trpmR3Load, NULL);
501 if (VBOX_FAILURE(rc))
502 return rc;
503
504 /*
505 * Statistics.
506 */
507 STAM_REG(pVM, &pVM->trpm.s.StatRCWriteGuestIDTFault, STAMTYPE_COUNTER, "/TRPM/RC/IDTWritesFault", STAMUNIT_OCCURENCES, "Guest IDT writes the we returned to R3 to handle.");
508 STAM_REG(pVM, &pVM->trpm.s.StatRCWriteGuestIDTHandled, STAMTYPE_COUNTER, "/TRPM/RC/IDTWritesHandled", STAMUNIT_OCCURENCES, "Guest IDT writes that we handled successfully.");
509 STAM_REG(pVM, &pVM->trpm.s.StatSyncIDT, STAMTYPE_PROFILE, "/PROF/TRPM/SyncIDT", STAMUNIT_TICKS_PER_CALL, "Profiling of TRPMR3SyncIDT().");
510
511 /* traps */
512 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x00], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/00", STAMUNIT_TICKS_PER_CALL, "#DE - Divide error.");
513 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x01], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/01", STAMUNIT_TICKS_PER_CALL, "#DB - Debug (single step and more).");
514 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x02], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/02", STAMUNIT_TICKS_PER_CALL, "NMI");
515 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x03], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/03", STAMUNIT_TICKS_PER_CALL, "#BP - Breakpoint.");
516 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x04], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/04", STAMUNIT_TICKS_PER_CALL, "#OF - Overflow.");
517 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x05], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/05", STAMUNIT_TICKS_PER_CALL, "#BR - Bound range exceeded.");
518 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x06], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/06", STAMUNIT_TICKS_PER_CALL, "#UD - Undefined opcode.");
519 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x07], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/07", STAMUNIT_TICKS_PER_CALL, "#NM - Device not available (FPU).");
520 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x08], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/08", STAMUNIT_TICKS_PER_CALL, "#DF - Double fault.");
521 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x09], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/09", STAMUNIT_TICKS_PER_CALL, "#?? - Coprocessor segment overrun (obsolete).");
522 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0a], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0a", STAMUNIT_TICKS_PER_CALL, "#TS - Task switch fault.");
523 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0b], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0b", STAMUNIT_TICKS_PER_CALL, "#NP - Segemnt not present.");
524 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0c], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0c", STAMUNIT_TICKS_PER_CALL, "#SS - Stack segment fault.");
525 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0d], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0d", STAMUNIT_TICKS_PER_CALL, "#GP - General protection fault.");
526 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0e], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0e", STAMUNIT_TICKS_PER_CALL, "#PF - Page fault.");
527 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0f], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0f", STAMUNIT_TICKS_PER_CALL, "Reserved.");
528 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x10], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/10", STAMUNIT_TICKS_PER_CALL, "#MF - Math fault..");
529 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x11], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/11", STAMUNIT_TICKS_PER_CALL, "#AC - Alignment check.");
530 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x12], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/12", STAMUNIT_TICKS_PER_CALL, "#MC - Machine check.");
531 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x13], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/13", STAMUNIT_TICKS_PER_CALL, "#XF - SIMD Floating-Point Exception.");
532
533#ifdef VBOX_WITH_STATISTICS
534 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 255, 8, MM_TAG_STAM, (void **)&pVM->trpm.s.paStatForwardedIRQR3);
535 AssertRCReturn(rc, rc);
536 pVM->trpm.s.paStatForwardedIRQRC = MMHyperR3ToRC(pVM, pVM->trpm.s.paStatForwardedIRQR3);
537 pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
538 for (unsigned i = 0; i < 255; i++)
539 STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.",
540 i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
541#endif
542
543 STAM_REG(pVM, &pVM->trpm.s.StatForwardProfR3, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/ProfR3", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap.");
544 STAM_REG(pVM, &pVM->trpm.s.StatForwardProfRZ, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/ProfRZ", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap.");
545 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailNoHandler, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailNoHandler", STAMUNIT_OCCURENCES,"Failure to forward interrupt in raw mode.");
546 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailPatchAddr, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailPatchAddr", STAMUNIT_OCCURENCES,"Failure to forward interrupt in raw mode.");
547 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailR3, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailR3", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
548 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailRZ, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailRZ", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
549
550 STAM_REG(pVM, &pVM->trpm.s.StatTrap0dDisasm, STAMTYPE_PROFILE, "/TRPM/RC/Traps/0d/Disasm", STAMUNIT_TICKS_PER_CALL, "Profiling disassembly part of trpmGCTrap0dHandler.");
551 STAM_REG(pVM, &pVM->trpm.s.StatTrap0dRdTsc, STAMTYPE_COUNTER, "/TRPM/RC/Traps/0d/RdTsc", STAMUNIT_OCCURENCES, "Number of RDTSC #GPs.");
552
553 /*
554 * Default action when entering raw mode for the first time
555 */
556 VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
557 return 0;
558}
559
560
561/**
562 * Applies relocations to data and code managed by this component.
563 *
564 * This function will be called at init and whenever the VMM need
565 * to relocate itself inside the GC.
566 *
567 * @param pVM The VM handle.
568 * @param offDelta Relocation delta relative to old location.
569 */
570VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
571{
572 LogFlow(("TRPMR3Relocate\n"));
573 /*
574 * Get the trap handler addresses.
575 *
576 * If VMMGC.gc is screwed, so are we. We'll assert here since it elsewise
577 * would make init order impossible if we should assert the presence of these
578 * exports in TRPMR3Init().
579 */
580 RTRCPTR aRCPtrs[TRPM_HANDLER_MAX] = {0};
581 int rc;
582 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aRCPtrs[TRPM_HANDLER_INT]);
583 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
584
585 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerGeneric", &aRCPtrs[TRPM_HANDLER_TRAP]);
586 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerGeneric in VMMGC.gc!\n"));
587
588 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap08", &aRCPtrs[TRPM_HANDLER_TRAP_08]);
589 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap08 in VMMGC.gc!\n"));
590
591 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap12", &aRCPtrs[TRPM_HANDLER_TRAP_12]);
592 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap12 in VMMGC.gc!\n"));
593
594 RTSEL SelCS = CPUMGetHyperCS(pVM);
595
596 /*
597 * Iterate the idt and set the addresses.
598 */
599 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[0];
600 PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[0];
601 for (unsigned i = 0; i < RT_ELEMENTS(pVM->trpm.s.aIdt); i++, pIdte++, pIdteTemplate++)
602 {
603 if ( pIdte->Gen.u1Present
604 && !ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], i)
605 )
606 {
607 Assert(pIdteTemplate->u16OffsetLow < TRPM_HANDLER_MAX);
608 RTGCPTR Offset = aRCPtrs[pIdteTemplate->u16OffsetLow];
609 switch (pIdteTemplate->u16OffsetLow)
610 {
611 /*
612 * Generic handlers have different entrypoints for each possible
613 * vector number. These entrypoints makes a sort of an array with
614 * 8 byte entries where the vector number is the index.
615 * See TRPMGCHandlersA.asm for details.
616 */
617 case TRPM_HANDLER_INT:
618 case TRPM_HANDLER_TRAP:
619 Offset += i * 8;
620 break;
621 case TRPM_HANDLER_TRAP_12:
622 break;
623 case TRPM_HANDLER_TRAP_08:
624 /* Handle #DF Task Gate in special way. */
625 pIdte->Gen.u16SegSel = SELMGetTrap8Selector(pVM);
626 pIdte->Gen.u16OffsetLow = 0;
627 pIdte->Gen.u16OffsetHigh = 0;
628 SELMSetTrap8EIP(pVM, Offset);
629 continue;
630 }
631 /* (non-task gates only ) */
632 pIdte->Gen.u16OffsetLow = Offset & 0xffff;
633 pIdte->Gen.u16OffsetHigh = Offset >> 16;
634 pIdte->Gen.u16SegSel = SelCS;
635 }
636 }
637
638 /*
639 * Update IDTR (limit is including!).
640 */
641 CPUMSetHyperIDTR(pVM, VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1);
642
643 if (!pVM->trpm.s.fDisableMonitoring)
644 {
645#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
646 if (pVM->trpm.s.pvMonShwIdtRC != RTRCPTR_MAX)
647 {
648 rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.pvMonShwIdtRC);
649 AssertRC(rc);
650 }
651 pVM->trpm.s.pvMonShwIdtRC = VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]);
652 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_HYPERVISOR, pVM->trpm.s.pvMonShwIdtRC, pVM->trpm.s.pvMonShwIdtRC + sizeof(pVM->trpm.s.aIdt) - 1,
653 0, 0, "trpmRCShadowIDTWriteHandler", 0, "Shadow IDT write access handler");
654 AssertRC(rc);
655#endif
656 }
657
658 /* Relocate IDT handlers for forwarding guest traps/interrupts. */
659 for (uint32_t iTrap = 0; iTrap < RT_ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
660 {
661 if (pVM->trpm.s.aGuestTrapHandler[iTrap] != TRPM_INVALID_HANDLER)
662 {
663 Log(("TRPMR3Relocate: iGate=%2X Handler %VGv -> %VGv\n", iTrap, pVM->trpm.s.aGuestTrapHandler[iTrap], pVM->trpm.s.aGuestTrapHandler[iTrap] + offDelta));
664 pVM->trpm.s.aGuestTrapHandler[iTrap] += offDelta;
665 }
666
667 if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
668 {
669 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
670 RTGCPTR pHandler = VBOXIDTE_OFFSET(*pIdte);
671
672 Log(("TRPMR3Relocate: *iGate=%2X Handler %VGv -> %VGv\n", iTrap, pHandler, pHandler + offDelta));
673 pHandler += offDelta;
674
675 pIdte->Gen.u16OffsetHigh = pHandler >> 16;
676 pIdte->Gen.u16OffsetLow = pHandler & 0xFFFF;
677
678 }
679 }
680
681 pVM->trpm.s.paStatForwardedIRQRC += offDelta;
682 pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
683}
684
685
686/**
687 * Terminates the Trap Manager
688 *
689 * @returns VBox status code.
690 * @param pVM The VM to operate on.
691 */
692VMMR3DECL(int) TRPMR3Term(PVM pVM)
693{
694 NOREF(pVM);
695 return 0;
696}
697
698
699/**
700 * The VM is being reset.
701 *
702 * For the TRPM component this means that any IDT write monitors
703 * needs to be removed, any pending trap cleared, and the IDT reset.
704 *
705 * @param pVM VM handle.
706 */
707VMMR3DECL(void) TRPMR3Reset(PVM pVM)
708{
709 /*
710 * Deregister any virtual handlers.
711 */
712#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
713 if (pVM->trpm.s.GuestIdtr.pIdt != RTRCPTR_MAX)
714 {
715 if (!pVM->trpm.s.fSafeToDropGuestIDTMonitoring)
716 {
717 int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
718 AssertRC(rc);
719 }
720 pVM->trpm.s.GuestIdtr.pIdt = RTRCPTR_MAX;
721 }
722 pVM->trpm.s.GuestIdtr.cbIdt = 0;
723#endif
724
725 /*
726 * Reinitialize other members calling the relocator to get things right.
727 */
728 pVM->trpm.s.uActiveVector = ~0;
729 memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
730 memset(pVM->trpm.s.aGuestTrapHandler, 0, sizeof(pVM->trpm.s.aGuestTrapHandler));
731 TRPMR3Relocate(pVM, 0);
732
733 /*
734 * Default action when entering raw mode for the first time
735 */
736 VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
737}
738
739
740/**
741 * Execute state save operation.
742 *
743 * @returns VBox status code.
744 * @param pVM VM Handle.
745 * @param pSSM SSM operation handle.
746 */
747static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
748{
749 LogFlow(("trpmR3Save:\n"));
750
751 /*
752 * Active and saved traps.
753 */
754 PTRPM pTrpm = &pVM->trpm.s;
755 SSMR3PutUInt(pSSM, pTrpm->uActiveVector);
756 SSMR3PutUInt(pSSM, pTrpm->enmActiveType);
757 SSMR3PutGCUInt(pSSM, pTrpm->uActiveErrorCode);
758 SSMR3PutGCUIntPtr(pSSM, pTrpm->uActiveCR2);
759 SSMR3PutGCUInt(pSSM, pTrpm->uSavedVector);
760 SSMR3PutUInt(pSSM, pTrpm->enmSavedType);
761 SSMR3PutGCUInt(pSSM, pTrpm->uSavedErrorCode);
762 SSMR3PutGCUIntPtr(pSSM, pTrpm->uSavedCR2);
763 SSMR3PutGCUInt(pSSM, pTrpm->uPrevVector);
764#if 0 /** @todo Enable this (+ load change) on the next version change. */
765 SSMR3PutBool(pSSM, pTrpm->fDisableMonitoring);
766#else
767 SSMR3PutGCUInt(pSSM, pTrpm->fDisableMonitoring);
768#endif
769 SSMR3PutUInt(pSSM, VM_FF_ISSET(pVM, VM_FF_TRPM_SYNC_IDT));
770 SSMR3PutMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
771 SSMR3PutU32(pSSM, ~0); /* separator. */
772
773 /*
774 * Save any trampoline gates.
775 */
776 for (uint32_t iTrap = 0; iTrap < RT_ELEMENTS(pTrpm->aGuestTrapHandler); iTrap++)
777 {
778 if (pTrpm->aGuestTrapHandler[iTrap])
779 {
780 SSMR3PutU32(pSSM, iTrap);
781 SSMR3PutGCPtr(pSSM, pTrpm->aGuestTrapHandler[iTrap]);
782 SSMR3PutMem(pSSM, &pTrpm->aIdt[iTrap], sizeof(pTrpm->aIdt[iTrap]));
783 }
784 }
785
786 return SSMR3PutU32(pSSM, ~0); /* terminator */
787}
788
789
790/**
791 * Execute state load operation.
792 *
793 * @returns VBox status code.
794 * @param pVM VM Handle.
795 * @param pSSM SSM operation handle.
796 * @param u32Version Data layout version.
797 */
798static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version)
799{
800 LogFlow(("trpmR3Load:\n"));
801
802 /*
803 * Validate version.
804 */
805 if (u32Version != TRPM_SAVED_STATE_VERSION)
806 {
807 AssertMsgFailed(("trpmR3Load: Invalid version u32Version=%d!\n", u32Version));
808 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
809 }
810
811 /*
812 * Call the reset function to kick out any handled gates and other potential trouble.
813 */
814 TRPMR3Reset(pVM);
815
816 /*
817 * Active and saved traps.
818 */
819 PTRPM pTrpm = &pVM->trpm.s;
820 SSMR3GetUInt(pSSM, &pTrpm->uActiveVector);
821 SSMR3GetUInt(pSSM, (uint32_t *)&pTrpm->enmActiveType);
822 SSMR3GetGCUInt(pSSM, &pTrpm->uActiveErrorCode);
823 SSMR3GetGCUIntPtr(pSSM, &pTrpm->uActiveCR2);
824 SSMR3GetGCUInt(pSSM, &pTrpm->uSavedVector);
825 SSMR3GetUInt(pSSM, (uint32_t *)&pTrpm->enmSavedType);
826 SSMR3GetGCUInt(pSSM, &pTrpm->uSavedErrorCode);
827 SSMR3GetGCUIntPtr(pSSM, &pTrpm->uSavedCR2);
828 SSMR3GetGCUInt(pSSM, &pTrpm->uPrevVector);
829#if 0 /** @todo Enable this + the corresponding save code on the next version change. */
830 SSMR3GetBool(pSSM, &pTrpm->fDisableMonitoring);
831#else
832 RTGCUINT fDisableMonitoring;
833 SSMR3GetGCUInt(pSSM, &fDisableMonitoring);
834 pTrpm->fDisableMonitoring = !!fDisableMonitoring;
835#endif
836
837 RTUINT fSyncIDT;
838 int rc = SSMR3GetUInt(pSSM, &fSyncIDT);
839 if (VBOX_FAILURE(rc))
840 return rc;
841 if (fSyncIDT & ~1)
842 {
843 AssertMsgFailed(("fSyncIDT=%#x\n", fSyncIDT));
844 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
845 }
846 if (fSyncIDT)
847 VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
848 /* else: cleared by reset call above. */
849
850 SSMR3GetMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
851
852 /* check the separator */
853 uint32_t u32Sep;
854 rc = SSMR3GetU32(pSSM, &u32Sep);
855 if (VBOX_FAILURE(rc))
856 return rc;
857 if (u32Sep != (uint32_t)~0)
858 {
859 AssertMsgFailed(("u32Sep=%#x (first)\n", u32Sep));
860 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
861 }
862
863 /*
864 * Restore any trampoline gates.
865 */
866 for (;;)
867 {
868 /* gate number / terminator */
869 uint32_t iTrap;
870 rc = SSMR3GetU32(pSSM, &iTrap);
871 if (VBOX_FAILURE(rc))
872 return rc;
873 if (iTrap == (uint32_t)~0)
874 break;
875 if ( iTrap >= RT_ELEMENTS(pTrpm->aIdt)
876 || pTrpm->aGuestTrapHandler[iTrap])
877 {
878 AssertMsgFailed(("iTrap=%#x\n", iTrap));
879 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
880 }
881
882 /* restore the IDT entry. */
883 RTGCPTR GCPtrHandler;
884 SSMR3GetGCPtr(pSSM, &GCPtrHandler);
885 VBOXIDTE Idte;
886 rc = SSMR3GetMem(pSSM, &Idte, sizeof(Idte));
887 if (VBOX_FAILURE(rc))
888 return rc;
889 Assert(GCPtrHandler);
890 pTrpm->aIdt[iTrap] = Idte;
891 }
892
893 return VINF_SUCCESS;
894}
895
896
897/**
898 * Check if gate handlers were updated
899 * (callback for the VM_FF_TRPM_SYNC_IDT forced action).
900 *
901 * @returns VBox status code.
902 * @param pVM The VM handle.
903 */
904VMMR3DECL(int) TRPMR3SyncIDT(PVM pVM)
905{
906 STAM_PROFILE_START(&pVM->trpm.s.StatSyncIDT, a);
907 const bool fRawRing0 = EMIsRawRing0Enabled(pVM);
908 int rc;
909
910 if (pVM->trpm.s.fDisableMonitoring)
911 {
912 VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
913 return VINF_SUCCESS; /* Nothing to do */
914 }
915
916 if (fRawRing0 && CSAMIsEnabled(pVM))
917 {
918 /* Clear all handlers */
919 Log(("TRPMR3SyncIDT: Clear all trap handlers.\n"));
920 /** @todo inefficient, but simple */
921 for (unsigned iGate = 0; iGate < 256; iGate++)
922 trpmClearGuestTrapHandler(pVM, iGate);
923
924 /* Scan them all (only the first time) */
925 CSAMR3CheckGates(pVM, 0, 256);
926 }
927
928 /*
929 * Get the IDTR.
930 */
931 VBOXIDTR IDTR;
932 IDTR.pIdt = CPUMGetGuestIDTR(pVM, &IDTR.cbIdt);
933 if (!IDTR.cbIdt)
934 {
935 Log(("No IDT entries...\n"));
936 return DBGFSTOP(pVM);
937 }
938
939#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
940 /*
941 * Check if Guest's IDTR has changed.
942 */
943 if ( IDTR.pIdt != pVM->trpm.s.GuestIdtr.pIdt
944 || IDTR.cbIdt != pVM->trpm.s.GuestIdtr.cbIdt)
945 {
946 Log(("TRPMR3UpdateFromCPUM: Guest's IDT is changed to pIdt=%08X cbIdt=%08X\n", IDTR.pIdt, IDTR.cbIdt));
947 if (!pVM->trpm.s.fSafeToDropGuestIDTMonitoring)
948 {
949 /*
950 * [Re]Register write virtual handler for guest's IDT.
951 */
952 if (pVM->trpm.s.GuestIdtr.pIdt != RTRCPTR_MAX)
953 {
954 rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
955 AssertRCReturn(rc, rc);
956 }
957 /* limit is including */
958 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, IDTR.pIdt, IDTR.pIdt + IDTR.cbIdt /* already inclusive */,
959 0, trpmR3GuestIDTWriteHandler, "trpmRCGuestIDTWriteHandler", 0, "Guest IDT write access handler");
960
961 if (rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT)
962 {
963 /* Could be a conflict with CSAM */
964 CSAMR3RemovePage(pVM, IDTR.pIdt);
965 if (PAGE_ADDRESS(IDTR.pIdt) != PAGE_ADDRESS(IDTR.pIdt + IDTR.cbIdt))
966 CSAMR3RemovePage(pVM, IDTR.pIdt + IDTR.cbIdt);
967
968 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, IDTR.pIdt, IDTR.pIdt + IDTR.cbIdt /* already inclusive */,
969 0, trpmR3GuestIDTWriteHandler, "trpmRCGuestIDTWriteHandler", 0, "Guest IDT write access handler");
970 }
971
972 AssertRCReturn(rc, rc);
973 }
974
975 /* Update saved Guest IDTR. */
976 pVM->trpm.s.GuestIdtr = IDTR;
977 }
978#endif
979
980 /*
981 * Sync the interrupt gate.
982 * Should probably check/sync the others too, but for now we'll handle that in #GP.
983 */
984 X86DESC Idte3;
985 rc = PGMPhysSimpleReadGCPtr(pVM, &Idte3, IDTR.pIdt + sizeof(Idte3) * 3, sizeof(Idte3));
986 if (VBOX_FAILURE(rc))
987 {
988 AssertMsgRC(rc, ("Failed to read IDT[3]! rc=%Vrc\n", rc));
989 return DBGFSTOP(pVM);
990 }
991 AssertRCReturn(rc, rc);
992 if (fRawRing0)
993 pVM->trpm.s.aIdt[3].Gen.u2DPL = RT_MAX(Idte3.Gen.u2Dpl, 1);
994 else
995 pVM->trpm.s.aIdt[3].Gen.u2DPL = Idte3.Gen.u2Dpl;
996
997 /*
998 * Clear the FF and we're done.
999 */
1000 VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
1001 STAM_PROFILE_STOP(&pVM->trpm.s.StatSyncIDT, a);
1002 return VINF_SUCCESS;
1003}
1004
1005
1006/**
1007 * Disable IDT monitoring and syncing
1008 *
1009 * @param pVM The VM to operate on.
1010 */
1011VMMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM)
1012{
1013 /*
1014 * Deregister any virtual handlers.
1015 */
1016#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
1017 if (pVM->trpm.s.GuestIdtr.pIdt != RTRCPTR_MAX)
1018 {
1019 if (!pVM->trpm.s.fSafeToDropGuestIDTMonitoring)
1020 {
1021 int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
1022 AssertRC(rc);
1023 }
1024 pVM->trpm.s.GuestIdtr.pIdt = RTRCPTR_MAX;
1025 }
1026 pVM->trpm.s.GuestIdtr.cbIdt = 0;
1027#endif
1028
1029#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
1030 if (pVM->trpm.s.pvMonShwIdtRC != RTRCPTR_MAX)
1031 {
1032 int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.pvMonShwIdtRC);
1033 AssertRC(rc);
1034 pVM->trpm.s.pvMonShwIdtRC = RTRCPTR_MAX;
1035 }
1036#endif
1037
1038 VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
1039
1040 pVM->trpm.s.fDisableMonitoring = true;
1041}
1042
1043
1044/**
1045 * \#PF Handler callback for virtual access handler ranges.
1046 *
1047 * Important to realize that a physical page in a range can have aliases, and
1048 * for ALL and WRITE handlers these will also trigger.
1049 *
1050 * @returns VINF_SUCCESS if the handler have carried out the operation.
1051 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
1052 * @param pVM VM Handle.
1053 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
1054 * @param pvPtr The HC mapping of that address.
1055 * @param pvBuf What the guest is reading/writing.
1056 * @param cbBuf How much it's reading/writing.
1057 * @param enmAccessType The access type.
1058 * @param pvUser User argument.
1059 */
1060static DECLCALLBACK(int) trpmR3GuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
1061{
1062 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
1063 Log(("trpmR3GuestIDTWriteHandler: write to %VGv size %d\n", GCPtr, cbBuf));
1064 VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
1065 return VINF_PGM_HANDLER_DO_DEFAULT;
1066}
1067
1068
1069/**
1070 * Clear passthrough interrupt gate handler (reset to default handler)
1071 *
1072 * @returns VBox status code.
1073 * @param pVM The VM to operate on.
1074 * @param iTrap Trap/interrupt gate number.
1075 */
1076VMMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap)
1077{
1078 /** @todo cleanup trpmR3ClearPassThroughHandler()! */
1079 RTRCPTR aGCPtrs[TRPM_HANDLER_MAX];
1080 int rc;
1081
1082 memset(aGCPtrs, 0, sizeof(aGCPtrs));
1083
1084 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
1085 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
1086
1087 if ( iTrap < TRPM_HANDLER_INT_BASE
1088 || iTrap >= RT_ELEMENTS(pVM->trpm.s.aIdt))
1089 {
1090 AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %#x!\n", iTrap));
1091 return VERR_INVALID_PARAMETER;
1092 }
1093 memcpy(&pVM->trpm.s.aIdt[iTrap], &g_aIdt[iTrap], sizeof(pVM->trpm.s.aIdt[0]));
1094
1095 /* Unmark it for relocation purposes. */
1096 ASMBitClear(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1097
1098 RTSEL SelCS = CPUMGetHyperCS(pVM);
1099 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1100 PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[iTrap];
1101 if (pIdte->Gen.u1Present)
1102 {
1103 Assert(pIdteTemplate->u16OffsetLow == TRPM_HANDLER_INT);
1104 Assert(sizeof(RTRCPTR) == sizeof(aGCPtrs[0]));
1105 RTRCPTR Offset = (RTRCPTR)aGCPtrs[pIdteTemplate->u16OffsetLow];
1106
1107 /*
1108 * Generic handlers have different entrypoints for each possible
1109 * vector number. These entrypoints make a sort of an array with
1110 * 8 byte entries where the vector number is the index.
1111 * See TRPMGCHandlersA.asm for details.
1112 */
1113 Offset += iTrap * 8;
1114
1115 if (pIdte->Gen.u5Type2 != VBOX_IDTE_TYPE2_TASK)
1116 {
1117 pIdte->Gen.u16OffsetLow = Offset & 0xffff;
1118 pIdte->Gen.u16OffsetHigh = Offset >> 16;
1119 pIdte->Gen.u16SegSel = SelCS;
1120 }
1121 }
1122
1123 return VINF_SUCCESS;
1124}
1125
1126
1127/**
1128 * Check if address is a gate handler (interrupt or trap).
1129 *
1130 * @returns gate nr or ~0 is not found
1131 *
1132 * @param pVM VM handle.
1133 * @param GCPtr GC address to check.
1134 */
1135VMMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTRCPTR GCPtr)
1136{
1137 for (uint32_t iTrap = 0; iTrap < RT_ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
1138 {
1139 if (pVM->trpm.s.aGuestTrapHandler[iTrap] == GCPtr)
1140 return iTrap;
1141
1142 /* redundant */
1143 if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
1144 {
1145 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1146 RTGCPTR pHandler = VBOXIDTE_OFFSET(*pIdte);
1147
1148 if (pHandler == GCPtr)
1149 return iTrap;
1150 }
1151 }
1152 return ~0;
1153}
1154
1155
1156/**
1157 * Get guest trap/interrupt gate handler
1158 *
1159 * @returns Guest trap handler address or TRPM_INVALID_HANDLER if none installed
1160 * @param pVM The VM to operate on.
1161 * @param iTrap Interrupt/trap number.
1162 */
1163VMMR3DECL(RTRCPTR) TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap)
1164{
1165 AssertReturn(iTrap < RT_ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER);
1166
1167 return pVM->trpm.s.aGuestTrapHandler[iTrap];
1168}
1169
1170
1171/**
1172 * Set guest trap/interrupt gate handler
1173 * Used for setting up trap gates used for kernel calls.
1174 *
1175 * @returns VBox status code.
1176 * @param pVM The VM to operate on.
1177 * @param iTrap Interrupt/trap number.
1178 * @param pHandler GC handler pointer
1179 */
1180VMMR3DECL(int) TRPMR3SetGuestTrapHandler(PVM pVM, unsigned iTrap, RTRCPTR pHandler)
1181{
1182 /*
1183 * Validate.
1184 */
1185 if (iTrap >= RT_ELEMENTS(pVM->trpm.s.aIdt))
1186 {
1187 AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap));
1188 return VERR_INVALID_PARAMETER;
1189 }
1190
1191 AssertReturn(pHandler == TRPM_INVALID_HANDLER || PATMIsPatchGCAddr(pVM, pHandler), VERR_INVALID_PARAMETER);
1192
1193 uint16_t cbIDT;
1194 RTGCPTR GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
1195 if (iTrap * sizeof(VBOXIDTE) >= cbIDT)
1196 return VERR_INVALID_PARAMETER; /* Silently ignore out of range requests. */
1197
1198 if (pHandler == TRPM_INVALID_HANDLER)
1199 {
1200 /* clear trap handler */
1201 Log(("TRPMR3SetGuestTrapHandler: clear handler %x\n", iTrap));
1202 return trpmClearGuestTrapHandler(pVM, iTrap);
1203 }
1204
1205 /*
1206 * Read the guest IDT entry.
1207 */
1208 VBOXIDTE GuestIdte;
1209 int rc = PGMPhysSimpleReadGCPtr(pVM, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte), sizeof(GuestIdte));
1210 if (VBOX_FAILURE(rc))
1211 {
1212 AssertMsgRC(rc, ("Failed to read IDTE! rc=%Vrc\n", rc));
1213 return rc;
1214 }
1215
1216 if (EMIsRawRing0Enabled(pVM))
1217 {
1218 /*
1219 * Only replace handlers for which we are 100% certain there won't be
1220 * any host interrupts.
1221 *
1222 * 0x2E is safe on Windows because it's the system service interrupt gate. Not
1223 * quite certain if this is safe or not on 64-bit Vista, it probably is.
1224 *
1225 * 0x80 is safe on Linux because it's the syscall vector and is part of the
1226 * 32-bit usermode ABI. 64-bit Linux (usually) supports 32-bit processes
1227 * and will therefor never assign hardware interrupts to 0x80.
1228 *
1229 * Exactly why 0x80 is safe on 32-bit Windows is a bit hazy, but it seems
1230 * to work ok... However on 64-bit Vista (SMP?) is doesn't work reliably.
1231 * Booting Linux/BSD guest will cause system lockups on most of the computers.
1232 *
1233 * PORTME - Check if your host keeps any of these gates free from hw ints.
1234 *
1235 * Note! SELMR3SyncTSS also has code related to this interrupt handler replacing.
1236 */
1237 /** @todo handle those dependencies better! */
1238 /** @todo Solve this in a proper manner. see defect #1186 */
1239#if defined(RT_OS_WINDOWS) && defined(RT_ARCH_X86)
1240 if (iTrap == 0x2E || iTrap == 0x80)
1241#elif defined(RT_OS_LINUX)
1242 if (iTrap == 0x80)
1243#else
1244 if (0)
1245#endif
1246 {
1247 if ( GuestIdte.Gen.u1Present
1248 && ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1249 || GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1250 && GuestIdte.Gen.u2DPL == 3)
1251 {
1252 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1253
1254 GuestIdte.Gen.u5Type2 = VBOX_IDTE_TYPE2_TRAP_32;
1255 GuestIdte.Gen.u16OffsetHigh = pHandler >> 16;
1256 GuestIdte.Gen.u16OffsetLow = pHandler & 0xFFFF;
1257 GuestIdte.Gen.u16SegSel |= 1; //ring 1
1258 *pIdte = GuestIdte;
1259
1260 /* Mark it for relocation purposes. */
1261 ASMBitSet(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1262
1263 /* Also store it in our guest trap array. */
1264 pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1265
1266 Log(("Setting trap handler %x to %08X (direct)\n", iTrap, pHandler));
1267 return VINF_SUCCESS;
1268 }
1269 /* ok, let's try to install a trampoline handler then. */
1270 }
1271 }
1272
1273 if ( GuestIdte.Gen.u1Present
1274 && ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1275 || GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1276 && (GuestIdte.Gen.u2DPL == 3 || GuestIdte.Gen.u2DPL == 0))
1277 {
1278 /*
1279 * Save handler which can be used for a trampoline call inside the GC
1280 */
1281 Log(("Setting trap handler %x to %08X\n", iTrap, pHandler));
1282 pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1283 return VINF_SUCCESS;
1284 }
1285 return VERR_INVALID_PARAMETER;
1286}
1287
1288
1289/**
1290 * Check if address is a gate handler (interrupt/trap/task/anything).
1291 *
1292 * @returns True is gate handler, false if not.
1293 *
1294 * @param pVM VM handle.
1295 * @param GCPtr GC address to check.
1296 */
1297VMMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTRCPTR GCPtr)
1298{
1299 /*
1300 * Read IDTR and calc last entry.
1301 */
1302 uint16_t cbIDT;
1303 RTGCPTR GCPtrIDTE = CPUMGetGuestIDTR(pVM, &cbIDT);
1304 unsigned cEntries = (cbIDT + 1) / sizeof(VBOXIDTE);
1305 if (!cEntries)
1306 return false;
1307 RTGCPTR GCPtrIDTELast = GCPtrIDTE + (cEntries - 1) * sizeof(VBOXIDTE);
1308
1309 /*
1310 * Outer loop: interate pages.
1311 */
1312 while (GCPtrIDTE <= GCPtrIDTELast)
1313 {
1314 /*
1315 * Convert this page to a HC address.
1316 * (This function checks for not-present pages.)
1317 */
1318 PVBOXIDTE pIDTE;
1319 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrIDTE, (void **)&pIDTE);
1320 if (VBOX_SUCCESS(rc))
1321 {
1322 /*
1323 * Inner Loop: Iterate the data on this page looking for an entry equal to GCPtr.
1324 * N.B. Member of the Flat Earth Society...
1325 */
1326 while (GCPtrIDTE <= GCPtrIDTELast)
1327 {
1328 if (pIDTE->Gen.u1Present)
1329 {
1330 RTRCPTR GCPtrHandler = VBOXIDTE_OFFSET(*pIDTE);
1331 if (GCPtr == GCPtrHandler)
1332 return true;
1333 }
1334
1335 /* next entry */
1336 if ((GCPtrIDTE & PAGE_OFFSET_MASK) + sizeof(VBOXIDTE) >= PAGE_SIZE)
1337 {
1338 AssertMsg(!(GCPtrIDTE & (sizeof(VBOXIDTE) - 1)),
1339 ("IDT is crossing pages and it's not aligned! GCPtrIDTE=%#x cbIDT=%#x\n", GCPtrIDTE, cbIDT));
1340 GCPtrIDTE += sizeof(VBOXIDTE);
1341 break;
1342 }
1343 GCPtrIDTE += sizeof(VBOXIDTE);
1344 pIDTE++;
1345 }
1346 }
1347 else
1348 {
1349 /* Skip to the next page (if any). Take care not to wrap around the address space. */
1350 if ((GCPtrIDTELast >> PAGE_SHIFT) == (GCPtrIDTE >> PAGE_SHIFT))
1351 return false;
1352 GCPtrIDTE = RT_ALIGN_T(GCPtrIDTE, PAGE_SIZE, RTGCPTR) + PAGE_SIZE + (GCPtrIDTE & (sizeof(VBOXIDTE) - 1));
1353 }
1354 }
1355 return false;
1356}
1357
1358
1359/**
1360 * Inject event (such as external irq or trap)
1361 *
1362 * @returns VBox status code.
1363 * @param pVM The VM to operate on.
1364 * @param enmEvent Trpm event type
1365 */
1366VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent)
1367{
1368 PCPUMCTX pCtx;
1369 int rc;
1370
1371 pCtx = CPUMQueryGuestCtxPtr(pVM);
1372 Assert(!PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
1373 Assert(!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
1374
1375 /* Currently only useful for external hardware interrupts. */
1376 Assert(enmEvent == TRPM_HARDWARE_INT);
1377
1378 if (REMR3QueryPendingInterrupt(pVM) == REM_NO_PENDING_IRQ)
1379 {
1380#ifdef TRPM_FORWARD_TRAPS_IN_GC
1381
1382# ifdef LOG_ENABLED
1383 DBGFR3InfoLog(pVM, "cpumguest", "TRPMInject");
1384 DBGFR3DisasInstrCurrentLog(pVM, "TRPMInject");
1385# endif
1386
1387 uint8_t u8Interrupt;
1388 rc = PDMGetInterrupt(pVM, &u8Interrupt);
1389 Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1390 if (VBOX_SUCCESS(rc))
1391 {
1392 if (HWACCMR3IsActive(pVM))
1393 {
1394 rc = TRPMAssertTrap(pVM, u8Interrupt, enmEvent);
1395 AssertRC(rc);
1396 STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1397 return VINF_EM_RESCHEDULE_HWACC;
1398 }
1399 /* If the guest gate is not patched, then we will check (again) if we can patch it. */
1400 if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] == TRPM_INVALID_HANDLER)
1401 {
1402 CSAMR3CheckGates(pVM, u8Interrupt, 1);
1403 Log(("TRPMR3InjectEvent: recheck gate %x -> valid=%d\n", u8Interrupt, TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) != TRPM_INVALID_HANDLER));
1404 }
1405
1406 if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] != TRPM_INVALID_HANDLER)
1407 {
1408 /* Must check pending forced actions as our IDT or GDT might be out of sync */
1409 EMR3CheckRawForcedActions(pVM);
1410
1411 /* There's a handler -> let's execute it in raw mode */
1412 rc = TRPMForwardTrap(pVM, CPUMCTX2CORE(pCtx), u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, enmEvent, -1);
1413 if (rc == VINF_SUCCESS /* Don't use VBOX_SUCCESS */)
1414 {
1415 Assert(!VM_FF_ISPENDING(pVM, VM_FF_SELM_SYNC_GDT | VM_FF_SELM_SYNC_LDT | VM_FF_TRPM_SYNC_IDT | VM_FF_SELM_SYNC_TSS));
1416
1417 STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1418 return VINF_EM_RESCHEDULE_RAW;
1419 }
1420 }
1421 else
1422 STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailNoHandler);
1423 REMR3NotifyPendingInterrupt(pVM, u8Interrupt);
1424 }
1425 else
1426 AssertRC(rc);
1427#else
1428 if (HWACCMR3IsActive(pVM))
1429 {
1430 uint8_t u8Interrupt;
1431 rc = PDMGetInterrupt(pVM, &u8Interrupt);
1432 Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1433 if (VBOX_SUCCESS(rc))
1434 {
1435 rc = TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
1436 AssertRC(rc);
1437 STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1438 return VINF_EM_RESCHEDULE_HWACC;
1439 }
1440 }
1441 else
1442 AssertRC(rc);
1443#endif
1444 }
1445 /** @todo check if it's safe to translate the patch address to the original guest address.
1446 * this implies a safe state in translated instructions and should take sti successors into account (instruction fusing)
1447 */
1448 /* Note: if it's a PATM address, then we'll go back to raw mode regardless of the return code below. */
1449
1450 /* Fall back to the recompiler */
1451 return VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
1452}
1453
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