VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.h@ 28855

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1/* $Id: DevLsiLogicSCSI.h 28800 2010-04-27 08:22:32Z vboxsync $ */
2/** @file
3 * VBox storage devices: LsiLogic LSI53c1030 SCSI controller - Defines and structures.
4 */
5
6/*
7 * Copyright (C) 2006-2009 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17#ifndef __DEVLSILOGICSCSI_H__
18#define __DEVLSILOGICSCSI_H__
19
20#include <iprt/stdint.h>
21
22/*
23 * I/O port registered in the ISA compatible range to let the BIOS access
24 * the controller.
25 */
26#define LSILOGIC_ISA_IO_PORT 0x340
27
28#define LSILOGICSCSI_REQUEST_QUEUE_DEPTH_DEFAULT 1024
29#define LSILOGICSCSI_REPLY_QUEUE_DEPTH_DEFAULT 128
30
31#define LSILOGICSCSI_MAXIMUM_CHAIN_DEPTH 3
32
33#define LSILOGIC_NR_OF_ALLOWED_BIGGER_LISTS 100
34
35/** Equal for all devices */
36#define LSILOGICSCSI_PCI_VENDOR_ID (0x1000)
37
38/** SPI SCSI controller (LSI53C1030) */
39#define LSILOGICSCSI_PCI_SPI_CTRLNAME "LSI53C1030"
40#define LSILOGICSCSI_PCI_SPI_DEVICE_ID (0x0030)
41#define LSILOGICSCSI_PCI_SPI_REVISION_ID (0x00)
42#define LSILOGICSCSI_PCI_SPI_CLASS_CODE (0x01)
43#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID (0x1000)
44#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID (0x8000)
45#define LSILOGICSCSI_PCI_SPI_PORTS_MAX 1
46#define LSILOGICSCSI_PCI_SPI_BUSES_MAX 1
47#define LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX 16
48#define LSILOGICSCSI_PCI_SPI_DEVICES_MAX (LSILOGICSCSI_PCI_SPI_BUSES_MAX*LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX)
49
50/** SAS SCSI controller (SAS1068 PCI-X Fusion-MPT SAS) */
51#define LSILOGICSCSI_PCI_SAS_CTRLNAME "SAS1068"
52#define LSILOGICSCSI_PCI_SAS_DEVICE_ID (0x0054)
53#define LSILOGICSCSI_PCI_SAS_REVISION_ID (0x00)
54#define LSILOGICSCSI_PCI_SAS_CLASS_CODE (0x00)
55#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID (0x1000)
56#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID (0x8000)
57#define LSILOGICSCSI_PCI_SAS_PORTS_MAX 256
58#define LSILOGICSCSI_PCI_SAS_PORTS_DEFAULT 8
59#define LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX 1
60#define LSILOGICSCSI_PCI_SAS_DEVICES_MAX (LSILOGICSCSI_PCI_SAS_PORTS_MAX * LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX)
61
62/**
63 * A SAS address.
64 */
65#pragma pack(1)
66typedef union SASADDRESS
67{
68 /** 64bit view. */
69 uint64_t u64Address;
70 /** 32bit view. */
71 uint32_t u32Address[2];
72 /** 16bit view. */
73 uint16_t u16Address[4];
74 /** Byte view. */
75 uint8_t u8Address[8];
76} SASADDRESS, *PSASADDRESS;
77#pragma pack()
78AssertCompileSize(SASADDRESS, 8);
79
80/**
81 * Possible device types we support.
82 */
83typedef enum LSILOGICCTRLTYPE
84{
85 /** SPI SCSI controller (PCI dev id 0x0030) */
86 LSILOGICCTRLTYPE_SCSI_SPI = 0,
87 /** SAS SCSI controller (PCI dev id 0x0054) */
88 LSILOGICCTRLTYPE_SCSI_SAS = 1,
89 /** 32bit hack */
90 LSILOGICCTRLTYPE_32BIT_HACK = 0x7fffffff
91} LSILOGICCTRLTYPE, *PLSILOGICCTRLTYPE;
92
93/**
94 * A simple SG element for a 64bit adress.
95 */
96#pragma pack(1)
97typedef struct MptSGEntrySimple64
98{
99 /** Length of the buffer this entry describes. */
100 unsigned u24Length: 24;
101 /** Flag whether this element is the end of the list. */
102 unsigned fEndOfList: 1;
103 /** Flag whether the address is 32bit or 64bits wide. */
104 unsigned f64BitAddress: 1;
105 /** Flag whether this buffer contains data to be transfered or is the destination. */
106 unsigned fBufferContainsData: 1;
107 /** Flag whether this is a local address or a system address. */
108 unsigned fLocalAddress: 1;
109 /** Element type. */
110 unsigned u2ElementType: 2;
111 /** Flag whether this is the last element of the buffer. */
112 unsigned fEndOfBuffer: 1;
113 /** Flag whether this is the last element of the current segment. */
114 unsigned fLastElement: 1;
115 /** Lower 32bits of the address of the data buffer. */
116 unsigned u32DataBufferAddressLow: 32;
117 /** Upper 32bits of the address of the data buffer. */
118 unsigned u32DataBufferAddressHigh: 32;
119} MptSGEntrySimple64, *PMptSGEntrySimple64;
120#pragma pack()
121AssertCompileSize(MptSGEntrySimple64, 12);
122
123/**
124 * A simple SG element for a 32bit adress.
125 */
126#pragma pack(1)
127typedef struct MptSGEntrySimple32
128{
129 /** Length of the buffer this entry describes. */
130 unsigned u24Length: 24;
131 /** Flag whether this element is the end of the list. */
132 unsigned fEndOfList: 1;
133 /** Flag whether the address is 32bit or 64bits wide. */
134 unsigned f64BitAddress: 1;
135 /** Flag whether this buffer contains data to be transfered or is the destination. */
136 unsigned fBufferContainsData: 1;
137 /** Flag whether this is a local address or a system address. */
138 unsigned fLocalAddress: 1;
139 /** Element type. */
140 unsigned u2ElementType: 2;
141 /** Flag whether this is the last element of the buffer. */
142 unsigned fEndOfBuffer: 1;
143 /** Flag whether this is the last element of the current segment. */
144 unsigned fLastElement: 1;
145 /** Lower 32bits of the address of the data buffer. */
146 unsigned u32DataBufferAddressLow: 32;
147} MptSGEntrySimple32, *PMptSGEntrySimple32;
148#pragma pack()
149AssertCompileSize(MptSGEntrySimple32, 8);
150
151/**
152 * A chain SG element.
153 */
154#pragma pack(1)
155typedef struct MptSGEntryChain
156{
157 /** Size of the segment. */
158 unsigned u16Length: 16;
159 /** Offset in 32bit words of the next chain element in the segment
160 * identified by this element. */
161 unsigned u8NextChainOffset: 8;
162 /** Reserved. */
163 unsigned fReserved0: 1;
164 /** Flag whether the address is 32bit or 64bits wide. */
165 unsigned f64BitAddress: 1;
166 /** Reserved. */
167 unsigned fReserved1: 1;
168 /** Flag whether this is a local address or a system address. */
169 unsigned fLocalAddress: 1;
170 /** Element type. */
171 unsigned u2ElementType: 2;
172 /** Flag whether this is the last element of the buffer. */
173 unsigned u2Reserved2: 2;
174 /** Lower 32bits of the address of the data buffer. */
175 unsigned u32SegmentAddressLow: 32;
176 /** Upper 32bits of the address of the data buffer. */
177 unsigned u32SegmentAddressHigh: 32;
178} MptSGEntryChain, *PMptSGEntryChain;
179#pragma pack()
180AssertCompileSize(MptSGEntryChain, 12);
181
182typedef union MptSGEntryUnion
183{
184 MptSGEntrySimple64 Simple64;
185 MptSGEntrySimple32 Simple32;
186 MptSGEntryChain Chain;
187} MptSGEntryUnion, *PMptSGEntryUnion;
188
189/**
190 * MPT Fusion message header - Common for all message frames.
191 * This is filled in by the guest.
192 */
193#pragma pack(1)
194typedef struct MptMessageHdr
195{
196 /** Function dependent data. */
197 uint16_t u16FunctionDependent;
198 /** Chain offset. */
199 uint8_t u8ChainOffset;
200 /** The function code. */
201 uint8_t u8Function;
202 /** Function dependent data. */
203 uint8_t au8FunctionDependent[3];
204 /** Message flags. */
205 uint8_t u8MessageFlags;
206 /** Message context - Unique ID from the guest unmodified by the device. */
207 uint32_t u32MessageContext;
208} MptMessageHdr, *PMptMessageHdr;
209#pragma pack()
210AssertCompileSize(MptMessageHdr, 12);
211
212/** Defined function codes found in the message header. */
213#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST (0x00)
214#define MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT (0x01)
215#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT (0x02)
216#define MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS (0x03)
217#define MPT_MESSAGE_HDR_FUNCTION_CONFIG (0x04)
218#define MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS (0x05)
219#define MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE (0x06)
220#define MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION (0x07)
221#define MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK (0x08)
222#define MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD (0x09)
223#define MPT_MESSAGE_HDR_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
224#define MPT_MESSAGE_HDR_FUNCTION_TARGET_ASSIST (0x0B)
225#define MPT_MESSAGE_HDR_FUNCTION_TARGET_STATUS_SEND (0x0C)
226#define MPT_MESSAGE_HDR_FUNCTION_TARGET_MODE_ABORT (0x0D)
227
228#ifdef DEBUG
229/**
230 * Function names
231 */
232static const char * const g_apszMPTFunctionNames[] =
233{
234 "SCSI I/O Request",
235 "SCSI Task Management",
236 "IOC Init",
237 "IOC Facts",
238 "Config",
239 "Port Facts",
240 "Port Enable",
241 "Event Notification",
242 "Event Ack",
243 "Firmware Download"
244};
245#endif
246
247/**
248 * Default reply message.
249 * Send from the device to the guest upon completion of a request.
250 */
251 #pragma pack(1)
252typedef struct MptDefaultReplyMessage
253{
254 /** Function dependent data. */
255 uint16_t u16FunctionDependent;
256 /** Length of the message in 32bit DWords. */
257 uint8_t u8MessageLength;
258 /** Function which completed. */
259 uint8_t u8Function;
260 /** Function dependent. */
261 uint8_t au8FunctionDependent[3];
262 /** Message flags. */
263 uint8_t u8MessageFlags;
264 /** Message context given in the request. */
265 uint32_t u32MessageContext;
266 /** Function dependent status code. */
267 uint16_t u16FunctionDependentStatus;
268 /** Status of the IOC. */
269 uint16_t u16IOCStatus;
270 /** Additional log info. */
271 uint32_t u32IOCLogInfo;
272} MptDefaultReplyMessage, *PMptDefaultReplyMessage;
273#pragma pack()
274AssertCompileSize(MptDefaultReplyMessage, 20);
275
276/**
277 * IO controller init request.
278 */
279#pragma pack(1)
280typedef struct MptIOCInitRequest
281{
282 /** Which system send this init request. */
283 uint8_t u8WhoInit;
284 /** Reserved */
285 uint8_t u8Reserved;
286 /** Chain offset in the SG list. */
287 uint8_t u8ChainOffset;
288 /** Function to execute. */
289 uint8_t u8Function;
290 /** Flags */
291 uint8_t u8Flags;
292 /** Maximum number of devices the driver can handle. */
293 uint8_t u8MaxDevices;
294 /** Maximum number of buses the driver can handle. */
295 uint8_t u8MaxBuses;
296 /** Message flags. */
297 uint8_t u8MessageFlags;
298 /** Message context ID. */
299 uint32_t u32MessageContext;
300 /** Reply frame size. */
301 uint16_t u16ReplyFrameSize;
302 /** Reserved */
303 uint16_t u16Reserved;
304 /** Upper 32bit part of the 64bit address the message frames are in.
305 * That means all frames must be in the same 4GB segment. */
306 uint32_t u32HostMfaHighAddr;
307 /** Upper 32bit of the sense buffer. */
308 uint32_t u32SenseBufferHighAddr;
309} MptIOCInitRequest, *PMptIOCInitRequest;
310#pragma pack()
311AssertCompileSize(MptIOCInitRequest, 24);
312
313/**
314 * IO controller init reply.
315 */
316#pragma pack(1)
317typedef struct MptIOCInitReply
318{
319 /** Which subsystem send this init request. */
320 uint8_t u8WhoInit;
321 /** Reserved */
322 uint8_t u8Reserved;
323 /** Message length */
324 uint8_t u8MessageLength;
325 /** Function. */
326 uint8_t u8Function;
327 /** Flags */
328 uint8_t u8Flags;
329 /** Maximum number of devices the driver can handle. */
330 uint8_t u8MaxDevices;
331 /** Maximum number of busses the driver can handle. */
332 uint8_t u8MaxBuses;
333 /** Message flags. */
334 uint8_t u8MessageFlags;
335 /** Message context ID */
336 uint32_t u32MessageContext;
337 /** Reserved */
338 uint16_t u16Reserved;
339 /** IO controller status. */
340 uint16_t u16IOCStatus;
341 /** IO controller log information. */
342 uint32_t u32IOCLogInfo;
343} MptIOCInitReply, *PMptIOCInitReply;
344#pragma pack()
345AssertCompileSize(MptIOCInitReply, 20);
346
347/**
348 * IO controller facts request.
349 */
350#pragma pack(1)
351typedef struct MptIOCFactsRequest
352{
353 /** Reserved. */
354 uint16_t u16Reserved;
355 /** Chain offset in SG list. */
356 uint8_t u8ChainOffset;
357 /** Function number. */
358 uint8_t u8Function;
359 /** Reserved */
360 uint8_t u8Reserved[3];
361 /** Message flags. */
362 uint8_t u8MessageFlags;
363 /** Message context ID. */
364 uint32_t u32MessageContext;
365} MptIOCFactsRequest, *PMptIOCFactsRequest;
366#pragma pack()
367AssertCompileSize(MptIOCFactsRequest, 12);
368
369/**
370 * IO controller facts reply.
371 */
372#pragma pack(1)
373typedef struct MptIOCFactsReply
374{
375 /** Message version. */
376 uint16_t u16MessageVersion;
377 /** Message length. */
378 uint8_t u8MessageLength;
379 /** Function number. */
380 uint8_t u8Function;
381 /** Reserved */
382 uint16_t u16Reserved1;
383 /** IO controller number */
384 uint8_t u8IOCNumber;
385 /** Message flags. */
386 uint8_t u8MessageFlags;
387 /** Message context ID. */
388 uint32_t u32MessageContext;
389 /** IO controller exceptions */
390 uint16_t u16IOCExceptions;
391 /** IO controller status. */
392 uint16_t u16IOCStatus;
393 /** IO controller log information. */
394 uint32_t u32IOCLogInfo;
395 /** Maximum chain depth. */
396 uint8_t u8MaxChainDepth;
397 /** The current value of the WhoInit field. */
398 uint8_t u8WhoInit;
399 /** Block size. */
400 uint8_t u8BlockSize;
401 /** Flags. */
402 uint8_t u8Flags;
403 /** Depth of the reply queue. */
404 uint16_t u16ReplyQueueDepth;
405 /** Size of a request frame. */
406 uint16_t u16RequestFrameSize;
407 /** Reserved */
408 uint16_t u16Reserved2;
409 /** Product ID. */
410 uint16_t u16ProductID;
411 /** Current value of the high 32bit MFA address. */
412 uint32_t u32CurrentHostMFAHighAddr;
413 /** Global credits - Number of entries allocated to queues */
414 uint16_t u16GlobalCredits;
415 /** Number of ports on the IO controller */
416 uint8_t u8NumberOfPorts;
417 /** Event state. */
418 uint8_t u8EventState;
419 /** Current value of the high 32bit sense buffer address. */
420 uint32_t u32CurrentSenseBufferHighAddr;
421 /** Current reply frame size. */
422 uint16_t u16CurReplyFrameSize;
423 /** Maximum number of devices. */
424 uint8_t u8MaxDevices;
425 /** Maximum number of buses. */
426 uint8_t u8MaxBuses;
427 /** Size of the firmware image. */
428 uint32_t u32FwImageSize;
429 /** Reserved. */
430 uint32_t u32Reserved;
431 /** Firmware version */
432 uint32_t u32FWVersion;
433} MptIOCFactsReply, *PMptIOCFactsReply;
434#pragma pack()
435AssertCompileSize(MptIOCFactsReply, 60);
436
437/**
438 * Port facts request
439 */
440#pragma pack(1)
441typedef struct MptPortFactsRequest
442{
443 /** Reserved */
444 uint16_t u16Reserved1;
445 /** Message length. */
446 uint8_t u8MessageLength;
447 /** Function number. */
448 uint8_t u8Function;
449 /** Reserved */
450 uint16_t u16Reserved2;
451 /** Port number to get facts for. */
452 uint8_t u8PortNumber;
453 /** Message flags. */
454 uint8_t u8MessageFlags;
455 /** Message context ID. */
456 uint32_t u32MessageContext;
457} MptPortFactsRequest, *PMptPortFactsRequest;
458#pragma pack()
459AssertCompileSize(MptPortFactsRequest, 12);
460
461/**
462 * Port facts reply.
463 */
464#pragma pack(1)
465typedef struct MptPortFactsReply
466{
467 /** Reserved. */
468 uint16_t u16Reserved1;
469 /** Message length. */
470 uint8_t u8MessageLength;
471 /** Function number. */
472 uint8_t u8Function;
473 /** Reserved */
474 uint16_t u16Reserved2;
475 /** Port number the facts are for. */
476 uint8_t u8PortNumber;
477 /** Message flags. */
478 uint8_t u8MessageFlags;
479 /** Message context ID. */
480 uint32_t u32MessageContext;
481 /** Reserved. */
482 uint16_t u16Reserved3;
483 /** IO controller status. */
484 uint16_t u16IOCStatus;
485 /** IO controller log information. */
486 uint32_t u32IOCLogInfo;
487 /** Reserved */
488 uint8_t u8Reserved;
489 /** Port type */
490 uint8_t u8PortType;
491 /** Maximum number of devices on this port. */
492 uint16_t u16MaxDevices;
493 /** SCSI ID of this port on the attached bus. */
494 uint16_t u16PortSCSIID;
495 /** Protocol flags. */
496 uint16_t u16ProtocolFlags;
497 /** Maxmimum number of target command buffers which can be posted to this port at a time. */
498 uint16_t u16MaxPostedCmdBuffers;
499 /** Maximum number of target IDs that remain persistent between power/reset cycles. */
500 uint16_t u16MaxPersistentIDs;
501 /** Maximum number of LAN buckets. */
502 uint16_t u16MaxLANBuckets;
503 /** Reserved. */
504 uint16_t u16Reserved4;
505 /** Reserved. */
506 uint32_t u32Reserved;
507} MptPortFactsReply, *PMptPortFactsReply;
508#pragma pack()
509AssertCompileSize(MptPortFactsReply, 40);
510
511/**
512 * Port Enable request.
513 */
514#pragma pack(1)
515typedef struct MptPortEnableRequest
516{
517 /** Reserved. */
518 uint16_t u16Reserved1;
519 /** Message length. */
520 uint8_t u8MessageLength;
521 /** Function number. */
522 uint8_t u8Function;
523 /** Reserved. */
524 uint16_t u16Reserved2;
525 /** Port number to enable. */
526 uint8_t u8PortNumber;
527 /** Message flags. */
528 uint8_t u8MessageFlags;
529 /** Message context ID. */
530 uint32_t u32MessageContext;
531} MptPortEnableRequest, *PMptPortEnableRequest;
532#pragma pack()
533AssertCompileSize(MptPortEnableRequest, 12);
534
535/**
536 * Port enable reply.
537 */
538#pragma pack(1)
539typedef struct MptPortEnableReply
540{
541 /** Reserved. */
542 uint16_t u16Reserved1;
543 /** Message length. */
544 uint8_t u8MessageLength;
545 /** Function number. */
546 uint8_t u8Function;
547 /** Reserved */
548 uint16_t u16Reserved2;
549 /** Port number which was enabled. */
550 uint8_t u8PortNumber;
551 /** Message flags. */
552 uint8_t u8MessageFlags;
553 /** Message context ID. */
554 uint32_t u32MessageContext;
555 /** Reserved. */
556 uint16_t u16Reserved3;
557 /** IO controller status */
558 uint16_t u16IOCStatus;
559 /** IO controller log information. */
560 uint32_t u32IOCLogInfo;
561} MptPortEnableReply, *PMptPortEnableReply;
562#pragma pack()
563AssertCompileSize(MptPortEnableReply, 20);
564
565/**
566 * Event notification request.
567 */
568#pragma pack(1)
569typedef struct MptEventNotificationRequest
570{
571 /** Switch - Turns event notification on and off. */
572 uint8_t u8Switch;
573 /** Reserved. */
574 uint8_t u8Reserved1;
575 /** Chain offset. */
576 uint8_t u8ChainOffset;
577 /** Function number. */
578 uint8_t u8Function;
579 /** Reserved. */
580 uint8_t u8reserved2[3];
581 /** Message flags. */
582 uint8_t u8MessageFlags;
583 /** Message context ID. */
584 uint32_t u32MessageContext;
585} MptEventNotificationRequest, *PMptEventNotificationRequest;
586#pragma pack()
587AssertCompileSize(MptEventNotificationRequest, 12);
588
589/**
590 * Event notification reply.
591 */
592#pragma pack(1)
593typedef struct MptEventNotificationReply
594{
595 /** Event data length. */
596 uint16_t u16EventDataLength;
597 /** Message length. */
598 uint8_t u8MessageLength;
599 /** Function number. */
600 uint8_t u8Function;
601 /** Reserved. */
602 uint16_t u16Reserved1;
603 /** Ack required. */
604 uint8_t u8AckRequired;
605 /** Message flags. */
606 uint8_t u8MessageFlags;
607 /** Message context ID. */
608 uint32_t u32MessageContext;
609 /** Reserved. */
610 uint16_t u16Reserved2;
611 /** IO controller status. */
612 uint16_t u16IOCStatus;
613 /** IO controller log information. */
614 uint32_t u32IOCLogInfo;
615 /** Notification event. */
616 uint32_t u32Event;
617 /** Event context. */
618 uint32_t u32EventContext;
619 /** Event data. */
620 uint32_t u32EventData;
621} MptEventNotificationReply, *PMptEventNotificationReply;
622#pragma pack()
623AssertCompileSize(MptEventNotificationReply, 32);
624
625#define MPT_EVENT_EVENT_CHANGE (0x0000000a)
626
627/**
628 * SCSI IO Request
629 */
630#pragma pack(1)
631typedef struct MptSCSIIORequest
632{
633 /** Target ID */
634 uint8_t u8TargetID;
635 /** Bus number */
636 uint8_t u8Bus;
637 /** Chain offset */
638 uint8_t u8ChainOffset;
639 /** Function number. */
640 uint8_t u8Function;
641 /** CDB length. */
642 uint8_t u8CDBLength;
643 /** Sense buffer length. */
644 uint8_t u8SenseBufferLength;
645 /** Rserved */
646 uint8_t u8Reserved;
647 /** Message flags. */
648 uint8_t u8MessageFlags;
649 /** Message context ID. */
650 uint32_t u32MessageContext;
651 /** LUN */
652 uint8_t au8LUN[8];
653 /** Control values. */
654 uint32_t u32Control;
655 /** The CDB. */
656 uint8_t au8CDB[16];
657 /** Data length. */
658 uint32_t u32DataLength;
659 /** Sense buffer low 32bit address. */
660 uint32_t u32SenseBufferLowAddress;
661} MptSCSIIORequest, *PMptSCSIIORequest;
662#pragma pack()
663AssertCompileSize(MptSCSIIORequest, 48);
664
665#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_GET(x) (((x) & 0x3000000) >> 24)
666#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x0)
667#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x1)
668#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x2)
669
670/**
671 * SCSI IO error reply.
672 */
673#pragma pack(1)
674typedef struct MptSCSIIOErrorReply
675{
676 /** Target ID */
677 uint8_t u8TargetID;
678 /** Bus number */
679 uint8_t u8Bus;
680 /** Message length. */
681 uint8_t u8MessageLength;
682 /** Function number. */
683 uint8_t u8Function;
684 /** CDB length */
685 uint8_t u8CDBLength;
686 /** Sense buffer length */
687 uint8_t u8SenseBufferLength;
688 /** Reserved */
689 uint8_t u8Reserved;
690 /** Message flags */
691 uint8_t u8MessageFlags;
692 /** Message context ID */
693 uint32_t u32MessageContext;
694 /** SCSI status. */
695 uint8_t u8SCSIStatus;
696 /** SCSI state */
697 uint8_t u8SCSIState;
698 /** IO controller status */
699 uint16_t u16IOCStatus;
700 /** IO controller log information */
701 uint32_t u32IOCLogInfo;
702 /** Transfer count */
703 uint32_t u32TransferCount;
704 /** Sense count */
705 uint32_t u32SenseCount;
706 /** Response information */
707 uint32_t u32ResponseInfo;
708} MptSCSIIOErrorReply, *PMptSCSIIOErrorReply;
709#pragma pack()
710AssertCompileSize(MptSCSIIOErrorReply, 32);
711
712#define MPT_SCSI_IO_ERROR_SCSI_STATE_AUTOSENSE_VALID (0x01)
713#define MPT_SCSI_IO_ERROR_SCSI_STATE_TERMINATED (0x08)
714
715/**
716 * IOC status codes sepcific to the SCSI I/O error reply.
717 */
718#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_BUS (0x0041)
719#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_TARGETID (0x0042)
720#define MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE (0x0043)
721
722/**
723 * SCSI task management request.
724 */
725#pragma pack(1)
726typedef struct MptSCSITaskManagementRequest
727{
728 /** Target ID */
729 uint8_t u8TargetID;
730 /** Bus number */
731 uint8_t u8Bus;
732 /** Chain offset */
733 uint8_t u8ChainOffset;
734 /** Function number */
735 uint8_t u8Function;
736 /** Reserved */
737 uint8_t u8Reserved1;
738 /** Task type */
739 uint8_t u8TaskType;
740 /** Reserved */
741 uint8_t u8Reserved2;
742 /** Message flags */
743 uint8_t u8MessageFlags;
744 /** Message context ID */
745 uint32_t u32MessageContext;
746 /** LUN */
747 uint8_t au8LUN[8];
748 /** Reserved */
749 uint8_t auReserved[28];
750 /** Task message context ID. */
751 uint32_t u32TaskMessageContext;
752} MptSCSITaskManagementRequest, *PMptSCSITaskManagementRequest;
753#pragma pack()
754AssertCompileSize(MptSCSITaskManagementRequest, 52);
755
756/**
757 * SCSI task management reply.
758 */
759#pragma pack(1)
760typedef struct MptSCSITaskManagementReply
761{
762 /** Target ID */
763 uint8_t u8TargetID;
764 /** Bus number */
765 uint8_t u8Bus;
766 /** Message length */
767 uint8_t u8MessageLength;
768 /** Function number */
769 uint8_t u8Function;
770 /** Reserved */
771 uint8_t u8Reserved1;
772 /** Task type */
773 uint8_t u8TaskType;
774 /** Reserved */
775 uint8_t u8Reserved2;
776 /** Message flags */
777 uint8_t u8MessageFlags;
778 /** Message context ID */
779 uint32_t u32MessageContext;
780 /** Reserved */
781 uint16_t u16Reserved;
782 /** IO controller status */
783 uint16_t u16IOCStatus;
784 /** IO controller log information */
785 uint32_t u32IOCLogInfo;
786 /** Termination count */
787 uint32_t u32TerminationCount;
788} MptSCSITaskManagementReply, *PMptSCSITaskManagementReply;
789#pragma pack()
790AssertCompileSize(MptSCSITaskManagementReply, 24);
791
792/**
793 * Page address for SAS expander page types.
794 */
795#pragma pack(1)
796typedef union MptConfigurationPageAddressSASExpander
797{
798 struct
799 {
800 uint16_t u16Handle;
801 uint16_t u16Reserved;
802 } Form0And2;
803 struct
804 {
805 uint16_t u16Handle;
806 uint8_t u8PhyNum;
807 uint8_t u8Reserved;
808 } Form1;
809} MptConfigurationPageAddressSASExpander, *PMptConfigurationPageAddressSASExpander;
810#pragma pack()
811
812/**
813 * Page address for SAS device page types.
814 */
815#pragma pack(1)
816typedef union MptConfigurationPageAddressSASDevice
817{
818 struct
819 {
820 uint16_t u16Handle;
821 uint16_t u16Reserved;
822 } Form0And2;
823 struct
824 {
825 uint8_t u8TargetID;
826 uint8_t u8Bus;
827 uint8_t u8Reserved;
828 } Form1;
829} MptConfigurationPageAddressSASDevice, *PMptConfigurationPageAddressSASDevice;
830#pragma pack()
831
832/**
833 * Page address for SAS PHY page types.
834 */
835#pragma pack(1)
836typedef union MptConfigurationPageAddressSASPHY
837{
838 struct
839 {
840 uint8_t u8PhyNumber;
841 uint8_t u8Reserved[3];
842 } Form0;
843 struct
844 {
845 uint16_t u16Index;
846 uint16_t u16Reserved;
847 } Form1;
848} MptConfigurationPageAddressSASPHY, *PMptConfigurationPageAddressSASPHY;
849#pragma pack()
850
851/**
852 * Page address for SAS Enclosure page types.
853 */
854#pragma pack(1)
855typedef struct MptConfigurationPageAddressSASEnclosure
856{
857 uint16_t u16Handle;
858 uint16_t u16Reserved;
859} MptConfigurationPageAddressSASEnclosure, *PMptConfigurationPageAddressSASEnclosure;
860#pragma pack()
861
862/**
863 * Union of all possible address types.
864 */
865#pragma pack(1)
866typedef union MptConfigurationPageAddress
867{
868 /** 32bit view. */
869 uint32_t u32PageAddress;
870 struct
871 {
872 /** Port number to get the configuration page for. */
873 uint8_t u8PortNumber;
874 /** Reserved. */
875 uint8_t u8Reserved[3];
876 } MPIPortNumber;
877 struct
878 {
879 /** Target ID to get the configuration page for. */
880 uint8_t u8TargetID;
881 /** Bus number to get the configuration page for. */
882 uint8_t u8Bus;
883 /** Reserved. */
884 uint8_t u8Reserved[2];
885 } BusAndTargetId;
886 MptConfigurationPageAddressSASExpander SASExpander;
887 MptConfigurationPageAddressSASDevice SASDevice;
888 MptConfigurationPageAddressSASPHY SASPHY;
889 MptConfigurationPageAddressSASEnclosure SASEnclosure;
890} MptConfigurationPageAddress, *PMptConfigurationPageAddress;
891#pragma pack()
892AssertCompileSize(MptConfigurationPageAddress, 4);
893
894#define MPT_CONFIGURATION_PAGE_ADDRESS_GET_SAS_FORM(x) (((x).u32PageAddress >> 28) & 0x0f)
895
896/**
897 * Configuration request
898 */
899#pragma pack(1)
900typedef struct MptConfigurationRequest
901{
902 /** Action code. */
903 uint8_t u8Action;
904 /** Reserved. */
905 uint8_t u8Reserved1;
906 /** Chain offset. */
907 uint8_t u8ChainOffset;
908 /** Function number. */
909 uint8_t u8Function;
910 /** Extended page length. */
911 uint16_t u16ExtPageLength;
912 /** Extended page type */
913 uint8_t u8ExtPageType;
914 /** Message flags. */
915 uint8_t u8MessageFlags;
916 /** Message context ID. */
917 uint32_t u32MessageContext;
918 /** Reserved. */
919 uint8_t u8Reserved2[8];
920 /** Version number of the page. */
921 uint8_t u8PageVersion;
922 /** Length of the page in 32bit Dwords. */
923 uint8_t u8PageLength;
924 /** Page number to access. */
925 uint8_t u8PageNumber;
926 /** Type of the page beeing accessed. */
927 uint8_t u8PageType;
928 /** Page type dependent address. */
929 MptConfigurationPageAddress PageAddress;
930 /** Simple SG element describing the buffer. */
931 MptSGEntrySimple64 SimpleSGElement;
932} MptConfigurationRequest, *PMptConfigurationRequest;
933#pragma pack()
934AssertCompileSize(MptConfigurationRequest, 40);
935
936/** Possible action codes. */
937#define MPT_CONFIGURATION_REQUEST_ACTION_HEADER (0x00)
938#define MPT_CONFIGURATION_REQUEST_ACTION_READ_CURRENT (0x01)
939#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_CURRENT (0x02)
940#define MPT_CONFIGURATION_REQUEST_ACTION_DEFAULT (0x03)
941#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_NVRAM (0x04)
942#define MPT_CONFIGURATION_REQUEST_ACTION_READ_DEFAULT (0x05)
943#define MPT_CONFIGURATION_REQUEST_ACTION_READ_NVRAM (0x06)
944
945/** Page type codes. */
946#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IO_UNIT (0x00)
947#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IOC (0x01)
948#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_BIOS (0x02)
949#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_SCSI_PORT (0x03)
950#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_EXTENDED (0x0F)
951
952/**
953 * Configuration reply.
954 */
955#pragma pack(1)
956typedef struct MptConfigurationReply
957{
958 /** Action code. */
959 uint8_t u8Action;
960 /** Reserved. */
961 uint8_t u8Reserved;
962 /** Message length. */
963 uint8_t u8MessageLength;
964 /** Function number. */
965 uint8_t u8Function;
966 /** Extended page length. */
967 uint16_t u16ExtPageLength;
968 /** Extended page type */
969 uint8_t u8ExtPageType;
970 /** Message flags. */
971 uint8_t u8MessageFlags;
972 /** Message context ID. */
973 uint32_t u32MessageContext;
974 /** Reserved. */
975 uint16_t u16Reserved;
976 /** I/O controller status. */
977 uint16_t u16IOCStatus;
978 /** I/O controller log information. */
979 uint32_t u32IOCLogInfo;
980 /** Version number of the page. */
981 uint8_t u8PageVersion;
982 /** Length of the page in 32bit Dwords. */
983 uint8_t u8PageLength;
984 /** Page number to access. */
985 uint8_t u8PageNumber;
986 /** Type of the page beeing accessed. */
987 uint8_t u8PageType;
988} MptConfigurationReply, *PMptConfigurationReply;
989#pragma pack()
990AssertCompileSize(MptConfigurationReply, 24);
991
992/** Additional I/O controller status codes for the configuration reply. */
993#define MPT_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
994#define MPT_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
995#define MPT_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
996#define MPT_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
997#define MPT_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
998#define MPT_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
999
1000/**
1001 * Union of all possible request messages.
1002 */
1003typedef union MptRequestUnion
1004{
1005 MptMessageHdr Header;
1006 MptIOCInitRequest IOCInit;
1007 MptIOCFactsRequest IOCFacts;
1008 MptPortFactsRequest PortFacts;
1009 MptPortEnableRequest PortEnable;
1010 MptEventNotificationRequest EventNotification;
1011 MptSCSIIORequest SCSIIO;
1012 MptSCSITaskManagementRequest SCSITaskManagement;
1013 MptConfigurationRequest Configuration;
1014} MptRequestUnion, *PMptRequestUnion;
1015
1016/**
1017 * Union of all possible reply messages.
1018 */
1019typedef union MptReplyUnion
1020{
1021 /** 16bit view. */
1022 uint16_t au16Reply[30];
1023 MptDefaultReplyMessage Header;
1024 MptIOCInitReply IOCInit;
1025 MptIOCFactsReply IOCFacts;
1026 MptPortFactsReply PortFacts;
1027 MptPortEnableReply PortEnable;
1028 MptEventNotificationReply EventNotification;
1029 MptSCSIIOErrorReply SCSIIOError;
1030 MptSCSITaskManagementReply SCSITaskManagement;
1031 MptConfigurationReply Configuration;
1032} MptReplyUnion, *PMptReplyUnion;
1033
1034
1035/**
1036 * Configuration Page attributes.
1037 */
1038#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY (0x00)
1039#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE (0x10)
1040#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT (0x20)
1041#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY (0x30)
1042
1043#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_GET(u8PageType) ((u8PageType) & 0xf0)
1044
1045/**
1046 * Configuration Page types.
1047 */
1048#define MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT (0x00)
1049#define MPT_CONFIGURATION_PAGE_TYPE_IOC (0x01)
1050#define MPT_CONFIGURATION_PAGE_TYPE_BIOS (0x02)
1051#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT (0x03)
1052#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE (0x04)
1053#define MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING (0x09)
1054#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED (0x0F)
1055
1056#define MPT_CONFIGURATION_PAGE_TYPE_GET(u8PageType) ((u8PageType) & 0x0f)
1057
1058/**
1059 * Extented page types.
1060 */
1061#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT (0x10)
1062#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASEXPANDER (0x11)
1063#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE (0x12)
1064#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS (0x13)
1065#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_LOG (0x14)
1066#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_ENCLOSURE (0x15)
1067
1068/**
1069 * Configuration Page header - Common to all pages.
1070 */
1071#pragma pack(1)
1072typedef struct MptConfigurationPageHeader
1073{
1074 /** Version of the page. */
1075 uint8_t u8PageVersion;
1076 /** The length of the page in 32bit D-Words. */
1077 uint8_t u8PageLength;
1078 /** Number of the page. */
1079 uint8_t u8PageNumber;
1080 /** Type of the page. */
1081 uint8_t u8PageType;
1082} MptConfigurationPageHeader, *PMptConfigurationPageHeader;
1083#pragma pack()
1084AssertCompileSize(MptConfigurationPageHeader, 4);
1085
1086/**
1087 * Extended configuration page header - Common to all extended pages.
1088 */
1089#pragma pack(1)
1090typedef struct MptExtendedConfigurationPageHeader
1091{
1092 /** Version of the page. */
1093 uint8_t u8PageVersion;
1094 /** Reserved. */
1095 uint8_t u8Reserved1;
1096 /** Number of the page. */
1097 uint8_t u8PageNumber;
1098 /** Type of the page. */
1099 uint8_t u8PageType;
1100 /** Extended page length. */
1101 uint16_t u16ExtPageLength;
1102 /** Extended page type. */
1103 uint8_t u8ExtPageType;
1104 /** Reserved */
1105 uint8_t u8Reserved2;
1106} MptExtendedConfigurationPageHeader, *PMptExtendedConfigurationPageHeader;
1107#pragma pack()
1108AssertCompileSize(MptExtendedConfigurationPageHeader, 8);
1109
1110/**
1111 * Manufacturing page 0. - Readonly.
1112 */
1113#pragma pack(1)
1114typedef struct MptConfigurationPageManufacturing0
1115{
1116 /** Union. */
1117 union
1118 {
1119 /** Byte view. */
1120 uint8_t abPageData[76];
1121 /** Field view. */
1122 struct
1123 {
1124 /** The omnipresent header. */
1125 MptConfigurationPageHeader Header;
1126 /** Name of the chip. */
1127 uint8_t abChipName[16];
1128 /** Chip revision. */
1129 uint8_t abChipRevision[8];
1130 /** Board name. */
1131 uint8_t abBoardName[16];
1132 /** Board assembly. */
1133 uint8_t abBoardAssembly[16];
1134 /** Board tracer number. */
1135 uint8_t abBoardTracerNumber[16];
1136 } fields;
1137 } u;
1138} MptConfigurationPageManufacturing0, *PMptConfigurationPageManufacturing0;
1139#pragma pack()
1140AssertCompileSize(MptConfigurationPageManufacturing0, 76);
1141
1142/**
1143 * Manufacturing page 1. - Readonly Persistent.
1144 */
1145#pragma pack(1)
1146typedef struct MptConfigurationPageManufacturing1
1147{
1148 /** Union */
1149 union
1150 {
1151 /** Byte view */
1152 uint8_t abPageData[260];
1153 /** Field view */
1154 struct
1155 {
1156 /** The omnipresent header. */
1157 MptConfigurationPageHeader Header;
1158 /** VPD info - don't know what belongs here so all zero. */
1159 uint8_t abVPDInfo[256];
1160 } fields;
1161 } u;
1162} MptConfigurationPageManufacturing1, *PMptConfigurationPageManufacturing1;
1163#pragma pack()
1164AssertCompileSize(MptConfigurationPageManufacturing1, 260);
1165
1166/**
1167 * Manufacturing page 2. - Readonly.
1168 */
1169#pragma pack(1)
1170typedef struct MptConfigurationPageManufacturing2
1171{
1172 /** Union. */
1173 union
1174 {
1175 /** Byte view. */
1176 uint8_t abPageData[8];
1177 /** Field view. */
1178 struct
1179 {
1180 /** The omnipresent header. */
1181 MptConfigurationPageHeader Header;
1182 /** PCI Device ID. */
1183 uint16_t u16PCIDeviceID;
1184 /** PCI Revision ID. */
1185 uint8_t u8PCIRevisionID;
1186 /** Reserved. */
1187 uint8_t u8Reserved;
1188 /** Hardware specific settings... */
1189 } fields;
1190 } u;
1191} MptConfigurationPageManufacturing2, *PMptConfigurationPageManufacturing2;
1192#pragma pack()
1193AssertCompileSize(MptConfigurationPageManufacturing2, 8);
1194
1195/**
1196 * Manufacturing page 3. - Readonly.
1197 */
1198#pragma pack(1)
1199typedef struct MptConfigurationPageManufacturing3
1200{
1201 /** Union. */
1202 union
1203 {
1204 /** Byte view. */
1205 uint8_t abPageData[8];
1206 /** Field view. */
1207 struct
1208 {
1209 /** The omnipresent header. */
1210 MptConfigurationPageHeader Header;
1211 /** PCI Device ID. */
1212 uint16_t u16PCIDeviceID;
1213 /** PCI Revision ID. */
1214 uint8_t u8PCIRevisionID;
1215 /** Reserved. */
1216 uint8_t u8Reserved;
1217 /** Chip specific settings... */
1218 } fields;
1219 } u;
1220} MptConfigurationPageManufacturing3, *PMptConfigurationPageManufacturing3;
1221#pragma pack()
1222AssertCompileSize(MptConfigurationPageManufacturing3, 8);
1223
1224/**
1225 * Manufacturing page 4. - Readonly.
1226 */
1227#pragma pack(1)
1228typedef struct MptConfigurationPageManufacturing4
1229{
1230 /** Union. */
1231 union
1232 {
1233 /** Byte view. */
1234 uint8_t abPageData[84];
1235 /** Field view. */
1236 struct
1237 {
1238 /** The omnipresent header. */
1239 MptConfigurationPageHeader Header;
1240 /** Reserved. */
1241 uint32_t u32Reserved;
1242 /** InfoOffset0. */
1243 uint8_t u8InfoOffset0;
1244 /** Info size. */
1245 uint8_t u8InfoSize0;
1246 /** InfoOffset1. */
1247 uint8_t u8InfoOffset1;
1248 /** Info size. */
1249 uint8_t u8InfoSize1;
1250 /** Size of the inquiry data. */
1251 uint8_t u8InquirySize;
1252 /** Reserved. */
1253 uint8_t abReserved[3];
1254 /** Inquiry data. */
1255 uint8_t abInquiryData[56];
1256 /** IS volume settings. */
1257 uint32_t u32ISVolumeSettings;
1258 /** IME volume settings. */
1259 uint32_t u32IMEVolumeSettings;
1260 /** IM volume settings. */
1261 uint32_t u32IMVolumeSettings;
1262 } fields;
1263 } u;
1264} MptConfigurationPageManufacturing4, *PMptConfigurationPageManufacturing4;
1265#pragma pack()
1266AssertCompileSize(MptConfigurationPageManufacturing4, 84);
1267
1268/**
1269 * Manufacturing page 5 - Readonly.
1270 */
1271#pragma pack(1)
1272typedef struct MptConfigurationPageManufacturing5
1273{
1274 /** Union. */
1275 union
1276 {
1277 /** Byte view. */
1278 uint8_t abPageData[88];
1279 /** Field view. */
1280 struct
1281 {
1282 /** The omnipresent header. */
1283 MptConfigurationPageHeader Header;
1284 /** Base WWID. */
1285 uint64_t u64BaseWWID;
1286 /** Flags */
1287 uint8_t u8Flags;
1288 /** Number of ForceWWID fields in this page. */
1289 uint8_t u8NumForceWWID;
1290 /** Reserved */
1291 uint16_t u16Reserved;
1292 /** Reserved */
1293 uint32_t au32Reserved[2];
1294 /** ForceWWID entries Maximum of 8 because the SAS controller doesn't has more */
1295 uint64_t au64ForceWWID[8];
1296 } fields;
1297 } u;
1298} MptConfigurationPageManufacturing5, *PMptConfigurationPageManufacturing5;
1299#pragma pack()
1300AssertCompileSize(MptConfigurationPageManufacturing5, 24+64);
1301
1302/**
1303 * Manufacturing page 6 - Readonly.
1304 */
1305#pragma pack(1)
1306typedef struct MptConfigurationPageManufacturing6
1307{
1308 /** Union. */
1309 union
1310 {
1311 /** Byte view. */
1312 uint8_t abPageData[4];
1313 /** Field view. */
1314 struct
1315 {
1316 /** The omnipresent header. */
1317 MptConfigurationPageHeader Header;
1318 /** Product specific data - 0 for now */
1319 } fields;
1320 } u;
1321} MptConfigurationPageManufacturing6, *PMptConfigurationPageManufacturing6;
1322#pragma pack()
1323AssertCompileSize(MptConfigurationPageManufacturing6, 4);
1324
1325/**
1326 * Manufacutring page 7 - PHY element.
1327 */
1328#pragma pack(1)
1329typedef struct MptConfigurationPageManufacturing7PHY
1330{
1331 /** Pinout */
1332 uint32_t u32Pinout;
1333 /** Connector name */
1334 uint8_t szConnector[16];
1335 /** Location */
1336 uint8_t u8Location;
1337 /** reserved */
1338 uint8_t u8Reserved;
1339 /** Slot */
1340 uint16_t u16Slot;
1341} MptConfigurationPageManufacturing7PHY, *PMptConfigurationPageManufacturing7PHY;
1342#pragma pack()
1343AssertCompileSize(MptConfigurationPageManufacturing7PHY, 24);
1344
1345/**
1346 * Manufacturing page 7 - Readonly.
1347 */
1348#pragma pack(1)
1349typedef struct MptConfigurationPageManufacturing7
1350{
1351 /** Union. */
1352 union
1353 {
1354 /** Byte view. */
1355 uint8_t abPageData[1];
1356 /** Field view. */
1357 struct
1358 {
1359 /** The omnipresent header. */
1360 MptConfigurationPageHeader Header;
1361 /** Reserved */
1362 uint32_t au32Reserved[2];
1363 /** Flags */
1364 uint32_t u32Flags;
1365 /** Enclosure name */
1366 uint8_t szEnclosureName[16];
1367 /** Nummber of PHYs */
1368 uint8_t u8NumPhys;
1369 /** Reserved */
1370 uint8_t au8Reserved[3];
1371 /** PHY list for the SAS controller - variable depending on the number of ports */
1372 MptConfigurationPageManufacturing7PHY aPHY[1];
1373 } fields;
1374 } u;
1375} MptConfigurationPageManufacturing7, *PMptConfigurationPageManufacturing7;
1376#pragma pack()
1377AssertCompileSize(MptConfigurationPageManufacturing7, 36+sizeof(MptConfigurationPageManufacturing7PHY));
1378
1379#define LSILOGICSCSI_MANUFACTURING7_GET_SIZE(ports) (sizeof(MptConfigurationPageManufacturing7) + ((ports) - 1) * sizeof(MptConfigurationPageManufacturing7PHY))
1380
1381/** Flags for the flags field */
1382#define LSILOGICSCSI_MANUFACTURING7_FLAGS_USE_PROVIDED_INFORMATION RT_BIT(0)
1383
1384/** Flags for the pinout field */
1385#define LSILOGICSCSI_MANUFACTURING7_PINOUT_UNKNOWN RT_BIT(0)
1386#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8482 RT_BIT(1)
1387#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE1 RT_BIT(8)
1388#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE2 RT_BIT(9)
1389#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE3 RT_BIT(10)
1390#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE4 RT_BIT(11)
1391#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE1 RT_BIT(16)
1392#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE2 RT_BIT(17)
1393#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE3 RT_BIT(18)
1394#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE4 RT_BIT(19)
1395
1396/** Flags for the location field */
1397#define LSILOGICSCSI_MANUFACTURING7_LOCATION_UNKNOWN 0x01
1398#define LSILOGICSCSI_MANUFACTURING7_LOCATION_INTERNAL 0x02
1399#define LSILOGICSCSI_MANUFACTURING7_LOCATION_EXTERNAL 0x04
1400#define LSILOGICSCSI_MANUFACTURING7_LOCATION_SWITCHABLE 0x08
1401#define LSILOGICSCSI_MANUFACTURING7_LOCATION_AUTO 0x10
1402#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_PRESENT 0x20
1403#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_CONNECTED 0x80
1404
1405/**
1406 * Manufacturing page 8 - Readonly.
1407 */
1408#pragma pack(1)
1409typedef struct MptConfigurationPageManufacturing8
1410{
1411 /** Union. */
1412 union
1413 {
1414 /** Byte view. */
1415 uint8_t abPageData[4];
1416 /** Field view. */
1417 struct
1418 {
1419 /** The omnipresent header. */
1420 MptConfigurationPageHeader Header;
1421 /** Product specific information */
1422 } fields;
1423 } u;
1424} MptConfigurationPageManufacturing8, *PMptConfigurationPageManufacturing8;
1425#pragma pack()
1426AssertCompileSize(MptConfigurationPageManufacturing8, 4);
1427
1428/**
1429 * Manufacturing page 9 - Readonly.
1430 */
1431#pragma pack(1)
1432typedef struct MptConfigurationPageManufacturing9
1433{
1434 /** Union. */
1435 union
1436 {
1437 /** Byte view. */
1438 uint8_t abPageData[4];
1439 /** Field view. */
1440 struct
1441 {
1442 /** The omnipresent header. */
1443 MptConfigurationPageHeader Header;
1444 /** Product specific information */
1445 } fields;
1446 } u;
1447} MptConfigurationPageManufacturing9, *PMptConfigurationPageManufacturing9;
1448#pragma pack()
1449AssertCompileSize(MptConfigurationPageManufacturing9, 4);
1450
1451/**
1452 * Manufacturing page 10 - Readonly.
1453 */
1454#pragma pack(1)
1455typedef struct MptConfigurationPageManufacturing10
1456{
1457 /** Union. */
1458 union
1459 {
1460 /** Byte view. */
1461 uint8_t abPageData[4];
1462 /** Field view. */
1463 struct
1464 {
1465 /** The omnipresent header. */
1466 MptConfigurationPageHeader Header;
1467 /** Product specific information */
1468 } fields;
1469 } u;
1470} MptConfigurationPageManufacturing10, *PMptConfigurationPageManufacturing10;
1471#pragma pack()
1472AssertCompileSize(MptConfigurationPageManufacturing10, 4);
1473
1474/**
1475 * IO Unit page 0. - Readonly.
1476 */
1477#pragma pack(1)
1478typedef struct MptConfigurationPageIOUnit0
1479{
1480 /** Union. */
1481 union
1482 {
1483 /** Byte view. */
1484 uint8_t abPageData[12];
1485 /** Field view. */
1486 struct
1487 {
1488 /** The omnipresent header. */
1489 MptConfigurationPageHeader Header;
1490 /** A unique identifier. */
1491 uint64_t u64UniqueIdentifier;
1492 } fields;
1493 } u;
1494} MptConfigurationPageIOUnit0, *PMptConfigurationPageIOUnit0;
1495#pragma pack()
1496AssertCompileSize(MptConfigurationPageIOUnit0, 12);
1497
1498/**
1499 * IO Unit page 1. - Read/Write.
1500 */
1501#pragma pack(1)
1502typedef struct MptConfigurationPageIOUnit1
1503{
1504 /** Union. */
1505 union
1506 {
1507 /** Byte view. */
1508 uint8_t abPageData[8];
1509 /** Field view. */
1510 struct
1511 {
1512 /** The omnipresent header. */
1513 MptConfigurationPageHeader Header;
1514 /** Flag whether this is a single function PCI device. */
1515 unsigned fSingleFunction: 1;
1516 /** Flag whether all possible paths to a device are mapped. */
1517 unsigned fAllPathsMapped: 1;
1518 /** Reserved. */
1519 unsigned u4Reserved: 4;
1520 /** Flag whether all RAID functionality is disabled. */
1521 unsigned fIntegratedRAIDDisabled: 1;
1522 /** Flag whether 32bit PCI accesses are forced. */
1523 unsigned f32BitAccessForced: 1;
1524 /** Reserved. */
1525 unsigned abReserved: 24;
1526 } fields;
1527 } u;
1528} MptConfigurationPageIOUnit1, *PMptConfigurationPageIOUnit1;
1529#pragma pack()
1530AssertCompileSize(MptConfigurationPageIOUnit1, 8);
1531
1532/**
1533 * Adapter Ordering.
1534 */
1535#pragma pack(1)
1536typedef struct MptConfigurationPageIOUnit2AdapterOrdering
1537{
1538 /** PCI bus number. */
1539 unsigned u8PCIBusNumber: 8;
1540 /** PCI device and function number. */
1541 unsigned u8PCIDevFn: 8;
1542 /** Flag whether the adapter is embedded. */
1543 unsigned fAdapterEmbedded: 1;
1544 /** Flag whether the adapter is enabled. */
1545 unsigned fAdapterEnabled: 1;
1546 /** Reserved. */
1547 unsigned u6Reserved: 6;
1548 /** Reserved. */
1549 unsigned u8Reserved: 8;
1550} MptConfigurationPageIOUnit2AdapterOrdering, *PMptConfigurationPageIOUnit2AdapterOrdering;
1551#pragma pack()
1552AssertCompileSize(MptConfigurationPageIOUnit2AdapterOrdering, 4);
1553
1554/**
1555 * IO Unit page 2. - Read/Write.
1556 */
1557#pragma pack(1)
1558typedef struct MptConfigurationPageIOUnit2
1559{
1560 /** Union. */
1561 union
1562 {
1563 /** Byte view. */
1564 uint8_t abPageData[28];
1565 /** Field view. */
1566 struct
1567 {
1568 /** The omnipresent header. */
1569 MptConfigurationPageHeader Header;
1570 /** Reserved. */
1571 unsigned fReserved: 1;
1572 /** Flag whether Pause on error is enabled. */
1573 unsigned fPauseOnError: 1;
1574 /** Flag whether verbose mode is enabled. */
1575 unsigned fVerboseModeEnabled: 1;
1576 /** Set to disable color video. */
1577 unsigned fDisableColorVideo: 1;
1578 /** Flag whether int 40h is hooked. */
1579 unsigned fNotHookInt40h: 1;
1580 /** Reserved. */
1581 unsigned u3Reserved: 3;
1582 /** Reserved. */
1583 unsigned abReserved: 24;
1584 /** BIOS version. */
1585 uint32_t u32BIOSVersion;
1586 /** Adapter ordering. */
1587 MptConfigurationPageIOUnit2AdapterOrdering aAdapterOrder[4];
1588 } fields;
1589 } u;
1590} MptConfigurationPageIOUnit2, *PMptConfigurationPageIOUnit2;
1591#pragma pack()
1592AssertCompileSize(MptConfigurationPageIOUnit2, 28);
1593
1594/*
1595 * IO Unit page 3. - Read/Write.
1596 */
1597#pragma pack(1)
1598typedef struct MptConfigurationPageIOUnit3
1599{
1600 /** Union. */
1601 union
1602 {
1603 /** Byte view. */
1604 uint8_t abPageData[8];
1605 /** Field view. */
1606 struct
1607 {
1608 /** The omnipresent header. */
1609 MptConfigurationPageHeader Header;
1610 /** Number of GPIO values. */
1611 uint8_t u8GPIOCount;
1612 /** Reserved. */
1613 uint8_t abReserved[3];
1614 } fields;
1615 } u;
1616} MptConfigurationPageIOUnit3, *PMptConfigurationPageIOUnit3;
1617#pragma pack()
1618AssertCompileSize(MptConfigurationPageIOUnit3, 8);
1619
1620/*
1621 * IO Unit page 4. - Readonly for everyone except the BIOS.
1622 */
1623#pragma pack(1)
1624typedef struct MptConfigurationPageIOUnit4
1625{
1626 /** Union. */
1627 union
1628 {
1629 /** Byte view. */
1630 uint8_t abPageData[20];
1631 /** Field view. */
1632 struct
1633 {
1634 /** The omnipresent header. */
1635 MptConfigurationPageHeader Header;
1636 /** Reserved */
1637 uint32_t u32Reserved;
1638 /** SG entry describing the Firmware location. */
1639 MptSGEntrySimple64 FWImageSGE;
1640 } fields;
1641 } u;
1642} MptConfigurationPageIOUnit4, *PMptConfigurationPageIOUnit4;
1643#pragma pack()
1644AssertCompileSize(MptConfigurationPageIOUnit4, 20);
1645
1646/**
1647 * IOC page 0. - Readonly
1648 */
1649#pragma pack(1)
1650typedef struct MptConfigurationPageIOC0
1651{
1652 /** Union. */
1653 union
1654 {
1655 /** Byte view. */
1656 uint8_t abPageData[28];
1657 /** Field view. */
1658 struct
1659 {
1660 /** The omnipresent header. */
1661 MptConfigurationPageHeader Header;
1662 /** Total ammount of NV memory in bytes. */
1663 uint32_t u32TotalNVStore;
1664 /** Number of free bytes in the NV store. */
1665 uint32_t u32FreeNVStore;
1666 /** PCI vendor ID. */
1667 uint16_t u16VendorId;
1668 /** PCI device ID. */
1669 uint16_t u16DeviceId;
1670 /** PCI revision ID. */
1671 uint8_t u8RevisionId;
1672 /** Reserved. */
1673 uint8_t abReserved[3];
1674 /** PCI class code. */
1675 uint32_t u32ClassCode;
1676 /** Subsystem vendor Id. */
1677 uint16_t u16SubsystemVendorId;
1678 /** Subsystem Id. */
1679 uint16_t u16SubsystemId;
1680 } fields;
1681 } u;
1682} MptConfigurationPageIOC0, *PMptConfigurationPageIOC0;
1683#pragma pack()
1684AssertCompileSize(MptConfigurationPageIOC0, 28);
1685
1686/**
1687 * IOC page 1. - Read/Write
1688 */
1689#pragma pack(1)
1690typedef struct MptConfigurationPageIOC1
1691{
1692 /** Union. */
1693 union
1694 {
1695 /** Byte view. */
1696 uint8_t abPageData[16];
1697 /** Field view. */
1698 struct
1699 {
1700 /** The omnipresent header. */
1701 MptConfigurationPageHeader Header;
1702 /** Flag whether reply coalescing is enabled. */
1703 unsigned fReplyCoalescingEnabled: 1;
1704 /** Reserved. */
1705 unsigned u31Reserved: 31;
1706 /** Coalescing Timeout in microseconds. */
1707 unsigned u32CoalescingTimeout: 32;
1708 /** Coalescing depth. */
1709 unsigned u8CoalescingDepth: 8;
1710 /** Reserved. */
1711 unsigned u8Reserved0: 8;
1712 unsigned u8Reserved1: 8;
1713 unsigned u8Reserved2: 8;
1714 } fields;
1715 } u;
1716} MptConfigurationPageIOC1, *PMptConfigurationPageIOC1;
1717#pragma pack()
1718AssertCompileSize(MptConfigurationPageIOC1, 16);
1719
1720/**
1721 * IOC page 2. - Readonly
1722 */
1723#pragma pack(1)
1724typedef struct MptConfigurationPageIOC2
1725{
1726 /** Union. */
1727 union
1728 {
1729 /** Byte view. */
1730 uint8_t abPageData[12];
1731 /** Field view. */
1732 struct
1733 {
1734 /** The omnipresent header. */
1735 MptConfigurationPageHeader Header;
1736 /** Flag whether striping is supported. */
1737 unsigned fStripingSupported: 1;
1738 /** Flag whether enhanced mirroring is supported. */
1739 unsigned fEnhancedMirroringSupported: 1;
1740 /** Flag whether mirroring is supported. */
1741 unsigned fMirroringSupported: 1;
1742 /** Reserved. */
1743 unsigned u26Reserved: 26;
1744 /** Flag whether SES is supported. */
1745 unsigned fSESSupported: 1;
1746 /** Flag whether SAF-TE is supported. */
1747 unsigned fSAFTESupported: 1;
1748 /** Flag whether cross channel volumes are supported. */
1749 unsigned fCrossChannelVolumesSupported: 1;
1750 /** Number of active integrated RAID volumes. */
1751 unsigned u8NumActiveVolumes: 8;
1752 /** Maximum number of integrated RAID volumes supported. */
1753 unsigned u8MaxVolumes: 8;
1754 /** Number of active integrated RAID physical disks. */
1755 unsigned u8NumActivePhysDisks: 8;
1756 /** Maximum number of integrated RAID physical disks supported. */
1757 unsigned u8MaxPhysDisks: 8;
1758 /** RAID volumes... - not supported. */
1759 } fields;
1760 } u;
1761} MptConfigurationPageIOC2, *PMptConfigurationPageIOC2;
1762#pragma pack()
1763AssertCompileSize(MptConfigurationPageIOC2, 12);
1764
1765/**
1766 * IOC page 3. - Readonly
1767 */
1768#pragma pack(1)
1769typedef struct MptConfigurationPageIOC3
1770{
1771 /** Union. */
1772 union
1773 {
1774 /** Byte view. */
1775 uint8_t abPageData[8];
1776 /** Field view. */
1777 struct
1778 {
1779 /** The omnipresent header. */
1780 MptConfigurationPageHeader Header;
1781 /** Number of active integrated RAID physical disks. */
1782 uint8_t u8NumPhysDisks;
1783 /** Reserved. */
1784 uint8_t abReserved[3];
1785 } fields;
1786 } u;
1787} MptConfigurationPageIOC3, *PMptConfigurationPageIOC3;
1788#pragma pack()
1789AssertCompileSize(MptConfigurationPageIOC3, 8);
1790
1791/**
1792 * IOC page 4. - Read/Write
1793 */
1794#pragma pack(1)
1795typedef struct MptConfigurationPageIOC4
1796{
1797 /** Union. */
1798 union
1799 {
1800 /** Byte view. */
1801 uint8_t abPageData[8];
1802 /** Field view. */
1803 struct
1804 {
1805 /** The omnipresent header. */
1806 MptConfigurationPageHeader Header;
1807 /** Number of SEP entries in this page. */
1808 uint8_t u8ActiveSEP;
1809 /** Maximum number of SEp entries supported. */
1810 uint8_t u8MaxSEP;
1811 /** Reserved. */
1812 uint16_t u16Reserved;
1813 /** SEP entries... - not supported. */
1814 } fields;
1815 } u;
1816} MptConfigurationPageIOC4, *PMptConfigurationPageIOC4;
1817#pragma pack()
1818AssertCompileSize(MptConfigurationPageIOC4, 8);
1819
1820/**
1821 * IOC page 6. - Read/Write
1822 */
1823#pragma pack(1)
1824typedef struct MptConfigurationPageIOC6
1825{
1826 /** Union. */
1827 union
1828 {
1829 /** Byte view. */
1830 uint8_t abPageData[60];
1831 /** Field view. */
1832 struct
1833 {
1834 /** The omnipresent header. */
1835 MptConfigurationPageHeader Header;
1836 uint32_t u32CapabilitiesFlags;
1837 uint8_t u8MaxDrivesIS;
1838 uint8_t u8MaxDrivesIM;
1839 uint8_t u8MaxDrivesIME;
1840 uint8_t u8Reserved1;
1841 uint8_t u8MinDrivesIS;
1842 uint8_t u8MinDrivesIM;
1843 uint8_t u8MinDrivesIME;
1844 uint8_t u8Reserved2;
1845 uint8_t u8MaxGlobalHotSpares;
1846 uint8_t u8Reserved3;
1847 uint16_t u16Reserved4;
1848 uint32_t u32Reserved5;
1849 uint32_t u32SupportedStripeSizeMapIS;
1850 uint32_t u32SupportedStripeSizeMapIME;
1851 uint32_t u32Reserved6;
1852 uint8_t u8MetadataSize;
1853 uint8_t u8Reserved7;
1854 uint16_t u16Reserved8;
1855 uint16_t u16MaxBadBlockTableEntries;
1856 uint16_t u16Reserved9;
1857 uint16_t u16IRNvsramUsage;
1858 uint16_t u16Reserved10;
1859 uint32_t u32IRNvsramVersion;
1860 uint32_t u32Reserved11;
1861 } fields;
1862 } u;
1863} MptConfigurationPageIOC6, *PMptConfigurationPageIOC6;
1864#pragma pack()
1865AssertCompileSize(MptConfigurationPageIOC6, 60);
1866
1867/**
1868 * BIOS page 1 - Read/write.
1869 */
1870#pragma pack(1)
1871typedef struct MptConfigurationPageBIOS1
1872{
1873 /** Union. */
1874 union
1875 {
1876 /** Byte view. */
1877 uint8_t abPageData[48];
1878 /** Field view. */
1879 struct
1880 {
1881 /** The omnipresent header. */
1882 MptConfigurationPageHeader Header;
1883 /** BIOS options */
1884 uint32_t u32BiosOptions;
1885 /** IOC settings */
1886 uint32_t u32IOCSettings;
1887 /** Reserved */
1888 uint32_t u32Reserved;
1889 /** Device settings */
1890 uint32_t u32DeviceSettings;
1891 /** Number of devices */
1892 uint16_t u16NumberOfDevices;
1893 /** Expander spinup */
1894 uint8_t u8ExpanderSpinup;
1895 /** Reserved */
1896 uint8_t u8Reserved;
1897 /** I/O timeout of block devices without removable media */
1898 uint16_t u16IOTimeoutBlockDevicesNonRM;
1899 /** I/O timeout sequential */
1900 uint16_t u16IOTimeoutSequential;
1901 /** I/O timeout other */
1902 uint16_t u16IOTimeoutOther;
1903 /** I/O timeout of block devices with removable media */
1904 uint16_t u16IOTimeoutBlockDevicesRM;
1905 } fields;
1906 } u;
1907} MptConfigurationPageBIOS1, *PMptConfigurationPageBIOS1;
1908#pragma pack()
1909AssertCompileSize(MptConfigurationPageBIOS1, 48);
1910
1911#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_DISABLE RT_BIT(0)
1912#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_SCAN_FROM_HIGH_TO_LOW RT_BIT(1)
1913#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SAS_SUPPORT RT_BIT(8)
1914#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_FC_SUPPORT RT_BIT(9)
1915#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SPI_SUPPORT RT_BIT(10)
1916
1917#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ALTERNATE_CHS RT_BIT(3)
1918
1919#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_SET(x) ((x) << 4)
1920#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_DISABLED 0x00
1921#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BIOS_ONLY 0x01
1922#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_OS_ONLY 0x02
1923#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BOT 0x03
1924
1925#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_SET(x) ((x) << 6)
1926#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_NO_INT13H 0x00
1927#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_BOOT_MEDIA_INT13H 0x01
1928#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_INT13H 0x02
1929
1930#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_SET(x) ((x & 0xF) << 8)
1931#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_GET(x) ((x >> 8) & 0x0F)
1932#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_SET(x) ((x & 0xF) << 12)
1933#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_GET(x) ((x >> 12) & 0x0F)
1934
1935#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SET(x) (((x) & 0x3) << 16)
1936#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_ENCLOSURE 0x0
1937#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SAS_ADDRESS 0x1
1938
1939#define LSILOGICSCSI_BIOS1_IOCSETTINGS_DIRECT_ATTACH_SPINUP_MODE_ALL RT_BIT(18)
1940#define LSILOGICSCSI_BIOS1_IOCSETTINGS_AUTO_PORT_ENABLE RT_BIT(19)
1941
1942#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_SET(x) (((x) & 0xF) << 20)
1943#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_GET(x) ((x >> 20) & 0x0F)
1944
1945#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_SET(x) (((x) & 0xF) << 24)
1946#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_GET(x) ((x >> 24) & 0x0F)
1947
1948#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS RT_BIT(0)
1949#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_NON_REMOVABLE_DEVICES RT_BIT(1)
1950#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_REMOVABLE_DEVICES RT_BIT(2)
1951#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS2 RT_BIT(3)
1952#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_SMART_POLLING RT_BIT(4)
1953
1954#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_SET(x) ((x) & 0x0F)
1955#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_GET(x) ((x) & 0x0F)
1956#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_SET(x) (((x) & 0x0F) << 4)
1957#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_GET(x) ((x >> 4) & 0x0F)
1958
1959/**
1960 * BIOS page 2 - Read/write.
1961 */
1962#pragma pack(1)
1963typedef struct MptConfigurationPageBIOS2
1964{
1965 /** Union. */
1966 union
1967 {
1968 /** Byte view. */
1969 uint8_t abPageData[384];
1970 /** Field view. */
1971 struct
1972 {
1973 /** The omnipresent header. */
1974 MptConfigurationPageHeader Header;
1975 /** Reserved */
1976 uint32_t au32Reserved[6];
1977 /** Format of the boot device field. */
1978 uint8_t u8BootDeviceForm;
1979 /** Previous format of the boot device field. */
1980 uint8_t u8PrevBootDeviceForm;
1981 /** Reserved */
1982 uint16_t u16Reserved;
1983 /** Boot device fields - dependent on the format */
1984 union
1985 {
1986 /** Device for AdapterNumber:Bus:Target:LUN */
1987 struct
1988 {
1989 /** Target ID */
1990 uint8_t u8TargetID;
1991 /** Bus */
1992 uint8_t u8Bus;
1993 /** Adapter Number */
1994 uint8_t u8AdapterNumber;
1995 /** Reserved */
1996 uint8_t u8Reserved;
1997 /** Reserved */
1998 uint32_t au32Reserved[3];
1999 /** LUN */
2000 uint32_t aLUN[5];
2001 /** Reserved */
2002 uint32_t au32Reserved2[56];
2003 } AdapterNumberBusTargetLUN;
2004 /** Device for PCIAddress:Bus:Target:LUN */
2005 struct
2006 {
2007 /** Target ID */
2008 uint8_t u8TargetID;
2009 /** Bus */
2010 uint8_t u8Bus;
2011 /** Adapter Number */
2012 uint16_t u16PCIAddress;
2013 /** Reserved */
2014 uint32_t au32Reserved[3];
2015 /** LUN */
2016 uint32_t aLUN[5];
2017 /** Reserved */
2018 uint32_t au32Reserved2[56];
2019 } PCIAddressBusTargetLUN;
2020 /** Device for PCISlotNo:Bus:Target:LUN */
2021 struct
2022 {
2023 /** Target ID */
2024 uint8_t u8TargetID;
2025 /** Bus */
2026 uint8_t u8Bus;
2027 /** PCI Slot Number */
2028 uint8_t u16PCISlotNo;
2029 /** Reserved */
2030 uint32_t au32Reserved[3];
2031 /** LUN */
2032 uint32_t aLUN[5];
2033 /** Reserved */
2034 uint32_t au32Reserved2[56];
2035 } PCIAddressBusSlotLUN;
2036 /** Device for FC channel world wide name */
2037 struct
2038 {
2039 /** World wide port name low */
2040 uint32_t u32WorldWidePortNameLow;
2041 /** World wide port name high */
2042 uint32_t u32WorldWidePortNameHigh;
2043 /** Reserved */
2044 uint32_t au32Reserved[3];
2045 /** LUN */
2046 uint32_t aLUN[5];
2047 /** Reserved */
2048 uint32_t au32Reserved2[56];
2049 } FCWorldWideName;
2050 /** Device for FC channel world wide name */
2051 struct
2052 {
2053 /** SAS address */
2054 SASADDRESS SASAddress;
2055 /** Reserved */
2056 uint32_t au32Reserved[3];
2057 /** LUN */
2058 uint32_t aLUN[5];
2059 /** Reserved */
2060 uint32_t au32Reserved2[56];
2061 } SASWorldWideName;
2062 /** Device for Enclosure/Slot */
2063 struct
2064 {
2065 /** Enclosure logical ID */
2066 uint64_t u64EnclosureLogicalID;
2067 /** Reserved */
2068 uint32_t au32Reserved[3];
2069 /** LUN */
2070 uint32_t aLUN[5];
2071 /** Reserved */
2072 uint32_t au32Reserved2[56];
2073 } EnclosureSlot;
2074 } BootDevice;
2075 } fields;
2076 } u;
2077} MptConfigurationPageBIOS2, *PMptConfigurationPageBIOS2;
2078#pragma pack()
2079AssertCompileSize(MptConfigurationPageBIOS2, 384);
2080
2081#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SET(x) ((x) & 0x0F)
2082#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FIRST 0x0
2083#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ADAPTER_BUS_TARGET_LUN 0x1
2084#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCIADDR_BUS_TARGET_LUN 0x2
2085#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCISLOT_BUS_TARGET_LUN 0x3
2086#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FC_WWN 0x4
2087#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SAS_WWN 0x5
2088#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ENCLOSURE_SLOT 0x6
2089
2090/**
2091 * BIOS page 4 - Read/Write (Where is 3? - not defined in the spec)
2092 */
2093#pragma pack(1)
2094typedef struct MptConfigurationPageBIOS4
2095{
2096 /** Union. */
2097 union
2098 {
2099 /** Byte view. */
2100 uint8_t abPageData[12];
2101 /** Field view. */
2102 struct
2103 {
2104 /** The omnipresent header. */
2105 MptConfigurationPageHeader Header;
2106 /** Reassignment Base WWID */
2107 uint64_t u64ReassignmentBaseWWID;
2108 } fields;
2109 } u;
2110} MptConfigurationPageBIOS4, *PMptConfigurationPageBIOS4;
2111#pragma pack()
2112AssertCompileSize(MptConfigurationPageBIOS4, 12);
2113
2114/**
2115 * SCSI-SPI port page 0. - Readonly
2116 */
2117#pragma pack(1)
2118typedef struct MptConfigurationPageSCSISPIPort0
2119{
2120 /** Union. */
2121 union
2122 {
2123 /** Byte view. */
2124 uint8_t abPageData[12];
2125 /** Field view. */
2126 struct
2127 {
2128 /** The omnipresent header. */
2129 MptConfigurationPageHeader Header;
2130 /** Flag whether this port is information unit trnafsers capable. */
2131 unsigned fInformationUnitTransfersCapable: 1;
2132 /** Flag whether the port is DT (Dual Transfer) capable. */
2133 unsigned fDTCapable: 1;
2134 /** Flag whether the port is QAS (Quick Arbitrate and Select) capable. */
2135 unsigned fQASCapable: 1;
2136 /** Reserved. */
2137 unsigned u5Reserved1: 5;
2138 /** Minimum Synchronous transfer period. */
2139 unsigned u8MinimumSynchronousTransferPeriod: 8;
2140 /** Maximum synchronous offset. */
2141 unsigned u8MaximumSynchronousOffset: 8;
2142 /** Reserved. */
2143 unsigned u5Reserved2: 5;
2144 /** Flag whether indicating the width of the bus - 0 narrow and 1 for wide. */
2145 unsigned fWide: 1;
2146 /** Reserved */
2147 unsigned fReserved: 1;
2148 /** Flag whether the port is AIP (Asynchronous Information Protection) capable. */
2149 unsigned fAIPCapable: 1;
2150 /** Signaling Type. */
2151 unsigned u2SignalingType: 2;
2152 /** Reserved. */
2153 unsigned u30Reserved: 30;
2154 } fields;
2155 } u;
2156} MptConfigurationPageSCSISPIPort0, *PMptConfigurationPageSCSISPIPort0;
2157#pragma pack()
2158AssertCompileSize(MptConfigurationPageSCSISPIPort0, 12);
2159
2160/**
2161 * SCSI-SPI port page 1. - Read/Write
2162 */
2163#pragma pack(1)
2164typedef struct MptConfigurationPageSCSISPIPort1
2165{
2166 /** Union. */
2167 union
2168 {
2169 /** Byte view. */
2170 uint8_t abPageData[12];
2171 /** Field view. */
2172 struct
2173 {
2174 /** The omnipresent header. */
2175 MptConfigurationPageHeader Header;
2176 /** The SCSI ID of the port. */
2177 uint8_t u8SCSIID;
2178 /** Reserved. */
2179 uint8_t u8Reserved;
2180 /** Port response IDs Bit mask field. */
2181 uint16_t u16PortResponseIDsBitmask;
2182 /** Value for the on BUS timer. */
2183 uint32_t u32OnBusTimerValue;
2184 } fields;
2185 } u;
2186} MptConfigurationPageSCSISPIPort1, *PMptConfigurationPageSCSISPIPort1;
2187#pragma pack()
2188AssertCompileSize(MptConfigurationPageSCSISPIPort1, 12);
2189
2190/**
2191 * Device settings for one device.
2192 */
2193#pragma pack(1)
2194typedef struct MptDeviceSettings
2195{
2196 /** Timeout for I/O in seconds. */
2197 unsigned u8Timeout: 8;
2198 /** Minimum synchronous factor. */
2199 unsigned u8SyncFactor: 8;
2200 /** Flag whether disconnect is enabled. */
2201 unsigned fDisconnectEnable: 1;
2202 /** Flag whether Scan ID is enabled. */
2203 unsigned fScanIDEnable: 1;
2204 /** Flag whether Scan LUNs is enabled. */
2205 unsigned fScanLUNEnable: 1;
2206 /** Flag whether tagged queuing is enabled. */
2207 unsigned fTaggedQueuingEnabled: 1;
2208 /** Flag whether wide is enabled. */
2209 unsigned fWideDisable: 1;
2210 /** Flag whether this device is bootable. */
2211 unsigned fBootChoice: 1;
2212 /** Reserved. */
2213 unsigned u10Reserved: 10;
2214} MptDeviceSettings, *PMptDeviceSettings;
2215#pragma pack()
2216AssertCompileSize(MptDeviceSettings, 4);
2217
2218/**
2219 * SCSI-SPI port page 2. - Read/Write for the BIOS
2220 */
2221#pragma pack(1)
2222typedef struct MptConfigurationPageSCSISPIPort2
2223{
2224 /** Union. */
2225 union
2226 {
2227 /** Byte view. */
2228 uint8_t abPageData[76];
2229 /** Field view. */
2230 struct
2231 {
2232 /** The omnipresent header. */
2233 MptConfigurationPageHeader Header;
2234 /** Flag indicating the bus scan order. */
2235 unsigned fBusScanOrderHighToLow: 1;
2236 /** Reserved. */
2237 unsigned fReserved: 1;
2238 /** Flag whether SCSI Bus resets are avoided. */
2239 unsigned fAvoidSCSIBusResets: 1;
2240 /** Flag whether alternate CHS is used. */
2241 unsigned fAlternateCHS: 1;
2242 /** Flag whether termination is disabled. */
2243 unsigned fTerminationDisabled: 1;
2244 /** Reserved. */
2245 unsigned u27Reserved: 27;
2246 /** Host SCSI ID. */
2247 unsigned u4HostSCSIID: 4;
2248 /** Initialize HBA. */
2249 unsigned u2InitializeHBA: 2;
2250 /** Removeable media setting. */
2251 unsigned u2RemovableMediaSetting: 2;
2252 /** Spinup delay. */
2253 unsigned u4SpinupDelay: 4;
2254 /** Negotiating settings. */
2255 unsigned u2NegotitatingSettings: 2;
2256 /** Reserved. */
2257 unsigned u18Reserved: 18;
2258 /** Device Settings. */
2259 MptDeviceSettings aDeviceSettings[16];
2260 } fields;
2261 } u;
2262} MptConfigurationPageSCSISPIPort2, *PMptConfigurationPageSCSISPIPort2;
2263#pragma pack()
2264AssertCompileSize(MptConfigurationPageSCSISPIPort2, 76);
2265
2266/**
2267 * SCSI-SPI device page 0. - Readonly
2268 */
2269#pragma pack(1)
2270typedef struct MptConfigurationPageSCSISPIDevice0
2271{
2272 /** Union. */
2273 union
2274 {
2275 /** Byte view. */
2276 uint8_t abPageData[12];
2277 /** Field view. */
2278 struct
2279 {
2280 /** The omnipresent header. */
2281 MptConfigurationPageHeader Header;
2282 /** Negotiated Parameters. */
2283 /** Information Units enabled. */
2284 unsigned fInformationUnitsEnabled: 1;
2285 /** Dual Transfers Enabled. */
2286 unsigned fDTEnabled: 1;
2287 /** QAS enabled. */
2288 unsigned fQASEnabled: 1;
2289 /** Reserved. */
2290 unsigned u5Reserved1: 5;
2291 /** Synchronous Transfer period. */
2292 unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2293 /** Synchronous offset. */
2294 unsigned u8NegotiatedSynchronousOffset: 8;
2295 /** Reserved. */
2296 unsigned u5Reserved2: 5;
2297 /** Width - 0 for narrow and 1 for wide. */
2298 unsigned fWide: 1;
2299 /** Reserved. */
2300 unsigned fReserved: 1;
2301 /** AIP enabled. */
2302 unsigned fAIPEnabled: 1;
2303 /** Flag whether negotiation occurred. */
2304 unsigned fNegotationOccured: 1;
2305 /** Flag whether a SDTR message was rejected. */
2306 unsigned fSDTRRejected: 1;
2307 /** Flag whether a WDTR message was rejected. */
2308 unsigned fWDTRRejected: 1;
2309 /** Flag whether a PPR message was rejected. */
2310 unsigned fPPRRejected: 1;
2311 /** Reserved. */
2312 unsigned u28Reserved: 28;
2313 } fields;
2314 } u;
2315} MptConfigurationPageSCSISPIDevice0, *PMptConfigurationPageSCSISPIDevice0;
2316#pragma pack()
2317AssertCompileSize(MptConfigurationPageSCSISPIDevice0, 12);
2318
2319/**
2320 * SCSI-SPI device page 1. - Read/Write
2321 */
2322#pragma pack(1)
2323typedef struct MptConfigurationPageSCSISPIDevice1
2324{
2325 /** Union. */
2326 union
2327 {
2328 /** Byte view. */
2329 uint8_t abPageData[16];
2330 /** Field view. */
2331 struct
2332 {
2333 /** The omnipresent header. */
2334 MptConfigurationPageHeader Header;
2335 /** Requested Parameters. */
2336 /** Information Units enable. */
2337 bool fInformationUnitsEnable: 1;
2338 /** Dual Transfers Enable. */
2339 bool fDTEnable: 1;
2340 /** QAS enable. */
2341 bool fQASEnable: 1;
2342 /** Reserved. */
2343 unsigned u5Reserved1: 5;
2344 /** Synchronous Transfer period. */
2345 unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2346 /** Synchronous offset. */
2347 unsigned u8NegotiatedSynchronousOffset: 8;
2348 /** Reserved. */
2349 unsigned u5Reserved2: 5;
2350 /** Width - 0 for narrow and 1 for wide. */
2351 bool fWide: 1;
2352 /** Reserved. */
2353 bool fReserved1: 1;
2354 /** AIP enable. */
2355 bool fAIPEnable: 1;
2356 /** Reserved. */
2357 bool fReserved2: 1;
2358 /** WDTR disallowed. */
2359 bool fWDTRDisallowed: 1;
2360 /** SDTR disallowed. */
2361 bool fSDTRDisallowed: 1;
2362 /** Reserved. */
2363 unsigned u29Reserved: 29;
2364 } fields;
2365 } u;
2366} MptConfigurationPageSCSISPIDevice1, *PMptConfigurationPageSCSISPIDevice1;
2367#pragma pack()
2368AssertCompileSize(MptConfigurationPageSCSISPIDevice1, 16);
2369
2370/**
2371 * SCSI-SPI device page 2. - Read/Write
2372 */
2373#pragma pack(1)
2374typedef struct MptConfigurationPageSCSISPIDevice2
2375{
2376 /** Union. */
2377 union
2378 {
2379 /** Byte view. */
2380 uint8_t abPageData[16];
2381 /** Field view. */
2382 struct
2383 {
2384 /** The omnipresent header. */
2385 MptConfigurationPageHeader Header;
2386 /** Reserved. */
2387 unsigned u4Reserved: 4;
2388 /** ISI enable. */
2389 unsigned fISIEnable: 1;
2390 /** Secondary driver enable. */
2391 unsigned fSecondaryDriverEnable: 1;
2392 /** Reserved. */
2393 unsigned fReserved: 1;
2394 /** Slew reate controler. */
2395 unsigned u3SlewRateControler: 3;
2396 /** Primary drive strength controler. */
2397 unsigned u3PrimaryDriveStrengthControl: 3;
2398 /** Secondary drive strength controler. */
2399 unsigned u3SecondaryDriveStrengthControl: 3;
2400 /** Reserved. */
2401 unsigned u12Reserved: 12;
2402 /** XCLKH_ST. */
2403 unsigned fXCLKH_ST: 1;
2404 /** XCLKS_ST. */
2405 unsigned fXCLKS_ST: 1;
2406 /** XCLKH_DT. */
2407 unsigned fXCLKH_DT: 1;
2408 /** XCLKS_DT. */
2409 unsigned fXCLKS_DT: 1;
2410 /** Parity pipe select. */
2411 unsigned u2ParityPipeSelect: 2;
2412 /** Reserved. */
2413 unsigned u30Reserved: 30;
2414 /** Data bit pipeline select. */
2415 unsigned u32DataPipelineSelect: 32;
2416 } fields;
2417 } u;
2418} MptConfigurationPageSCSISPIDevice2, *PMptConfigurationPageSCSISPIDevice2;
2419#pragma pack()
2420AssertCompileSize(MptConfigurationPageSCSISPIDevice2, 16);
2421
2422/**
2423 * SCSI-SPI device page 3 (Revision G). - Readonly
2424 */
2425#pragma pack(1)
2426typedef struct MptConfigurationPageSCSISPIDevice3
2427{
2428 /** Union. */
2429 union
2430 {
2431 /** Byte view. */
2432 uint8_t abPageData[1];
2433 /** Field view. */
2434 struct
2435 {
2436 /** The omnipresent header. */
2437 MptConfigurationPageHeader Header;
2438 /** Number of times the IOC rejected a message because it doesn't support the operation. */
2439 uint16_t u16MsgRejectCount;
2440 /** Number of times the SCSI bus entered an invalid operation state. */
2441 uint16_t u16PhaseErrorCount;
2442 /** Number of parity errors. */
2443 uint16_t u16ParityCount;
2444 /** Reserved. */
2445 uint16_t u16Reserved;
2446 } fields;
2447 } u;
2448} MptConfigurationPageSCSISPIDevice3, *PMptConfigurationPageSCSISPIDevice3;
2449#pragma pack()
2450AssertCompileSize(MptConfigurationPageSCSISPIDevice3, 12);
2451
2452/**
2453 * PHY entry for the SAS I/O unit page 0
2454 */
2455#pragma pack(1)
2456typedef struct MptConfigurationPageSASIOUnit0PHY
2457{
2458 /** Port number */
2459 uint8_t u8Port;
2460 /** Port flags */
2461 uint8_t u8PortFlags;
2462 /** Phy flags */
2463 uint8_t u8PhyFlags;
2464 /** negotiated link rate */
2465 uint8_t u8NegotiatedLinkRate;
2466 /** Controller phy device info */
2467 uint32_t u32ControllerPhyDeviceInfo;
2468 /** Attached device handle */
2469 uint16_t u16AttachedDevHandle;
2470 /** Controller device handle */
2471 uint16_t u16ControllerDevHandle;
2472 /** Discovery status */
2473 uint32_t u32DiscoveryStatus;
2474} MptConfigurationPageSASIOUnit0PHY, *PMptConfigurationPageSASIOUnit0PHY;
2475#pragma pack()
2476AssertCompileSize(MptConfigurationPageSASIOUnit0PHY, 16);
2477
2478/**
2479 * SAS I/O Unit page 0 - Readonly
2480 */
2481#pragma pack(1)
2482typedef struct MptConfigurationPageSASIOUnit0
2483{
2484 /** Union. */
2485 union
2486 {
2487 /** Byte view - variable. */
2488 uint8_t abPageData[1];
2489 /** Field view. */
2490 struct
2491 {
2492 /** The omnipresent header. */
2493 MptExtendedConfigurationPageHeader ExtHeader;
2494 /** Nvdata version default */
2495 uint16_t u16NvdataVersionDefault;
2496 /** Nvdata version persisent */
2497 uint16_t u16NvdataVersionPersistent;
2498 /** Number of physical ports */
2499 uint8_t u8NumPhys;
2500 /** Reserved */
2501 uint8_t au8Reserved[3];
2502 /** Content for each physical port - variable depending on the amount of ports. */
2503 MptConfigurationPageSASIOUnit0PHY aPHY[1];
2504 } fields;
2505 } u;
2506} MptConfigurationPageSASIOUnit0, *PMptConfigurationPageSASIOUnit0;
2507#pragma pack()
2508AssertCompileSize(MptConfigurationPageSASIOUnit0, 8+2+2+1+3+sizeof(MptConfigurationPageSASIOUnit0PHY));
2509
2510#define LSILOGICSCSI_SASIOUNIT0_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit0) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit0PHY))
2511
2512#define LSILOGICSCSI_SASIOUNIT0_PORT_CONFIGURATION_AUTO RT_BIT(0)
2513#define LSILOGICSCSI_SASIOUNIT0_PORT_TARGET_IOC RT_BIT(2)
2514#define LSILOGICSCSI_SASIOUNIT0_PORT_DISCOVERY_IN_STATUS RT_BIT(3)
2515
2516#define LSILOGICSCSI_SASIOUNIT0_PHY_RX_INVERTED RT_BIT(0)
2517#define LSILOGICSCSI_SASIOUNIT0_PHY_TX_INVERTED RT_BIT(1)
2518#define LSILOGICSCSI_SASIOUNIT0_PHY_DISABLED RT_BIT(2)
2519
2520#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SET(x) ((x) & 0x0F)
2521#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_GET(x) ((x) & 0x0F)
2522#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_UNKNOWN 0x00
2523#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_DISABLED 0x01
2524#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_FAILED 0x02
2525#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SATA_OOB 0x03
2526#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_15GB 0x08
2527#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_30GB 0x09
2528
2529#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(x) ((x) & 0x3)
2530#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO 0x0
2531#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END 0x1
2532#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_EDGE_EXPANDER 0x2
2533#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2534
2535#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA_HOST RT_BIT(3)
2536#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_INITIATOR RT_BIT(4)
2537#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_INITIATOR RT_BIT(5)
2538#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_INITIATOR RT_BIT(6)
2539#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA RT_BIT(7)
2540#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_TARGET RT_BIT(8)
2541#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_TARGET RT_BIT(9)
2542#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET RT_BIT(10)
2543#define LSILOGICSCSI_SASIOUNIT0_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2544#define LSILOGICSCSI_SASIOUNIT0_DEVICE_LSI RT_BIT(12)
2545#define LSILOGICSCSI_SASIOUNIT0_DEVICE_ATAPI_DEVICE RT_BIT(13)
2546#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SEP_DEVICE RT_BIT(14)
2547
2548#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_LOOP RT_BIT(0)
2549#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNADDRESSABLE RT_BIT(1)
2550#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SAME_SAS_ADDR RT_BIT(2)
2551#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXPANDER_ERROR RT_BIT(3)
2552#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_TIMEOUT RT_BIT(4)
2553#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_OOE RT_BIT(5)
2554#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_IDX RT_BIT(6)
2555#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_FUNC_FAILED RT_BIT(7)
2556#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_CRC_ERROR RT_BIT(8)
2557#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SUBTRSCTIVE_LNK RT_BIT(9)
2558#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_TBL_LNK RT_BIT(10)
2559#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNSUPPORTED_DEV RT_BIT(11)
2560#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MAX_SATA_TGTS RT_BIT(12)
2561#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MULT_CTRLS RT_BIT(13)
2562
2563/**
2564 * PHY entry for the SAS I/O unit page 1
2565 */
2566#pragma pack(1)
2567typedef struct MptConfigurationPageSASIOUnit1PHY
2568{
2569 /** Port number */
2570 uint8_t u8Port;
2571 /** Port flags */
2572 uint8_t u8PortFlags;
2573 /** Phy flags */
2574 uint8_t u8PhyFlags;
2575 /** Max link rate */
2576 uint8_t u8MaxMinLinkRate;
2577 /** Controller phy device info */
2578 uint32_t u32ControllerPhyDeviceInfo;
2579 /** Maximum target port connect time */
2580 uint16_t u16MaxTargetPortConnectTime;
2581 /** Reserved */
2582 uint16_t u16Reserved;
2583} MptConfigurationPageSASIOUnit1PHY, *PMptConfigurationPageSASIOUnit1PHY;
2584#pragma pack()
2585AssertCompileSize(MptConfigurationPageSASIOUnit1PHY, 12);
2586
2587/**
2588 * SAS I/O Unit page 1 - Read/Write
2589 */
2590#pragma pack(1)
2591typedef struct MptConfigurationPageSASIOUnit1
2592{
2593 /** Union. */
2594 union
2595 {
2596 /** Byte view - variable. */
2597 uint8_t abPageData[1];
2598 /** Field view. */
2599 struct
2600 {
2601 /** The omnipresent header. */
2602 MptExtendedConfigurationPageHeader ExtHeader;
2603 /** Control flags */
2604 uint16_t u16ControlFlags;
2605 /** maximum number of SATA targets */
2606 uint16_t u16MaxNumSATATargets;
2607 /** additional control flags */
2608 uint16_t u16AdditionalControlFlags;
2609 /** Reserved */
2610 uint16_t u16Reserved;
2611 /** Number of PHYs */
2612 uint8_t u8NumPhys;
2613 /** maximum SATA queue depth */
2614 uint8_t u8SATAMaxQDepth;
2615 /** Delay for reporting missing devices. */
2616 uint8_t u8ReportDeviceMissingDelay;
2617 /** I/O device missing delay */
2618 uint8_t u8IODeviceMissingDelay;
2619 /** Content for each physical port - variable depending on the number of ports */
2620 MptConfigurationPageSASIOUnit1PHY aPHY[1];
2621 } fields;
2622 } u;
2623} MptConfigurationPageSASIOUnit1, *PMptConfigurationPageSASIOUnit1;
2624#pragma pack()
2625AssertCompileSize(MptConfigurationPageSASIOUnit1, 8+12+sizeof(MptConfigurationPageSASIOUnit1PHY));
2626
2627#define LSILOGICSCSI_SASIOUNIT1_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit1) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit1PHY))
2628
2629#define LSILOGICSCSI_SASIOUNIT1_CONTROL_CLEAR_SATA_AFFILIATION RT_BIT(0)
2630#define LSILOGICSCSI_SASIOUNIT1_CONTROL_FIRST_LEVEL_DISCOVERY_ONLY RT_BIT(1)
2631#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SUBTRACTIVE_LNK_ILLEGAL RT_BIT(2)
2632#define LSILOGICSCSI_SASIOUNIT1_CONTROL_IOC_ENABLE_HIGH_PHY RT_BIT(3)
2633#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED RT_BIT(4)
2634#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED RT_BIT(5)
2635#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED RT_BIT(6)
2636#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LBA48_REQUIRED RT_BIT(7)
2637#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_INIT_POSTPONED RT_BIT(8)
2638
2639#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SET(x) (((x) & 0x3) << 9)
2640#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_GET(x) (((x) >> 9) & 0x3)
2641#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS_AND_SATA 0x00
2642#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS 0x01
2643#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SATA 0x02
2644
2645#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_EXP_ADDR RT_BIT(11)
2646#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SETTINGS_PRESERV_REQUIRED RT_BIT(12)
2647#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_15GB RT_BIT(13)
2648#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_30GB RT_BIT(14)
2649#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SAS_SELF_TEST_ENABLED RT_BIT(15)
2650
2651#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_TBL_LNKS_ALLOW RT_BIT(0)
2652#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_NO_AFFIL RT_BIT(1)
2653#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_SELF_AFFIL RT_BIT(2)
2654#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_OTHER_AFFIL RT_BIT(3)
2655#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_PORT_EN_ONLY RT_BIT(4)
2656#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_HIDE_NON_ZERO_PHYS RT_BIT(5)
2657#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_ASYNC_NOTIF RT_BIT(6)
2658#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_MULT_PORTS_ILL_SAME_DOMAIN RT_BIT(7)
2659
2660#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_UNITS_16_SEC RT_BIT(7)
2661#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_SET(x) ((x) & 0x7F)
2662#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_GET(x) ((x) & 0x7F)
2663
2664#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_AUTO RT_BIT(0)
2665#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_IOC1 RT_BIT(2)
2666
2667#define LSILOGICSCSI_SASIOUNIT1_PHY_RX_INVERT RT_BIT(0)
2668#define LSILOGICSCSI_SASIOUNIT1_PHY_TX_INVERT RT_BIT(1)
2669#define LSILOGICSCSI_SASIOUNIT1_PHY_DISABLE RT_BIT(2)
2670
2671#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(x) ((x) & 0x0F)
2672#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_GET(x) ((x) & 0x0F)
2673#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(x) (((x) & 0x0F) << 4)
2674#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_GET(x) ((x >> 4) & 0x0F)
2675#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB 0x8
2676#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB 0x9
2677
2678#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_SET(x) ((x) & 0x3)
2679#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_GET(x) ((x) & 0x3)
2680#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_NO 0x0
2681#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_END 0x1
2682#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_EDGE_EXPANDER 0x2
2683#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2684#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_INITIATOR RT_BIT(4)
2685#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_INITIATOR RT_BIT(5)
2686#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_INITIATOR RT_BIT(6)
2687#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_TARGET RT_BIT(8)
2688#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_TARGET RT_BIT(9)
2689#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_TARGET RT_BIT(10)
2690#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2691#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_LSI RT_BIT(12)
2692#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_ATAPI RT_BIT(13)
2693#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SEP RT_BIT(14)
2694
2695/**
2696 * SAS I/O unit page 2 - Read/Write
2697 */
2698#pragma pack(1)
2699typedef struct MptConfigurationPageSASIOUnit2
2700{
2701 /** Union. */
2702 union
2703 {
2704 /** Byte view - variable. */
2705 uint8_t abPageData[1];
2706 /** Field view. */
2707 struct
2708 {
2709 /** The omnipresent header. */
2710 MptExtendedConfigurationPageHeader ExtHeader;
2711 /** Device numbers per enclosure */
2712 uint8_t u8NumDevsPerEnclosure;
2713 /** Boot device wait time */
2714 uint8_t u8BootDeviceWaitTime;
2715 /** Reserved */
2716 uint16_t u16Reserved;
2717 /** Maximum number of persistent Bus and target ID mappings */
2718 uint16_t u16MaxPersistentIDs;
2719 /** Number of persistent IDs used */
2720 uint16_t u16NumPersistentIDsUsed;
2721 /** Status */
2722 uint8_t u8Status;
2723 /** Flags */
2724 uint8_t u8Flags;
2725 /** Maximum number of physical mapped IDs */
2726 uint16_t u16MaxNumPhysicalMappedIDs;
2727 } fields;
2728 } u;
2729} MptConfigurationPageSASIOUnit2, *PMptConfigurationPageSASIOUnit2;
2730#pragma pack()
2731AssertCompileSize(MptConfigurationPageSASIOUnit2, 20);
2732
2733#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_TBL_FULL RT_BIT(0)
2734#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_DISABLED RT_BIT(1)
2735#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_ENC_DEV_UNMAPPED RT_BIT(2)
2736#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_DEV_LIMIT_EXCEEDED RT_BIT(3)
2737
2738#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_MAP_DISABLE RT_BIT(0)
2739#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_SET(x) ((x & 0x7) << 1)
2740#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_GET(x) ((x >> 1) & 0x7)
2741#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_NO 0x0
2742#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_DIRECT_ATTACHED 0x1
2743#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_ENC 0x2
2744#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_HOST 0x7
2745#define LSILOGICSCSI_SASIOUNIT2_FLAGS_RESERVE_TARGET_ID_ZERO RT_BIT(4)
2746#define LSILOGICSCSI_SASIOUNIT2_FLAGS_START_SLOT_NUMBER_ONE RT_BIT(5)
2747
2748/**
2749 * SAS I/O unit page 3 - Read/Write
2750 */
2751#pragma pack(1)
2752typedef struct MptConfigurationPageSASIOUnit3
2753{
2754 /** Union. */
2755 union
2756 {
2757 /** Byte view - variable. */
2758 uint8_t abPageData[1];
2759 /** Field view. */
2760 struct
2761 {
2762 /** The omnipresent header. */
2763 MptExtendedConfigurationPageHeader ExtHeader;
2764 /** Reserved */
2765 uint32_t u32Reserved;
2766 uint32_t u32MaxInvalidDwordCount;
2767 uint32_t u32InvalidDwordCountTime;
2768 uint32_t u32MaxRunningDisparityErrorCount;
2769 uint32_t u32RunningDisparityErrorTime;
2770 uint32_t u32MaxLossDwordSynchCount;
2771 uint32_t u32LossDwordSynchCountTime;
2772 uint32_t u32MaxPhysResetProblemCount;
2773 uint32_t u32PhyResetProblemTime;
2774 } fields;
2775 } u;
2776} MptConfigurationPageSASIOUnit3, *PMptConfigurationPageSASIOUnit3;
2777#pragma pack()
2778AssertCompileSize(MptConfigurationPageSASIOUnit3, 44);
2779
2780/**
2781 * SAS PHY page 0 - Readonly
2782 */
2783#pragma pack(1)
2784typedef struct MptConfigurationPageSASPHY0
2785{
2786 /** Union. */
2787 union
2788 {
2789 /** Byte view - variable. */
2790 uint8_t abPageData[1];
2791 /** Field view. */
2792 struct
2793 {
2794 /** The omnipresent header. */
2795 MptExtendedConfigurationPageHeader ExtHeader;
2796 /** Owner dev handle. */
2797 uint16_t u16OwnerDevHandle;
2798 /** Reserved */
2799 uint16_t u16Reserved0;
2800 /** SAS address */
2801 SASADDRESS SASAddress;
2802 /** Attached device handle */
2803 uint16_t u16AttachedDevHandle;
2804 /** Attached phy identifier */
2805 uint8_t u8AttachedPhyIdentifier;
2806 /** Reserved */
2807 uint8_t u8Reserved1;
2808 /** Attached device information */
2809 uint32_t u32AttachedDeviceInfo;
2810 /** Programmed link rate */
2811 uint8_t u8ProgrammedLinkRate;
2812 /** Hardware link rate */
2813 uint8_t u8HwLinkRate;
2814 /** Change count */
2815 uint8_t u8ChangeCount;
2816 /** Flags */
2817 uint8_t u8Flags;
2818 /** Phy information */
2819 uint32_t u32PhyInfo;
2820 } fields;
2821 } u;
2822} MptConfigurationPageSASPHY0, *PMptConfigurationPageSASPHY0;
2823#pragma pack()
2824AssertCompileSize(MptConfigurationPageSASPHY0, 36);
2825
2826#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
2827#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
2828#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_NO 0x0
2829#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_END 0x1
2830#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
2831#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2832#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
2833#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
2834#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
2835#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
2836#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
2837#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
2838#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2839#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_LSI RT_BIT(12)
2840#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
2841#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SEP RT_BIT(14)
2842
2843/**
2844 * SAS PHY page 1 - Readonly
2845 */
2846#pragma pack(1)
2847typedef struct MptConfigurationPageSASPHY1
2848{
2849 /** Union. */
2850 union
2851 {
2852 /** Byte view - variable. */
2853 uint8_t abPageData[1];
2854 /** Field view. */
2855 struct
2856 {
2857 /** The omnipresent header. */
2858 MptExtendedConfigurationPageHeader ExtHeader;
2859 /** Reserved */
2860 uint32_t u32Reserved0;
2861 uint32_t u32InvalidDwordCound;
2862 uint32_t u32RunningDisparityErrorCount;
2863 uint32_t u32LossDwordSynchCount;
2864 uint32_t u32PhyResetProblemCount;
2865 } fields;
2866 } u;
2867} MptConfigurationPageSASPHY1, *PMptConfigurationPageSASPHY1;
2868#pragma pack()
2869AssertCompileSize(MptConfigurationPageSASPHY1, 28);
2870
2871/**
2872 * SAS Device page 0 - Readonly
2873 */
2874#pragma pack(1)
2875typedef struct MptConfigurationPageSASDevice0
2876{
2877 /** Union. */
2878 union
2879 {
2880 /** Byte view - variable. */
2881 uint8_t abPageData[1];
2882 /** Field view. */
2883 struct
2884 {
2885 /** The omnipresent header. */
2886 MptExtendedConfigurationPageHeader ExtHeader;
2887 /** Slot number */
2888 uint16_t u16Slot;
2889 /** Enclosure handle. */
2890 uint16_t u16EnclosureHandle;
2891 /** SAS address */
2892 SASADDRESS SASAddress;
2893 /** Parent device handle */
2894 uint16_t u16ParentDevHandle;
2895 /** Phy number */
2896 uint8_t u8PhyNum;
2897 /** Access status */
2898 uint8_t u8AccessStatus;
2899 /** Device handle */
2900 uint16_t u16DevHandle;
2901 /** Target ID */
2902 uint8_t u8TargetID;
2903 /** Bus */
2904 uint8_t u8Bus;
2905 /** Device info */
2906 uint32_t u32DeviceInfo;
2907 /** Flags */
2908 uint16_t u16Flags;
2909 /** Physical port */
2910 uint8_t u8PhysicalPort;
2911 /** Reserved */
2912 uint8_t u8Reserved0;
2913 } fields;
2914 } u;
2915} MptConfigurationPageSASDevice0, *PMptConfigurationPageSASDevice0;
2916#pragma pack()
2917AssertCompileSize(MptConfigurationPageSASDevice0, 36);
2918
2919#define LSILOGICSCSI_SASDEVICE0_STATUS_NO_ERRORS (0x00)
2920
2921#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
2922#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
2923#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_NO 0x0
2924#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_END 0x1
2925#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
2926#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2927#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
2928#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
2929#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
2930#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
2931#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
2932#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
2933#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2934#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_LSI RT_BIT(12)
2935#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
2936#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SEP RT_BIT(14)
2937
2938#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_PRESENT (RT_BIT(0))
2939#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPED_TO_BUS_AND_TARGET_ID (RT_BIT(1))
2940#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPING_PERSISTENT (RT_BIT(2))
2941
2942/**
2943 * SAS Device page 1 - Readonly
2944 */
2945#pragma pack(1)
2946typedef struct MptConfigurationPageSASDevice1
2947{
2948 /** Union. */
2949 union
2950 {
2951 /** Byte view - variable. */
2952 uint8_t abPageData[1];
2953 /** Field view. */
2954 struct
2955 {
2956 /** The omnipresent header. */
2957 MptExtendedConfigurationPageHeader ExtHeader;
2958 /** Reserved */
2959 uint32_t u32Reserved0;
2960 /** SAS address */
2961 SASADDRESS SASAddress;
2962 /** Reserved */
2963 uint32_t u32Reserved;
2964 /** Device handle */
2965 uint16_t u16DevHandle;
2966 /** Target ID */
2967 uint8_t u8TargetID;
2968 /** Bus */
2969 uint8_t u8Bus;
2970 /** Initial REgister device FIS */
2971 uint32_t au32InitialRegDeviceFIS[5];
2972 } fields;
2973 } u;
2974} MptConfigurationPageSASDevice1, *PMptConfigurationPageSASDevice1;
2975#pragma pack()
2976AssertCompileSize(MptConfigurationPageSASDevice1, 48);
2977
2978/**
2979 * SAS Device page 2 - Read/Write persistent
2980 */
2981#pragma pack(1)
2982typedef struct MptConfigurationPageSASDevice2
2983{
2984 /** Union. */
2985 union
2986 {
2987 /** Byte view - variable. */
2988 uint8_t abPageData[1];
2989 /** Field view. */
2990 struct
2991 {
2992 /** The omnipresent header. */
2993 MptExtendedConfigurationPageHeader ExtHeader;
2994 /** Physical identifier */
2995 SASADDRESS SASAddress;
2996 /** Enclosure mapping */
2997 uint32_t u32EnclosureMapping;
2998 } fields;
2999 } u;
3000} MptConfigurationPageSASDevice2, *PMptConfigurationPageSASDevice2;
3001#pragma pack()
3002AssertCompileSize(MptConfigurationPageSASDevice2, 20);
3003
3004/**
3005 * A device entitiy containing all pages.
3006 */
3007typedef struct MptSASDevice
3008{
3009 /** Pointer to the next device if any. */
3010 struct MptSASDevice *pNext;
3011 /** Pointer to the previous device if any. */
3012 struct MptSASDevice *pPrev;
3013
3014 MptConfigurationPageSASDevice0 SASDevicePage0;
3015 MptConfigurationPageSASDevice1 SASDevicePage1;
3016 MptConfigurationPageSASDevice2 SASDevicePage2;
3017} MptSASDevice, *PMptSASDevice;
3018
3019/**
3020 * SAS Expander page 0 - Readonly
3021 */
3022#pragma pack(1)
3023typedef struct MptConfigurationPageSASExpander0
3024{
3025 /** Union. */
3026 union
3027 {
3028 /** Byte view - variable. */
3029 uint8_t abPageData[1];
3030 /** Field view. */
3031 struct
3032 {
3033 /** The omnipresent header. */
3034 MptExtendedConfigurationPageHeader ExtHeader;
3035 /** Physical port */
3036 uint8_t u8PhysicalPort;
3037 /** Reserved */
3038 uint8_t u8Reserved0;
3039 /** Enclosure handle */
3040 uint16_t u16EnclosureHandle;
3041 /** SAS address */
3042 SASADDRESS SASAddress;
3043 /** Discovery status */
3044 uint32_t u32DiscoveryStatus;
3045 /** Device handle. */
3046 uint16_t u16DevHandle;
3047 /** Parent device handle */
3048 uint16_t u16ParentDevHandle;
3049 /** Expander change count */
3050 uint16_t u16ExpanderChangeCount;
3051 /** Expander route indexes */
3052 uint16_t u16ExpanderRouteIndexes;
3053 /** Number of PHys in this expander */
3054 uint8_t u8NumPhys;
3055 /** SAS level */
3056 uint8_t u8SASLevel;
3057 /** Flags */
3058 uint8_t u8Flags;
3059 /** Reserved */
3060 uint8_t u8Reserved1;
3061 } fields;
3062 } u;
3063} MptConfigurationPageSASExpander0, *PMptConfigurationPageSASExpander0;
3064#pragma pack()
3065AssertCompileSize(MptConfigurationPageSASExpander0, 36);
3066
3067/**
3068 * SAS Expander page 1 - Readonly
3069 */
3070#pragma pack(1)
3071typedef struct MptConfigurationPageSASExpander1
3072{
3073 /** Union. */
3074 union
3075 {
3076 /** Byte view - variable. */
3077 uint8_t abPageData[1];
3078 /** Field view. */
3079 struct
3080 {
3081 /** The omnipresent header. */
3082 MptExtendedConfigurationPageHeader ExtHeader;
3083 /** Physical port */
3084 uint8_t u8PhysicalPort;
3085 /** Reserved */
3086 uint8_t u8Reserved0[3];
3087 /** Number of PHYs */
3088 uint8_t u8NumPhys;
3089 /** Number of the Phy the information in this page is for. */
3090 uint8_t u8Phy;
3091 /** Number of routing table entries */
3092 uint16_t u16NumTableEntriesProgrammed;
3093 /** Programmed link rate */
3094 uint8_t u8ProgrammedLinkRate;
3095 /** Hardware link rate */
3096 uint8_t u8HwLinkRate;
3097 /** Attached device handle */
3098 uint16_t u16AttachedDevHandle;
3099 /** Phy information */
3100 uint32_t u32PhyInfo;
3101 /** Attached device information */
3102 uint32_t u32AttachedDeviceInfo;
3103 /** Owner device handle. */
3104 uint16_t u16OwnerDevHandle;
3105 /** Change count */
3106 uint8_t u8ChangeCount;
3107 /** Negotiated link rate */
3108 uint8_t u8NegotiatedLinkRate;
3109 /** Phy identifier */
3110 uint8_t u8PhyIdentifier;
3111 /** Attached phy identifier */
3112 uint8_t u8AttachedPhyIdentifier;
3113 /** Reserved */
3114 uint8_t u8Reserved1;
3115 /** Discovery information */
3116 uint8_t u8DiscoveryInfo;
3117 /** Reserved */
3118 uint32_t u32Reserved;
3119 } fields;
3120 } u;
3121} MptConfigurationPageSASExpander1, *PMptConfigurationPageSASExpander1;
3122#pragma pack()
3123AssertCompileSize(MptConfigurationPageSASExpander1, 40);
3124
3125/**
3126 * Structure of all supported pages for the SCSI SPI controller.
3127 * Used to load the device state from older versions.
3128 */
3129typedef struct MptConfigurationPagesSupported_SSM_V2
3130{
3131 MptConfigurationPageManufacturing0 ManufacturingPage0;
3132 MptConfigurationPageManufacturing1 ManufacturingPage1;
3133 MptConfigurationPageManufacturing2 ManufacturingPage2;
3134 MptConfigurationPageManufacturing3 ManufacturingPage3;
3135 MptConfigurationPageManufacturing4 ManufacturingPage4;
3136 MptConfigurationPageIOUnit0 IOUnitPage0;
3137 MptConfigurationPageIOUnit1 IOUnitPage1;
3138 MptConfigurationPageIOUnit2 IOUnitPage2;
3139 MptConfigurationPageIOUnit3 IOUnitPage3;
3140 MptConfigurationPageIOC0 IOCPage0;
3141 MptConfigurationPageIOC1 IOCPage1;
3142 MptConfigurationPageIOC2 IOCPage2;
3143 MptConfigurationPageIOC3 IOCPage3;
3144 MptConfigurationPageIOC4 IOCPage4;
3145 MptConfigurationPageIOC6 IOCPage6;
3146 struct
3147 {
3148 MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3149 MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3150 MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3151 } aPortPages[1]; /* Currently only one port supported. */
3152 struct
3153 {
3154 struct
3155 {
3156 MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3157 MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3158 MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3159 MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3160 } aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3161 } aBuses[1]; /* Only one bus at the moment. */
3162} MptConfigurationPagesSupported_SSM_V2, *PMptConfigurationPagesSupported_SSM_V2;
3163
3164typedef struct MptConfigurationPagesSpi
3165{
3166 struct
3167 {
3168 MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3169 MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3170 MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3171 } aPortPages[1]; /* Currently only one port supported. */
3172 struct
3173 {
3174 struct
3175 {
3176 MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3177 MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3178 MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3179 MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3180 } aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3181 } aBuses[1]; /* Only one bus at the moment. */
3182} MptConfigurationPagesSpi, *PMptConfigurationPagesSpi;
3183
3184typedef struct MptPHY
3185{
3186 MptConfigurationPageSASPHY0 SASPHYPage0;
3187 MptConfigurationPageSASPHY1 SASPHYPage1;
3188} MptPHY, *PMptPHY;
3189
3190#pragma pack(1)
3191typedef struct MptConfigurationPagesSas
3192{
3193 /** Size of the manufacturing page 7 */
3194 uint32_t cbManufacturingPage7;
3195 /** Pointer to the manufacturing page 7 */
3196 PMptConfigurationPageManufacturing7 pManufacturingPage7;
3197 /** Size of the I/O unit page 0 */
3198 uint32_t cbSASIOUnitPage0;
3199 /** Pointer to the I/O unit page 0 */
3200 PMptConfigurationPageSASIOUnit0 pSASIOUnitPage0;
3201 /** Size of the I/O unit page 1 */
3202 uint32_t cbSASIOUnitPage1;
3203 /** Pointer to the I/O unit page 1 */
3204 PMptConfigurationPageSASIOUnit1 pSASIOUnitPage1;
3205 /** I/O unit page 2 */
3206 MptConfigurationPageSASIOUnit2 SASIOUnitPage2;
3207 /** I/O unit page 3 */
3208 MptConfigurationPageSASIOUnit3 SASIOUnitPage3;
3209
3210 /** Number of PHYs in the array. */
3211 uint32_t cPHYs;
3212 /** Pointer to an array of per PHYS pages. */
3213 R3PTRTYPE(PMptPHY) paPHYs;
3214
3215 /** Number of devices detected. */
3216 uint32_t cDevices;
3217 /** Pointer to the first SAS device. */
3218 R3PTRTYPE(PMptSASDevice) pSASDeviceHead;
3219 /** Pointer to the last SAS device. */
3220 R3PTRTYPE(PMptSASDevice) pSASDeviceTail;
3221} MptConfigurationPagesSas, *PMptConfigurationPagesSas;
3222#pragma pack()
3223
3224/**
3225 * Structure of all supported pages for both controllers.
3226 */
3227typedef struct MptConfigurationPagesSupported
3228{
3229 MptConfigurationPageManufacturing0 ManufacturingPage0;
3230 MptConfigurationPageManufacturing1 ManufacturingPage1;
3231 MptConfigurationPageManufacturing2 ManufacturingPage2;
3232 MptConfigurationPageManufacturing3 ManufacturingPage3;
3233 MptConfigurationPageManufacturing4 ManufacturingPage4;
3234 MptConfigurationPageManufacturing5 ManufacturingPage5;
3235 MptConfigurationPageManufacturing6 ManufacturingPage6;
3236 MptConfigurationPageManufacturing8 ManufacturingPage8;
3237 MptConfigurationPageManufacturing9 ManufacturingPage9;
3238 MptConfigurationPageManufacturing10 ManufacturingPage10;
3239 MptConfigurationPageIOUnit0 IOUnitPage0;
3240 MptConfigurationPageIOUnit1 IOUnitPage1;
3241 MptConfigurationPageIOUnit2 IOUnitPage2;
3242 MptConfigurationPageIOUnit3 IOUnitPage3;
3243 MptConfigurationPageIOUnit4 IOUnitPage4;
3244 MptConfigurationPageIOC0 IOCPage0;
3245 MptConfigurationPageIOC1 IOCPage1;
3246 MptConfigurationPageIOC2 IOCPage2;
3247 MptConfigurationPageIOC3 IOCPage3;
3248 MptConfigurationPageIOC4 IOCPage4;
3249 MptConfigurationPageIOC6 IOCPage6;
3250 /* BIOS page 0 is not described */
3251 MptConfigurationPageBIOS1 BIOSPage1;
3252 MptConfigurationPageBIOS2 BIOSPage2;
3253 /* BIOS page 3 is not described */
3254 MptConfigurationPageBIOS4 BIOSPage4;
3255
3256 /** Controller dependent data. */
3257 union
3258 {
3259 MptConfigurationPagesSpi SpiPages;
3260 MptConfigurationPagesSas SasPages;
3261 } u;
3262} MptConfigurationPagesSupported, *PMptConfigurationPagesSupported;
3263
3264/**
3265 * Initializes a page header.
3266 */
3267#define MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags) \
3268 (pg)->u.fields.Header.u8PageType = flags; \
3269 (pg)->u.fields.Header.u8PageNumber = nr; \
3270 (pg)->u.fields.Header.u8PageLength = sizeof(type) / 4
3271
3272#define MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(pg, type, nr, flags) \
3273 MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags | MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING)
3274
3275#define MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(pg, type, nr, flags) \
3276 MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags | MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT)
3277
3278#define MPT_CONFIG_PAGE_HEADER_INIT_IOC(pg, type, nr, flags) \
3279 MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags | MPT_CONFIGURATION_PAGE_TYPE_IOC)
3280
3281#define MPT_CONFIG_PAGE_HEADER_INIT_BIOS(pg, type, nr, flags) \
3282 MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags | MPT_CONFIGURATION_PAGE_TYPE_BIOS)
3283
3284/**
3285 * Initializes a extended page header.
3286 */
3287#define MPT_CONFIG_EXTENDED_PAGE_HEADER_INIT(pg, cb, nr, flags, exttype) \
3288 (pg)->u.fields.ExtHeader.u8PageType = flags | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED; \
3289 (pg)->u.fields.ExtHeader.u8PageNumber = nr; \
3290 (pg)->u.fields.ExtHeader.u8ExtPageType = exttype; \
3291 (pg)->u.fields.ExtHeader.u16ExtPageLength = cb / 4
3292
3293/**
3294 * Possible SG element types.
3295 */
3296enum MPTSGENTRYTYPE
3297{
3298 MPTSGENTRYTYPE_TRANSACTION_CONTEXT = 0x00,
3299 MPTSGENTRYTYPE_SIMPLE = 0x01,
3300 MPTSGENTRYTYPE_CHAIN = 0x03
3301};
3302
3303/**
3304 * Register interface.
3305 */
3306
3307/**
3308 * Defined states that the SCSI controller can have.
3309 */
3310typedef enum LSILOGICSTATE
3311{
3312 /** Reset state. */
3313 LSILOGICSTATE_RESET = 0x00,
3314 /** Ready state. */
3315 LSILOGICSTATE_READY = 0x01,
3316 /** Operational state. */
3317 LSILOGICSTATE_OPERATIONAL = 0x02,
3318 /** Fault state. */
3319 LSILOGICSTATE_FAULT = 0x04,
3320 /** 32bit size hack */
3321 LSILOGICSTATE_32BIT_HACK = 0x7fffffff
3322} LSILOGICSTATE;
3323
3324/**
3325 * Which entity needs to initialize the controller
3326 * to get into the operational state.
3327 */
3328typedef enum LSILOGICWHOINIT
3329{
3330 /** Not initialized. */
3331 LSILOGICWHOINIT_NOT_INITIALIZED = 0x00,
3332 /** System BIOS. */
3333 LSILOGICWHOINIT_SYSTEM_BIOS = 0x01,
3334 /** ROM Bios. */
3335 LSILOGICWHOINIT_ROM_BIOS = 0x02,
3336 /** PCI Peer. */
3337 LSILOGICWHOINIT_PCI_PEER = 0x03,
3338 /** Host driver. */
3339 LSILOGICWHOINIT_HOST_DRIVER = 0x04,
3340 /** Manufacturing. */
3341 LSILOGICWHOINIT_MANUFACTURING = 0x05,
3342 /** 32bit size hack. */
3343 LSILOGICWHOINIT_32BIT_HACK = 0x7fffffff
3344} LSILOGICWHOINIT;
3345
3346
3347/**
3348 * IOC status codes.
3349 */
3350#define LSILOGIC_IOCSTATUS_SUCCESS 0x0000
3351#define LSILOGIC_IOCSTATUS_INVALID_FUNCTION 0x0001
3352#define LSILOGIC_IOCSTATUS_BUSY 0x0002
3353#define LSILOGIC_IOCSTATUS_INVALID_SGL 0x0003
3354#define LSILOGIC_IOCSTATUS_INTERNAL_ERROR 0x0004
3355#define LSILOGIC_IOCSTATUS_RESERVED 0x0005
3356#define LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES 0x0006
3357#define LSILOGIC_IOCSTATUS_INVALID_FIELD 0x0007
3358#define LSILOGIC_IOCSTATUS_INVALID_STATE 0x0008
3359#define LSILOGIC_IOCSTATUS_OP_STATE_NOT_SUPPOTED 0x0009
3360
3361/**
3362 * Size of the I/O and MMIO space.
3363 */
3364#define LSILOGIC_PCI_SPACE_IO_SIZE 256
3365#define LSILOGIC_PCI_SPACE_MEM_SIZE 128 * _1K
3366
3367/**
3368 * Doorbell register - Used to get the status of the controller and
3369 * initialise it.
3370 */
3371#define LSILOGIC_REG_DOORBELL 0x00
3372# define LSILOGIC_REG_DOORBELL_SET_STATE(enmState) (((enmState) & 0x0f) << 28)
3373# define LSILOGIC_REG_DOORBELL_SET_USED(fUsed) (((fUsed) ? 1 : 0) << 27)
3374# define LSILOGIC_REG_DOORBELL_SET_WHOINIT(enmWhoInit) (((enmWhoInit) & 0x07) << 24)
3375# define LSILOGIC_REG_DOORBELL_SET_FAULT_CODE(u16Code) (u16Code)
3376# define LSILOGIC_REG_DOORBELL_GET_FUNCTION(x) (((x) & 0xff000000) >> 24)
3377# define LSILOGIC_REG_DOORBELL_GET_SIZE(x) (((x) & 0x00ff0000) >> 16)
3378
3379/**
3380 * Functions which can be passed through the system doorbell.
3381 */
3382#define LSILOGIC_DOORBELL_FUNCTION_IOC_MSG_UNIT_RESET 0x40
3383#define LSILOGIC_DOORBELL_FUNCTION_IO_UNIT_RESET 0x41
3384#define LSILOGIC_DOORBELL_FUNCTION_HANDSHAKE 0x42
3385#define LSILOGIC_DOORBELL_FUNCTION_REPLY_FRAME_REMOVAL 0x43
3386
3387/**
3388 * Write sequence register for the diagnostic register.
3389 */
3390#define LSILOGIC_REG_WRITE_SEQUENCE 0x04
3391
3392/**
3393 * Diagnostic register - used to reset the controller.
3394 */
3395#define LSILOGIC_REG_HOST_DIAGNOSTIC 0x08
3396# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_MEM_ENABLE (RT_BIT(0))
3397# define LSILOGIC_REG_HOST_DIAGNOSTIC_DISABLE_ARM (RT_BIT(1))
3398# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_ADAPTER (RT_BIT(2))
3399# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_RW_ENABLE (RT_BIT(4))
3400# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_HISTORY (RT_BIT(5))
3401# define LSILOGIC_REG_HOST_DIAGNOSTIC_FLASH_BAD_SIG (RT_BIT(6))
3402# define LSILOGIC_REG_HOST_DIAGNOSTIC_DRWE (RT_BIT(7))
3403# define LSILOGIC_REG_HOST_DIAGNOSTIC_PREVENT_IOC_BOOT (RT_BIT(9))
3404# define LSILOGIC_REG_HOST_DIAGNOSTIC_CLEAR_FLASH_BAD_SIG (RT_BIT(10))
3405
3406#define LSILOGIC_REG_TEST_BASE_ADDRESS 0x0c
3407#define LSILOGIC_REG_DIAG_RW_DATA 0x10
3408#define LSILOGIC_REG_DIAG_RW_ADDRESS 0x14
3409
3410/**
3411 * Interrupt status register.
3412 */
3413#define LSILOGIC_REG_HOST_INTR_STATUS 0x30
3414# define LSILOGIC_REG_HOST_INTR_STATUS_W_MASK (RT_BIT(3))
3415# define LSILOGIC_REG_HOST_INTR_STATUS_DOORBELL_STS (RT_BIT(31))
3416# define LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR (RT_BIT(3))
3417# define LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL (RT_BIT(0))
3418
3419/**
3420 * Interrupt mask register.
3421 */
3422#define LSILOGIC_REG_HOST_INTR_MASK 0x34
3423# define LSILOGIC_REG_HOST_INTR_MASK_W_MASK (RT_BIT(0) | RT_BIT(3) | RT_BIT(8) | RT_BIT(9))
3424# define LSILOGIC_REG_HOST_INTR_MASK_IRQ_ROUTING (RT_BIT(8) | RT_BIT(9))
3425# define LSILOGIC_REG_HOST_INTR_MASK_DOORBELL RT_BIT(0)
3426# define LSILOGIC_REG_HOST_INTR_MASK_REPLY RT_BIT(3)
3427
3428/**
3429 * Queue registers.
3430 */
3431#define LSILOGIC_REG_REQUEST_QUEUE 0x40
3432#define LSILOGIC_REG_REPLY_QUEUE 0x44
3433
3434#endif /* __DEVLSILOGICSCSI_H__ */
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